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9dc367bc MW |
1 | /* |
2 | * GE PIO2 6U VME I/O Driver | |
3 | * | |
4 | * Author: Martyn Welch <martyn.welch@ge.com> | |
5 | * Copyright 2009 GE Intelligent Platforms Embedded Systems, Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; either version 2 of the License, or (at your | |
10 | * option) any later version. | |
11 | */ | |
12 | ||
736f5d0a TY |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
14 | ||
9dc367bc MW |
15 | #include <linux/module.h> |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/types.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/ctype.h> | |
22 | #include <linux/gpio.h> | |
23 | #include <linux/slab.h> | |
db3b9e99 | 24 | #include <linux/vme.h> |
9dc367bc | 25 | |
9dc367bc MW |
26 | #include "vme_pio2.h" |
27 | ||
28 | ||
29 | static const char driver_name[] = "pio2"; | |
30 | ||
31 | static int bus[PIO2_CARDS_MAX]; | |
32 | static int bus_num; | |
33 | static long base[PIO2_CARDS_MAX]; | |
34 | static int base_num; | |
35 | static int vector[PIO2_CARDS_MAX]; | |
36 | static int vector_num; | |
37 | static int level[PIO2_CARDS_MAX]; | |
38 | static int level_num; | |
eaa004a4 | 39 | static char *variant[PIO2_CARDS_MAX]; |
9dc367bc MW |
40 | static int variant_num; |
41 | ||
eaa004a4 | 42 | static bool loopback; |
9dc367bc MW |
43 | |
44 | static int pio2_match(struct vme_dev *); | |
d7e530d2 | 45 | static int pio2_probe(struct vme_dev *); |
f21a8247 | 46 | static int pio2_remove(struct vme_dev *); |
9dc367bc MW |
47 | |
48 | static int pio2_get_led(struct pio2_card *card) | |
49 | { | |
50 | /* Can't read hardware, state saved in structure */ | |
51 | return card->led; | |
52 | } | |
53 | ||
54 | static int pio2_set_led(struct pio2_card *card, int state) | |
55 | { | |
56 | u8 reg; | |
57 | int retval; | |
58 | ||
59 | reg = card->irq_level; | |
60 | ||
61 | /* Register state inverse of led state */ | |
62 | if (!state) | |
63 | reg |= PIO2_LED; | |
64 | ||
65 | if (loopback) | |
66 | reg |= PIO2_LOOP; | |
67 | ||
68 | retval = vme_master_write(card->window, ®, 1, PIO2_REGS_CTRL); | |
69 | if (retval < 0) | |
70 | return retval; | |
71 | ||
72 | card->led = state ? 1 : 0; | |
73 | ||
74 | return 0; | |
75 | } | |
76 | ||
77 | static void pio2_int(int level, int vector, void *ptr) | |
78 | { | |
79 | int vec, i, channel, retval; | |
80 | u8 reg; | |
81 | struct pio2_card *card = ptr; | |
82 | ||
83 | vec = vector & ~PIO2_VME_VECTOR_MASK; | |
84 | ||
85 | switch (vec) { | |
86 | case 0: | |
87 | dev_warn(&card->vdev->dev, "Spurious Interrupt\n"); | |
88 | break; | |
89 | case 1: | |
90 | case 2: | |
91 | case 3: | |
92 | case 4: | |
93 | /* Channels 0 to 7 */ | |
94 | retval = vme_master_read(card->window, ®, 1, | |
95 | PIO2_REGS_INT_STAT[vec - 1]); | |
96 | if (retval < 0) { | |
97 | dev_err(&card->vdev->dev, | |
98 | "Unable to read IRQ status register\n"); | |
99 | return; | |
100 | } | |
101 | for (i = 0; i < 8; i++) { | |
102 | channel = ((vec - 1) * 8) + i; | |
103 | if (reg & PIO2_CHANNEL_BIT[channel]) | |
104 | dev_info(&card->vdev->dev, | |
105 | "Interrupt on I/O channel %d\n", | |
106 | channel); | |
107 | } | |
108 | break; | |
109 | case 5: | |
110 | case 6: | |
111 | case 7: | |
112 | case 8: | |
113 | case 9: | |
114 | case 10: | |
115 | /* Counters are dealt with by their own handler */ | |
116 | dev_err(&card->vdev->dev, | |
117 | "Counter interrupt\n"); | |
118 | break; | |
119 | } | |
120 | } | |
121 | ||
122 | ||
123 | /* | |
124 | * We return whether this has been successful - this is used in the probe to | |
125 | * ensure we have a valid card. | |
126 | */ | |
127 | static int pio2_reset_card(struct pio2_card *card) | |
128 | { | |
129 | int retval = 0; | |
130 | u8 data = 0; | |
131 | ||
132 | /* Clear main register*/ | |
133 | retval = vme_master_write(card->window, &data, 1, PIO2_REGS_CTRL); | |
134 | if (retval < 0) | |
135 | return retval; | |
136 | ||
137 | /* Clear VME vector */ | |
138 | retval = vme_master_write(card->window, &data, 1, PIO2_REGS_VME_VECTOR); | |
139 | if (retval < 0) | |
140 | return retval; | |
141 | ||
142 | /* Reset GPIO */ | |
143 | retval = pio2_gpio_reset(card); | |
144 | if (retval < 0) | |
145 | return retval; | |
146 | ||
147 | /* Reset counters */ | |
148 | retval = pio2_cntr_reset(card); | |
149 | if (retval < 0) | |
150 | return retval; | |
151 | ||
152 | return 0; | |
153 | } | |
154 | ||
155 | static struct vme_driver pio2_driver = { | |
156 | .name = driver_name, | |
157 | .match = pio2_match, | |
158 | .probe = pio2_probe, | |
38930755 | 159 | .remove = pio2_remove, |
9dc367bc MW |
160 | }; |
161 | ||
162 | ||
163 | static int __init pio2_init(void) | |
164 | { | |
9dc367bc | 165 | if (bus_num == 0) { |
736f5d0a | 166 | pr_err("No cards, skipping registration\n"); |
9349f8af | 167 | return -ENODEV; |
9dc367bc MW |
168 | } |
169 | ||
170 | if (bus_num > PIO2_CARDS_MAX) { | |
736f5d0a TY |
171 | pr_err("Driver only able to handle %d PIO2 Cards\n", |
172 | PIO2_CARDS_MAX); | |
9dc367bc MW |
173 | bus_num = PIO2_CARDS_MAX; |
174 | } | |
175 | ||
176 | /* Register the PIO2 driver */ | |
9349f8af | 177 | return vme_register_driver(&pio2_driver, bus_num); |
9dc367bc MW |
178 | } |
179 | ||
180 | static int pio2_match(struct vme_dev *vdev) | |
181 | { | |
182 | ||
183 | if (vdev->num >= bus_num) { | |
184 | dev_err(&vdev->dev, | |
185 | "The enumeration of the VMEbus to which the board is connected must be specified"); | |
186 | return 0; | |
187 | } | |
188 | ||
189 | if (vdev->num >= base_num) { | |
190 | dev_err(&vdev->dev, | |
191 | "The VME address for the cards registers must be specified"); | |
192 | return 0; | |
193 | } | |
194 | ||
195 | if (vdev->num >= vector_num) { | |
196 | dev_err(&vdev->dev, | |
197 | "The IRQ vector used by the card must be specified"); | |
198 | return 0; | |
199 | } | |
200 | ||
201 | if (vdev->num >= level_num) { | |
202 | dev_err(&vdev->dev, | |
203 | "The IRQ level used by the card must be specified"); | |
204 | return 0; | |
205 | } | |
206 | ||
207 | if (vdev->num >= variant_num) { | |
208 | dev_err(&vdev->dev, "The variant of the card must be specified"); | |
209 | return 0; | |
210 | } | |
211 | ||
212 | return 1; | |
213 | } | |
214 | ||
d7e530d2 | 215 | static int pio2_probe(struct vme_dev *vdev) |
9dc367bc MW |
216 | { |
217 | struct pio2_card *card; | |
218 | int retval; | |
219 | int i; | |
220 | u8 reg; | |
221 | int vec; | |
222 | ||
223 | card = kzalloc(sizeof(struct pio2_card), GFP_KERNEL); | |
224 | if (card == NULL) { | |
225 | dev_err(&vdev->dev, "Unable to allocate card structure\n"); | |
226 | retval = -ENOMEM; | |
227 | goto err_struct; | |
228 | } | |
229 | ||
230 | card->id = vdev->num; | |
231 | card->bus = bus[card->id]; | |
232 | card->base = base[card->id]; | |
233 | card->irq_vector = vector[card->id]; | |
234 | card->irq_level = level[card->id] & PIO2_VME_INT_MASK; | |
235 | strncpy(card->variant, variant[card->id], PIO2_VARIANT_LENGTH); | |
236 | card->vdev = vdev; | |
237 | ||
238 | for (i = 0; i < PIO2_VARIANT_LENGTH; i++) { | |
239 | ||
240 | if (isdigit(card->variant[i]) == 0) { | |
241 | dev_err(&card->vdev->dev, "Variant invalid\n"); | |
242 | retval = -EINVAL; | |
243 | goto err_variant; | |
244 | } | |
245 | } | |
246 | ||
247 | /* | |
248 | * Bottom 4 bits of VME interrupt vector used to determine source, | |
249 | * provided vector should only use upper 4 bits. | |
250 | */ | |
251 | if (card->irq_vector & ~PIO2_VME_VECTOR_MASK) { | |
252 | dev_err(&card->vdev->dev, | |
253 | "Invalid VME IRQ Vector, vector must not use lower 4 bits\n"); | |
254 | retval = -EINVAL; | |
255 | goto err_vector; | |
256 | } | |
257 | ||
258 | /* | |
259 | * There is no way to determine the build variant or whether each bank | |
260 | * is input, output or both at run time. The inputs are also inverted | |
261 | * if configured as both. | |
262 | * | |
263 | * We pass in the board variant and use that to determine the | |
264 | * configuration of the banks. | |
265 | */ | |
266 | for (i = 1; i < PIO2_VARIANT_LENGTH; i++) { | |
267 | switch (card->variant[i]) { | |
268 | case '0': | |
269 | card->bank[i-1].config = NOFIT; | |
270 | break; | |
271 | case '1': | |
272 | case '2': | |
273 | case '3': | |
274 | case '4': | |
275 | card->bank[i-1].config = INPUT; | |
276 | break; | |
277 | case '5': | |
278 | card->bank[i-1].config = OUTPUT; | |
279 | break; | |
280 | case '6': | |
281 | case '7': | |
282 | case '8': | |
283 | case '9': | |
284 | card->bank[i-1].config = BOTH; | |
285 | break; | |
286 | } | |
287 | } | |
288 | ||
289 | /* Get a master window and position over regs */ | |
290 | card->window = vme_master_request(vdev, VME_A24, VME_SCT, VME_D16); | |
291 | if (card->window == NULL) { | |
292 | dev_err(&card->vdev->dev, | |
293 | "Unable to assign VME master resource\n"); | |
294 | retval = -EIO; | |
295 | goto err_window; | |
296 | } | |
297 | ||
298 | retval = vme_master_set(card->window, 1, card->base, 0x10000, VME_A24, | |
299 | (VME_SCT | VME_USER | VME_DATA), VME_D16); | |
300 | if (retval) { | |
301 | dev_err(&card->vdev->dev, | |
302 | "Unable to configure VME master resource\n"); | |
303 | goto err_set; | |
304 | } | |
305 | ||
306 | /* | |
307 | * There is also no obvious register which we can probe to determine | |
308 | * whether the provided base is valid. If we can read the "ID Register" | |
309 | * offset and the reset function doesn't error, assume we have a valid | |
310 | * location. | |
311 | */ | |
312 | retval = vme_master_read(card->window, ®, 1, PIO2_REGS_ID); | |
313 | if (retval < 0) { | |
314 | dev_err(&card->vdev->dev, "Unable to read from device\n"); | |
315 | goto err_read; | |
316 | } | |
317 | ||
318 | dev_dbg(&card->vdev->dev, "ID Register:%x\n", reg); | |
319 | ||
320 | /* | |
321 | * Ensure all the I/O is cleared. We can't read back the states, so | |
322 | * this is the only method we have to ensure that the I/O is in a known | |
323 | * state. | |
324 | */ | |
325 | retval = pio2_reset_card(card); | |
326 | if (retval) { | |
327 | dev_err(&card->vdev->dev, | |
328 | "Failed to reset card, is location valid?"); | |
329 | retval = -ENODEV; | |
330 | goto err_reset; | |
331 | } | |
332 | ||
333 | /* Configure VME Interrupts */ | |
334 | reg = card->irq_level; | |
335 | if (pio2_get_led(card)) | |
336 | reg |= PIO2_LED; | |
337 | if (loopback) | |
338 | reg |= PIO2_LOOP; | |
339 | retval = vme_master_write(card->window, ®, 1, PIO2_REGS_CTRL); | |
340 | if (retval < 0) | |
341 | return retval; | |
342 | ||
343 | /* Set VME vector */ | |
344 | retval = vme_master_write(card->window, &card->irq_vector, 1, | |
345 | PIO2_REGS_VME_VECTOR); | |
346 | if (retval < 0) | |
347 | return retval; | |
348 | ||
349 | /* Attach spurious interrupt handler. */ | |
350 | vec = card->irq_vector | PIO2_VME_VECTOR_SPUR; | |
351 | ||
352 | retval = vme_irq_request(vdev, card->irq_level, vec, | |
353 | &pio2_int, (void *)card); | |
354 | if (retval < 0) { | |
355 | dev_err(&card->vdev->dev, | |
356 | "Unable to attach VME interrupt vector0x%x, level 0x%x\n", | |
357 | vec, card->irq_level); | |
358 | goto err_irq; | |
359 | } | |
360 | ||
361 | /* Attach GPIO interrupt handlers. */ | |
362 | for (i = 0; i < 4; i++) { | |
363 | vec = card->irq_vector | PIO2_VECTOR_BANK[i]; | |
364 | ||
365 | retval = vme_irq_request(vdev, card->irq_level, vec, | |
366 | &pio2_int, (void *)card); | |
367 | if (retval < 0) { | |
368 | dev_err(&card->vdev->dev, | |
369 | "Unable to attach VME interrupt vector0x%x, level 0x%x\n", | |
370 | vec, card->irq_level); | |
371 | goto err_gpio_irq; | |
372 | } | |
373 | } | |
374 | ||
375 | /* Attach counter interrupt handlers. */ | |
376 | for (i = 0; i < 6; i++) { | |
377 | vec = card->irq_vector | PIO2_VECTOR_CNTR[i]; | |
378 | ||
379 | retval = vme_irq_request(vdev, card->irq_level, vec, | |
380 | &pio2_int, (void *)card); | |
381 | if (retval < 0) { | |
382 | dev_err(&card->vdev->dev, | |
383 | "Unable to attach VME interrupt vector0x%x, level 0x%x\n", | |
384 | vec, card->irq_level); | |
385 | goto err_cntr_irq; | |
386 | } | |
387 | } | |
388 | ||
389 | /* Register IO */ | |
390 | retval = pio2_gpio_init(card); | |
391 | if (retval < 0) { | |
392 | dev_err(&card->vdev->dev, | |
393 | "Unable to register with GPIO framework\n"); | |
394 | goto err_gpio; | |
395 | } | |
396 | ||
397 | /* Set LED - This also sets interrupt level */ | |
398 | retval = pio2_set_led(card, 0); | |
399 | if (retval < 0) { | |
400 | dev_err(&card->vdev->dev, "Unable to set LED\n"); | |
401 | goto err_led; | |
402 | } | |
403 | ||
404 | dev_set_drvdata(&card->vdev->dev, card); | |
405 | ||
406 | dev_info(&card->vdev->dev, | |
407 | "PIO2 (variant %s) configured at 0x%lx\n", card->variant, | |
408 | card->base); | |
409 | ||
410 | return 0; | |
411 | ||
412 | err_led: | |
413 | pio2_gpio_exit(card); | |
414 | err_gpio: | |
415 | i = 6; | |
416 | err_cntr_irq: | |
417 | while (i > 0) { | |
418 | i--; | |
419 | vec = card->irq_vector | PIO2_VECTOR_CNTR[i]; | |
420 | vme_irq_free(vdev, card->irq_level, vec); | |
421 | } | |
422 | ||
423 | i = 4; | |
424 | err_gpio_irq: | |
425 | while (i > 0) { | |
426 | i--; | |
427 | vec = card->irq_vector | PIO2_VECTOR_BANK[i]; | |
428 | vme_irq_free(vdev, card->irq_level, vec); | |
429 | } | |
430 | ||
431 | vec = (card->irq_vector & PIO2_VME_VECTOR_MASK) | PIO2_VME_VECTOR_SPUR; | |
432 | vme_irq_free(vdev, card->irq_level, vec); | |
433 | err_irq: | |
434 | pio2_reset_card(card); | |
435 | err_reset: | |
436 | err_read: | |
437 | vme_master_set(card->window, 0, 0, 0, VME_A16, 0, VME_D16); | |
438 | err_set: | |
439 | vme_master_free(card->window); | |
440 | err_window: | |
441 | err_vector: | |
442 | err_variant: | |
443 | kfree(card); | |
444 | err_struct: | |
445 | return retval; | |
446 | } | |
447 | ||
f21a8247 | 448 | static int pio2_remove(struct vme_dev *vdev) |
9dc367bc MW |
449 | { |
450 | int vec; | |
451 | int i; | |
452 | ||
453 | struct pio2_card *card = dev_get_drvdata(&vdev->dev); | |
454 | ||
455 | pio2_gpio_exit(card); | |
456 | ||
457 | for (i = 0; i < 6; i++) { | |
458 | vec = card->irq_vector | PIO2_VECTOR_CNTR[i]; | |
459 | vme_irq_free(vdev, card->irq_level, vec); | |
460 | } | |
461 | ||
462 | for (i = 0; i < 4; i++) { | |
463 | vec = card->irq_vector | PIO2_VECTOR_BANK[i]; | |
464 | vme_irq_free(vdev, card->irq_level, vec); | |
465 | } | |
466 | ||
467 | vec = (card->irq_vector & PIO2_VME_VECTOR_MASK) | PIO2_VME_VECTOR_SPUR; | |
468 | vme_irq_free(vdev, card->irq_level, vec); | |
469 | ||
470 | pio2_reset_card(card); | |
471 | ||
472 | vme_master_set(card->window, 0, 0, 0, VME_A16, 0, VME_D16); | |
473 | ||
474 | vme_master_free(card->window); | |
475 | ||
476 | kfree(card); | |
477 | ||
478 | return 0; | |
479 | } | |
480 | ||
481 | static void __exit pio2_exit(void) | |
482 | { | |
483 | vme_unregister_driver(&pio2_driver); | |
484 | } | |
485 | ||
486 | ||
487 | /* These are required for each board */ | |
488 | MODULE_PARM_DESC(bus, "Enumeration of VMEbus to which the board is connected"); | |
489 | module_param_array(bus, int, &bus_num, S_IRUGO); | |
490 | ||
491 | MODULE_PARM_DESC(base, "Base VME address for PIO2 Registers"); | |
492 | module_param_array(base, long, &base_num, S_IRUGO); | |
493 | ||
494 | MODULE_PARM_DESC(vector, "VME IRQ Vector (Lower 4 bits masked)"); | |
495 | module_param_array(vector, int, &vector_num, S_IRUGO); | |
496 | ||
497 | MODULE_PARM_DESC(level, "VME IRQ Level"); | |
498 | module_param_array(level, int, &level_num, S_IRUGO); | |
499 | ||
500 | MODULE_PARM_DESC(variant, "Last 4 characters of PIO2 board variant"); | |
501 | module_param_array(variant, charp, &variant_num, S_IRUGO); | |
502 | ||
503 | /* This is for debugging */ | |
504 | MODULE_PARM_DESC(loopback, "Enable loopback mode on all cards"); | |
505 | module_param(loopback, bool, S_IRUGO); | |
506 | ||
507 | MODULE_DESCRIPTION("GE PIO2 6U VME I/O Driver"); | |
508 | MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com"); | |
509 | MODULE_LICENSE("GPL"); | |
510 | ||
511 | module_init(pio2_init); | |
512 | module_exit(pio2_exit); | |
513 |