Commit | Line | Data |
---|---|---|
5200401a | 1 | /* |
e28f49b0 | 2 | tm6000-stds.c - driver for TM5600/TM6000/TM6010 USB video capture devices |
5200401a MCC |
3 | |
4 | Copyright (C) 2007 Mauro Carvalho Chehab <mchehab@redhat.com> | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation version 2 | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | */ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/kernel.h> | |
22 | #include "tm6000.h" | |
23 | #include "tm6000-regs.h" | |
24 | ||
25 | struct tm6000_reg_settings { | |
26 | unsigned char req; | |
27 | unsigned char reg; | |
28 | unsigned char value; | |
29 | }; | |
30 | ||
31 | struct tm6000_std_tv_settings { | |
32 | v4l2_std_id id; | |
33 | struct tm6000_reg_settings sif[12]; | |
34 | struct tm6000_reg_settings nosif[12]; | |
35 | struct tm6000_reg_settings common[25]; | |
36 | }; | |
37 | ||
38 | struct tm6000_std_settings { | |
39 | v4l2_std_id id; | |
40 | struct tm6000_reg_settings common[37]; | |
41 | }; | |
42 | ||
43 | static struct tm6000_std_tv_settings tv_stds[] = { | |
44 | { | |
45 | .id = V4L2_STD_PAL_M, | |
46 | .sif = { | |
9afec493 MCC |
47 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, |
48 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
49 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
50 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08}, | |
51 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
52 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
53 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
54 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
55 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62}, | |
56 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe}, | |
57 | {TM6010_REQ07_RFE_POWER_DOWN, 0xcb}, | |
5200401a MCC |
58 | {0, 0, 0}, |
59 | }, | |
60 | .nosif = { | |
9afec493 MCC |
61 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
62 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
63 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
64 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
65 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
66 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
67 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
68 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
69 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60}, | |
70 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
71 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
5200401a MCC |
72 | {0, 0, 0}, |
73 | }, | |
74 | .common = { | |
9afec493 MCC |
75 | {TM6010_REQ07_R3F_RESET, 0x01}, |
76 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04}, | |
77 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
78 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
79 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00}, | |
80 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
81 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
82 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83}, | |
83 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a}, | |
84 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0}, | |
85 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
86 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
87 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
88 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
89 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
90 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x20}, | |
91 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61}, | |
92 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
93 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
94 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
95 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
96 | ||
97 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
98 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
99 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
100 | {0, 0, 0}, |
101 | }, | |
102 | }, { | |
103 | .id = V4L2_STD_PAL_Nc, | |
104 | .sif = { | |
9afec493 MCC |
105 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, |
106 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
107 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
108 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08}, | |
109 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
110 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
111 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
112 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
113 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62}, | |
114 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe}, | |
115 | {TM6010_REQ07_RFE_POWER_DOWN, 0xcb}, | |
5200401a MCC |
116 | {0, 0, 0}, |
117 | }, | |
118 | .nosif = { | |
9afec493 MCC |
119 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
120 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
121 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
122 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
123 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
124 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
125 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
126 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
127 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60}, | |
128 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
129 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
5200401a MCC |
130 | {0, 0, 0}, |
131 | }, | |
132 | .common = { | |
9afec493 MCC |
133 | {TM6010_REQ07_R3F_RESET, 0x01}, |
134 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36}, | |
135 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
136 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
137 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | |
138 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
139 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
140 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91}, | |
141 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f}, | |
142 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c}, | |
143 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
144 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
145 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
146 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
147 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
148 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | |
149 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
150 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
151 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
152 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
153 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
154 | ||
155 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
156 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
157 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
158 | {0, 0, 0}, |
159 | }, | |
160 | }, { | |
161 | .id = V4L2_STD_PAL, | |
162 | .sif = { | |
9afec493 MCC |
163 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, |
164 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
165 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
166 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08}, | |
167 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
168 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
169 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
170 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
171 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62}, | |
172 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe}, | |
173 | {TM6010_REQ07_RFE_POWER_DOWN, 0xcb}, | |
5200401a MCC |
174 | {0, 0, 0} |
175 | }, | |
176 | .nosif = { | |
9afec493 MCC |
177 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
178 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
179 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
180 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
181 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
182 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
183 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
184 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
185 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60}, | |
186 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
187 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
5200401a MCC |
188 | {0, 0, 0}, |
189 | }, | |
190 | .common = { | |
9afec493 MCC |
191 | {TM6010_REQ07_R3F_RESET, 0x01}, |
192 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32}, | |
193 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
194 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
195 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | |
196 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
197 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25}, | |
198 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5}, | |
199 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63}, | |
200 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50}, | |
201 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
202 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
203 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
204 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
205 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
206 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | |
207 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
208 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
209 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
210 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
211 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
212 | ||
213 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
214 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
215 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
216 | {0, 0, 0}, |
217 | }, | |
218 | }, { | |
219 | .id = V4L2_STD_SECAM, | |
220 | .sif = { | |
9afec493 MCC |
221 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, |
222 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
223 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
224 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08}, | |
225 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
226 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
227 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
228 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
229 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62}, | |
230 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe}, | |
231 | {TM6010_REQ07_RFE_POWER_DOWN, 0xcb}, | |
5200401a MCC |
232 | {0, 0, 0}, |
233 | }, | |
234 | .nosif = { | |
9afec493 MCC |
235 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
236 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
237 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
238 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
239 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
240 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
241 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
242 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
243 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60}, | |
244 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
245 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
5200401a MCC |
246 | {0, 0, 0}, |
247 | }, | |
248 | .common = { | |
9afec493 MCC |
249 | {TM6010_REQ07_R3F_RESET, 0x01}, |
250 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38}, | |
251 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
252 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
253 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | |
254 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
255 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24}, | |
256 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92}, | |
257 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8}, | |
258 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed}, | |
259 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
260 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
261 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
262 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
263 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
264 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | |
265 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
266 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c}, | |
267 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18}, | |
268 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | |
269 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | |
270 | ||
271 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
272 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
273 | {0, 0, 0}, |
274 | }, | |
275 | }, { | |
276 | .id = V4L2_STD_NTSC, | |
277 | .sif = { | |
9afec493 MCC |
278 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf2}, |
279 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
280 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
281 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x08}, | |
282 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
283 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
284 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
285 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
286 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x62}, | |
287 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfe}, | |
288 | {TM6010_REQ07_RFE_POWER_DOWN, 0xcb}, | |
5200401a MCC |
289 | {0, 0, 0}, |
290 | }, | |
291 | .nosif = { | |
9afec493 MCC |
292 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
293 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf8}, | |
294 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
295 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
296 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
297 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
298 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
299 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
300 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60}, | |
301 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
302 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
5200401a MCC |
303 | {0, 0, 0}, |
304 | }, | |
305 | .common = { | |
9afec493 MCC |
306 | {TM6010_REQ07_R3F_RESET, 0x01}, |
307 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00}, | |
308 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f}, | |
309 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
310 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00}, | |
311 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
312 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
313 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b}, | |
314 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2}, | |
315 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9}, | |
316 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
317 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
318 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
319 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
320 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
321 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22}, | |
322 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61}, | |
323 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c}, | |
324 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
325 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | |
326 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
327 | ||
328 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd}, | |
329 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
330 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
331 | {0, 0, 0}, |
332 | }, | |
333 | }, | |
334 | }; | |
335 | ||
336 | static struct tm6000_std_settings composite_stds[] = { | |
337 | { | |
338 | .id = V4L2_STD_PAL_M, | |
339 | .common = { | |
9afec493 MCC |
340 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
341 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4}, | |
342 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
343 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
344 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
345 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
346 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
347 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
348 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
349 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
350 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
351 | ||
352 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
353 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x04}, | |
354 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
355 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
356 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00}, | |
357 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
358 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
359 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83}, | |
360 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a}, | |
361 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0}, | |
362 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
363 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
364 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
365 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
366 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
367 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x20}, | |
368 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61}, | |
369 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
370 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
371 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
372 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
373 | ||
374 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
375 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
376 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
377 | {0, 0, 0}, |
378 | }, | |
379 | }, { | |
380 | .id = V4L2_STD_PAL_Nc, | |
381 | .common = { | |
9afec493 MCC |
382 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
383 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4}, | |
384 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
385 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
386 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
387 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
388 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
389 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
390 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
391 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
392 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
393 | ||
394 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
395 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x36}, | |
396 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
397 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
398 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | |
399 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
400 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
401 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91}, | |
402 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f}, | |
403 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c}, | |
404 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
405 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
406 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
407 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
408 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
409 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | |
410 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
411 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
412 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
413 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
414 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
415 | ||
416 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
417 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
418 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
419 | {0, 0, 0}, |
420 | }, | |
421 | }, { | |
422 | .id = V4L2_STD_PAL, | |
423 | .common = { | |
9afec493 MCC |
424 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
425 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4}, | |
426 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
427 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
428 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
429 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
430 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
431 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
432 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
433 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
434 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
435 | ||
436 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
437 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x32}, | |
438 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
439 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
440 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | |
441 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
442 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25}, | |
443 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5}, | |
444 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63}, | |
445 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50}, | |
446 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
447 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
448 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
449 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
450 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
451 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | |
452 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
453 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
454 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
455 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
456 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
457 | ||
458 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
459 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
460 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
461 | {0, 0, 0}, |
462 | }, | |
463 | }, { | |
464 | .id = V4L2_STD_SECAM, | |
465 | .common = { | |
9afec493 MCC |
466 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
467 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4}, | |
468 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
469 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
470 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
471 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
472 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
473 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
474 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
475 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
476 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
477 | ||
478 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
479 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x38}, | |
480 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
481 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
482 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x02}, | |
483 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
484 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24}, | |
485 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92}, | |
486 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8}, | |
487 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed}, | |
488 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
489 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
490 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
491 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
492 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
493 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2c}, | |
494 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
495 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c}, | |
496 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18}, | |
497 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | |
498 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | |
499 | ||
500 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
501 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
502 | {0, 0, 0}, |
503 | }, | |
504 | }, { | |
505 | .id = V4L2_STD_NTSC, | |
506 | .common = { | |
9afec493 MCC |
507 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
508 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4}, | |
509 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf3}, | |
510 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x0f}, | |
511 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf1}, | |
512 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xe0}, | |
513 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
514 | {TM6010_REQ08_RED_GAIN_SEL, 0xe8}, | |
515 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
516 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
517 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8b}, | |
518 | ||
519 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
520 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00}, | |
521 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f}, | |
522 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
523 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00}, | |
524 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
525 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
526 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b}, | |
527 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2}, | |
528 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9}, | |
529 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
530 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
531 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
532 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
533 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
534 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22}, | |
535 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61}, | |
536 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c}, | |
537 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
538 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | |
539 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
540 | ||
541 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd}, | |
542 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
543 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
544 | {0, 0, 0}, |
545 | }, | |
546 | }, | |
547 | }; | |
548 | ||
549 | static struct tm6000_std_settings svideo_stds[] = { | |
550 | { | |
551 | .id = V4L2_STD_PAL_M, | |
552 | .common = { | |
9afec493 MCC |
553 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
554 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc}, | |
555 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8}, | |
556 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00}, | |
557 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2}, | |
558 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0}, | |
559 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
560 | {TM6010_REQ08_RED_GAIN_SEL, 0xe0}, | |
561 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
562 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
563 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8a}, | |
564 | ||
565 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
566 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x05}, | |
567 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
568 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
569 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x04}, | |
570 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
571 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
572 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x83}, | |
573 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x0a}, | |
574 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe0}, | |
575 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
576 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
577 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
578 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
579 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
580 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22}, | |
581 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61}, | |
582 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
583 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
584 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
585 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
586 | ||
587 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
588 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
589 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
590 | {0, 0, 0}, |
591 | }, | |
592 | }, { | |
593 | .id = V4L2_STD_PAL_Nc, | |
594 | .common = { | |
9afec493 MCC |
595 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
596 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc}, | |
597 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8}, | |
598 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00}, | |
599 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2}, | |
600 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0}, | |
601 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
602 | {TM6010_REQ08_RED_GAIN_SEL, 0xe0}, | |
603 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
604 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
605 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8a}, | |
606 | ||
607 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
608 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x37}, | |
609 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
610 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
611 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x04}, | |
612 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
613 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
614 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x91}, | |
615 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x1f}, | |
616 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x0c}, | |
617 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
618 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
619 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
620 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
621 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
622 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22}, | |
623 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
624 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
625 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
626 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
627 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
628 | ||
629 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
630 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
631 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
632 | {0, 0, 0}, |
633 | }, | |
634 | }, { | |
635 | .id = V4L2_STD_PAL, | |
636 | .common = { | |
9afec493 MCC |
637 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
638 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc}, | |
639 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8}, | |
640 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00}, | |
641 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2}, | |
642 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0}, | |
643 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
644 | {TM6010_REQ08_RED_GAIN_SEL, 0xe0}, | |
645 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
646 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
647 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8a}, | |
648 | ||
649 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
650 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x33}, | |
651 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
652 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
653 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x04}, | |
654 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x00}, | |
655 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x25}, | |
656 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0xd5}, | |
657 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0x63}, | |
658 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0x50}, | |
659 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
660 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
661 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
662 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
663 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
664 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2a}, | |
665 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
666 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x0c}, | |
667 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
668 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x52}, | |
669 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
670 | ||
671 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdc}, | |
672 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
673 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
674 | {0, 0, 0}, |
675 | }, | |
676 | }, { | |
677 | .id = V4L2_STD_SECAM, | |
678 | .common = { | |
9afec493 MCC |
679 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
680 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc}, | |
681 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8}, | |
682 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00}, | |
683 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2}, | |
684 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0}, | |
685 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
686 | {TM6010_REQ08_RED_GAIN_SEL, 0xe0}, | |
687 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
688 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
689 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8a}, | |
690 | ||
691 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
692 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x39}, | |
693 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0e}, | |
694 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
695 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x03}, | |
696 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01}, | |
697 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x24}, | |
698 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x92}, | |
699 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xe8}, | |
700 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xed}, | |
701 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
702 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
703 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
704 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
705 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x8c}, | |
706 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x2a}, | |
707 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0xc1}, | |
708 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x2c}, | |
709 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x18}, | |
710 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | |
711 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0xFF}, | |
712 | ||
713 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
714 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
715 | {0, 0, 0}, |
716 | }, | |
717 | }, { | |
718 | .id = V4L2_STD_NTSC, | |
719 | .common = { | |
9afec493 MCC |
720 | {TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0}, |
721 | {TM6010_REQ08_RE3_ADC_IN1_SEL, 0xfc}, | |
722 | {TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8}, | |
723 | {TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00}, | |
724 | {TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2}, | |
725 | {TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0}, | |
726 | {TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2}, | |
727 | {TM6010_REQ08_RED_GAIN_SEL, 0xe0}, | |
728 | {TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x68}, | |
729 | {TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc}, | |
730 | {TM6010_REQ07_RFE_POWER_DOWN, 0x8a}, | |
731 | ||
732 | {TM6010_REQ07_R3F_RESET, 0x01}, | |
733 | {TM6010_REQ07_R00_VIDEO_CONTROL0, 0x01}, | |
734 | {TM6010_REQ07_R01_VIDEO_CONTROL1, 0x0f}, | |
735 | {TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f}, | |
736 | {TM6010_REQ07_R03_YC_SEP_CONTROL, 0x03}, | |
737 | {TM6010_REQ07_R07_OUTPUT_CONTROL, 0x00}, | |
738 | {TM6010_REQ07_R17_HLOOP_MAXSTATE, 0x8b}, | |
739 | {TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e}, | |
740 | {TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b}, | |
741 | {TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2}, | |
742 | {TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9}, | |
743 | {TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c}, | |
744 | {TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc}, | |
745 | {TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc}, | |
746 | {TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd}, | |
747 | {TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88}, | |
748 | {TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22}, | |
749 | {TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61}, | |
750 | {TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c}, | |
751 | {TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c}, | |
752 | {TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42}, | |
753 | {TM6010_REQ07_R83_CHROMA_LOCK_CONFIG, 0x6F}, | |
754 | ||
755 | {TM6010_REQ07_R04_LUMA_HAGC_CONTROL, 0xdd}, | |
756 | {TM6010_REQ07_R0D_CHROMA_KILL_LEVEL, 0x07}, | |
757 | {TM6010_REQ07_R3F_RESET, 0x00}, | |
5200401a MCC |
758 | {0, 0, 0}, |
759 | }, | |
760 | }, | |
761 | }; | |
762 | ||
763 | void tm6000_get_std_res(struct tm6000_core *dev) | |
764 | { | |
765 | /* Currently, those are the only supported resoltions */ | |
766 | if (dev->norm & V4L2_STD_525_60) { | |
767 | dev->height = 480; | |
768 | } else { | |
769 | dev->height = 576; | |
770 | } | |
771 | dev->width = 720; | |
772 | } | |
773 | ||
774 | static int tm6000_load_std(struct tm6000_core *dev, | |
775 | struct tm6000_reg_settings *set, int max_size) | |
776 | { | |
777 | int i, rc; | |
778 | ||
779 | /* Load board's initialization table */ | |
780 | for (i = 0; max_size; i++) { | |
781 | if (!set[i].req) | |
782 | return 0; | |
783 | ||
29c389be MCC |
784 | if ((dev->dev_type != TM6010) && |
785 | (set[i].req == REQ_08_SET_GET_AVREG_BIT)) | |
786 | continue; | |
0ef4b05a | 787 | |
5200401a MCC |
788 | rc = tm6000_set_reg(dev, set[i].req, set[i].reg, set[i].value); |
789 | if (rc < 0) { | |
790 | printk(KERN_ERR "Error %i while setting " | |
791 | "req %d, reg %d to value %d\n", | |
792 | rc, set[i].req, set[i].reg, set[i].value); | |
793 | return rc; | |
794 | } | |
795 | } | |
796 | ||
797 | return 0; | |
798 | } | |
799 | ||
800 | static int tm6000_set_tv(struct tm6000_core *dev, int pos) | |
801 | { | |
802 | int rc; | |
803 | ||
0ef4b05a MCC |
804 | /* FIXME: This code is for tm6010 - not tested yet - doesn't work with |
805 | tm5600 | |
806 | */ | |
807 | ||
808 | /* FIXME: This is tuner-dependent */ | |
809 | int nosif = 0; | |
810 | ||
811 | if (nosif) { | |
812 | rc = tm6000_load_std(dev, tv_stds[pos].nosif, | |
813 | sizeof(tv_stds[pos].nosif)); | |
814 | } else { | |
815 | rc = tm6000_load_std(dev, tv_stds[pos].sif, | |
816 | sizeof(tv_stds[pos].sif)); | |
817 | } | |
818 | if (rc < 0) | |
819 | return rc; | |
5200401a MCC |
820 | rc = tm6000_load_std(dev, tv_stds[pos].common, |
821 | sizeof(tv_stds[pos].common)); | |
822 | ||
823 | return rc; | |
824 | } | |
825 | ||
826 | int tm6000_set_standard(struct tm6000_core *dev, v4l2_std_id * norm) | |
827 | { | |
828 | int i, rc = 0; | |
829 | ||
830 | dev->norm = *norm; | |
831 | tm6000_get_std_res(dev); | |
832 | ||
833 | switch (dev->input) { | |
834 | case TM6000_INPUT_TV: | |
835 | for (i = 0; i < ARRAY_SIZE(tv_stds); i++) { | |
836 | if (*norm & tv_stds[i].id) { | |
837 | rc = tm6000_set_tv(dev, i); | |
838 | goto ret; | |
839 | } | |
840 | } | |
841 | return -EINVAL; | |
842 | case TM6000_INPUT_SVIDEO: | |
843 | for (i = 0; i < ARRAY_SIZE(svideo_stds); i++) { | |
844 | if (*norm & svideo_stds[i].id) { | |
845 | rc = tm6000_load_std(dev, svideo_stds[i].common, | |
846 | sizeof(svideo_stds[i]. | |
847 | common)); | |
848 | goto ret; | |
849 | } | |
850 | } | |
851 | return -EINVAL; | |
852 | case TM6000_INPUT_COMPOSITE: | |
853 | for (i = 0; i < ARRAY_SIZE(composite_stds); i++) { | |
854 | if (*norm & composite_stds[i].id) { | |
855 | rc = tm6000_load_std(dev, | |
856 | composite_stds[i].common, | |
857 | sizeof(composite_stds[i]. | |
858 | common)); | |
859 | goto ret; | |
860 | } | |
861 | } | |
862 | return -EINVAL; | |
863 | } | |
864 | ||
865 | ret: | |
866 | if (rc < 0) | |
867 | return rc; | |
868 | ||
869 | msleep(40); | |
870 | ||
29c389be | 871 | |
5200401a MCC |
872 | return 0; |
873 | } |