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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / slicoss / slicoss.c
CommitLineData
4d6f6af8
GKH		 1/**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39/*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
493b67b7 50 * The driver was actually tested on Oasis and Kalahari cards.
4d6f6af8
GKH		 51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
4d6f6af8 57
4d6f6af8
GKH		 58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
4d6f6af8 60#define DBG 1
4d6f6af8 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
4d6f6af8
GKH		 62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
65
66#include <linux/kernel.h>
67#include <linux/string.h>
68#include <linux/errno.h>
69#include <linux/ioport.h>
70#include <linux/slab.h>
71#include <linux/interrupt.h>
72#include <linux/timer.h>
73#include <linux/pci.h>
74#include <linux/spinlock.h>
75#include <linux/init.h>
76#include <linux/bitops.h>
77#include <linux/io.h>
78#include <linux/netdevice.h>
97b3e0ed 79#include <linux/crc32.h>
4d6f6af8
GKH		 80#include <linux/etherdevice.h>
81#include <linux/skbuff.h>
82#include <linux/delay.h>
83#include <linux/debugfs.h>
84#include <linux/seq_file.h>
85#include <linux/kthread.h>
86#include <linux/module.h>
87#include <linux/moduleparam.h>
88
470c5736 89#include <linux/firmware.h>
4d6f6af8 90#include <linux/types.h>
4d6f6af8 91#include <linux/dma-mapping.h>
4d6f6af8
GKH		 92#include <linux/mii.h>
93#include <linux/if_vlan.h>
4d6f6af8
GKH		 94#include <asm/unaligned.h>
95
96#include <linux/ethtool.h>
4d6f6af8 97#include <linux/uaccess.h>
77faefa3
GKH		 98#include "slichw.h"
99#include "slic.h"
100
4d6f6af8
GKH		 101static uint slic_first_init = 1;
102static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
e9ef456e 103 "and Storage Accelerator (Non-Accelerated)";
4d6f6af8
GKH		 104
105static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
106static char *slic_product_name = "SLIC Technology(tm) Server "\
107 "and Storage Accelerator (Non-Accelerated)";
108static char *slic_vendor = "Alacritech, Inc.";
109
110static int slic_debug = 1;
111static int debug = -1;
112static struct net_device *head_netdevice;
113
e9eff9d6 114static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
4d6f6af8
GKH		 115static int intagg_delay = 100;
116static u32 dynamic_intagg;
4d6f6af8
GKH		 117static unsigned int rcv_count;
118static struct dentry *slic_debugfs;
119
120#define DRV_NAME "slicoss"
121#define DRV_VERSION "2.0.1"
122#define DRV_AUTHOR "Alacritech, Inc. Engineering"
123#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
124 "Non-Accelerated Driver"
125#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
126 "All rights reserved."
127#define PFX DRV_NAME " "
128
129MODULE_AUTHOR(DRV_AUTHOR);
130MODULE_DESCRIPTION(DRV_DESCRIPTION);
131MODULE_LICENSE("Dual BSD/GPL");
132
133module_param(dynamic_intagg, int, 0);
134MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
135module_param(intagg_delay, int, 0);
136MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
137
5d372900 138static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = {
139 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
140 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
141 { 0 }
4d6f6af8
GKH		 142};
143
144MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
145
146#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
147{ \
2fbedf67 148 spin_lock_irqsave(&_adapter->handle_lock.lock, \
e9eff9d6 149 _adapter->handle_lock.flags); \
2fbedf67
CJB		 150 _pslic_handle = _adapter->pfree_slic_handles; \
151 if (_pslic_handle) { \
152 _adapter->pfree_slic_handles = _pslic_handle->next; \
153 } \
154 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
e9eff9d6 155 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 156}
157
158#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
159{ \
2fbedf67
CJB		 160 _pslic_handle->type = SLIC_HANDLE_FREE; \
161 spin_lock_irqsave(&_adapter->handle_lock.lock, \
e9eff9d6 162 _adapter->handle_lock.flags); \
2fbedf67
CJB		 163 _pslic_handle->next = _adapter->pfree_slic_handles; \
164 _adapter->pfree_slic_handles = _pslic_handle; \
165 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
e9eff9d6 166 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 167}
168
62f691a3 169static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
4d6f6af8
GKH		 170{
171 writel(value, reg);
172 if (flush)
173 mb();
174}
175
28980a3c
GKH		 176static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
177 u32 value, void __iomem *regh, u32 paddrh,
178 bool flush)
4d6f6af8 179{
e9eff9d6
LD		 180 spin_lock_irqsave(&adapter->bit64reglock.lock,
181 adapter->bit64reglock.flags);
4d6f6af8
GKH		 182 if (paddrh != adapter->curaddrupper) {
183 adapter->curaddrupper = paddrh;
184 writel(paddrh, regh);
185 }
186 writel(value, reg);
187 if (flush)
188 mb();
e9eff9d6
LD		 189 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
190 adapter->bit64reglock.flags);
4d6f6af8
GKH		 191}
192
4d6ea9c3
DK		 193static void slic_mcast_set_bit(struct adapter *adapter, char *address)
194{
195 unsigned char crcpoly;
4d6f6af8 196
4d6ea9c3 197 /* Get the CRC polynomial for the mac address */
97b3e0ed
PH		 198 /* we use bits 1-8 (lsb), bitwise reversed,
199 * msb (= lsb bit 0 before bitrev) is automatically discarded */
200 crcpoly = (ether_crc(ETH_ALEN, address)>>23);
4d6f6af8 201
4d6ea9c3
DK		 202 /* We only have space on the SLIC for 64 entries. Lop
203 * off the top two bits. (2^6 = 64)
204 */
205 crcpoly &= 0x3F;
4d6f6af8 206
4d6ea9c3
DK		 207 /* OR in the new bit into our 64 bit mask. */
208 adapter->mcastmask |= (u64) 1 << crcpoly;
209}
4d6f6af8 210
4d6ea9c3
DK		 211static void slic_mcast_set_mask(struct adapter *adapter)
212{
213 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 214
4d6ea9c3
DK		 215 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
216 /* Turn on all multicast addresses. We have to do this for
217 * promiscuous mode as well as ALLMCAST mode. It saves the
218 * Microcode from having to keep state about the MAC
219 * configuration.
220 */
221 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
222 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
223 FLUSH);
224 } else {
225 /* Commit our multicast mast to the SLIC by writing to the
226 * multicast address mask registers
227 */
228 slic_reg32_write(&slic_regs->slic_mcastlow,
229 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
230 slic_reg32_write(&slic_regs->slic_mcasthigh,
231 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
4d6f6af8 232 }
4d6ea9c3 233}
4d6f6af8 234
4d6ea9c3
DK		 235static void slic_timer_ping(ulong dev)
236{
237 struct adapter *adapter;
238 struct sliccard *card;
4d6f6af8 239
4d6ea9c3 240 adapter = netdev_priv((struct net_device *)dev);
4d6f6af8
GKH		 241 card = adapter->card;
242
4d6ea9c3
DK		 243 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
244 add_timer(&adapter->pingtimer);
245}
4d6f6af8 246
4d6ea9c3
DK		 247static void slic_unmap_mmio_space(struct adapter *adapter)
248{
249 if (adapter->slic_regs)
250 iounmap(adapter->slic_regs);
251 adapter->slic_regs = NULL;
252}
4d6f6af8 253
4d6ea9c3
DK		 254/*
255 * slic_link_config
256 *
257 * Write phy control to configure link duplex/speed
258 *
259 */
260static void slic_link_config(struct adapter *adapter,
261 u32 linkspeed, u32 linkduplex)
262{
263 u32 __iomem *wphy;
264 u32 speed;
265 u32 duplex;
266 u32 phy_config;
267 u32 phy_advreg;
268 u32 phy_gctlreg;
4d6f6af8 269
4d6ea9c3
DK		 270 if (adapter->state != ADAPT_UP)
271 return;
4d6f6af8 272
4d6ea9c3
DK		 273 if (linkspeed > LINK_1000MB)
274 linkspeed = LINK_AUTOSPEED;
275 if (linkduplex > LINK_AUTOD)
276 linkduplex = LINK_AUTOD;
4d6f6af8 277
4d6ea9c3 278 wphy = &adapter->slic_regs->slic_wphy;
4d6f6af8 279
4d6ea9c3
DK		 280 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
281 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
282 /* We've got a fiber gigabit interface, and register
283 * 4 is different in fiber mode than in copper mode
284 */
4d6f6af8 285
4d6ea9c3
DK		 286 /* advertise FD only @1000 Mb */
287 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
288 /* enable PAUSE frames */
289 phy_advreg |= PAR_ASYMPAUSE_FIBER;
290 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8 291
4d6ea9c3
DK		 292 if (linkspeed == LINK_AUTOSPEED) {
293 /* reset phy, enable auto-neg */
294 phy_config =
295 (MIICR_REG_PCR |
296 (PCR_RESET | PCR_AUTONEG |
297 PCR_AUTONEG_RST));
298 slic_reg32_write(wphy, phy_config, FLUSH);
299 } else { /* forced 1000 Mb FD*/
300 /* power down phy to break link
301 this may not work) */
302 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
303 slic_reg32_write(wphy, phy_config, FLUSH);
304 /* wait, Marvell says 1 sec,
305 try to get away with 10 ms */
306 mdelay(10);
4d6f6af8 307
4d6ea9c3
DK		 308 /* disable auto-neg, set speed/duplex,
309 soft reset phy, powerup */
310 phy_config =
311 (MIICR_REG_PCR |
312 (PCR_RESET | PCR_SPEED_1000 |
313 PCR_DUPLEX_FULL));
314 slic_reg32_write(wphy, phy_config, FLUSH);
315 }
316 } else { /* copper gigabit */
4d6f6af8 317
4d6ea9c3
DK		 318 /* Auto-Negotiate or 1000 Mb must be auto negotiated
319 * We've got a copper gigabit interface, and
320 * register 4 is different in copper mode than
321 * in fiber mode
322 */
323 if (linkspeed == LINK_AUTOSPEED) {
324 /* advertise 10/100 Mb modes */
325 phy_advreg =
326 (MIICR_REG_4 |
327 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
328 | PAR_ADV10HD));
329 } else {
330 /* linkspeed == LINK_1000MB -
331 don't advertise 10/100 Mb modes */
332 phy_advreg = MIICR_REG_4;
333 }
334 /* enable PAUSE frames */
335 phy_advreg |= PAR_ASYMPAUSE;
336 /* required by the Cicada PHY */
337 phy_advreg |= PAR_802_3;
338 slic_reg32_write(wphy, phy_advreg, FLUSH);
339 /* advertise FD only @1000 Mb */
340 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
341 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
4d6f6af8 342
4d6ea9c3
DK		 343 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
344 /* if a Marvell PHY
345 enable auto crossover */
346 phy_config =
347 (MIICR_REG_16 | (MRV_REG16_XOVERON));
348 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 349
4d6ea9c3
DK		 350 /* reset phy, enable auto-neg */
351 phy_config =
352 (MIICR_REG_PCR |
353 (PCR_RESET | PCR_AUTONEG |
354 PCR_AUTONEG_RST));
355 slic_reg32_write(wphy, phy_config, FLUSH);
356 } else { /* it's a Cicada PHY */
357 /* enable and restart auto-neg (don't reset) */
358 phy_config =
359 (MIICR_REG_PCR |
360 (PCR_AUTONEG | PCR_AUTONEG_RST));
361 slic_reg32_write(wphy, phy_config, FLUSH);
362 }
4d6f6af8 363 }
4d6ea9c3
DK		 364 } else {
365 /* Forced 10/100 */
366 if (linkspeed == LINK_10MB)
367 speed = 0;
368 else
369 speed = PCR_SPEED_100;
370 if (linkduplex == LINK_HALFD)
371 duplex = 0;
372 else
373 duplex = PCR_DUPLEX_FULL;
374
375 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
376 /* if a Marvell PHY
377 disable auto crossover */
378 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
379 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 380 }
4d6f6af8 381
4d6ea9c3
DK		 382 /* power down phy to break link (this may not work) */
383 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
384 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 385
4d6ea9c3
DK		 386 /* wait, Marvell says 1 sec, try to get away with 10 ms */
387 mdelay(10);
388
389 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
390 /* if a Marvell PHY
391 disable auto-neg, set speed,
392 soft reset phy, powerup */
393 phy_config =
394 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
395 slic_reg32_write(wphy, phy_config, FLUSH);
396 } else { /* it's a Cicada PHY */
397 /* disable auto-neg, set speed, powerup */
398 phy_config = (MIICR_REG_PCR | (speed | duplex));
399 slic_reg32_write(wphy, phy_config, FLUSH);
400 }
401 }
4d6f6af8
GKH		 402}
403
4d6ea9c3 404static int slic_card_download_gbrcv(struct adapter *adapter)
4d6f6af8 405{
4d6ea9c3
DK		 406 const struct firmware *fw;
407 const char *file = "";
408 int ret;
409 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
410 u32 codeaddr;
411 u32 instruction;
412 int index = 0;
413 u32 rcvucodelen = 0;
4d6f6af8 414
4d6ea9c3
DK		 415 switch (adapter->devid) {
416 case SLIC_2GB_DEVICE_ID:
417 file = "slicoss/oasisrcvucode.sys";
418 break;
419 case SLIC_1GB_DEVICE_ID:
420 file = "slicoss/gbrcvucode.sys";
421 break;
422 default:
651d4bc7 423 return -ENOENT;
4d6ea9c3 424 }
4d6f6af8 425
4d6ea9c3
DK		 426 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
427 if (ret) {
428 dev_err(&adapter->pcidev->dev,
429 "SLICOSS: Failed to load firmware %s\n", file);
430 return ret;
786ed801 431 }
4d6ea9c3
DK		 432
433 rcvucodelen = *(u32 *)(fw->data + index);
434 index += 4;
435 switch (adapter->devid) {
436 case SLIC_2GB_DEVICE_ID:
7ee34ab2
DN		 437 if (rcvucodelen != OasisRcvUCodeLen) {
438 release_firmware(fw);
4d6ea9c3 439 return -EINVAL;
7ee34ab2 440 }
4d6ea9c3
DK		 441 break;
442 case SLIC_1GB_DEVICE_ID:
7ee34ab2
DN		 443 if (rcvucodelen != GBRcvUCodeLen) {
444 release_firmware(fw);
4d6ea9c3 445 return -EINVAL;
7ee34ab2 446 }
4d6ea9c3 447 break;
4d6f6af8 448 }
4d6ea9c3
DK		 449 /* start download */
450 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
451 /* download the rcv sequencer ucode */
452 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
453 /* write out instruction address */
454 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
455
456 instruction = *(u32 *)(fw->data + index);
457 index += 4;
458 /* write out the instruction data low addr */
459 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
460
461 instruction = *(u8 *)(fw->data + index);
462 index++;
463 /* write out the instruction data high addr */
464 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
465 FLUSH);
466 }
467
468 /* download finished */
469 release_firmware(fw);
470 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
471 return 0;
4d6f6af8
GKH		 472}
473
4d6ea9c3
DK		 474MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
475MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
476
477static int slic_card_download(struct adapter *adapter)
4d6f6af8 478{
4d6ea9c3
DK		 479 const struct firmware *fw;
480 const char *file = "";
481 int ret;
482 u32 section;
483 int thissectionsize;
484 int codeaddr;
e9eff9d6 485 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6ea9c3
DK		 486 u32 instruction;
487 u32 baseaddress;
488 u32 i;
489 u32 numsects = 0;
490 u32 sectsize[3];
491 u32 sectstart[3];
492 int ucode_start, index = 0;
4d6f6af8 493
4d6ea9c3
DK		 494 switch (adapter->devid) {
495 case SLIC_2GB_DEVICE_ID:
496 file = "slicoss/oasisdownload.sys";
497 break;
498 case SLIC_1GB_DEVICE_ID:
499 file = "slicoss/gbdownload.sys";
500 break;
501 default:
670d145a 502 return -ENOENT;
4d6f6af8 503 }
4d6ea9c3
DK		 504 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
505 if (ret) {
506 dev_err(&adapter->pcidev->dev,
507 "SLICOSS: Failed to load firmware %s\n", file);
508 return ret;
509 }
510 numsects = *(u32 *)(fw->data + index);
511 index += 4;
4d6ea9c3
DK		 512 for (i = 0; i < numsects; i++) {
513 sectsize[i] = *(u32 *)(fw->data + index);
514 index += 4;
515 }
516 for (i = 0; i < numsects; i++) {
517 sectstart[i] = *(u32 *)(fw->data + index);
518 index += 4;
519 }
520 ucode_start = index;
521 instruction = *(u32 *)(fw->data + index);
522 index += 4;
523 for (section = 0; section < numsects; section++) {
524 baseaddress = sectstart[section];
525 thissectionsize = sectsize[section] >> 3;
4d6f6af8 526
4d6ea9c3
DK		 527 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
528 /* Write out instruction address */
529 slic_reg32_write(&slic_regs->slic_wcs,
530 baseaddress + codeaddr, FLUSH);
531 /* Write out instruction to low addr */
532 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
533 instruction = *(u32 *)(fw->data + index);
534 index += 4;
535
536 /* Write out instruction to high addr */
537 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
538 instruction = *(u32 *)(fw->data + index);
539 index += 4;
540 }
541 }
542 index = ucode_start;
543 for (section = 0; section < numsects; section++) {
544 instruction = *(u32 *)(fw->data + index);
545 baseaddress = sectstart[section];
546 if (baseaddress < 0x8000)
547 continue;
548 thissectionsize = sectsize[section] >> 3;
549
550 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
551 /* Write out instruction address */
552 slic_reg32_write(&slic_regs->slic_wcs,
553 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
554 FLUSH);
555 /* Write out instruction to low addr */
556 slic_reg32_write(&slic_regs->slic_wcs, instruction,
557 FLUSH);
558 instruction = *(u32 *)(fw->data + index);
559 index += 4;
560 /* Write out instruction to high addr */
561 slic_reg32_write(&slic_regs->slic_wcs, instruction,
562 FLUSH);
563 instruction = *(u32 *)(fw->data + index);
564 index += 4;
565
566 /* Check SRAM location zero. If it is non-zero. Abort.*/
567/* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
568 if (failure) {
569 release_firmware(fw);
570 return -EIO;
571 }*/
572 }
573 }
574 release_firmware(fw);
575 /* Everything OK, kick off the card */
576 mdelay(10);
577 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
578
579 /* stall for 20 ms, long enough for ucode to init card
580 and reach mainloop */
581 mdelay(20);
4d6f6af8 582
d1939786 583 return 0;
4d6f6af8
GKH		 584}
585
4d6ea9c3
DK		 586MODULE_FIRMWARE("slicoss/oasisdownload.sys");
587MODULE_FIRMWARE("slicoss/gbdownload.sys");
588
589static void slic_adapter_set_hwaddr(struct adapter *adapter)
4d6f6af8 590{
4d6ea9c3 591 struct sliccard *card = adapter->card;
e52011e4 592
4d6ea9c3
DK		 593 if ((adapter->card) && (card->config_set)) {
594 memcpy(adapter->macaddr,
595 card->config.MacInfo[adapter->functionnumber].macaddrA,
596 sizeof(struct slic_config_mac));
597 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
598 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
599 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
600 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
601 }
602 if (adapter->netdev) {
603 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
604 6);
605 }
606 }
607}
4d6f6af8 608
4d6ea9c3
DK		 609static void slic_intagg_set(struct adapter *adapter, u32 value)
610{
611 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
612 adapter->card->loadlevel_current = value;
613}
4d6f6af8 614
4d6ea9c3
DK		 615static void slic_soft_reset(struct adapter *adapter)
616{
617 if (adapter->card->state == CARD_UP) {
618 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
619 mdelay(1);
620 }
4d6f6af8 621
4d6ea9c3
DK		 622 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
623 FLUSH);
624 mdelay(1);
625}
e52011e4 626
4d6ea9c3
DK		 627static void slic_mac_address_config(struct adapter *adapter)
628{
629 u32 value;
630 u32 value2;
631 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
e52011e4 632
4d6ea9c3
DK		 633 value = *(u32 *) &adapter->currmacaddr[2];
634 value = ntohl(value);
635 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
636 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
e52011e4 637
4d6ea9c3
DK		 638 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
639 adapter->currmacaddr[1]) & 0xFFFF);
4d6f6af8 640
4d6ea9c3
DK		 641 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
642 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
e52011e4 643
4d6ea9c3
DK		 644 /* Write our multicast mask out to the card. This is done */
645 /* here in addition to the slic_mcast_addr_set routine */
646 /* because ALL_MCAST may have been enabled or disabled */
647 slic_mcast_set_mask(adapter);
648}
e52011e4 649
4d6ea9c3
DK		 650static void slic_mac_config(struct adapter *adapter)
651{
652 u32 value;
653 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
e52011e4 654
4d6ea9c3
DK		 655 /* Setup GMAC gaps */
656 if (adapter->linkspeed == LINK_1000MB) {
657 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
658 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
659 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
660 } else {
661 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
662 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
663 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
664 }
e52011e4 665
4d6ea9c3
DK		 666 /* enable GMII */
667 if (adapter->linkspeed == LINK_1000MB)
668 value |= GMCR_GBIT;
669
670 /* enable fullduplex */
671 if ((adapter->linkduplex == LINK_FULLD)
672 || (adapter->macopts & MAC_LOOPBACK)) {
673 value |= GMCR_FULLD;
4d6f6af8 674 }
4d6f6af8 675
4d6ea9c3
DK		 676 /* write mac config */
677 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
4d6f6af8 678
4d6ea9c3
DK		 679 /* setup mac addresses */
680 slic_mac_address_config(adapter);
681}
682
683static void slic_config_set(struct adapter *adapter, bool linkchange)
4d6f6af8 684{
4d6ea9c3
DK		 685 u32 value;
686 u32 RcrReset;
687 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 688
4d6ea9c3
DK		 689 if (linkchange) {
690 /* Setup MAC */
691 slic_mac_config(adapter);
692 RcrReset = GRCR_RESET;
693 } else {
694 slic_mac_address_config(adapter);
695 RcrReset = 0;
696 }
4d6f6af8 697
4d6ea9c3
DK		 698 if (adapter->linkduplex == LINK_FULLD) {
699 /* setup xmtcfg */
700 value = (GXCR_RESET | /* Always reset */
701 GXCR_XMTEN | /* Enable transmit */
702 GXCR_PAUSEEN); /* Enable pause */
4d6f6af8 703
4d6ea9c3 704 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8 705
4d6ea9c3
DK		 706 /* Setup rcvcfg last */
707 value = (RcrReset | /* Reset, if linkchange */
708 GRCR_CTLEN | /* Enable CTL frames */
709 GRCR_ADDRAEN | /* Address A enable */
710 GRCR_RCVBAD | /* Rcv bad frames */
711 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
712 } else {
713 /* setup xmtcfg */
714 value = (GXCR_RESET | /* Always reset */
715 GXCR_XMTEN); /* Enable transmit */
4d6f6af8 716
4d6ea9c3 717 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8 718
4d6ea9c3
DK		 719 /* Setup rcvcfg last */
720 value = (RcrReset | /* Reset, if linkchange */
721 GRCR_ADDRAEN | /* Address A enable */
722 GRCR_RCVBAD | /* Rcv bad frames */
723 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
4d6f6af8
GKH		 724 }
725
4d6ea9c3
DK		 726 if (adapter->state != ADAPT_DOWN) {
727 /* Only enable receive if we are restarting or running */
728 value |= GRCR_RCVEN;
4d6f6af8 729 }
4d6f6af8 730
4d6ea9c3
DK		 731 if (adapter->macopts & MAC_PROMISC)
732 value |= GRCR_RCVALL;
4d6f6af8 733
4d6ea9c3
DK		 734 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
735}
4d6f6af8 736
4d6ea9c3
DK		 737/*
738 * Turn off RCV and XMT, power down PHY
739 */
740static void slic_config_clear(struct adapter *adapter)
4d6f6af8 741{
4d6ea9c3
DK		 742 u32 value;
743 u32 phy_config;
744 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
745
746 /* Setup xmtcfg */
747 value = (GXCR_RESET | /* Always reset */
748 GXCR_PAUSEEN); /* Enable pause */
749
750 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
751
752 value = (GRCR_RESET | /* Always reset */
753 GRCR_CTLEN | /* Enable CTL frames */
754 GRCR_ADDRAEN | /* Address A enable */
755 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
756
757 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
758
759 /* power down phy */
760 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
761 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
4d6f6af8
GKH		 762}
763
4d6ea9c3
DK		 764static bool slic_mac_filter(struct adapter *adapter,
765 struct ether_header *ether_frame)
4d6f6af8 766{
9092de6d 767 struct net_device *netdev = adapter->netdev;
4d6ea9c3
DK		 768 u32 opts = adapter->macopts;
769 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
770 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
4d6f6af8 771
4d6ea9c3
DK		 772 if (opts & MAC_PROMISC)
773 return true;
4d6f6af8 774
4d6ea9c3
DK		 775 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
776 if (opts & MAC_BCAST) {
777 adapter->rcv_broadcasts++;
778 return true;
779 } else {
780 return false;
4d6f6af8 781 }
4d6ea9c3
DK		 782 }
783
784 if (ether_frame->ether_dhost[0] & 0x01) {
785 if (opts & MAC_ALLMCAST) {
786 adapter->rcv_multicasts++;
9092de6d 787 netdev->stats.multicast++;
4d6ea9c3 788 return true;
4d6f6af8 789 }
4d6ea9c3
DK		 790 if (opts & MAC_MCAST) {
791 struct mcast_address *mcaddr = adapter->mcastaddrs;
4d6f6af8 792
4d6ea9c3
DK		 793 while (mcaddr) {
794 if (!compare_ether_addr(mcaddr->address,
795 ether_frame->ether_dhost)) {
796 adapter->rcv_multicasts++;
9092de6d 797 netdev->stats.multicast++;
4d6ea9c3
DK		 798 return true;
799 }
800 mcaddr = mcaddr->next;
801 }
802 return false;
803 } else {
804 return false;
4d6f6af8
GKH		 805 }
806 }
4d6ea9c3
DK		 807 if (opts & MAC_DIRECTED) {
808 adapter->rcv_unicasts++;
809 return true;
810 }
811 return false;
4d6f6af8 812
4d6ea9c3 813}
4d6f6af8 814
4d6ea9c3 815static int slic_mac_set_address(struct net_device *dev, void *ptr)
4d6f6af8 816{
4d6ea9c3
DK		 817 struct adapter *adapter = netdev_priv(dev);
818 struct sockaddr *addr = ptr;
4d6f6af8 819
4d6ea9c3
DK		 820 if (netif_running(dev))
821 return -EBUSY;
822 if (!adapter)
823 return -EBUSY;
4d6f6af8 824
4d6ea9c3
DK		 825 if (!is_valid_ether_addr(addr->sa_data))
826 return -EINVAL;
4d6f6af8 827
4d6ea9c3
DK		 828 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
829 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
4d6f6af8 830
4d6ea9c3
DK		 831 slic_config_set(adapter, true);
832 return 0;
4d6f6af8
GKH		 833}
834
4d6ea9c3 835static void slic_timer_load_check(ulong cardaddr)
4d6f6af8 836{
4d6ea9c3
DK		 837 struct sliccard *card = (struct sliccard *)cardaddr;
838 struct adapter *adapter = card->master;
839 u32 __iomem *intagg;
840 u32 load = card->events;
841 u32 level = 0;
4d6f6af8 842
4d6ea9c3
DK		 843 if ((adapter) && (adapter->state == ADAPT_UP) &&
844 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
81372118 845 intagg = &adapter->slic_regs->slic_intagg;
4d6ea9c3
DK		 846 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
847 if (adapter->linkspeed == LINK_1000MB)
848 level = 100;
849 else {
850 if (load > SLIC_LOAD_5)
851 level = SLIC_INTAGG_5;
852 else if (load > SLIC_LOAD_4)
853 level = SLIC_INTAGG_4;
854 else if (load > SLIC_LOAD_3)
855 level = SLIC_INTAGG_3;
856 else if (load > SLIC_LOAD_2)
857 level = SLIC_INTAGG_2;
858 else if (load > SLIC_LOAD_1)
859 level = SLIC_INTAGG_1;
860 else
861 level = SLIC_INTAGG_0;
4d6f6af8 862 }
4d6ea9c3
DK		 863 if (card->loadlevel_current != level) {
864 card->loadlevel_current = level;
865 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8 866 }
4d6ea9c3
DK		 867 } else {
868 if (load > SLIC_LOAD_5)
869 level = SLIC_INTAGG_5;
870 else if (load > SLIC_LOAD_4)
871 level = SLIC_INTAGG_4;
872 else if (load > SLIC_LOAD_3)
873 level = SLIC_INTAGG_3;
874 else if (load > SLIC_LOAD_2)
875 level = SLIC_INTAGG_2;
876 else if (load > SLIC_LOAD_1)
877 level = SLIC_INTAGG_1;
878 else
879 level = SLIC_INTAGG_0;
880 if (card->loadlevel_current != level) {
881 card->loadlevel_current = level;
882 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8 883 }
4d6f6af8 884 }
4d6f6af8 885 }
4d6ea9c3
DK		 886 card->events = 0;
887 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
888 add_timer(&card->loadtimer);
4d6f6af8
GKH		 889}
890
4d6ea9c3
DK		 891static int slic_upr_queue_request(struct adapter *adapter,
892 u32 upr_request,
893 u32 upr_data,
894 u32 upr_data_h,
895 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 896{
4d6ea9c3
DK		 897 struct slic_upr *upr;
898 struct slic_upr *uprqueue;
4d6f6af8 899
4d6ea9c3
DK		 900 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
901 if (!upr)
902 return -ENOMEM;
4d6f6af8 903
4d6ea9c3
DK		 904 upr->adapter = adapter->port;
905 upr->upr_request = upr_request;
906 upr->upr_data = upr_data;
907 upr->upr_buffer = upr_buffer;
908 upr->upr_data_h = upr_data_h;
909 upr->upr_buffer_h = upr_buffer_h;
910 upr->next = NULL;
911 if (adapter->upr_list) {
912 uprqueue = adapter->upr_list;
a0a1cbef 913
4d6ea9c3
DK		 914 while (uprqueue->next)
915 uprqueue = uprqueue->next;
916 uprqueue->next = upr;
917 } else {
918 adapter->upr_list = upr;
4d6f6af8 919 }
4d6ea9c3 920 return 0;
4d6f6af8
GKH		 921}
922
4d6ea9c3 923static void slic_upr_start(struct adapter *adapter)
4d6f6af8 924{
4d6ea9c3
DK		 925 struct slic_upr *upr;
926 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 927/*
4d6ea9c3
DK		 928 char * ptr1;
929 char * ptr2;
930 uint cmdoffset;
931*/
932 upr = adapter->upr_list;
933 if (!upr)
934 return;
935 if (adapter->upr_busy)
936 return;
937 adapter->upr_busy = 1;
4d6f6af8 938
4d6ea9c3
DK		 939 switch (upr->upr_request) {
940 case SLIC_UPR_STATS:
941 if (upr->upr_data_h == 0) {
942 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
943 FLUSH);
944 } else {
945 slic_reg64_write(adapter, &slic_regs->slic_stats64,
946 upr->upr_data,
947 &slic_regs->slic_addr_upper,
948 upr->upr_data_h, FLUSH);
949 }
950 break;
4d6f6af8 951
4d6ea9c3
DK		 952 case SLIC_UPR_RLSR:
953 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
954 &slic_regs->slic_addr_upper, upr->upr_data_h,
955 FLUSH);
956 break;
4d6f6af8 957
4d6ea9c3
DK		 958 case SLIC_UPR_RCONFIG:
959 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
960 upr->upr_data, &slic_regs->slic_addr_upper,
961 upr->upr_data_h, FLUSH);
962 break;
963 case SLIC_UPR_PING:
964 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
965 break;
4d6ea9c3 966 }
4d6f6af8
GKH		 967}
968
4d6ea9c3
DK		 969static int slic_upr_request(struct adapter *adapter,
970 u32 upr_request,
971 u32 upr_data,
972 u32 upr_data_h,
973 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 974{
4d6ea9c3 975 int rc;
4d6f6af8 976
4d6ea9c3
DK		 977 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
978 rc = slic_upr_queue_request(adapter,
979 upr_request,
980 upr_data,
981 upr_data_h, upr_buffer, upr_buffer_h);
982 if (rc)
983 goto err_unlock_irq;
4d6f6af8 984
4d6ea9c3
DK		 985 slic_upr_start(adapter);
986err_unlock_irq:
987 spin_unlock_irqrestore(&adapter->upr_lock.lock,
988 adapter->upr_lock.flags);
989 return rc;
4d6f6af8
GKH		 990}
991
4d6ea9c3 992static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
4d6f6af8 993{
4d6ea9c3
DK		 994 u32 linkstatus = adapter->pshmem->linkstatus;
995 uint linkup;
996 unsigned char linkspeed;
997 unsigned char linkduplex;
4d6f6af8 998
4d6ea9c3
DK		 999 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1000 struct slic_shmem *pshmem;
4d6f6af8 1001
01d0a9b4
JP		 1002 pshmem = (struct slic_shmem *)(unsigned long)
1003 adapter->phys_shmem;
1033f1f7 1004#if BITS_PER_LONG == 64
4d6ea9c3
DK		 1005 slic_upr_queue_request(adapter,
1006 SLIC_UPR_RLSR,
1007 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1008 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1009 0, 0);
1033f1f7 1010#else
4d6ea9c3
DK		 1011 slic_upr_queue_request(adapter,
1012 SLIC_UPR_RLSR,
1013 (u32) &pshmem->linkstatus,
1014 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
4d6ea9c3
DK		 1015#endif
1016 return;
1017 }
1018 if (adapter->state != ADAPT_UP)
1019 return;
4d6f6af8 1020
4d6ea9c3
DK		 1021 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1022 if (linkstatus & GIG_SPEED_1000)
1023 linkspeed = LINK_1000MB;
1024 else if (linkstatus & GIG_SPEED_100)
1025 linkspeed = LINK_100MB;
1026 else
1027 linkspeed = LINK_10MB;
4d6f6af8 1028
4d6ea9c3
DK		 1029 if (linkstatus & GIG_FULLDUPLEX)
1030 linkduplex = LINK_FULLD;
1031 else
1032 linkduplex = LINK_HALFD;
4d6f6af8 1033
4d6ea9c3
DK		 1034 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1035 return;
4d6f6af8 1036
4d6ea9c3
DK		 1037 /* link up event, but nothing has changed */
1038 if ((adapter->linkstate == LINK_UP) &&
1039 (linkup == LINK_UP) &&
1040 (adapter->linkspeed == linkspeed) &&
1041 (adapter->linkduplex == linkduplex))
1042 return;
4d6f6af8 1043
4d6ea9c3 1044 /* link has changed at this point */
4d6f6af8 1045
4d6ea9c3
DK		 1046 /* link has gone from up to down */
1047 if (linkup == LINK_DOWN) {
1048 adapter->linkstate = LINK_DOWN;
1049 return;
4d6f6af8
GKH		 1050 }
1051
4d6ea9c3
DK		 1052 /* link has gone from down to up */
1053 adapter->linkspeed = linkspeed;
1054 adapter->linkduplex = linkduplex;
1055
1056 if (adapter->linkstate != LINK_UP) {
1057 /* setup the mac */
b574488e 1058 slic_config_set(adapter, true);
4d6ea9c3
DK		 1059 adapter->linkstate = LINK_UP;
1060 netif_start_queue(adapter->netdev);
4d6f6af8 1061 }
4d6f6af8
GKH		 1062}
1063
4d6ea9c3 1064static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
4d6f6af8 1065{
4d6ea9c3
DK		 1066 struct sliccard *card = adapter->card;
1067 struct slic_upr *upr;
4d6f6af8 1068
4d6ea9c3
DK		 1069 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1070 upr = adapter->upr_list;
1071 if (!upr) {
4d6ea9c3
DK		 1072 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1073 adapter->upr_lock.flags);
1074 return;
4d6f6af8 1075 }
4d6ea9c3
DK		 1076 adapter->upr_list = upr->next;
1077 upr->next = NULL;
1078 adapter->upr_busy = 0;
4d6ea9c3
DK		 1079 switch (upr->upr_request) {
1080 case SLIC_UPR_STATS:
1081 {
1082 struct slic_stats *slicstats =
1083 (struct slic_stats *) &adapter->pshmem->inicstats;
1084 struct slic_stats *newstats = slicstats;
1085 struct slic_stats *old = &adapter->inicstats_prev;
1086 struct slicnet_stats *stst = &adapter->slic_stats;
4d6f6af8 1087
4d6ea9c3
DK		 1088 if (isr & ISR_UPCERR) {
1089 dev_err(&adapter->netdev->dev,
1090 "SLIC_UPR_STATS command failed isr[%x]\n",
1091 isr);
4d6f6af8 1092
4d6ea9c3
DK		 1093 break;
1094 }
1095 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1096 newstats->xmit_tcp_segs_gb,
1097 old->xmit_tcp_segs_gb);
4d6f6af8 1098
4d6ea9c3
DK		 1099 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1100 newstats->xmit_tcp_bytes_gb,
1101 old->xmit_tcp_bytes_gb);
4d6f6af8 1102
4d6ea9c3
DK		 1103 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1104 newstats->rcv_tcp_segs_gb,
1105 old->rcv_tcp_segs_gb);
4d6f6af8 1106
4d6ea9c3
DK		 1107 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1108 newstats->rcv_tcp_bytes_gb,
1109 old->rcv_tcp_bytes_gb);
4d6f6af8 1110
4d6ea9c3
DK		 1111 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1112 newstats->xmit_bytes_gb,
1113 old->xmit_bytes_gb);
4d6f6af8 1114
4d6ea9c3
DK		 1115 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1116 newstats->xmit_unicasts_gb,
1117 old->xmit_unicasts_gb);
4d6f6af8 1118
4d6ea9c3
DK		 1119 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1120 newstats->rcv_bytes_gb,
1121 old->rcv_bytes_gb);
4d6f6af8 1122
4d6ea9c3
DK		 1123 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1124 newstats->rcv_unicasts_gb,
1125 old->rcv_unicasts_gb);
4d6f6af8 1126
4d6ea9c3
DK		 1127 UPDATE_STATS_GB(stst->iface.xmt_errors,
1128 newstats->xmit_collisions_gb,
1129 old->xmit_collisions_gb);
4d6f6af8 1130
4d6ea9c3
DK		 1131 UPDATE_STATS_GB(stst->iface.xmt_errors,
1132 newstats->xmit_excess_collisions_gb,
1133 old->xmit_excess_collisions_gb);
4d6f6af8 1134
4d6ea9c3
DK		 1135 UPDATE_STATS_GB(stst->iface.xmt_errors,
1136 newstats->xmit_other_error_gb,
1137 old->xmit_other_error_gb);
4d6f6af8 1138
4d6ea9c3
DK		 1139 UPDATE_STATS_GB(stst->iface.rcv_errors,
1140 newstats->rcv_other_error_gb,
1141 old->rcv_other_error_gb);
4d6f6af8 1142
4d6ea9c3
DK		 1143 UPDATE_STATS_GB(stst->iface.rcv_discards,
1144 newstats->rcv_drops_gb,
1145 old->rcv_drops_gb);
a0a1cbef 1146
4d6ea9c3
DK		 1147 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1148 adapter->rcv_drops +=
1149 (newstats->rcv_drops_gb -
1150 old->rcv_drops_gb);
1151 }
1152 memcpy(old, newstats, sizeof(struct slic_stats));
1153 break;
1154 }
1155 case SLIC_UPR_RLSR:
1156 slic_link_upr_complete(adapter, isr);
1157 break;
1158 case SLIC_UPR_RCONFIG:
1159 break;
4d6ea9c3
DK		 1160 case SLIC_UPR_PING:
1161 card->pingstatus |= (isr & ISR_PINGDSMASK);
1162 break;
4d6f6af8 1163 }
4d6ea9c3
DK		 1164 kfree(upr);
1165 slic_upr_start(adapter);
1166 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1167 adapter->upr_lock.flags);
4d6f6af8
GKH		 1168}
1169
4d6ea9c3
DK		 1170static void slic_config_get(struct adapter *adapter, u32 config,
1171 u32 config_h)
4d6f6af8 1172{
4d6ea9c3
DK		 1173 int status;
1174
1175 status = slic_upr_request(adapter,
1176 SLIC_UPR_RCONFIG,
1177 (u32) config, (u32) config_h, 0, 0);
4d6f6af8
GKH		 1178}
1179
4d6ea9c3
DK		 1180/*
1181 * this is here to checksum the eeprom, there is some ucode bug
1182 * which prevens us from using the ucode result.
1183 * remove this once ucode is fixed.
1184 */
1185static ushort slic_eeprom_cksum(char *m, int len)
4d6f6af8 1186{
4d6ea9c3
DK		 1187#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
1188#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
1189 }
4d6f6af8 1190
4d6ea9c3
DK		 1191 u16 *w;
1192 u32 sum = 0;
1193 u32 byte_swapped = 0;
1194 u32 w_int;
4d6f6af8 1195
4d6ea9c3
DK		 1196 union {
1197 char c[2];
1198 ushort s;
1199 } s_util;
4d6f6af8 1200
4d6ea9c3
DK		 1201 union {
1202 ushort s[2];
1203 int l;
1204 } l_util;
4d6f6af8 1205
4d6ea9c3
DK		 1206 l_util.l = 0;
1207 s_util.s = 0;
1208
1209 w = (u16 *)m;
1033f1f7 1210#if BITS_PER_LONG == 64
4d6ea9c3
DK		 1211 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
1212#else
1213 w_int = (u32) (w);
1214#endif
1215 if ((1 & w_int) && (len > 0)) {
1216 REDUCE;
1217 sum <<= 8;
1218 s_util.c[0] = *(unsigned char *)w;
1219 w = (u16 *)((char *)w + 1);
1220 len--;
1221 byte_swapped = 1;
1222 }
1223
1224 /* Unroll the loop to make overhead from branches &c small. */
1225 while ((len -= 32) >= 0) {
1226 sum += w[0];
1227 sum += w[1];
1228 sum += w[2];
1229 sum += w[3];
1230 sum += w[4];
1231 sum += w[5];
1232 sum += w[6];
1233 sum += w[7];
1234 sum += w[8];
1235 sum += w[9];
1236 sum += w[10];
1237 sum += w[11];
1238 sum += w[12];
1239 sum += w[13];
1240 sum += w[14];
1241 sum += w[15];
1242 w = (u16 *)((ulong) w + 16); /* verify */
1243 }
1244 len += 32;
1245 while ((len -= 8) >= 0) {
1246 sum += w[0];
1247 sum += w[1];
1248 sum += w[2];
1249 sum += w[3];
1250 w = (u16 *)((ulong) w + 4); /* verify */
1251 }
1252 len += 8;
1253 if (len != 0 || byte_swapped != 0) {
1254 REDUCE;
1255 while ((len -= 2) >= 0)
1256 sum += *w++; /* verify */
1257 if (byte_swapped) {
1258 REDUCE;
1259 sum <<= 8;
1260 byte_swapped = 0;
1261 if (len == -1) {
1262 s_util.c[1] = *(char *) w;
1263 sum += s_util.s;
1264 len = 0;
1265 } else {
1266 len = -1;
1267 }
1268
1269 } else if (len == -1) {
1270 s_util.c[0] = *(char *) w;
1271 }
1272
1273 if (len == -1) {
1274 s_util.c[1] = 0;
1275 sum += s_util.s;
4d6f6af8 1276 }
4d6f6af8 1277 }
4d6ea9c3
DK		 1278 REDUCE;
1279 return (ushort) sum;
4d6f6af8
GKH		 1280}
1281
4d6ea9c3 1282static void slic_rspqueue_free(struct adapter *adapter)
4d6f6af8 1283{
4d6ea9c3
DK		 1284 int i;
1285 struct slic_rspqueue *rspq = &adapter->rspqueue;
4d6f6af8 1286
4d6ea9c3
DK		 1287 for (i = 0; i < rspq->num_pages; i++) {
1288 if (rspq->vaddr[i]) {
1289 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1290 rspq->vaddr[i], rspq->paddr[i]);
1291 }
1292 rspq->vaddr[i] = NULL;
1293 rspq->paddr[i] = 0;
1294 }
1295 rspq->offset = 0;
1296 rspq->pageindex = 0;
1297 rspq->rspbuf = NULL;
4d6f6af8
GKH		 1298}
1299
4d6ea9c3 1300static int slic_rspqueue_init(struct adapter *adapter)
4d6f6af8 1301{
4d6ea9c3
DK		 1302 int i;
1303 struct slic_rspqueue *rspq = &adapter->rspqueue;
1304 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1305 u32 paddrh = 0;
1306
4d6ea9c3
DK		 1307 memset(rspq, 0, sizeof(struct slic_rspqueue));
1308
1309 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1310
1311 for (i = 0; i < rspq->num_pages; i++) {
1312 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
1313 PAGE_SIZE,
1314 &rspq->paddr[i]);
1315 if (!rspq->vaddr[i]) {
1316 dev_err(&adapter->pcidev->dev,
1317 "pci_alloc_consistent failed\n");
1318 slic_rspqueue_free(adapter);
1319 return -ENOMEM;
1320 }
1033f1f7
DK		 1321 /* FIXME:
1322 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */
4d6ea9c3
DK		 1323 memset(rspq->vaddr[i], 0, PAGE_SIZE);
1324
1325 if (paddrh == 0) {
1326 slic_reg32_write(&slic_regs->slic_rbar,
1327 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1328 DONT_FLUSH);
1329 } else {
1330 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1331 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1332 &slic_regs->slic_addr_upper,
1333 paddrh, DONT_FLUSH);
1334 }
1335 }
1336 rspq->offset = 0;
1337 rspq->pageindex = 0;
1338 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1339 return 0;
4d6f6af8
GKH		 1340}
1341
4d6ea9c3 1342static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
4d6f6af8 1343{
4d6ea9c3
DK		 1344 struct slic_rspqueue *rspq = &adapter->rspqueue;
1345 struct slic_rspbuf *buf;
4d6f6af8 1346
4d6ea9c3
DK		 1347 if (!(rspq->rspbuf->status))
1348 return NULL;
4d6f6af8 1349
4d6ea9c3 1350 buf = rspq->rspbuf;
4d6ea9c3
DK		 1351 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1352 rspq->rspbuf++;
4d6ea9c3 1353 } else {
4d6ea9c3
DK		 1354 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1355 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1356 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
6d1b80fd 1357 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
4d6ea9c3
DK		 1358 rspq->offset = 0;
1359 rspq->rspbuf = (struct slic_rspbuf *)
1360 rspq->vaddr[rspq->pageindex];
4d6ea9c3 1361 }
40991e4f 1362
4d6ea9c3
DK		 1363 return buf;
1364}
4d6f6af8 1365
4d6ea9c3
DK		 1366static void slic_cmdqmem_free(struct adapter *adapter)
1367{
1368 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1369 int i;
4d6f6af8 1370
4d6ea9c3
DK		 1371 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1372 if (cmdqmem->pages[i]) {
1373 pci_free_consistent(adapter->pcidev,
1374 PAGE_SIZE,
1375 (void *) cmdqmem->pages[i],
1376 cmdqmem->dma_pages[i]);
1377 }
1378 }
1379 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1380}
4d6f6af8 1381
4d6ea9c3
DK		 1382static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1383{
1384 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1385 u32 *pageaddr;
4d6f6af8 1386
4d6ea9c3
DK		 1387 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1388 return NULL;
1389 pageaddr = pci_alloc_consistent(adapter->pcidev,
1390 PAGE_SIZE,
1391 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1392 if (!pageaddr)
1393 return NULL;
40991e4f 1394
4d6ea9c3
DK		 1395 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1396 cmdqmem->pagecnt++;
1397 return pageaddr;
1398}
4d6f6af8 1399
4d6ea9c3
DK		 1400static void slic_cmdq_free(struct adapter *adapter)
1401{
1402 struct slic_hostcmd *cmd;
4d6f6af8 1403
4d6ea9c3
DK		 1404 cmd = adapter->cmdq_all.head;
1405 while (cmd) {
1406 if (cmd->busy) {
1407 struct sk_buff *tempskb;
4d6f6af8 1408
4d6ea9c3
DK		 1409 tempskb = cmd->skb;
1410 if (tempskb) {
1411 cmd->skb = NULL;
1412 dev_kfree_skb_irq(tempskb);
4d6f6af8
GKH		 1413 }
1414 }
4d6ea9c3
DK		 1415 cmd = cmd->next_all;
1416 }
1417 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1418 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1419 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1420 slic_cmdqmem_free(adapter);
1421}
4d6f6af8 1422
4d6ea9c3
DK		 1423static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1424{
1425 struct slic_hostcmd *cmd;
1426 struct slic_hostcmd *prev;
1427 struct slic_hostcmd *tail;
1428 struct slic_cmdqueue *cmdq;
1429 int cmdcnt;
1430 void *cmdaddr;
1431 ulong phys_addr;
1432 u32 phys_addrl;
1433 u32 phys_addrh;
1434 struct slic_handle *pslic_handle;
4d6f6af8 1435
4d6ea9c3
DK		 1436 cmdaddr = page;
1437 cmd = (struct slic_hostcmd *)cmdaddr;
1438 cmdcnt = 0;
4d6f6af8 1439
4d6ea9c3
DK		 1440 phys_addr = virt_to_bus((void *)page);
1441 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1442 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4d6f6af8 1443
4d6ea9c3
DK		 1444 prev = NULL;
1445 tail = cmd;
1446 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1447 (adapter->slic_handle_ix < 256)) {
1448 /* Allocate and initialize a SLIC_HANDLE for this command */
1449 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
4d6ea9c3
DK		 1450 pslic_handle->type = SLIC_HANDLE_CMD;
1451 pslic_handle->address = (void *) cmd;
1452 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1453 pslic_handle->other_handle = NULL;
1454 pslic_handle->next = NULL;
1455
1456 cmd->pslic_handle = pslic_handle;
1457 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1458 cmd->busy = false;
1459 cmd->paddrl = phys_addrl;
1460 cmd->paddrh = phys_addrh;
1461 cmd->next_all = prev;
1462 cmd->next = prev;
1463 prev = cmd;
1464 phys_addrl += SLIC_HOSTCMD_SIZE;
1465 cmdaddr += SLIC_HOSTCMD_SIZE;
1466
1467 cmd = (struct slic_hostcmd *)cmdaddr;
1468 cmdcnt++;
4d6f6af8 1469 }
4d6ea9c3
DK		 1470
1471 cmdq = &adapter->cmdq_all;
1472 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1473 tail->next_all = cmdq->head;
1474 cmdq->head = prev;
1475 cmdq = &adapter->cmdq_free;
1476 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1477 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1478 tail->next = cmdq->head;
1479 cmdq->head = prev;
1480 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 1481}
1482
4d6ea9c3 1483static int slic_cmdq_init(struct adapter *adapter)
4d6f6af8 1484{
4d6ea9c3
DK		 1485 int i;
1486 u32 *pageaddr;
4d6f6af8 1487
4d6ea9c3
DK		 1488 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1489 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1490 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1491 spin_lock_init(&adapter->cmdq_all.lock.lock);
1492 spin_lock_init(&adapter->cmdq_free.lock.lock);
1493 spin_lock_init(&adapter->cmdq_done.lock.lock);
bae5c3d1 1494 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6ea9c3
DK		 1495 adapter->slic_handle_ix = 1;
1496 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1497 pageaddr = slic_cmdqmem_addpage(adapter);
4d6ea9c3
DK		 1498 if (!pageaddr) {
1499 slic_cmdq_free(adapter);
1500 return -ENOMEM;
1501 }
1502 slic_cmdq_addcmdpage(adapter, pageaddr);
1503 }
1504 adapter->slic_handle_ix = 1;
4d6f6af8 1505
4d6ea9c3 1506 return 0;
4d6f6af8
GKH		 1507}
1508
4d6ea9c3 1509static void slic_cmdq_reset(struct adapter *adapter)
4d6f6af8 1510{
4d6ea9c3
DK		 1511 struct slic_hostcmd *hcmd;
1512 struct sk_buff *skb;
1513 u32 outstanding;
4d6f6af8 1514
4d6ea9c3
DK		 1515 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1516 adapter->cmdq_free.lock.flags);
1517 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1518 adapter->cmdq_done.lock.flags);
1519 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1520 outstanding -= adapter->cmdq_free.count;
1521 hcmd = adapter->cmdq_all.head;
1522 while (hcmd) {
1523 if (hcmd->busy) {
1524 skb = hcmd->skb;
4d6ea9c3
DK		 1525 hcmd->busy = 0;
1526 hcmd->skb = NULL;
1527 dev_kfree_skb_irq(skb);
1528 }
1529 hcmd = hcmd->next_all;
470c5736 1530 }
4d6ea9c3
DK		 1531 adapter->cmdq_free.count = 0;
1532 adapter->cmdq_free.head = NULL;
1533 adapter->cmdq_free.tail = NULL;
1534 adapter->cmdq_done.count = 0;
1535 adapter->cmdq_done.head = NULL;
1536 adapter->cmdq_done.tail = NULL;
1537 adapter->cmdq_free.head = adapter->cmdq_all.head;
1538 hcmd = adapter->cmdq_all.head;
1539 while (hcmd) {
1540 adapter->cmdq_free.count++;
1541 hcmd->next = hcmd->next_all;
1542 hcmd = hcmd->next_all;
4d6f6af8 1543 }
4d6ea9c3
DK		 1544 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1545 dev_err(&adapter->netdev->dev,
1546 "free_count %d != all count %d\n",
1547 adapter->cmdq_free.count, adapter->cmdq_all.count);
4d6f6af8 1548 }
4d6ea9c3
DK		 1549 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1550 adapter->cmdq_done.lock.flags);
1551 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1552 adapter->cmdq_free.lock.flags);
4d6f6af8
GKH		 1553}
1554
4d6ea9c3 1555static void slic_cmdq_getdone(struct adapter *adapter)
4d6f6af8 1556{
4d6ea9c3
DK		 1557 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1558 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4d6f6af8 1559
4d6ea9c3 1560 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8 1561
4d6ea9c3
DK		 1562 free_cmdq->head = done_cmdq->head;
1563 free_cmdq->count = done_cmdq->count;
1564 done_cmdq->head = NULL;
1565 done_cmdq->tail = NULL;
1566 done_cmdq->count = 0;
1567 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1568}
874073ea 1569
4d6ea9c3
DK		 1570static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1571{
1572 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1573 struct slic_hostcmd *cmd = NULL;
4d6f6af8 1574
4d6ea9c3
DK		 1575lock_and_retry:
1576 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1577retry:
1578 cmd = cmdq->head;
1579 if (cmd) {
1580 cmdq->head = cmd->next;
1581 cmdq->count--;
1582 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1583 } else {
1584 slic_cmdq_getdone(adapter);
1585 cmd = cmdq->head;
1586 if (cmd) {
1587 goto retry;
1588 } else {
1589 u32 *pageaddr;
874073ea 1590
4d6ea9c3
DK		 1591 spin_unlock_irqrestore(&cmdq->lock.lock,
1592 cmdq->lock.flags);
1593 pageaddr = slic_cmdqmem_addpage(adapter);
1594 if (pageaddr) {
1595 slic_cmdq_addcmdpage(adapter, pageaddr);
1596 goto lock_and_retry;
1597 }
4d6f6af8
GKH		 1598 }
1599 }
4d6ea9c3 1600 return cmd;
4d6f6af8
GKH		 1601}
1602
4d6ea9c3
DK		 1603static void slic_cmdq_putdone_irq(struct adapter *adapter,
1604 struct slic_hostcmd *cmd)
4d6f6af8 1605{
4d6ea9c3 1606 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4d6f6af8 1607
4d6ea9c3
DK		 1608 spin_lock(&cmdq->lock.lock);
1609 cmd->busy = 0;
1610 cmd->next = cmdq->head;
1611 cmdq->head = cmd;
1612 cmdq->count++;
1613 if ((adapter->xmitq_full) && (cmdq->count > 10))
1614 netif_wake_queue(adapter->netdev);
1615 spin_unlock(&cmdq->lock.lock);
4d6f6af8
GKH		 1616}
1617
4d6ea9c3 1618static int slic_rcvqueue_fill(struct adapter *adapter)
4d6f6af8 1619{
4d6ea9c3
DK		 1620 void *paddr;
1621 u32 paddrl;
1622 u32 paddrh;
1623 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1624 int i = 0;
1625 struct device *dev = &adapter->netdev->dev;
1626
1627 while (i < SLIC_RCVQ_FILLENTRIES) {
1628 struct slic_rcvbuf *rcvbuf;
1629 struct sk_buff *skb;
1630#ifdef KLUDGE_FOR_4GB_BOUNDARY
1631retry_rcvqfill:
1632#endif
1633 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1634 if (skb) {
01d0a9b4
JP		 1635 paddr = (void *)(unsigned long)
1636 pci_map_single(adapter->pcidev,
1637 skb->data,
1638 SLIC_RCVQ_RCVBUFSIZE,
1639 PCI_DMA_FROMDEVICE);
4d6ea9c3
DK		 1640 paddrl = SLIC_GET_ADDR_LOW(paddr);
1641 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1642
1643 skb->len = SLIC_RCVBUF_HEADSIZE;
1644 rcvbuf = (struct slic_rcvbuf *)skb->head;
1645 rcvbuf->status = 0;
1646 skb->next = NULL;
1647#ifdef KLUDGE_FOR_4GB_BOUNDARY
1648 if (paddrl == 0) {
1649 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1650 __func__);
1651 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1652 dev_err(dev, " skbdata[%p]\n", skb->data);
1653 dev_err(dev, " skblen[%x]\n", skb->len);
1654 dev_err(dev, " paddr[%p]\n", paddr);
1655 dev_err(dev, " paddrl[%x]\n", paddrl);
1656 dev_err(dev, " paddrh[%x]\n", paddrh);
1657 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1658 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1659 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1660 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1661 goto retry_rcvqfill;
1662 }
1663#else
1664 if (paddrl == 0) {
1665 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1666 __func__);
1667 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1668 dev_err(dev, " skbdata[%p]\n", skb->data);
1669 dev_err(dev, " skblen[%x]\n", skb->len);
1670 dev_err(dev, " paddr[%p]\n", paddr);
1671 dev_err(dev, " paddrl[%x]\n", paddrl);
1672 dev_err(dev, " paddrh[%x]\n", paddrh);
1673 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1674 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1675 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1676 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1677 }
1678#endif
1679 if (paddrh == 0) {
1680 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1681 (u32)paddrl, DONT_FLUSH);
1682 } else {
1683 slic_reg64_write(adapter,
1684 &adapter->slic_regs->slic_hbar64,
1685 paddrl,
1686 &adapter->slic_regs->slic_addr_upper,
1687 paddrh, DONT_FLUSH);
1688 }
1689 if (rcvq->head)
1690 rcvq->tail->next = skb;
1691 else
1692 rcvq->head = skb;
1693 rcvq->tail = skb;
1694 rcvq->count++;
1695 i++;
1696 } else {
1697 dev_err(&adapter->netdev->dev,
1698 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1699 i);
1700 break;
1701 }
1702 }
1703 return i;
4d6f6af8
GKH		 1704}
1705
4d6ea9c3 1706static void slic_rcvqueue_free(struct adapter *adapter)
4d6f6af8 1707{
4d6ea9c3
DK		 1708 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1709 struct sk_buff *skb;
4d6f6af8 1710
4d6ea9c3
DK		 1711 while (rcvq->head) {
1712 skb = rcvq->head;
1713 rcvq->head = rcvq->head->next;
1714 dev_kfree_skb(skb);
1715 }
1716 rcvq->tail = NULL;
1717 rcvq->head = NULL;
1718 rcvq->count = 0;
1719}
4d6f6af8 1720
4d6ea9c3
DK		 1721static int slic_rcvqueue_init(struct adapter *adapter)
1722{
1723 int i, count;
1724 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 1725
4d6ea9c3
DK		 1726 rcvq->tail = NULL;
1727 rcvq->head = NULL;
1728 rcvq->size = SLIC_RCVQ_ENTRIES;
1729 rcvq->errors = 0;
1730 rcvq->count = 0;
1731 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
1732 count = 0;
1733 while (i) {
1734 count += slic_rcvqueue_fill(adapter);
1735 i--;
1736 }
1737 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1738 slic_rcvqueue_free(adapter);
1739 return -ENOMEM;
4d6f6af8 1740 }
4d6ea9c3
DK		 1741 return 0;
1742}
4d6f6af8 1743
4d6ea9c3
DK		 1744static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1745{
1746 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1747 struct sk_buff *skb;
1748 struct slic_rcvbuf *rcvbuf;
1749 int count;
4d6f6af8 1750
4d6ea9c3
DK		 1751 if (rcvq->count) {
1752 skb = rcvq->head;
1753 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8 1754
4d6ea9c3
DK		 1755 if (rcvbuf->status & IRHDDR_SVALID) {
1756 rcvq->head = rcvq->head->next;
1757 skb->next = NULL;
1758 rcvq->count--;
4d6f6af8 1759 } else {
4d6ea9c3 1760 skb = NULL;
4d6f6af8 1761 }
4d6ea9c3
DK		 1762 } else {
1763 dev_err(&adapter->netdev->dev,
1764 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1765 skb = NULL;
1766 }
1767 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1768 count = slic_rcvqueue_fill(adapter);
1769 if (!count)
1770 break;
1771 }
1772 if (skb)
1773 rcvq->errors = 0;
1774 return skb;
1775}
4d6f6af8 1776
4d6ea9c3
DK		 1777static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1778{
1779 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1780 void *paddr;
1781 u32 paddrl;
1782 u32 paddrh;
1783 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1784 struct device *dev;
4d6f6af8 1785
01d0a9b4
JP		 1786 paddr = (void *)(unsigned long)
1787 pci_map_single(adapter->pcidev, skb->head,
1788 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4d6ea9c3
DK		 1789 rcvbuf->status = 0;
1790 skb->next = NULL;
4d6f6af8 1791
4d6ea9c3
DK		 1792 paddrl = SLIC_GET_ADDR_LOW(paddr);
1793 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4d6f6af8 1794
4d6ea9c3
DK		 1795 if (paddrl == 0) {
1796 dev = &adapter->netdev->dev;
1797 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1798 __func__);
1799 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1800 dev_err(dev, " skbdata[%p]\n", skb->data);
1801 dev_err(dev, " skblen[%x]\n", skb->len);
1802 dev_err(dev, " paddr[%p]\n", paddr);
1803 dev_err(dev, " paddrl[%x]\n", paddrl);
1804 dev_err(dev, " paddrh[%x]\n", paddrh);
1805 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1806 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1807 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
4d6f6af8 1808 }
4d6ea9c3
DK		 1809 if (paddrh == 0) {
1810 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1811 DONT_FLUSH);
1812 } else {
1813 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1814 paddrl, &adapter->slic_regs->slic_addr_upper,
1815 paddrh, DONT_FLUSH);
4d6f6af8 1816 }
4d6ea9c3
DK		 1817 if (rcvq->head)
1818 rcvq->tail->next = skb;
e8bc9b7a 1819 else
4d6ea9c3
DK		 1820 rcvq->head = skb;
1821 rcvq->tail = skb;
1822 rcvq->count++;
1823 return rcvq->count;
4d6f6af8
GKH		 1824}
1825
4d6ea9c3 1826static int slic_debug_card_show(struct seq_file *seq, void *v)
4d6f6af8 1827{
4d6ea9c3
DK		 1828#ifdef MOOKTODO
1829 int i;
1830 struct sliccard *card = seq->private;
1831 struct slic_config *config = &card->config;
1832 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
1833 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
1834#endif
4d6f6af8 1835
4d6ea9c3
DK		 1836 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
1837 seq_printf(seq, "Microcode versions: \n");
1838 seq_printf(seq, " Gigabit (gb) : %s %s\n",
1839 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
1840 seq_printf(seq, " Gigabit Receiver : %s %s\n",
1841 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
1842 seq_printf(seq, "Vendor : %s\n", slic_vendor);
1843 seq_printf(seq, "Product Name : %s\n", slic_product_name);
1844#ifdef MOOKTODO
1845 seq_printf(seq, "VendorId : %4.4X\n",
1846 config->VendorId);
1847 seq_printf(seq, "DeviceId : %4.4X\n",
1848 config->DeviceId);
1849 seq_printf(seq, "RevisionId : %2.2x\n",
1850 config->RevisionId);
1851 seq_printf(seq, "Bus # : %d\n", card->busnumber);
1852 seq_printf(seq, "Device # : %d\n", card->slotnumber);
1853 seq_printf(seq, "Interfaces : %d\n", card->card_size);
1854 seq_printf(seq, " Initialized : %d\n",
1855 card->adapters_activated);
1856 seq_printf(seq, " Allocated : %d\n",
1857 card->adapters_allocated);
4d6ea9c3
DK		 1858 for (i = 0; i < card->card_size; i++) {
1859 seq_printf(seq,
1860 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
1861 i, config->macinfo[i].macaddrA[0],
1862 config->macinfo[i].macaddrA[1],
1863 config->macinfo[i].macaddrA[2],
1864 config->macinfo[i].macaddrA[3],
1865 config->macinfo[i].macaddrA[4],
1866 config->macinfo[i].macaddrA[5]);
4d6f6af8 1867 }
4d6ea9c3
DK		 1868 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
1869 seq_printf(seq, " -------------------------------\n");
1870 for (i = 0; i < card->adapters_allocated; i++) {
1871 struct adapter *adapter;
4d6f6af8 1872
4d6ea9c3
DK		 1873 adapter = card->adapter[i];
1874 if (adapter) {
1875 seq_printf(seq,
1876 " %d %d %s %s %s 0x%X\n",
1877 adapter->physport, adapter->state,
1878 SLIC_LINKSTATE(adapter->linkstate),
1879 SLIC_DUPLEX(adapter->linkduplex),
1880 SLIC_SPEED(adapter->linkspeed),
1881 (uint) adapter->irq);
1882 }
1883 }
1884 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
1885 seq_printf(seq, "RcvQ max entries : %4.4X\n",
1886 SLIC_RCVQ_ENTRIES);
1887 seq_printf(seq, "Ping Status : %8.8X\n",
1888 card->pingstatus);
1889 seq_printf(seq, "Minimum grant : %2.2x\n",
1890 config->MinGrant);
1891 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
1892 seq_printf(seq, "PciStatus : %4.4x\n",
1893 config->Pcistatus);
1894 seq_printf(seq, "Debug Device Id : %4.4x\n",
1895 config->DbgDevId);
1896 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
1897 config->DramRomFn);
1898 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
1899 config->NetIntPin1);
1900 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
1901 config->NetIntPin1);
1902 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
1903 config->NetIntPin1);
1904 seq_printf(seq, "PM capabilities : %4.4X\n",
1905 config->PMECapab);
1906 seq_printf(seq, "Network Clock Controls : %4.4X\n",
1907 config->NwClkCtrls);
4d6f6af8 1908
4d6ea9c3
DK		 1909 switch (config->FruFormat) {
1910 case ATK_FRU_FORMAT:
1911 {
1912 seq_printf(seq,
1913 "Vendor : Alacritech, Inc.\n");
1914 seq_printf(seq,
1915 "Assembly # : %c%c%c%c%c%c\n",
1916 fru[0], fru[1], fru[2], fru[3], fru[4],
1917 fru[5]);
1918 seq_printf(seq,
1919 "Revision # : %c%c\n",
1920 fru[6], fru[7]);
4d6f6af8 1921
4d6ea9c3
DK		 1922 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
1923 seq_printf(seq,
1924 "Serial # : "
1925 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
1926 fru[8], fru[9], fru[10],
1927 fru[11], fru[12], fru[13],
1928 fru[16], fru[17], fru[18],
1929 fru[19], fru[20], fru[21]);
1930 } else {
1931 seq_printf(seq,
1932 "Serial # : "
1933 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
1934 fru[8], fru[9], fru[10],
1935 fru[11], fru[12], fru[13],
1936 fru[14], fru[15], fru[16],
1937 fru[17], fru[18], fru[19],
1938 fru[20], fru[21]);
4d6f6af8 1939 }
4d6ea9c3 1940 break;
4d6f6af8 1941 }
4d6f6af8 1942
4d6ea9c3
DK		 1943 default:
1944 {
1945 seq_printf(seq,
1946 "Vendor : Alacritech, Inc.\n");
1947 seq_printf(seq,
1948 "Serial # : Empty FRU\n");
1949 break;
4d6f6af8
GKH		 1950 }
1951 }
1952
4d6ea9c3
DK		 1953 switch (config->OEMFruFormat) {
1954 case VENDOR1_FRU_FORMAT:
1955 {
1956 seq_printf(seq, "FRU Information:\n");
1957 seq_printf(seq, " Commodity # : %c\n",
1958 oemfru[0]);
1959 seq_printf(seq,
1960 " Assembly # : %c%c%c%c\n",
1961 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
1962 seq_printf(seq,
1963 " Revision # : %c%c\n",
1964 oemfru[5], oemfru[6]);
1965 seq_printf(seq,
1966 " Supplier # : %c%c\n",
1967 oemfru[7], oemfru[8]);
1968 seq_printf(seq,
1969 " Date : %c%c\n",
1970 oemfru[9], oemfru[10]);
1971 seq_sprintf(seq,
1972 " Sequence # : %c%c%c\n",
1973 oemfru[11], oemfru[12], oemfru[13]);
1974 break;
1975 }
4d6f6af8 1976
4d6ea9c3
DK		 1977 case VENDOR2_FRU_FORMAT:
1978 {
1979 seq_printf(seq, "FRU Information:\n");
1980 seq_printf(seq,
1981 " Part # : "
1982 "%c%c%c%c%c%c%c%c\n",
1983 oemfru[0], oemfru[1], oemfru[2],
1984 oemfru[3], oemfru[4], oemfru[5],
1985 oemfru[6], oemfru[7]);
1986 seq_printf(seq,
1987 " Supplier # : %c%c%c%c%c\n",
1988 oemfru[8], oemfru[9], oemfru[10],
1989 oemfru[11], oemfru[12]);
1990 seq_printf(seq,
1991 " Date : %c%c%c\n",
1992 oemfru[13], oemfru[14], oemfru[15]);
1993 seq_sprintf(seq,
1994 " Sequence # : %c%c%c%c\n",
1995 oemfru[16], oemfru[17], oemfru[18],
1996 oemfru[19]);
1997 break;
1998 }
4d6f6af8 1999
4d6ea9c3
DK		 2000 case VENDOR3_FRU_FORMAT:
2001 {
2002 seq_printf(seq, "FRU Information:\n");
4d6f6af8 2003 }
4d6ea9c3
DK		 2004
2005 case VENDOR4_FRU_FORMAT:
2006 {
2007 seq_printf(seq, "FRU Information:\n");
2008 seq_printf(seq,
2009 " FRU Number : "
2010 "%c%c%c%c%c%c%c%c\n",
2011 oemfru[0], oemfru[1], oemfru[2],
2012 oemfru[3], oemfru[4], oemfru[5],
2013 oemfru[6], oemfru[7]);
2014 seq_sprintf(seq,
2015 " Part Number : "
2016 "%c%c%c%c%c%c%c%c\n",
2017 oemfru[8], oemfru[9], oemfru[10],
2018 oemfru[11], oemfru[12], oemfru[13],
2019 oemfru[14], oemfru[15]);
2020 seq_printf(seq,
2021 " EC Level : "
2022 "%c%c%c%c%c%c%c%c\n",
2023 oemfru[16], oemfru[17], oemfru[18],
2024 oemfru[19], oemfru[20], oemfru[21],
2025 oemfru[22], oemfru[23]);
4d6f6af8 2026 break;
4d6ea9c3 2027 }
4d6f6af8 2028
4d6ea9c3
DK		 2029 default:
2030 break;
4d6f6af8 2031 }
4d6ea9c3 2032#endif
4d6f6af8
GKH		 2033
2034 return 0;
2035}
2036
4d6ea9c3 2037static int slic_debug_adapter_show(struct seq_file *seq, void *v)
4d6f6af8 2038{
4d6ea9c3 2039 struct adapter *adapter = seq->private;
9092de6d 2040 struct net_device *netdev = adapter->netdev;
4d6ea9c3 2041
9092de6d 2042 seq_printf(seq, "info: interface : %s\n",
4d6ea9c3 2043 adapter->netdev->name);
4d6ea9c3
DK		 2044 seq_printf(seq, "info: status : %s\n",
2045 SLIC_LINKSTATE(adapter->linkstate));
2046 seq_printf(seq, "info: port : %d\n",
2047 adapter->physport);
2048 seq_printf(seq, "info: speed : %s\n",
2049 SLIC_SPEED(adapter->linkspeed));
2050 seq_printf(seq, "info: duplex : %s\n",
2051 SLIC_DUPLEX(adapter->linkduplex));
2052 seq_printf(seq, "info: irq : 0x%X\n",
2053 (uint) adapter->irq);
2054 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
2055 adapter->card->loadlevel_current);
2056 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
2057 SLIC_RCVQ_ENTRIES);
2058 seq_printf(seq, "info: RcvQ current : %4.4X\n",
2059 adapter->rcvqueue.count);
2060 seq_printf(seq, "rx stats: packets : %8.8lX\n",
9092de6d 2061 netdev->stats.rx_packets);
4d6ea9c3 2062 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
9092de6d 2063 netdev->stats.rx_bytes);
4d6ea9c3
DK		 2064 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
2065 adapter->rcv_broadcasts);
2066 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
2067 adapter->rcv_multicasts);
2068 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
2069 adapter->rcv_unicasts);
2070 seq_printf(seq, "rx stats: errors : %8.8X\n",
2071 (u32) adapter->slic_stats.iface.rcv_errors);
2072 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
2073 (u32) adapter->slic_stats.iface.rcv_discards);
2074 seq_printf(seq, "rx stats: drops : %8.8X\n",
2075 (u32) adapter->rcv_drops);
2076 seq_printf(seq, "tx stats: packets : %8.8lX\n",
9092de6d 2077 netdev->stats.tx_packets);
4d6ea9c3 2078 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
9092de6d 2079 netdev->stats.tx_bytes);
4d6ea9c3
DK		 2080 seq_printf(seq, "tx stats: errors : %8.8X\n",
2081 (u32) adapter->slic_stats.iface.xmt_errors);
2082 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
9092de6d 2083 netdev->stats.multicast);
4d6ea9c3
DK		 2084 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
2085 (u32) adapter->slic_stats.iface.xmit_collisions);
2086 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
2087 adapter->max_isr_rcvs);
2088 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
2089 adapter->rcv_interrupt_yields);
2090 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
2091 adapter->max_isr_xmits);
2092 seq_printf(seq, "perf: error interrupts : %8.8X\n",
2093 adapter->error_interrupts);
2094 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
2095 adapter->error_rmiss_interrupts);
2096 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
2097 adapter->rcv_interrupts);
2098 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
2099 adapter->xmit_interrupts);
2100 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
2101 adapter->linkevent_interrupts);
2102 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
2103 adapter->upr_interrupts);
2104 seq_printf(seq, "perf: interrupt count : %8.8X\n",
2105 adapter->num_isrs);
2106 seq_printf(seq, "perf: false interrupts : %8.8X\n",
2107 adapter->false_interrupts);
2108 seq_printf(seq, "perf: All register writes : %8.8X\n",
2109 adapter->all_reg_writes);
2110 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
2111 adapter->icr_reg_writes);
2112 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
2113 adapter->isr_reg_writes);
2114 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
2115 adapter->if_events.oflow802);
2116 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
2117 adapter->if_events.Tprtoflow);
2118 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
2119 adapter->if_events.uflow802);
2120 seq_printf(seq, "ifevents: receive early : %8.8X\n",
2121 adapter->if_events.rcvearly);
2122 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
2123 adapter->if_events.Bufov);
2124 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
2125 adapter->if_events.Carre);
2126 seq_printf(seq, "ifevents: Long : %8.8X\n",
2127 adapter->if_events.Longe);
2128 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
2129 adapter->if_events.Invp);
2130 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
2131 adapter->if_events.Crc);
2132 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
2133 adapter->if_events.Drbl);
2134 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
2135 adapter->if_events.Code);
2136 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
2137 adapter->if_events.TpCsum);
2138 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
2139 adapter->if_events.TpHlen);
2140 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
2141 adapter->if_events.IpCsum);
2142 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
2143 adapter->if_events.IpLen);
2144 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
2145 adapter->if_events.IpHlen);
4d6f6af8 2146
4d6ea9c3 2147 return 0;
4d6f6af8 2148}
4d6ea9c3 2149static int slic_debug_adapter_open(struct inode *inode, struct file *file)
4d6f6af8 2150{
4d6ea9c3 2151 return single_open(file, slic_debug_adapter_show, inode->i_private);
4d6f6af8
GKH		 2152}
2153
4d6ea9c3 2154static int slic_debug_card_open(struct inode *inode, struct file *file)
4d6f6af8 2155{
4d6ea9c3
DK		 2156 return single_open(file, slic_debug_card_show, inode->i_private);
2157}
4d6f6af8 2158
4d6ea9c3
DK		 2159static const struct file_operations slic_debug_adapter_fops = {
2160 .owner = THIS_MODULE,
2161 .open = slic_debug_adapter_open,
2162 .read = seq_read,
2163 .llseek = seq_lseek,
2164 .release = single_release,
2165};
2166
2167static const struct file_operations slic_debug_card_fops = {
2168 .owner = THIS_MODULE,
2169 .open = slic_debug_card_open,
2170 .read = seq_read,
2171 .llseek = seq_lseek,
2172 .release = single_release,
2173};
4d6f6af8 2174
4d6ea9c3
DK		 2175static void slic_debug_adapter_create(struct adapter *adapter)
2176{
2177 struct dentry *d;
2178 char name[7];
2179 struct sliccard *card = adapter->card;
4d6f6af8 2180
4d6ea9c3
DK		 2181 if (!card->debugfs_dir)
2182 return;
4d6f6af8 2183
4d6ea9c3
DK		 2184 sprintf(name, "port%d", adapter->port);
2185 d = debugfs_create_file(name, S_IRUGO,
2186 card->debugfs_dir, adapter,
2187 &slic_debug_adapter_fops);
2188 if (!d || IS_ERR(d))
2189 pr_info(PFX "%s: debugfs create failed\n", name);
2190 else
2191 adapter->debugfs_entry = d;
2192}
4d6f6af8 2193
4d6ea9c3
DK		 2194static void slic_debug_adapter_destroy(struct adapter *adapter)
2195{
2196 debugfs_remove(adapter->debugfs_entry);
2197 adapter->debugfs_entry = NULL;
4d6f6af8
GKH		 2198}
2199
4d6ea9c3 2200static void slic_debug_card_create(struct sliccard *card)
4d6f6af8 2201{
4d6ea9c3
DK		 2202 struct dentry *d;
2203 char name[IFNAMSIZ];
4d6f6af8 2204
4d6ea9c3
DK		 2205 snprintf(name, sizeof(name), "slic%d", card->cardnum);
2206 d = debugfs_create_dir(name, slic_debugfs);
2207 if (!d || IS_ERR(d))
2208 pr_info(PFX "%s: debugfs create dir failed\n",
2209 name);
2210 else {
2211 card->debugfs_dir = d;
2212 d = debugfs_create_file("cardinfo", S_IRUGO,
2213 slic_debugfs, card,
2214 &slic_debug_card_fops);
2215 if (!d || IS_ERR(d))
2216 pr_info(PFX "%s: debugfs create failed\n",
2217 name);
2218 else
2219 card->debugfs_cardinfo = d;
2220 }
4d6f6af8
GKH		 2221}
2222
4d6ea9c3 2223static void slic_debug_card_destroy(struct sliccard *card)
4d6f6af8 2224{
4d6ea9c3 2225 int i;
4d6f6af8 2226
4d6ea9c3
DK		 2227 for (i = 0; i < card->card_size; i++) {
2228 struct adapter *adapter;
4d6f6af8 2229
4d6ea9c3
DK		 2230 adapter = card->adapter[i];
2231 if (adapter)
2232 slic_debug_adapter_destroy(adapter);
2233 }
2234 if (card->debugfs_cardinfo) {
2235 debugfs_remove(card->debugfs_cardinfo);
2236 card->debugfs_cardinfo = NULL;
2237 }
2238 if (card->debugfs_dir) {
2239 debugfs_remove(card->debugfs_dir);
2240 card->debugfs_dir = NULL;
2241 }
2242}
4d6f6af8 2243
4d6ea9c3
DK		 2244static void slic_debug_init(void)
2245{
2246 struct dentry *ent;
4d6f6af8 2247
4d6ea9c3
DK		 2248 ent = debugfs_create_dir("slic", NULL);
2249 if (!ent || IS_ERR(ent)) {
2250 pr_info(PFX "debugfs create directory failed\n");
2251 return;
2252 }
2253
2254 slic_debugfs = ent;
4d6f6af8
GKH		 2255}
2256
4d6ea9c3 2257static void slic_debug_cleanup(void)
4d6f6af8 2258{
4d6ea9c3
DK		 2259 if (slic_debugfs) {
2260 debugfs_remove(slic_debugfs);
2261 slic_debugfs = NULL;
4d6f6af8 2262 }
4d6ea9c3 2263}
4d6f6af8 2264
4d6ea9c3
DK		 2265/*
2266 * slic_link_event_handler -
2267 *
2268 * Initiate a link configuration sequence. The link configuration begins
2269 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
2270 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
2271 * routine will follow it up witha UP configuration write command, which
2272 * will also complete asynchronously.
2273 *
2274 */
2275static void slic_link_event_handler(struct adapter *adapter)
2276{
2277 int status;
2278 struct slic_shmem *pshmem;
4d6f6af8 2279
4d6ea9c3
DK		 2280 if (adapter->state != ADAPT_UP) {
2281 /* Adapter is not operational. Ignore. */
2282 return;
4d6f6af8
GKH		 2283 }
2284
01d0a9b4 2285 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
4d6f6af8 2286
1033f1f7 2287#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2288 status = slic_upr_request(adapter,
2289 SLIC_UPR_RLSR,
2290 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2291 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2292 0, 0);
1033f1f7 2293#else
4d6ea9c3
DK		 2294 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
2295 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
2296 0, 0, 0);
4d6ea9c3 2297#endif
4d6f6af8
GKH		 2298}
2299
4d6ea9c3 2300static void slic_init_cleanup(struct adapter *adapter)
4d6f6af8 2301{
4d6ea9c3
DK		 2302 if (adapter->intrregistered) {
2303 adapter->intrregistered = 0;
2304 free_irq(adapter->netdev->irq, adapter->netdev);
4d6f6af8 2305
4d6f6af8 2306 }
4d6ea9c3
DK		 2307 if (adapter->pshmem) {
2308 pci_free_consistent(adapter->pcidev,
2309 sizeof(struct slic_shmem),
2310 adapter->pshmem, adapter->phys_shmem);
2311 adapter->pshmem = NULL;
01d0a9b4 2312 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
4d6f6af8 2313 }
4d6ea9c3
DK		 2314
2315 if (adapter->pingtimerset) {
2316 adapter->pingtimerset = 0;
2317 del_timer(&adapter->pingtimer);
4d6f6af8 2318 }
4d6f6af8 2319
4d6ea9c3
DK		 2320 slic_rspqueue_free(adapter);
2321 slic_cmdq_free(adapter);
2322 slic_rcvqueue_free(adapter);
4d6f6af8
GKH		 2323}
2324
4d6ea9c3
DK		 2325/*
2326 * Allocate a mcast_address structure to hold the multicast address.
2327 * Link it in.
2328 */
2329static int slic_mcast_add_list(struct adapter *adapter, char *address)
4d6f6af8 2330{
4d6ea9c3 2331 struct mcast_address *mcaddr, *mlist;
4d6f6af8 2332
4d6ea9c3
DK		 2333 /* Check to see if it already exists */
2334 mlist = adapter->mcastaddrs;
2335 while (mlist) {
2336 if (!compare_ether_addr(mlist->address, address))
2337 return 0;
2338 mlist = mlist->next;
2339 }
e8bc9b7a 2340
4d6ea9c3
DK		 2341 /* Doesn't already exist. Allocate a structure to hold it */
2342 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
2343 if (mcaddr == NULL)
2344 return 1;
a71b9978 2345
4d6ea9c3
DK		 2346 memcpy(mcaddr->address, address, 6);
2347
2348 mcaddr->next = adapter->mcastaddrs;
2349 adapter->mcastaddrs = mcaddr;
4d6f6af8 2350
4d6f6af8
GKH		 2351 return 0;
2352}
2353
4d6ea9c3 2354static void slic_mcast_set_list(struct net_device *dev)
4d6f6af8 2355{
4d6ea9c3
DK		 2356 struct adapter *adapter = netdev_priv(dev);
2357 int status = 0;
2358 char *addresses;
2359 struct netdev_hw_addr *ha;
4d6f6af8 2360
4d6ea9c3
DK		 2361 netdev_for_each_mc_addr(ha, dev) {
2362 addresses = (char *) &ha->addr;
2363 status = slic_mcast_add_list(adapter, addresses);
2364 if (status != 0)
2365 break;
2366 slic_mcast_set_bit(adapter, addresses);
2367 }
2368
2369 if (adapter->devflags_prev != dev->flags) {
2370 adapter->macopts = MAC_DIRECTED;
2371 if (dev->flags) {
2372 if (dev->flags & IFF_BROADCAST)
2373 adapter->macopts |= MAC_BCAST;
2374 if (dev->flags & IFF_PROMISC)
2375 adapter->macopts |= MAC_PROMISC;
2376 if (dev->flags & IFF_ALLMULTI)
2377 adapter->macopts |= MAC_ALLMCAST;
2378 if (dev->flags & IFF_MULTICAST)
2379 adapter->macopts |= MAC_MCAST;
4d6f6af8 2380 }
4d6ea9c3
DK		 2381 adapter->devflags_prev = dev->flags;
2382 slic_config_set(adapter, true);
2383 } else {
2384 if (status == 0)
2385 slic_mcast_set_mask(adapter);
4d6f6af8 2386 }
4d6f6af8
GKH		 2387}
2388
4d6ea9c3
DK		 2389#define XMIT_FAIL_LINK_STATE 1
2390#define XMIT_FAIL_ZERO_LENGTH 2
2391#define XMIT_FAIL_HOSTCMD_FAIL 3
2392
2393static void slic_xmit_build_request(struct adapter *adapter,
2394 struct slic_hostcmd *hcmd, struct sk_buff *skb)
4d6f6af8 2395{
4d6ea9c3
DK		 2396 struct slic_host64_cmd *ihcmd;
2397 ulong phys_addr;
4d6f6af8 2398
4d6ea9c3
DK		 2399 ihcmd = &hcmd->cmd64;
2400
2401 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
2402 ihcmd->command = IHCMD_XMT_REQ;
2403 ihcmd->u.slic_buffers.totlen = skb->len;
2404 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
2405 PCI_DMA_TODEVICE);
2406 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
2407 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
2408 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1033f1f7 2409#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2410 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
2411 (u64) hcmd) + 31) >> 5);
1033f1f7 2412#else
4d6ea9c3
DK		 2413 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
2414 (u32) hcmd) + 31) >> 5);
4d6ea9c3 2415#endif
4d6f6af8
GKH		 2416}
2417
4d6ea9c3
DK		 2418static void slic_xmit_fail(struct adapter *adapter,
2419 struct sk_buff *skb,
2420 void *cmd, u32 skbtype, u32 status)
4d6f6af8 2421{
4d6ea9c3
DK		 2422 if (adapter->xmitq_full)
2423 netif_stop_queue(adapter->netdev);
2424 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
2425 switch (status) {
2426 case XMIT_FAIL_LINK_STATE:
2427 dev_err(&adapter->netdev->dev,
2428 "reject xmit skb[%p: %x] linkstate[%s] "
2429 "adapter[%s:%d] card[%s:%d]\n",
2430 skb, skb->pkt_type,
2431 SLIC_LINKSTATE(adapter->linkstate),
2432 SLIC_ADAPTER_STATE(adapter->state),
2433 adapter->state,
2434 SLIC_CARD_STATE(adapter->card->state),
2435 adapter->card->state);
2436 break;
2437 case XMIT_FAIL_ZERO_LENGTH:
2438 dev_err(&adapter->netdev->dev,
2439 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
2440 skb, skb->pkt_type);
2441 break;
2442 case XMIT_FAIL_HOSTCMD_FAIL:
2443 dev_err(&adapter->netdev->dev,
2444 "xmit_start skb[%p] type[%x] No host commands "
2445 "available\n", skb, skb->pkt_type);
2446 break;
4d6ea9c3
DK		 2447 }
2448 }
2449 dev_kfree_skb(skb);
9092de6d 2450 adapter->netdev->stats.tx_dropped++;
4d6ea9c3 2451}
e8bc9b7a 2452
4d6ea9c3
DK		 2453static void slic_rcv_handle_error(struct adapter *adapter,
2454 struct slic_rcvbuf *rcvbuf)
2455{
2456 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
9092de6d 2457 struct net_device *netdev = adapter->netdev;
4d6f6af8 2458
4d6ea9c3
DK		 2459 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
2460 if (hdr->frame_status14 & VRHSTAT_802OE)
2461 adapter->if_events.oflow802++;
2462 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
2463 adapter->if_events.Tprtoflow++;
2464 if (hdr->frame_status_b14 & VRHSTATB_802UE)
2465 adapter->if_events.uflow802++;
2466 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
2467 adapter->if_events.rcvearly++;
9092de6d 2468 netdev->stats.rx_fifo_errors++;
4d6ea9c3
DK		 2469 }
2470 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
2471 adapter->if_events.Bufov++;
9092de6d 2472 netdev->stats.rx_over_errors++;
4d6ea9c3
DK		 2473 }
2474 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
2475 adapter->if_events.Carre++;
9092de6d 2476 netdev->stats.tx_carrier_errors++;
4d6ea9c3
DK		 2477 }
2478 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
2479 adapter->if_events.Longe++;
2480 if (hdr->frame_status_b14 & VRHSTATB_PREA)
2481 adapter->if_events.Invp++;
2482 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
2483 adapter->if_events.Crc++;
9092de6d 2484 netdev->stats.rx_crc_errors++;
4d6ea9c3
DK		 2485 }
2486 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
2487 adapter->if_events.Drbl++;
2488 if (hdr->frame_status_b14 & VRHSTATB_CODE)
2489 adapter->if_events.Code++;
2490 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
2491 adapter->if_events.TpCsum++;
2492 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
2493 adapter->if_events.TpHlen++;
2494 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
2495 adapter->if_events.IpCsum++;
2496 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
2497 adapter->if_events.IpLen++;
2498 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
2499 adapter->if_events.IpHlen++;
4d6f6af8 2500 } else {
4d6ea9c3
DK		 2501 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
2502 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
2503
2504 if (xerr == VGBSTAT_XCSERR)
2505 adapter->if_events.TpCsum++;
2506 if (xerr == VGBSTAT_XUFLOW)
2507 adapter->if_events.Tprtoflow++;
2508 if (xerr == VGBSTAT_XHLEN)
2509 adapter->if_events.TpHlen++;
2510 }
2511 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
2512 u32 nerr =
2513 (hdr->
2514 frame_statusGB >> VGBSTAT_NERRSHFT) &
2515 VGBSTAT_NERRMSK;
2516 if (nerr == VGBSTAT_NCSERR)
2517 adapter->if_events.IpCsum++;
2518 if (nerr == VGBSTAT_NUFLOW)
2519 adapter->if_events.IpLen++;
2520 if (nerr == VGBSTAT_NHLEN)
2521 adapter->if_events.IpHlen++;
2522 }
2523 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
2524 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
2525
2526 if (lerr == VGBSTAT_LDEARLY)
2527 adapter->if_events.rcvearly++;
2528 if (lerr == VGBSTAT_LBOFLO)
2529 adapter->if_events.Bufov++;
2530 if (lerr == VGBSTAT_LCODERR)
2531 adapter->if_events.Code++;
2532 if (lerr == VGBSTAT_LDBLNBL)
2533 adapter->if_events.Drbl++;
2534 if (lerr == VGBSTAT_LCRCERR)
2535 adapter->if_events.Crc++;
2536 if (lerr == VGBSTAT_LOFLO)
2537 adapter->if_events.oflow802++;
2538 if (lerr == VGBSTAT_LUFLO)
2539 adapter->if_events.uflow802++;
2540 }
4d6f6af8 2541 }
4d6ea9c3 2542 return;
4d6f6af8
GKH		 2543}
2544
4d6ea9c3
DK		 2545#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
2546#define M_FAST_PATH 0x0040
4d6f6af8 2547
4d6ea9c3 2548static void slic_rcv_handler(struct adapter *adapter)
4d6f6af8 2549{
9092de6d 2550 struct net_device *netdev = adapter->netdev;
4d6ea9c3
DK		 2551 struct sk_buff *skb;
2552 struct slic_rcvbuf *rcvbuf;
2553 u32 frames = 0;
4d6f6af8 2554
4d6ea9c3
DK		 2555 while ((skb = slic_rcvqueue_getnext(adapter))) {
2556 u32 rx_bytes;
4d6f6af8 2557
4d6ea9c3
DK		 2558 rcvbuf = (struct slic_rcvbuf *)skb->head;
2559 adapter->card->events++;
2560 if (rcvbuf->status & IRHDDR_ERR) {
2561 adapter->rx_errors++;
2562 slic_rcv_handle_error(adapter, rcvbuf);
2563 slic_rcvqueue_reinsert(adapter, skb);
2564 continue;
2565 }
4d6f6af8 2566
4d6ea9c3
DK		 2567 if (!slic_mac_filter(adapter, (struct ether_header *)
2568 rcvbuf->data)) {
2569 slic_rcvqueue_reinsert(adapter, skb);
2570 continue;
2571 }
2572 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2573 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2574 skb_put(skb, rx_bytes);
9092de6d
DK		 2575 netdev->stats.rx_packets++;
2576 netdev->stats.rx_bytes += rx_bytes;
4d6ea9c3
DK		 2577#if SLIC_OFFLOAD_IP_CHECKSUM
2578 skb->ip_summed = CHECKSUM_UNNECESSARY;
2579#endif
4d6f6af8 2580
4d6ea9c3
DK		 2581 skb->dev = adapter->netdev;
2582 skb->protocol = eth_type_trans(skb, skb->dev);
2583 netif_rx(skb);
4d6f6af8 2584
4d6ea9c3
DK		 2585 ++frames;
2586#if SLIC_INTERRUPT_PROCESS_LIMIT
2587 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2588 adapter->rcv_interrupt_yields++;
4d6f6af8
GKH		 2589 break;
2590 }
4d6ea9c3 2591#endif
4d6f6af8 2592 }
4d6ea9c3 2593 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
4d6f6af8
GKH		 2594}
2595
4d6ea9c3 2596static void slic_xmit_complete(struct adapter *adapter)
4d6f6af8 2597{
4d6ea9c3
DK		 2598 struct slic_hostcmd *hcmd;
2599 struct slic_rspbuf *rspbuf;
2600 u32 frames = 0;
2601 struct slic_handle_word slic_handle_word;
4d6f6af8 2602
4d6ea9c3
DK		 2603 do {
2604 rspbuf = slic_rspqueue_getnext(adapter);
2605 if (!rspbuf)
2606 break;
2607 adapter->xmit_completes++;
2608 adapter->card->events++;
2609 /*
2610 Get the complete host command buffer
2611 */
2612 slic_handle_word.handle_token = rspbuf->hosthandle;
4d6ea9c3
DK		 2613 hcmd =
2614 (struct slic_hostcmd *)
2615 adapter->slic_handles[slic_handle_word.handle_index].
2616 address;
2617/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
4d6ea9c3
DK		 2618 if (hcmd->type == SLIC_CMD_DUMB) {
2619 if (hcmd->skb)
2620 dev_kfree_skb_irq(hcmd->skb);
2621 slic_cmdq_putdone_irq(adapter, hcmd);
4d6f6af8 2622 }
4d6ea9c3
DK		 2623 rspbuf->status = 0;
2624 rspbuf->hosthandle = 0;
2625 frames++;
2626 } while (1);
2627 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
4d6f6af8
GKH		 2628}
2629
4d6ea9c3 2630static irqreturn_t slic_interrupt(int irq, void *dev_id)
4d6f6af8 2631{
4d6ea9c3
DK		 2632 struct net_device *dev = (struct net_device *)dev_id;
2633 struct adapter *adapter = netdev_priv(dev);
2634 u32 isr;
4d6f6af8 2635
4d6ea9c3
DK		 2636 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2637 slic_reg32_write(&adapter->slic_regs->slic_icr,
2638 ICR_INT_MASK, FLUSH);
2639 isr = adapter->isrcopy = adapter->pshmem->isr;
2640 adapter->pshmem->isr = 0;
2641 adapter->num_isrs++;
2642 switch (adapter->card->state) {
2643 case CARD_UP:
2644 if (isr & ~ISR_IO) {
2645 if (isr & ISR_ERR) {
2646 adapter->error_interrupts++;
2647 if (isr & ISR_RMISS) {
2648 int count;
2649 int pre_count;
2650 int errors;
4d6f6af8 2651
4d6ea9c3
DK		 2652 struct slic_rcvqueue *rcvq =
2653 &adapter->rcvqueue;
4d6f6af8 2654
4d6ea9c3
DK		 2655 adapter->
2656 error_rmiss_interrupts++;
2657 if (!rcvq->errors)
2658 rcv_count = rcvq->count;
2659 pre_count = rcvq->count;
2660 errors = rcvq->errors;
4d6f6af8 2661
4d6ea9c3
DK		 2662 while (rcvq->count <
2663 SLIC_RCVQ_FILLTHRESH) {
2664 count =
2665 slic_rcvqueue_fill
2666 (adapter);
2667 if (!count)
2668 break;
2669 }
2670 } else if (isr & ISR_XDROP) {
2671 dev_err(&dev->dev,
2672 "isr & ISR_ERR [%x] "
2673 "ISR_XDROP \n", isr);
2674 } else {
2675 dev_err(&dev->dev,
2676 "isr & ISR_ERR [%x]\n",
2677 isr);
2678 }
2679 }
e8bc9b7a 2680
4d6ea9c3
DK		 2681 if (isr & ISR_LEVENT) {
2682 adapter->linkevent_interrupts++;
2683 slic_link_event_handler(adapter);
2684 }
4d6f6af8 2685
4d6ea9c3
DK		 2686 if ((isr & ISR_UPC) ||
2687 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2688 adapter->upr_interrupts++;
2689 slic_upr_request_complete(adapter, isr);
2690 }
2691 }
4d6f6af8 2692
4d6ea9c3
DK		 2693 if (isr & ISR_RCV) {
2694 adapter->rcv_interrupts++;
2695 slic_rcv_handler(adapter);
2696 }
4d6f6af8 2697
4d6ea9c3
DK		 2698 if (isr & ISR_CMD) {
2699 adapter->xmit_interrupts++;
2700 slic_xmit_complete(adapter);
2701 }
2702 break;
4d6f6af8 2703
4d6ea9c3
DK		 2704 case CARD_DOWN:
2705 if ((isr & ISR_UPC) ||
2706 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2707 adapter->upr_interrupts++;
2708 slic_upr_request_complete(adapter, isr);
2709 }
2710 break;
4d6ea9c3 2711 }
4d6f6af8 2712
4d6ea9c3
DK		 2713 adapter->isrcopy = 0;
2714 adapter->all_reg_writes += 2;
2715 adapter->isr_reg_writes++;
2716 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2717 } else {
2718 adapter->false_interrupts++;
4d6f6af8 2719 }
4d6ea9c3 2720 return IRQ_HANDLED;
4d6f6af8
GKH		 2721}
2722
4d6ea9c3 2723#define NORMAL_ETHFRAME 0
4d6f6af8 2724
4d6ea9c3
DK		 2725static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2726{
2727 struct sliccard *card;
2728 struct adapter *adapter = netdev_priv(dev);
2729 struct slic_hostcmd *hcmd = NULL;
2730 u32 status = 0;
4d6ea9c3 2731 void *offloadcmd = NULL;
4d6f6af8 2732
4d6ea9c3 2733 card = adapter->card;
4d6ea9c3
DK		 2734 if ((adapter->linkstate != LINK_UP) ||
2735 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2736 status = XMIT_FAIL_LINK_STATE;
2737 goto xmit_fail;
4d6f6af8 2738
4d6ea9c3
DK		 2739 } else if (skb->len == 0) {
2740 status = XMIT_FAIL_ZERO_LENGTH;
2741 goto xmit_fail;
4d6f6af8
GKH		 2742 }
2743
cbb0920b
PH		 2744 hcmd = slic_cmdq_getfree(adapter);
2745 if (!hcmd) {
2746 adapter->xmitq_full = 1;
2747 status = XMIT_FAIL_HOSTCMD_FAIL;
2748 goto xmit_fail;
4d6ea9c3 2749 }
cbb0920b
PH		 2750 hcmd->skb = skb;
2751 hcmd->busy = 1;
2752 hcmd->type = SLIC_CMD_DUMB;
2753 slic_xmit_build_request(adapter, hcmd, skb);
9092de6d
DK		 2754 dev->stats.tx_packets++;
2755 dev->stats.tx_bytes += skb->len;
4d6f6af8 2756
4d6ea9c3
DK		 2757#ifdef DEBUG_DUMP
2758 if (adapter->kill_card) {
2759 struct slic_host64_cmd ihcmd;
4d6f6af8 2760
4d6ea9c3
DK		 2761 ihcmd = &hcmd->cmd64;
2762
2763 ihcmd->flags |= 0x40;
2764 adapter->kill_card = 0; /* only do this once */
4d6f6af8 2765 }
4d6ea9c3
DK		 2766#endif
2767 if (hcmd->paddrh == 0) {
2768 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2769 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2770 } else {
2771 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2772 (hcmd->paddrl | hcmd->cmdsize),
2773 &adapter->slic_regs->slic_addr_upper,
2774 hcmd->paddrh, DONT_FLUSH);
2775 }
2776xmit_done:
2777 return NETDEV_TX_OK;
2778xmit_fail:
cbb0920b 2779 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
4d6ea9c3 2780 goto xmit_done;
4d6f6af8
GKH		 2781}
2782
4d6ea9c3
DK		 2783
2784static void slic_adapter_freeresources(struct adapter *adapter)
4d6f6af8 2785{
4d6ea9c3 2786 slic_init_cleanup(adapter);
4d6ea9c3
DK		 2787 adapter->error_interrupts = 0;
2788 adapter->rcv_interrupts = 0;
2789 adapter->xmit_interrupts = 0;
2790 adapter->linkevent_interrupts = 0;
2791 adapter->upr_interrupts = 0;
2792 adapter->num_isrs = 0;
2793 adapter->xmit_completes = 0;
2794 adapter->rcv_broadcasts = 0;
2795 adapter->rcv_multicasts = 0;
2796 adapter->rcv_unicasts = 0;
2797}
4d6f6af8 2798
4d6ea9c3
DK		 2799static int slic_adapter_allocresources(struct adapter *adapter)
2800{
2801 if (!adapter->intrregistered) {
2802 int retval;
4d6f6af8 2803
4d6ea9c3
DK		 2804 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2805 slic_global.driver_lock.flags);
4d6f6af8 2806
4d6ea9c3
DK		 2807 retval = request_irq(adapter->netdev->irq,
2808 &slic_interrupt,
2809 IRQF_SHARED,
2810 adapter->netdev->name, adapter->netdev);
4d6f6af8 2811
4d6ea9c3
DK		 2812 spin_lock_irqsave(&slic_global.driver_lock.lock,
2813 slic_global.driver_lock.flags);
2814
2815 if (retval) {
2816 dev_err(&adapter->netdev->dev,
2817 "request_irq (%s) FAILED [%x]\n",
2818 adapter->netdev->name, retval);
2819 return retval;
4d6f6af8 2820 }
4d6ea9c3 2821 adapter->intrregistered = 1;
4d6f6af8 2822 }
d1939786 2823 return 0;
4d6f6af8
GKH		 2824}
2825
4d6ea9c3
DK		 2826/*
2827 * slic_if_init
2828 *
2829 * Perform initialization of our slic interface.
2830 *
2831 */
2832static int slic_if_init(struct adapter *adapter)
4d6f6af8 2833{
4d6ea9c3
DK		 2834 struct sliccard *card = adapter->card;
2835 struct net_device *dev = adapter->netdev;
2836 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2837 struct slic_shmem *pshmem;
2838 int rc;
4d6f6af8 2839
4d6ea9c3
DK		 2840 /* adapter should be down at this point */
2841 if (adapter->state != ADAPT_DOWN) {
2842 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2843 __func__);
2844 rc = -EIO;
2845 goto err;
4d6f6af8 2846 }
4d6f6af8 2847
4d6ea9c3
DK		 2848 adapter->devflags_prev = dev->flags;
2849 adapter->macopts = MAC_DIRECTED;
2850 if (dev->flags) {
2851 if (dev->flags & IFF_BROADCAST)
2852 adapter->macopts |= MAC_BCAST;
2853 if (dev->flags & IFF_PROMISC)
2854 adapter->macopts |= MAC_PROMISC;
2855 if (dev->flags & IFF_ALLMULTI)
2856 adapter->macopts |= MAC_ALLMCAST;
2857 if (dev->flags & IFF_MULTICAST)
2858 adapter->macopts |= MAC_MCAST;
2859 }
2860 rc = slic_adapter_allocresources(adapter);
2861 if (rc) {
2862 dev_err(&dev->dev,
2863 "%s: slic_adapter_allocresources FAILED %x\n",
2864 __func__, rc);
2865 slic_adapter_freeresources(adapter);
2866 goto err;
2867 }
4d6f6af8 2868
4d6ea9c3 2869 if (!adapter->queues_initialized) {
83682cd2
CJB		 2870 rc = slic_rspqueue_init(adapter);
2871 if (rc)
4d6ea9c3 2872 goto err;
83682cd2
CJB		 2873 rc = slic_cmdq_init(adapter);
2874 if (rc)
4d6ea9c3 2875 goto err;
83682cd2
CJB		 2876 rc = slic_rcvqueue_init(adapter);
2877 if (rc)
4d6ea9c3
DK		 2878 goto err;
2879 adapter->queues_initialized = 1;
2880 }
4d6f6af8 2881
4d6ea9c3
DK		 2882 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2883 mdelay(1);
2884
2885 if (!adapter->isp_initialized) {
01d0a9b4
JP		 2886 pshmem = (struct slic_shmem *)(unsigned long)
2887 adapter->phys_shmem;
4d6ea9c3
DK		 2888
2889 spin_lock_irqsave(&adapter->bit64reglock.lock,
2890 adapter->bit64reglock.flags);
2891
1033f1f7 2892#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2893 slic_reg32_write(&slic_regs->slic_addr_upper,
2894 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2895 slic_reg32_write(&slic_regs->slic_isp,
2896 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1033f1f7 2897#else
4d6ea9c3
DK		 2898 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2899 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
4d6f6af8 2900#endif
4d6ea9c3
DK		 2901 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2902 adapter->bit64reglock.flags);
2903 adapter->isp_initialized = 1;
4d6f6af8 2904 }
4d6f6af8 2905
4d6ea9c3
DK		 2906 adapter->state = ADAPT_UP;
2907 if (!card->loadtimerset) {
2908 init_timer(&card->loadtimer);
2909 card->loadtimer.expires =
2910 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2911 card->loadtimer.data = (ulong) card;
2912 card->loadtimer.function = &slic_timer_load_check;
2913 add_timer(&card->loadtimer);
2914
2915 card->loadtimerset = 1;
2916 }
2917
2918 if (!adapter->pingtimerset) {
2919 init_timer(&adapter->pingtimer);
2920 adapter->pingtimer.expires =
2921 jiffies + (PING_TIMER_INTERVAL * HZ);
2922 adapter->pingtimer.data = (ulong) dev;
2923 adapter->pingtimer.function = &slic_timer_ping;
2924 add_timer(&adapter->pingtimer);
2925 adapter->pingtimerset = 1;
2926 adapter->card->pingstatus = ISR_PINGMASK;
2927 }
2928
2929 /*
2930 * clear any pending events, then enable interrupts
2931 */
2932 adapter->isrcopy = 0;
2933 adapter->pshmem->isr = 0;
2934 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2935 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2936
2937 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2938 slic_link_event_handler(adapter);
4d6f6af8 2939
4d6ea9c3
DK		 2940err:
2941 return rc;
4d6f6af8
GKH		 2942}
2943
4d6ea9c3 2944static int slic_entry_open(struct net_device *dev)
4d6f6af8 2945{
4d6ea9c3
DK		 2946 struct adapter *adapter = netdev_priv(dev);
2947 struct sliccard *card = adapter->card;
4d6ea9c3 2948 int status;
4d6f6af8 2949
4d6ea9c3 2950 netif_stop_queue(adapter->netdev);
4d6f6af8 2951
4d6ea9c3
DK		 2952 spin_lock_irqsave(&slic_global.driver_lock.lock,
2953 slic_global.driver_lock.flags);
4d6ea9c3
DK		 2954 if (!adapter->activated) {
2955 card->adapters_activated++;
2956 slic_global.num_slic_ports_active++;
2957 adapter->activated = 1;
2958 }
2959 status = slic_if_init(adapter);
4d6f6af8 2960
4d6ea9c3
DK		 2961 if (status != 0) {
2962 if (adapter->activated) {
2963 card->adapters_activated--;
2964 slic_global.num_slic_ports_active--;
2965 adapter->activated = 0;
4d6f6af8 2966 }
71329965 2967 goto spin_unlock;
4d6ea9c3
DK		 2968 }
2969 if (!card->master)
2970 card->master = adapter;
2971
71329965
DN		 2972spin_unlock:
2973 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2974 slic_global.driver_lock.flags);
2975 return status;
4d6f6af8
GKH		 2976}
2977
4d6ea9c3 2978static void slic_card_cleanup(struct sliccard *card)
4d6f6af8 2979{
4d6ea9c3
DK		 2980 if (card->loadtimerset) {
2981 card->loadtimerset = 0;
2982 del_timer(&card->loadtimer);
2983 }
4d6f6af8 2984
4d6ea9c3 2985 slic_debug_card_destroy(card);
4d6f6af8 2986
4d6ea9c3 2987 kfree(card);
4d6f6af8
GKH		 2988}
2989
ecb4f387 2990static void slic_entry_remove(struct pci_dev *pcidev)
4d6f6af8 2991{
4d6ea9c3
DK		 2992 struct net_device *dev = pci_get_drvdata(pcidev);
2993 u32 mmio_start = 0;
2994 uint mmio_len = 0;
2995 struct adapter *adapter = netdev_priv(dev);
2996 struct sliccard *card;
2997 struct mcast_address *mcaddr, *mlist;
4d6f6af8 2998
4d6ea9c3
DK		 2999 slic_adapter_freeresources(adapter);
3000 slic_unmap_mmio_space(adapter);
3001 unregister_netdev(dev);
3002
3003 mmio_start = pci_resource_start(pcidev, 0);
3004 mmio_len = pci_resource_len(pcidev, 0);
3005
3006 release_mem_region(mmio_start, mmio_len);
3007
3008 iounmap((void __iomem *)dev->base_addr);
3009 /* free multicast addresses */
3010 mlist = adapter->mcastaddrs;
3011 while (mlist) {
3012 mcaddr = mlist;
3013 mlist = mlist->next;
3014 kfree(mcaddr);
4d6f6af8 3015 }
4d6ea9c3 3016 card = adapter->card;
4d6ea9c3
DK		 3017 card->adapters_allocated--;
3018 adapter->allocated = 0;
3019 if (!card->adapters_allocated) {
3020 struct sliccard *curr_card = slic_global.slic_card;
3021 if (curr_card == card) {
3022 slic_global.slic_card = card->next;
3023 } else {
3024 while (curr_card->next != card)
3025 curr_card = curr_card->next;
4d6ea9c3
DK		 3026 curr_card->next = card->next;
3027 }
4d6ea9c3
DK		 3028 slic_global.num_slic_cards--;
3029 slic_card_cleanup(card);
4d6f6af8 3030 }
20caa14c 3031 free_netdev(dev);
4d6ea9c3 3032 pci_release_regions(pcidev);
d99b5ac6 3033 pci_disable_device(pcidev);
4d6f6af8
GKH		 3034}
3035
4d6ea9c3 3036static int slic_entry_halt(struct net_device *dev)
4d6f6af8 3037{
4d6ea9c3
DK		 3038 struct adapter *adapter = netdev_priv(dev);
3039 struct sliccard *card = adapter->card;
3040 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 3041
4d6ea9c3
DK		 3042 spin_lock_irqsave(&slic_global.driver_lock.lock,
3043 slic_global.driver_lock.flags);
4d6ea9c3
DK		 3044 netif_stop_queue(adapter->netdev);
3045 adapter->state = ADAPT_DOWN;
3046 adapter->linkstate = LINK_DOWN;
3047 adapter->upr_list = NULL;
3048 adapter->upr_busy = 0;
3049 adapter->devflags_prev = 0;
4d6ea9c3
DK		 3050 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3051 adapter->all_reg_writes++;
3052 adapter->icr_reg_writes++;
3053 slic_config_clear(adapter);
3054 if (adapter->activated) {
3055 card->adapters_activated--;
3056 slic_global.num_slic_ports_active--;
3057 adapter->activated = 0;
3058 }
3059#ifdef AUTOMATIC_RESET
3060 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
3061#endif
3062 /*
3063 * Reset the adapter's cmd queues
3064 */
3065 slic_cmdq_reset(adapter);
4d6f6af8 3066
4d6ea9c3
DK		 3067#ifdef AUTOMATIC_RESET
3068 if (!card->adapters_activated)
3069 slic_card_init(card, adapter);
3070#endif
4d6f6af8 3071
4d6ea9c3
DK		 3072 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3073 slic_global.driver_lock.flags);
3074 return 0;
3075}
4d6f6af8 3076
4d6ea9c3
DK		 3077static struct net_device_stats *slic_get_stats(struct net_device *dev)
3078{
3079 struct adapter *adapter = netdev_priv(dev);
4d6f6af8 3080
4d6ea9c3
DK		 3081 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
3082 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
3083 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
3084 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
3085 dev->stats.tx_heartbeat_errors = 0;
3086 dev->stats.tx_aborted_errors = 0;
3087 dev->stats.tx_window_errors = 0;
3088 dev->stats.tx_fifo_errors = 0;
3089 dev->stats.rx_frame_errors = 0;
3090 dev->stats.rx_length_errors = 0;
3091
3092 return &dev->stats;
4d6f6af8
GKH		 3093}
3094
4d6ea9c3 3095static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4d6f6af8 3096{
4d6ea9c3
DK		 3097 struct adapter *adapter = netdev_priv(dev);
3098 struct ethtool_cmd edata;
3099 struct ethtool_cmd ecmd;
3100 u32 data[7];
3101 u32 intagg;
4d6f6af8 3102
4d6ea9c3
DK		 3103 switch (cmd) {
3104 case SIOCSLICSETINTAGG:
3105 if (copy_from_user(data, rq->ifr_data, 28))
3106 return -EFAULT;
3107 intagg = data[0];
3108 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
3109 __func__, intagg);
3110 slic_intagg_set(adapter, intagg);
3111 return 0;
4d6f6af8 3112
4d6ea9c3
DK		 3113#ifdef SLIC_TRACE_DUMP_ENABLED
3114 case SIOCSLICTRACEDUMP:
3115 {
3116 u32 value;
3117 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
3118
3119 if (copy_from_user(data, rq->ifr_data, 28)) {
3120 PRINT_ERROR
3121 ("slic: copy_from_user FAILED getting initial simba param\n");
3122 return -EFAULT;
3123 }
3124
3125 value = data[0];
3126 if (tracemon_request == SLIC_DUMP_DONE) {
3127 PRINT_ERROR
3128 ("ATK Diagnostic Trace Dump Requested\n");
3129 tracemon_request = SLIC_DUMP_REQUESTED;
3130 tracemon_request_type = value;
3131 tracemon_timestamp = jiffies;
3132 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
3133 (tracemon_request ==
3134 SLIC_DUMP_IN_PROGRESS)) {
3135 PRINT_ERROR
3136 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
3137 } else {
3138 PRINT_ERROR
3139 ("ATK Diagnostic Trace Dump Requested\n");
3140 tracemon_request = SLIC_DUMP_REQUESTED;
3141 tracemon_request_type = value;
3142 tracemon_timestamp = jiffies;
4d6f6af8 3143 }
4d6ea9c3 3144 return 0;
4d6f6af8 3145 }
4d6ea9c3
DK		 3146#endif
3147 case SIOCETHTOOL:
4d6ea9c3
DK		 3148 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
3149 return -EFAULT;
4d6f6af8 3150
4d6ea9c3 3151 if (ecmd.cmd == ETHTOOL_GSET) {
986d7584 3152 memset(&edata, 0, sizeof(edata));
4d6ea9c3
DK		 3153 edata.supported = (SUPPORTED_10baseT_Half |
3154 SUPPORTED_10baseT_Full |
3155 SUPPORTED_100baseT_Half |
3156 SUPPORTED_100baseT_Full |
3157 SUPPORTED_Autoneg | SUPPORTED_MII);
3158 edata.port = PORT_MII;
3159 edata.transceiver = XCVR_INTERNAL;
3160 edata.phy_address = 0;
3161 if (adapter->linkspeed == LINK_100MB)
3162 edata.speed = SPEED_100;
3163 else if (adapter->linkspeed == LINK_10MB)
3164 edata.speed = SPEED_10;
3165 else
3166 edata.speed = 0;
4d6f6af8 3167
4d6ea9c3
DK		 3168 if (adapter->linkduplex == LINK_FULLD)
3169 edata.duplex = DUPLEX_FULL;
3170 else
3171 edata.duplex = DUPLEX_HALF;
4d6f6af8 3172
4d6ea9c3
DK		 3173 edata.autoneg = AUTONEG_ENABLE;
3174 edata.maxtxpkt = 1;
3175 edata.maxrxpkt = 1;
3176 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
3177 return -EFAULT;
4d6f6af8 3178
4d6ea9c3
DK		 3179 } else if (ecmd.cmd == ETHTOOL_SSET) {
3180 if (!capable(CAP_NET_ADMIN))
3181 return -EPERM;
4d6f6af8 3182
4d6ea9c3
DK		 3183 if (adapter->linkspeed == LINK_100MB)
3184 edata.speed = SPEED_100;
3185 else if (adapter->linkspeed == LINK_10MB)
3186 edata.speed = SPEED_10;
3187 else
3188 edata.speed = 0;
3189
3190 if (adapter->linkduplex == LINK_FULLD)
3191 edata.duplex = DUPLEX_FULL;
3192 else
3193 edata.duplex = DUPLEX_HALF;
3194
3195 edata.autoneg = AUTONEG_ENABLE;
3196 edata.maxtxpkt = 1;
3197 edata.maxrxpkt = 1;
3198 if ((ecmd.speed != edata.speed) ||
3199 (ecmd.duplex != edata.duplex)) {
3200 u32 speed;
3201 u32 duplex;
3202
3203 if (ecmd.speed == SPEED_10)
3204 speed = 0;
3205 else
3206 speed = PCR_SPEED_100;
3207 if (ecmd.duplex == DUPLEX_FULL)
3208 duplex = PCR_DUPLEX_FULL;
3209 else
3210 duplex = 0;
3211 slic_link_config(adapter, speed, duplex);
3212 slic_link_event_handler(adapter);
3213 }
3214 }
3215 return 0;
3216 default:
3217 return -EOPNOTSUPP;
3218 }
4d6f6af8
GKH		 3219}
3220
4d6ea9c3 3221static void slic_config_pci(struct pci_dev *pcidev)
4d6f6af8 3222{
4d6ea9c3
DK		 3223 u16 pci_command;
3224 u16 new_command;
4d6f6af8 3225
4d6ea9c3
DK		 3226 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
3227
3228 new_command = pci_command | PCI_COMMAND_MASTER
3229 | PCI_COMMAND_MEMORY
3230 | PCI_COMMAND_INVALIDATE
3231 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
3232 if (pci_command != new_command)
3233 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
4d6f6af8
GKH		 3234}
3235
4d6ea9c3 3236static int slic_card_init(struct sliccard *card, struct adapter *adapter)
4d6f6af8 3237{
4d6ea9c3
DK		 3238 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3239 struct slic_eeprom *peeprom;
3240 struct oslic_eeprom *pOeeprom;
3241 dma_addr_t phys_config;
3242 u32 phys_configh;
3243 u32 phys_configl;
3244 u32 i = 0;
3245 struct slic_shmem *pshmem;
3246 int status;
3247 uint macaddrs = card->card_size;
3248 ushort eecodesize;
3249 ushort dramsize;
3250 ushort ee_chksum;
3251 ushort calc_chksum;
3252 struct slic_config_mac *pmac;
3253 unsigned char fruformat;
3254 unsigned char oemfruformat;
3255 struct atk_fru *patkfru;
3256 union oemfru *poemfru;
4d6f6af8 3257
4d6ea9c3
DK		 3258 /* Reset everything except PCI configuration space */
3259 slic_soft_reset(adapter);
3260
3261 /* Download the microcode */
3262 status = slic_card_download(adapter);
3263
3264 if (status != 0) {
3265 dev_err(&adapter->pcidev->dev,
3266 "download failed bus %d slot %d\n",
3267 adapter->busnumber, adapter->slotnumber);
3268 return status;
4d6f6af8 3269 }
4d6f6af8 3270
4d6ea9c3
DK		 3271 if (!card->config_set) {
3272 peeprom = pci_alloc_consistent(adapter->pcidev,
3273 sizeof(struct slic_eeprom),
3274 &phys_config);
4d6f6af8 3275
4d6ea9c3
DK		 3276 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
3277 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
4d6f6af8 3278
4d6ea9c3
DK		 3279 if (!peeprom) {
3280 dev_err(&adapter->pcidev->dev,
3281 "eeprom read failed to get memory "
3282 "bus %d slot %d\n", adapter->busnumber,
3283 adapter->slotnumber);
3284 return -ENOMEM;
4d6f6af8 3285 } else {
4d6ea9c3 3286 memset(peeprom, 0, sizeof(struct slic_eeprom));
4d6f6af8 3287 }
4d6ea9c3
DK		 3288 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3289 mdelay(1);
01d0a9b4
JP		 3290 pshmem = (struct slic_shmem *)(unsigned long)
3291 adapter->phys_shmem;
4d6f6af8 3292
4d6ea9c3
DK		 3293 spin_lock_irqsave(&adapter->bit64reglock.lock,
3294 adapter->bit64reglock.flags);
3295 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3296 slic_reg32_write(&slic_regs->slic_isp,
3297 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
3298 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
3299 adapter->bit64reglock.flags);
4d6f6af8 3300
4d6ea9c3 3301 slic_config_get(adapter, phys_configl, phys_configh);
4d6f6af8 3302
4d6ea9c3
DK		 3303 for (;;) {
3304 if (adapter->pshmem->isr) {
3305 if (adapter->pshmem->isr & ISR_UPC) {
3306 adapter->pshmem->isr = 0;
3307 slic_reg64_write(adapter,
3308 &slic_regs->slic_isp, 0,
3309 &slic_regs->slic_addr_upper,
3310 0, FLUSH);
3311 slic_reg32_write(&slic_regs->slic_isr,
3312 0, FLUSH);
3313
3314 slic_upr_request_complete(adapter, 0);
3315 break;
3316 } else {
3317 adapter->pshmem->isr = 0;
3318 slic_reg32_write(&slic_regs->slic_isr,
3319 0, FLUSH);
3320 }
4d6f6af8 3321 } else {
4d6ea9c3
DK		 3322 mdelay(1);
3323 i++;
3324 if (i > 5000) {
3325 dev_err(&adapter->pcidev->dev,
3326 "%d config data fetch timed out!\n",
3327 adapter->port);
3328 slic_reg64_write(adapter,
3329 &slic_regs->slic_isp, 0,
3330 &slic_regs->slic_addr_upper,
3331 0, FLUSH);
3332 return -EINVAL;
3333 }
4d6f6af8 3334 }
4d6ea9c3
DK		 3335 }
3336
3337 switch (adapter->devid) {
3338 /* Oasis card */
3339 case SLIC_2GB_DEVICE_ID:
3340 /* extract EEPROM data and pointers to EEPROM data */
3341 pOeeprom = (struct oslic_eeprom *) peeprom;
3342 eecodesize = pOeeprom->EecodeSize;
3343 dramsize = pOeeprom->DramSize;
3344 pmac = pOeeprom->MacInfo;
3345 fruformat = pOeeprom->FruFormat;
3346 patkfru = &pOeeprom->AtkFru;
3347 oemfruformat = pOeeprom->OemFruFormat;
3348 poemfru = &pOeeprom->OemFru;
3349 macaddrs = 2;
3350 /* Minor kludge for Oasis card
3351 get 2 MAC addresses from the
3352 EEPROM to ensure that function 1
3353 gets the Port 1 MAC address */
3354 break;
3355 default:
3356 /* extract EEPROM data and pointers to EEPROM data */
3357 eecodesize = peeprom->EecodeSize;
3358 dramsize = peeprom->DramSize;
3359 pmac = peeprom->u2.mac.MacInfo;
3360 fruformat = peeprom->FruFormat;
3361 patkfru = &peeprom->AtkFru;
3362 oemfruformat = peeprom->OemFruFormat;
3363 poemfru = &peeprom->OemFru;
4d6f6af8
GKH		 3364 break;
3365 }
4d6f6af8 3366
4d6ea9c3
DK		 3367 card->config.EepromValid = false;
3368
3369 /* see if the EEPROM is valid by checking it's checksum */
3370 if ((eecodesize <= MAX_EECODE_SIZE) &&
3371 (eecodesize >= MIN_EECODE_SIZE)) {
3372
3373 ee_chksum =
3374 *(u16 *) ((char *) peeprom + (eecodesize - 2));
3375 /*
3376 calculate the EEPROM checksum
3377 */
3378 calc_chksum =
3379 ~slic_eeprom_cksum((char *) peeprom,
3380 (eecodesize - 2));
3381 /*
3382 if the ucdoe chksum flag bit worked,
7864a0ac 3383 we wouldn't need this
4d6ea9c3
DK		 3384 */
3385 if (ee_chksum == calc_chksum)
3386 card->config.EepromValid = true;
3387 }
3388 /* copy in the DRAM size */
3389 card->config.DramSize = dramsize;
3390
3391 /* copy in the MAC address(es) */
3392 for (i = 0; i < macaddrs; i++) {
3393 memcpy(&card->config.MacInfo[i],
3394 &pmac[i], sizeof(struct slic_config_mac));
3395 }
4d6f6af8 3396
4d6ea9c3
DK		 3397 /* copy the Alacritech FRU information */
3398 card->config.FruFormat = fruformat;
3399 memcpy(&card->config.AtkFru, patkfru,
3400 sizeof(struct atk_fru));
e9eff9d6 3401
4d6ea9c3
DK		 3402 pci_free_consistent(adapter->pcidev,
3403 sizeof(struct slic_eeprom),
3404 peeprom, phys_config);
4d6f6af8 3405
4d6ea9c3
DK		 3406 if ((!card->config.EepromValid) &&
3407 (adapter->reg_params.fail_on_bad_eeprom)) {
3408 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
3409 &slic_regs->slic_addr_upper,
3410 0, FLUSH);
3411 dev_err(&adapter->pcidev->dev,
3412 "unsupported CONFIGURATION EEPROM invalid\n");
3413 return -EINVAL;
3414 }
4d6f6af8 3415
4d6ea9c3 3416 card->config_set = 1;
4d6f6af8 3417 }
4d6ea9c3
DK		 3418
3419 if (slic_card_download_gbrcv(adapter)) {
3420 dev_err(&adapter->pcidev->dev,
3421 "unable to download GB receive microcode\n");
3422 return -EINVAL;
4d6f6af8 3423 }
4d6ea9c3
DK		 3424
3425 if (slic_global.dynamic_intagg)
3426 slic_intagg_set(adapter, 0);
4d6f6af8 3427 else
4d6ea9c3 3428 slic_intagg_set(adapter, intagg_delay);
4d6f6af8 3429
4d6ea9c3
DK		 3430 /*
3431 * Initialize ping status to "ok"
3432 */
3433 card->pingstatus = ISR_PINGMASK;
4d6f6af8 3434
4d6ea9c3
DK		 3435 /*
3436 * Lastly, mark our card state as up and return success
3437 */
3438 card->state = CARD_UP;
3439 card->reset_in_progress = 0;
4d6f6af8 3440
4d6ea9c3
DK		 3441 return 0;
3442}
3443
3444static void slic_init_driver(void)
3445{
3446 if (slic_first_init) {
3447 slic_first_init = 0;
3448 spin_lock_init(&slic_global.driver_lock.lock);
3449 slic_debug_init();
4d6f6af8 3450 }
4d6ea9c3 3451}
4d6f6af8 3452
4d6ea9c3
DK		 3453static void slic_init_adapter(struct net_device *netdev,
3454 struct pci_dev *pcidev,
3455 const struct pci_device_id *pci_tbl_entry,
3456 void __iomem *memaddr, int chip_idx)
3457{
3458 ushort index;
3459 struct slic_handle *pslic_handle;
3460 struct adapter *adapter = netdev_priv(netdev);
4d6f6af8 3461
4d6ea9c3
DK		 3462/* adapter->pcidev = pcidev;*/
3463 adapter->vendid = pci_tbl_entry->vendor;
3464 adapter->devid = pci_tbl_entry->device;
3465 adapter->subsysid = pci_tbl_entry->subdevice;
3466 adapter->busnumber = pcidev->bus->number;
3467 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
3468 adapter->functionnumber = (pcidev->devfn & 0x7);
3469 adapter->memorylength = pci_resource_len(pcidev, 0);
3470 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
3471 adapter->irq = pcidev->irq;
3472/* adapter->netdev = netdev;*/
3473 adapter->next_netdevice = head_netdevice;
3474 head_netdevice = netdev;
3475 adapter->chipid = chip_idx;
3476 adapter->port = 0; /*adapter->functionnumber;*/
3477 adapter->cardindex = adapter->port;
3478 adapter->memorybase = memaddr;
3479 spin_lock_init(&adapter->upr_lock.lock);
3480 spin_lock_init(&adapter->bit64reglock.lock);
3481 spin_lock_init(&adapter->adapter_lock.lock);
3482 spin_lock_init(&adapter->reset_lock.lock);
3483 spin_lock_init(&adapter->handle_lock.lock);
4d6f6af8 3484
4d6ea9c3
DK		 3485 adapter->card_size = 1;
3486 /*
3487 Initialize slic_handle array
3488 */
4d6ea9c3
DK		 3489 /*
3490 Start with 1. 0 is an invalid host handle.
3491 */
3492 for (index = 1, pslic_handle = &adapter->slic_handles[1];
3493 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
3494
3495 pslic_handle->token.handle_index = index;
3496 pslic_handle->type = SLIC_HANDLE_FREE;
3497 pslic_handle->next = adapter->pfree_slic_handles;
3498 adapter->pfree_slic_handles = pslic_handle;
4d6f6af8 3499 }
4d6ea9c3
DK		 3500 adapter->pshmem = (struct slic_shmem *)
3501 pci_alloc_consistent(adapter->pcidev,
3502 sizeof(struct slic_shmem),
3503 &adapter->
3504 phys_shmem);
b8131fc0
DN		 3505 if (adapter->pshmem)
3506 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
4d6ea9c3 3507}
4d6f6af8 3508
4d6ea9c3
DK		 3509static const struct net_device_ops slic_netdev_ops = {
3510 .ndo_open = slic_entry_open,
3511 .ndo_stop = slic_entry_halt,
3512 .ndo_start_xmit = slic_xmit_start,
3513 .ndo_do_ioctl = slic_ioctl,
3514 .ndo_set_mac_address = slic_mac_set_address,
3515 .ndo_get_stats = slic_get_stats,
afc4b13d 3516 .ndo_set_rx_mode = slic_mcast_set_list,
4d6ea9c3
DK		 3517 .ndo_validate_addr = eth_validate_addr,
3518 .ndo_change_mtu = eth_change_mtu,
3519};
4d6f6af8 3520
4d6ea9c3
DK		 3521static u32 slic_card_locate(struct adapter *adapter)
3522{
3523 struct sliccard *card = slic_global.slic_card;
3524 struct physcard *physcard = slic_global.phys_card;
3525 ushort card_hostid;
3526 u16 __iomem *hostid_reg;
3527 uint i;
3528 uint rdhostid_offset = 0;
4d6f6af8 3529
4d6ea9c3
DK		 3530 switch (adapter->devid) {
3531 case SLIC_2GB_DEVICE_ID:
3532 rdhostid_offset = SLIC_RDHOSTID_2GB;
3533 break;
3534 case SLIC_1GB_DEVICE_ID:
3535 rdhostid_offset = SLIC_RDHOSTID_1GB;
3536 break;
4d6f6af8 3537 default:
0ab19005 3538 return -ENODEV;
4d6f6af8 3539 }
4d6f6af8 3540
4d6ea9c3
DK		 3541 hostid_reg =
3542 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
3543 rdhostid_offset);
4d6f6af8 3544
4d6ea9c3
DK		 3545 /* read the 16 bit hostid from SRAM */
3546 card_hostid = (ushort) readw(hostid_reg);
4d6f6af8 3547
4d6ea9c3
DK		 3548 /* Initialize a new card structure if need be */
3549 if (card_hostid == SLIC_HOSTID_DEFAULT) {
3550 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
3551 if (card == NULL)
3552 return -ENOMEM;
3553
3554 card->next = slic_global.slic_card;
3555 slic_global.slic_card = card;
3556 card->busnumber = adapter->busnumber;
3557 card->slotnumber = adapter->slotnumber;
3558
3559 /* Find an available cardnum */
3560 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3561 if (slic_global.cardnuminuse[i] == 0) {
3562 slic_global.cardnuminuse[i] = 1;
3563 card->cardnum = i;
3564 break;
3565 }
3566 }
3567 slic_global.num_slic_cards++;
3568
3569 slic_debug_card_create(card);
3570 } else {
3571 /* Card exists, find the card this adapter belongs to */
3572 while (card) {
3573 if (card->cardnum == card_hostid)
3574 break;
3575 card = card->next;
3576 }
3577 }
3578
4d6ea9c3
DK		 3579 if (!card)
3580 return -ENXIO;
3581 /* Put the adapter in the card's adapter list */
4d6ea9c3
DK		 3582 if (!card->adapter[adapter->port]) {
3583 card->adapter[adapter->port] = adapter;
3584 adapter->card = card;
3585 }
3586
3587 card->card_size = 1; /* one port per *logical* card */
3588
3589 while (physcard) {
3590 for (i = 0; i < SLIC_MAX_PORTS; i++) {
20d403e8 3591 if (physcard->adapter[i])
4d6ea9c3
DK		 3592 break;
3593 }
20d403e8
PH		 3594 if (i == SLIC_MAX_PORTS)
3595 break;
3596
4d6ea9c3
DK		 3597 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3598 break;
3599 physcard = physcard->next;
3600 }
3601 if (!physcard) {
3602 /* no structure allocated for this physical card yet */
3603 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
34ec83f4
DN		 3604 if (!physcard) {
3605 if (card_hostid == SLIC_HOSTID_DEFAULT)
3606 kfree(card);
0608882d 3607 return -ENOMEM;
34ec83f4 3608 }
4d6ea9c3
DK		 3609
3610 physcard->next = slic_global.phys_card;
3611 slic_global.phys_card = physcard;
3612 physcard->adapters_allocd = 1;
3613 } else {
3614 physcard->adapters_allocd++;
3615 }
3616 /* Note - this is ZERO relative */
3617 adapter->physport = physcard->adapters_allocd - 1;
3618
4d6ea9c3
DK		 3619 physcard->adapter[adapter->physport] = adapter;
3620 adapter->physcard = physcard;
4d6f6af8
GKH		 3621
3622 return 0;
3623}
4d6f6af8 3624
a0c2feb1 3625static int slic_entry_probe(struct pci_dev *pcidev,
4d6ea9c3 3626 const struct pci_device_id *pci_tbl_entry)
4d6f6af8 3627{
4d6ea9c3
DK		 3628 static int cards_found;
3629 static int did_version;
3630 int err = -ENODEV;
3631 struct net_device *netdev;
3632 struct adapter *adapter;
3633 void __iomem *memmapped_ioaddr = NULL;
3634 u32 status = 0;
3635 ulong mmio_start = 0;
3636 ulong mmio_len = 0;
3637 struct sliccard *card = NULL;
3638 int pci_using_dac = 0;
4d6f6af8 3639
4d6ea9c3 3640 slic_global.dynamic_intagg = dynamic_intagg;
4d6f6af8 3641
4d6ea9c3 3642 err = pci_enable_device(pcidev);
4d6f6af8 3643
4d6ea9c3
DK		 3644 if (err)
3645 return err;
4d6f6af8 3646
4d6ea9c3
DK		 3647 if (slic_debug > 0 && did_version++ == 0) {
3648 printk(KERN_DEBUG "%s\n", slic_banner);
3649 printk(KERN_DEBUG "%s\n", slic_proc_version);
3650 }
4d6f6af8 3651
4d6ea9c3
DK		 3652 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3653 pci_using_dac = 1;
3654 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3655 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for "
3656 "consistent allocations\n");
3657 goto err_out_disable_pci;
3658 }
3659 } else if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) {
3660 pci_using_dac = 0;
3661 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3662 } else {
3663 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3664 goto err_out_disable_pci;
3665 }
4d6f6af8 3666
4d6ea9c3
DK		 3667 err = pci_request_regions(pcidev, DRV_NAME);
3668 if (err) {
3669 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3670 goto err_out_disable_pci;
3671 }
4d6f6af8 3672
4d6ea9c3 3673 pci_set_master(pcidev);
4d6f6af8 3674
4d6ea9c3
DK		 3675 netdev = alloc_etherdev(sizeof(struct adapter));
3676 if (!netdev) {
3677 err = -ENOMEM;
3678 goto err_out_exit_slic_probe;
4d6f6af8 3679 }
4d6f6af8 3680
4d6ea9c3 3681 SET_NETDEV_DEV(netdev, &pcidev->dev);
4d6f6af8 3682
4d6ea9c3
DK		 3683 pci_set_drvdata(pcidev, netdev);
3684 adapter = netdev_priv(netdev);
3685 adapter->netdev = netdev;
3686 adapter->pcidev = pcidev;
3687 if (pci_using_dac)
3688 netdev->features |= NETIF_F_HIGHDMA;
4d6f6af8 3689
4d6ea9c3
DK		 3690 mmio_start = pci_resource_start(pcidev, 0);
3691 mmio_len = pci_resource_len(pcidev, 0);
3692
3693
3694/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3695 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3696 if (!memmapped_ioaddr) {
3697 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3698 mmio_len, mmio_start);
3699 goto err_out_free_netdev;
4d6f6af8 3700 }
4d6ea9c3
DK		 3701
3702 slic_config_pci(pcidev);
3703
3704 slic_init_driver();
3705
3706 slic_init_adapter(netdev,
3707 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3708
3709 status = slic_card_locate(adapter);
3710 if (status) {
3711 dev_err(&pcidev->dev, "cannot locate card\n");
3712 goto err_out_free_mmio_region;
4d6f6af8 3713 }
4d6ea9c3
DK		 3714
3715 card = adapter->card;
3716
3717 if (!adapter->allocated) {
3718 card->adapters_allocated++;
3719 adapter->allocated = 1;
4d6f6af8 3720 }
4d6f6af8 3721
4d6ea9c3 3722 status = slic_card_init(card, adapter);
4d6f6af8 3723
4d6ea9c3
DK		 3724 if (status != 0) {
3725 card->state = CARD_FAIL;
3726 adapter->state = ADAPT_FAIL;
3727 adapter->linkstate = LINK_DOWN;
3728 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
3729 } else {
3730 slic_adapter_set_hwaddr(adapter);
4d6f6af8
GKH		 3731 }
3732
4d6ea9c3
DK		 3733 netdev->base_addr = (unsigned long)adapter->memorybase;
3734 netdev->irq = adapter->irq;
3735 netdev->netdev_ops = &slic_netdev_ops;
4d6f6af8 3736
4d6ea9c3
DK		 3737 slic_debug_adapter_create(adapter);
3738
3739 strcpy(netdev->name, "eth%d");
3740 err = register_netdev(netdev);
3741 if (err) {
3742 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3743 goto err_out_unmap;
4d6f6af8 3744 }
4d6f6af8 3745
4d6ea9c3
DK		 3746 cards_found++;
3747
3748 return status;
3749
3750err_out_unmap:
3751 iounmap(memmapped_ioaddr);
3752err_out_free_mmio_region:
3753 release_mem_region(mmio_start, mmio_len);
3754err_out_free_netdev:
3755 free_netdev(netdev);
3756err_out_exit_slic_probe:
3757 pci_release_regions(pcidev);
3758err_out_disable_pci:
3759 pci_disable_device(pcidev);
3760 return err;
3761}
4d6f6af8
GKH		 3762
3763static struct pci_driver slic_driver = {
3764 .name = DRV_NAME,
3765 .id_table = slic_pci_tbl,
3766 .probe = slic_entry_probe,
2e0d79c5 3767 .remove = slic_entry_remove,
4d6f6af8
GKH		 3768};
3769
3770static int __init slic_module_init(void)
3771{
4d6f6af8
GKH		 3772 slic_init_driver();
3773
3774 if (debug >= 0 && slic_debug != debug)
e5bac598
GKH		 3775 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
3776 debug);
4d6f6af8
GKH		 3777 if (debug >= 0)
3778 slic_debug = debug;
3779
e8bc9b7a 3780 return pci_register_driver(&slic_driver);
4d6f6af8
GKH		 3781}
3782
3783static void __exit slic_module_cleanup(void)
3784{
4d6f6af8
GKH		 3785 pci_unregister_driver(&slic_driver);
3786 slic_debug_cleanup();
4d6f6af8
GKH		 3787}
3788
3789module_init(slic_module_init);
3790module_exit(slic_module_cleanup);
kernel source for telekom puls (alcatel/mediatek)