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Merge branch 'for-rmk/740t' of git://git.kernel.org/pub/scm/linux/kernel/git/will...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / slicoss / slicoss.c
CommitLineData
4d6f6af8
GKH		 1/**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39/*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
493b67b7 50 * The driver was actually tested on Oasis and Kalahari cards.
4d6f6af8
GKH		 51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
4d6f6af8 57
4d6f6af8
GKH		 58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
4d6f6af8 60#define DBG 1
4d6f6af8 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
4d6f6af8
GKH		 62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
65
66#include <linux/kernel.h>
67#include <linux/string.h>
68#include <linux/errno.h>
69#include <linux/ioport.h>
70#include <linux/slab.h>
71#include <linux/interrupt.h>
72#include <linux/timer.h>
73#include <linux/pci.h>
74#include <linux/spinlock.h>
75#include <linux/init.h>
76#include <linux/bitops.h>
77#include <linux/io.h>
78#include <linux/netdevice.h>
79#include <linux/etherdevice.h>
80#include <linux/skbuff.h>
81#include <linux/delay.h>
82#include <linux/debugfs.h>
83#include <linux/seq_file.h>
84#include <linux/kthread.h>
85#include <linux/module.h>
86#include <linux/moduleparam.h>
87
470c5736 88#include <linux/firmware.h>
4d6f6af8 89#include <linux/types.h>
4d6f6af8 90#include <linux/dma-mapping.h>
4d6f6af8
GKH		 91#include <linux/mii.h>
92#include <linux/if_vlan.h>
4d6f6af8
GKH		 93#include <asm/unaligned.h>
94
95#include <linux/ethtool.h>
4d6f6af8 96#include <linux/uaccess.h>
77faefa3
GKH		 97#include "slichw.h"
98#include "slic.h"
99
4d6f6af8
GKH		 100static uint slic_first_init = 1;
101static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
e9ef456e 102 "and Storage Accelerator (Non-Accelerated)";
4d6f6af8
GKH		 103
104static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
105static char *slic_product_name = "SLIC Technology(tm) Server "\
106 "and Storage Accelerator (Non-Accelerated)";
107static char *slic_vendor = "Alacritech, Inc.";
108
109static int slic_debug = 1;
110static int debug = -1;
111static struct net_device *head_netdevice;
112
e9eff9d6 113static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
4d6f6af8
GKH		 114static int intagg_delay = 100;
115static u32 dynamic_intagg;
4d6f6af8
GKH		 116static unsigned int rcv_count;
117static struct dentry *slic_debugfs;
118
119#define DRV_NAME "slicoss"
120#define DRV_VERSION "2.0.1"
121#define DRV_AUTHOR "Alacritech, Inc. Engineering"
122#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
123 "Non-Accelerated Driver"
124#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
125 "All rights reserved."
126#define PFX DRV_NAME " "
127
128MODULE_AUTHOR(DRV_AUTHOR);
129MODULE_DESCRIPTION(DRV_DESCRIPTION);
130MODULE_LICENSE("Dual BSD/GPL");
131
132module_param(dynamic_intagg, int, 0);
133MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
134module_param(intagg_delay, int, 0);
135MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
136
5d372900 137static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = {
138 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
139 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
140 { 0 }
4d6f6af8
GKH		 141};
142
143MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
144
145#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
146{ \
2fbedf67 147 spin_lock_irqsave(&_adapter->handle_lock.lock, \
e9eff9d6 148 _adapter->handle_lock.flags); \
2fbedf67
CJB		 149 _pslic_handle = _adapter->pfree_slic_handles; \
150 if (_pslic_handle) { \
151 _adapter->pfree_slic_handles = _pslic_handle->next; \
152 } \
153 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
e9eff9d6 154 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 155}
156
157#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
158{ \
2fbedf67
CJB		 159 _pslic_handle->type = SLIC_HANDLE_FREE; \
160 spin_lock_irqsave(&_adapter->handle_lock.lock, \
e9eff9d6 161 _adapter->handle_lock.flags); \
2fbedf67
CJB		 162 _pslic_handle->next = _adapter->pfree_slic_handles; \
163 _adapter->pfree_slic_handles = _pslic_handle; \
164 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
e9eff9d6 165 _adapter->handle_lock.flags); \
4d6f6af8
GKH		 166}
167
62f691a3 168static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
4d6f6af8
GKH		 169{
170 writel(value, reg);
171 if (flush)
172 mb();
173}
174
28980a3c
GKH		 175static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
176 u32 value, void __iomem *regh, u32 paddrh,
177 bool flush)
4d6f6af8 178{
e9eff9d6
LD		 179 spin_lock_irqsave(&adapter->bit64reglock.lock,
180 adapter->bit64reglock.flags);
4d6f6af8
GKH		 181 if (paddrh != adapter->curaddrupper) {
182 adapter->curaddrupper = paddrh;
183 writel(paddrh, regh);
184 }
185 writel(value, reg);
186 if (flush)
187 mb();
e9eff9d6
LD		 188 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
189 adapter->bit64reglock.flags);
4d6f6af8
GKH		 190}
191
4d6ea9c3
DK		 192/*
193 * Functions to obtain the CRC corresponding to the destination mac address.
194 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
195 * the polynomial:
196 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
197 * x^4 + x^2 + x^1.
198 *
199 * After the CRC for the 6 bytes is generated (but before the value is
200 * complemented),
201 * we must then transpose the value and return bits 30-23.
202 *
203 */
204static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
205static u32 slic_crc_init; /* Is table initialized */
4d6f6af8 206
4d6ea9c3
DK		 207/*
208 * Contruct the CRC32 table
209 */
210static void slic_mcast_init_crc32(void)
4d6f6af8 211{
7864a0ac 212 u32 c; /* CRC reg */
4d6ea9c3
DK		 213 u32 e = 0; /* Poly X-or pattern */
214 int i; /* counter */
215 int k; /* byte being shifted into crc */
e8bc9b7a 216
4d6ea9c3 217 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
4d6f6af8 218
4d6ea9c3
DK		 219 for (i = 0; i < ARRAY_SIZE(p); i++)
220 e |= 1L << (31 - p[i]);
4d6f6af8 221
4d6ea9c3
DK		 222 for (i = 1; i < 256; i++) {
223 c = i;
224 for (k = 8; k; k--)
225 c = c & 1 ? (c >> 1) ^ e : c >> 1;
226 slic_crc_table[i] = c;
4d6f6af8 227 }
4d6f6af8
GKH		 228}
229
4d6ea9c3
DK		 230/*
231 * Return the MAC hast as described above.
232 */
233static unsigned char slic_mcast_get_mac_hash(char *macaddr)
4d6f6af8 234{
4d6ea9c3
DK		 235 u32 crc;
236 char *p;
237 int i;
238 unsigned char machash = 0;
4d6f6af8 239
4d6ea9c3
DK		 240 if (!slic_crc_init) {
241 slic_mcast_init_crc32();
242 slic_crc_init = 1;
4d6f6af8
GKH		 243 }
244
4d6ea9c3
DK		 245 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
246 for (i = 0, p = macaddr; i < 6; ++p, ++i)
247 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
4d6f6af8 248
4d6ea9c3
DK		 249 /* Return bits 1-8, transposed */
250 for (i = 1; i < 9; i++)
251 machash |= (((crc >> i) & 1) << (8 - i));
4d6f6af8 252
4d6ea9c3
DK		 253 return machash;
254}
4d6f6af8 255
4d6ea9c3
DK		 256static void slic_mcast_set_bit(struct adapter *adapter, char *address)
257{
258 unsigned char crcpoly;
4d6f6af8 259
4d6ea9c3
DK		 260 /* Get the CRC polynomial for the mac address */
261 crcpoly = slic_mcast_get_mac_hash(address);
4d6f6af8 262
4d6ea9c3
DK		 263 /* We only have space on the SLIC for 64 entries. Lop
264 * off the top two bits. (2^6 = 64)
265 */
266 crcpoly &= 0x3F;
4d6f6af8 267
4d6ea9c3
DK		 268 /* OR in the new bit into our 64 bit mask. */
269 adapter->mcastmask |= (u64) 1 << crcpoly;
270}
4d6f6af8 271
4d6ea9c3
DK		 272static void slic_mcast_set_mask(struct adapter *adapter)
273{
274 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 275
4d6ea9c3
DK		 276 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
277 /* Turn on all multicast addresses. We have to do this for
278 * promiscuous mode as well as ALLMCAST mode. It saves the
279 * Microcode from having to keep state about the MAC
280 * configuration.
281 */
282 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
283 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
284 FLUSH);
285 } else {
286 /* Commit our multicast mast to the SLIC by writing to the
287 * multicast address mask registers
288 */
289 slic_reg32_write(&slic_regs->slic_mcastlow,
290 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
291 slic_reg32_write(&slic_regs->slic_mcasthigh,
292 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
4d6f6af8 293 }
4d6ea9c3 294}
4d6f6af8 295
4d6ea9c3
DK		 296static void slic_timer_ping(ulong dev)
297{
298 struct adapter *adapter;
299 struct sliccard *card;
4d6f6af8 300
4d6ea9c3 301 adapter = netdev_priv((struct net_device *)dev);
4d6f6af8
GKH		 302 card = adapter->card;
303
4d6ea9c3
DK		 304 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
305 add_timer(&adapter->pingtimer);
306}
4d6f6af8 307
4d6ea9c3
DK		 308static void slic_unmap_mmio_space(struct adapter *adapter)
309{
310 if (adapter->slic_regs)
311 iounmap(adapter->slic_regs);
312 adapter->slic_regs = NULL;
313}
4d6f6af8 314
4d6ea9c3
DK		 315/*
316 * slic_link_config
317 *
318 * Write phy control to configure link duplex/speed
319 *
320 */
321static void slic_link_config(struct adapter *adapter,
322 u32 linkspeed, u32 linkduplex)
323{
324 u32 __iomem *wphy;
325 u32 speed;
326 u32 duplex;
327 u32 phy_config;
328 u32 phy_advreg;
329 u32 phy_gctlreg;
4d6f6af8 330
4d6ea9c3
DK		 331 if (adapter->state != ADAPT_UP)
332 return;
4d6f6af8 333
4d6ea9c3
DK		 334 if (linkspeed > LINK_1000MB)
335 linkspeed = LINK_AUTOSPEED;
336 if (linkduplex > LINK_AUTOD)
337 linkduplex = LINK_AUTOD;
4d6f6af8 338
4d6ea9c3 339 wphy = &adapter->slic_regs->slic_wphy;
4d6f6af8 340
4d6ea9c3
DK		 341 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
342 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
343 /* We've got a fiber gigabit interface, and register
344 * 4 is different in fiber mode than in copper mode
345 */
4d6f6af8 346
4d6ea9c3
DK		 347 /* advertise FD only @1000 Mb */
348 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
349 /* enable PAUSE frames */
350 phy_advreg |= PAR_ASYMPAUSE_FIBER;
351 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8 352
4d6ea9c3
DK		 353 if (linkspeed == LINK_AUTOSPEED) {
354 /* reset phy, enable auto-neg */
355 phy_config =
356 (MIICR_REG_PCR |
357 (PCR_RESET | PCR_AUTONEG |
358 PCR_AUTONEG_RST));
359 slic_reg32_write(wphy, phy_config, FLUSH);
360 } else { /* forced 1000 Mb FD*/
361 /* power down phy to break link
362 this may not work) */
363 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
364 slic_reg32_write(wphy, phy_config, FLUSH);
365 /* wait, Marvell says 1 sec,
366 try to get away with 10 ms */
367 mdelay(10);
4d6f6af8 368
4d6ea9c3
DK		 369 /* disable auto-neg, set speed/duplex,
370 soft reset phy, powerup */
371 phy_config =
372 (MIICR_REG_PCR |
373 (PCR_RESET | PCR_SPEED_1000 |
374 PCR_DUPLEX_FULL));
375 slic_reg32_write(wphy, phy_config, FLUSH);
376 }
377 } else { /* copper gigabit */
4d6f6af8 378
4d6ea9c3
DK		 379 /* Auto-Negotiate or 1000 Mb must be auto negotiated
380 * We've got a copper gigabit interface, and
381 * register 4 is different in copper mode than
382 * in fiber mode
383 */
384 if (linkspeed == LINK_AUTOSPEED) {
385 /* advertise 10/100 Mb modes */
386 phy_advreg =
387 (MIICR_REG_4 |
388 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
389 | PAR_ADV10HD));
390 } else {
391 /* linkspeed == LINK_1000MB -
392 don't advertise 10/100 Mb modes */
393 phy_advreg = MIICR_REG_4;
394 }
395 /* enable PAUSE frames */
396 phy_advreg |= PAR_ASYMPAUSE;
397 /* required by the Cicada PHY */
398 phy_advreg |= PAR_802_3;
399 slic_reg32_write(wphy, phy_advreg, FLUSH);
400 /* advertise FD only @1000 Mb */
401 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
402 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
4d6f6af8 403
4d6ea9c3
DK		 404 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
405 /* if a Marvell PHY
406 enable auto crossover */
407 phy_config =
408 (MIICR_REG_16 | (MRV_REG16_XOVERON));
409 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 410
4d6ea9c3
DK		 411 /* reset phy, enable auto-neg */
412 phy_config =
413 (MIICR_REG_PCR |
414 (PCR_RESET | PCR_AUTONEG |
415 PCR_AUTONEG_RST));
416 slic_reg32_write(wphy, phy_config, FLUSH);
417 } else { /* it's a Cicada PHY */
418 /* enable and restart auto-neg (don't reset) */
419 phy_config =
420 (MIICR_REG_PCR |
421 (PCR_AUTONEG | PCR_AUTONEG_RST));
422 slic_reg32_write(wphy, phy_config, FLUSH);
423 }
4d6f6af8 424 }
4d6ea9c3
DK		 425 } else {
426 /* Forced 10/100 */
427 if (linkspeed == LINK_10MB)
428 speed = 0;
429 else
430 speed = PCR_SPEED_100;
431 if (linkduplex == LINK_HALFD)
432 duplex = 0;
433 else
434 duplex = PCR_DUPLEX_FULL;
435
436 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
437 /* if a Marvell PHY
438 disable auto crossover */
439 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
440 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 441 }
4d6f6af8 442
4d6ea9c3
DK		 443 /* power down phy to break link (this may not work) */
444 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
445 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 446
4d6ea9c3
DK		 447 /* wait, Marvell says 1 sec, try to get away with 10 ms */
448 mdelay(10);
449
450 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
451 /* if a Marvell PHY
452 disable auto-neg, set speed,
453 soft reset phy, powerup */
454 phy_config =
455 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
456 slic_reg32_write(wphy, phy_config, FLUSH);
457 } else { /* it's a Cicada PHY */
458 /* disable auto-neg, set speed, powerup */
459 phy_config = (MIICR_REG_PCR | (speed | duplex));
460 slic_reg32_write(wphy, phy_config, FLUSH);
461 }
462 }
4d6f6af8
GKH		 463}
464
4d6ea9c3 465static int slic_card_download_gbrcv(struct adapter *adapter)
4d6f6af8 466{
4d6ea9c3
DK		 467 const struct firmware *fw;
468 const char *file = "";
469 int ret;
470 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
471 u32 codeaddr;
472 u32 instruction;
473 int index = 0;
474 u32 rcvucodelen = 0;
4d6f6af8 475
4d6ea9c3
DK		 476 switch (adapter->devid) {
477 case SLIC_2GB_DEVICE_ID:
478 file = "slicoss/oasisrcvucode.sys";
479 break;
480 case SLIC_1GB_DEVICE_ID:
481 file = "slicoss/gbrcvucode.sys";
482 break;
483 default:
651d4bc7 484 return -ENOENT;
4d6ea9c3 485 }
4d6f6af8 486
4d6ea9c3
DK		 487 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
488 if (ret) {
489 dev_err(&adapter->pcidev->dev,
490 "SLICOSS: Failed to load firmware %s\n", file);
491 return ret;
786ed801 492 }
4d6ea9c3
DK		 493
494 rcvucodelen = *(u32 *)(fw->data + index);
495 index += 4;
496 switch (adapter->devid) {
497 case SLIC_2GB_DEVICE_ID:
7ee34ab2
DN		 498 if (rcvucodelen != OasisRcvUCodeLen) {
499 release_firmware(fw);
4d6ea9c3 500 return -EINVAL;
7ee34ab2 501 }
4d6ea9c3
DK		 502 break;
503 case SLIC_1GB_DEVICE_ID:
7ee34ab2
DN		 504 if (rcvucodelen != GBRcvUCodeLen) {
505 release_firmware(fw);
4d6ea9c3 506 return -EINVAL;
7ee34ab2 507 }
4d6ea9c3 508 break;
4d6f6af8 509 }
4d6ea9c3
DK		 510 /* start download */
511 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
512 /* download the rcv sequencer ucode */
513 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
514 /* write out instruction address */
515 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
516
517 instruction = *(u32 *)(fw->data + index);
518 index += 4;
519 /* write out the instruction data low addr */
520 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
521
522 instruction = *(u8 *)(fw->data + index);
523 index++;
524 /* write out the instruction data high addr */
525 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
526 FLUSH);
527 }
528
529 /* download finished */
530 release_firmware(fw);
531 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
532 return 0;
4d6f6af8
GKH		 533}
534
4d6ea9c3
DK		 535MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
536MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
537
538static int slic_card_download(struct adapter *adapter)
4d6f6af8 539{
4d6ea9c3
DK		 540 const struct firmware *fw;
541 const char *file = "";
542 int ret;
543 u32 section;
544 int thissectionsize;
545 int codeaddr;
e9eff9d6 546 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6ea9c3
DK		 547 u32 instruction;
548 u32 baseaddress;
549 u32 i;
550 u32 numsects = 0;
551 u32 sectsize[3];
552 u32 sectstart[3];
553 int ucode_start, index = 0;
4d6f6af8 554
4d6ea9c3
DK		 555 switch (adapter->devid) {
556 case SLIC_2GB_DEVICE_ID:
557 file = "slicoss/oasisdownload.sys";
558 break;
559 case SLIC_1GB_DEVICE_ID:
560 file = "slicoss/gbdownload.sys";
561 break;
562 default:
670d145a 563 return -ENOENT;
4d6f6af8 564 }
4d6ea9c3
DK		 565 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
566 if (ret) {
567 dev_err(&adapter->pcidev->dev,
568 "SLICOSS: Failed to load firmware %s\n", file);
569 return ret;
570 }
571 numsects = *(u32 *)(fw->data + index);
572 index += 4;
4d6ea9c3
DK		 573 for (i = 0; i < numsects; i++) {
574 sectsize[i] = *(u32 *)(fw->data + index);
575 index += 4;
576 }
577 for (i = 0; i < numsects; i++) {
578 sectstart[i] = *(u32 *)(fw->data + index);
579 index += 4;
580 }
581 ucode_start = index;
582 instruction = *(u32 *)(fw->data + index);
583 index += 4;
584 for (section = 0; section < numsects; section++) {
585 baseaddress = sectstart[section];
586 thissectionsize = sectsize[section] >> 3;
4d6f6af8 587
4d6ea9c3
DK		 588 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
589 /* Write out instruction address */
590 slic_reg32_write(&slic_regs->slic_wcs,
591 baseaddress + codeaddr, FLUSH);
592 /* Write out instruction to low addr */
593 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
594 instruction = *(u32 *)(fw->data + index);
595 index += 4;
596
597 /* Write out instruction to high addr */
598 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
599 instruction = *(u32 *)(fw->data + index);
600 index += 4;
601 }
602 }
603 index = ucode_start;
604 for (section = 0; section < numsects; section++) {
605 instruction = *(u32 *)(fw->data + index);
606 baseaddress = sectstart[section];
607 if (baseaddress < 0x8000)
608 continue;
609 thissectionsize = sectsize[section] >> 3;
610
611 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
612 /* Write out instruction address */
613 slic_reg32_write(&slic_regs->slic_wcs,
614 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
615 FLUSH);
616 /* Write out instruction to low addr */
617 slic_reg32_write(&slic_regs->slic_wcs, instruction,
618 FLUSH);
619 instruction = *(u32 *)(fw->data + index);
620 index += 4;
621 /* Write out instruction to high addr */
622 slic_reg32_write(&slic_regs->slic_wcs, instruction,
623 FLUSH);
624 instruction = *(u32 *)(fw->data + index);
625 index += 4;
626
627 /* Check SRAM location zero. If it is non-zero. Abort.*/
628/* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
629 if (failure) {
630 release_firmware(fw);
631 return -EIO;
632 }*/
633 }
634 }
635 release_firmware(fw);
636 /* Everything OK, kick off the card */
637 mdelay(10);
638 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
639
640 /* stall for 20 ms, long enough for ucode to init card
641 and reach mainloop */
642 mdelay(20);
4d6f6af8 643
d1939786 644 return 0;
4d6f6af8
GKH		 645}
646
4d6ea9c3
DK		 647MODULE_FIRMWARE("slicoss/oasisdownload.sys");
648MODULE_FIRMWARE("slicoss/gbdownload.sys");
649
650static void slic_adapter_set_hwaddr(struct adapter *adapter)
4d6f6af8 651{
4d6ea9c3 652 struct sliccard *card = adapter->card;
e52011e4 653
4d6ea9c3
DK		 654 if ((adapter->card) && (card->config_set)) {
655 memcpy(adapter->macaddr,
656 card->config.MacInfo[adapter->functionnumber].macaddrA,
657 sizeof(struct slic_config_mac));
658 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
659 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
660 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
661 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
662 }
663 if (adapter->netdev) {
664 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
665 6);
666 }
667 }
668}
4d6f6af8 669
4d6ea9c3
DK		 670static void slic_intagg_set(struct adapter *adapter, u32 value)
671{
672 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
673 adapter->card->loadlevel_current = value;
674}
4d6f6af8 675
4d6ea9c3
DK		 676static void slic_soft_reset(struct adapter *adapter)
677{
678 if (adapter->card->state == CARD_UP) {
679 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
680 mdelay(1);
681 }
4d6f6af8 682
4d6ea9c3
DK		 683 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
684 FLUSH);
685 mdelay(1);
686}
e52011e4 687
4d6ea9c3
DK		 688static void slic_mac_address_config(struct adapter *adapter)
689{
690 u32 value;
691 u32 value2;
692 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
e52011e4 693
4d6ea9c3
DK		 694 value = *(u32 *) &adapter->currmacaddr[2];
695 value = ntohl(value);
696 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
697 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
e52011e4 698
4d6ea9c3
DK		 699 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
700 adapter->currmacaddr[1]) & 0xFFFF);
4d6f6af8 701
4d6ea9c3
DK		 702 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
703 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
e52011e4 704
4d6ea9c3
DK		 705 /* Write our multicast mask out to the card. This is done */
706 /* here in addition to the slic_mcast_addr_set routine */
707 /* because ALL_MCAST may have been enabled or disabled */
708 slic_mcast_set_mask(adapter);
709}
e52011e4 710
4d6ea9c3
DK		 711static void slic_mac_config(struct adapter *adapter)
712{
713 u32 value;
714 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
e52011e4 715
4d6ea9c3
DK		 716 /* Setup GMAC gaps */
717 if (adapter->linkspeed == LINK_1000MB) {
718 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
719 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
720 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
721 } else {
722 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
723 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
724 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
725 }
e52011e4 726
4d6ea9c3
DK		 727 /* enable GMII */
728 if (adapter->linkspeed == LINK_1000MB)
729 value |= GMCR_GBIT;
730
731 /* enable fullduplex */
732 if ((adapter->linkduplex == LINK_FULLD)
733 || (adapter->macopts & MAC_LOOPBACK)) {
734 value |= GMCR_FULLD;
4d6f6af8 735 }
4d6f6af8 736
4d6ea9c3
DK		 737 /* write mac config */
738 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
4d6f6af8 739
4d6ea9c3
DK		 740 /* setup mac addresses */
741 slic_mac_address_config(adapter);
742}
743
744static void slic_config_set(struct adapter *adapter, bool linkchange)
4d6f6af8 745{
4d6ea9c3
DK		 746 u32 value;
747 u32 RcrReset;
748 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 749
4d6ea9c3
DK		 750 if (linkchange) {
751 /* Setup MAC */
752 slic_mac_config(adapter);
753 RcrReset = GRCR_RESET;
754 } else {
755 slic_mac_address_config(adapter);
756 RcrReset = 0;
757 }
4d6f6af8 758
4d6ea9c3
DK		 759 if (adapter->linkduplex == LINK_FULLD) {
760 /* setup xmtcfg */
761 value = (GXCR_RESET | /* Always reset */
762 GXCR_XMTEN | /* Enable transmit */
763 GXCR_PAUSEEN); /* Enable pause */
4d6f6af8 764
4d6ea9c3 765 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8 766
4d6ea9c3
DK		 767 /* Setup rcvcfg last */
768 value = (RcrReset | /* Reset, if linkchange */
769 GRCR_CTLEN | /* Enable CTL frames */
770 GRCR_ADDRAEN | /* Address A enable */
771 GRCR_RCVBAD | /* Rcv bad frames */
772 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
773 } else {
774 /* setup xmtcfg */
775 value = (GXCR_RESET | /* Always reset */
776 GXCR_XMTEN); /* Enable transmit */
4d6f6af8 777
4d6ea9c3 778 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8 779
4d6ea9c3
DK		 780 /* Setup rcvcfg last */
781 value = (RcrReset | /* Reset, if linkchange */
782 GRCR_ADDRAEN | /* Address A enable */
783 GRCR_RCVBAD | /* Rcv bad frames */
784 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
4d6f6af8
GKH		 785 }
786
4d6ea9c3
DK		 787 if (adapter->state != ADAPT_DOWN) {
788 /* Only enable receive if we are restarting or running */
789 value |= GRCR_RCVEN;
4d6f6af8 790 }
4d6f6af8 791
4d6ea9c3
DK		 792 if (adapter->macopts & MAC_PROMISC)
793 value |= GRCR_RCVALL;
4d6f6af8 794
4d6ea9c3
DK		 795 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
796}
4d6f6af8 797
4d6ea9c3
DK		 798/*
799 * Turn off RCV and XMT, power down PHY
800 */
801static void slic_config_clear(struct adapter *adapter)
4d6f6af8 802{
4d6ea9c3
DK		 803 u32 value;
804 u32 phy_config;
805 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
806
807 /* Setup xmtcfg */
808 value = (GXCR_RESET | /* Always reset */
809 GXCR_PAUSEEN); /* Enable pause */
810
811 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
812
813 value = (GRCR_RESET | /* Always reset */
814 GRCR_CTLEN | /* Enable CTL frames */
815 GRCR_ADDRAEN | /* Address A enable */
816 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
817
818 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
819
820 /* power down phy */
821 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
822 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
4d6f6af8
GKH		 823}
824
4d6ea9c3
DK		 825static bool slic_mac_filter(struct adapter *adapter,
826 struct ether_header *ether_frame)
4d6f6af8 827{
9092de6d 828 struct net_device *netdev = adapter->netdev;
4d6ea9c3
DK		 829 u32 opts = adapter->macopts;
830 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
831 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
4d6f6af8 832
4d6ea9c3
DK		 833 if (opts & MAC_PROMISC)
834 return true;
4d6f6af8 835
4d6ea9c3
DK		 836 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
837 if (opts & MAC_BCAST) {
838 adapter->rcv_broadcasts++;
839 return true;
840 } else {
841 return false;
4d6f6af8 842 }
4d6ea9c3
DK		 843 }
844
845 if (ether_frame->ether_dhost[0] & 0x01) {
846 if (opts & MAC_ALLMCAST) {
847 adapter->rcv_multicasts++;
9092de6d 848 netdev->stats.multicast++;
4d6ea9c3 849 return true;
4d6f6af8 850 }
4d6ea9c3
DK		 851 if (opts & MAC_MCAST) {
852 struct mcast_address *mcaddr = adapter->mcastaddrs;
4d6f6af8 853
4d6ea9c3
DK		 854 while (mcaddr) {
855 if (!compare_ether_addr(mcaddr->address,
856 ether_frame->ether_dhost)) {
857 adapter->rcv_multicasts++;
9092de6d 858 netdev->stats.multicast++;
4d6ea9c3
DK		 859 return true;
860 }
861 mcaddr = mcaddr->next;
862 }
863 return false;
864 } else {
865 return false;
4d6f6af8
GKH		 866 }
867 }
4d6ea9c3
DK		 868 if (opts & MAC_DIRECTED) {
869 adapter->rcv_unicasts++;
870 return true;
871 }
872 return false;
4d6f6af8 873
4d6ea9c3 874}
4d6f6af8 875
4d6ea9c3 876static int slic_mac_set_address(struct net_device *dev, void *ptr)
4d6f6af8 877{
4d6ea9c3
DK		 878 struct adapter *adapter = netdev_priv(dev);
879 struct sockaddr *addr = ptr;
4d6f6af8 880
4d6ea9c3
DK		 881 if (netif_running(dev))
882 return -EBUSY;
883 if (!adapter)
884 return -EBUSY;
4d6f6af8 885
4d6ea9c3
DK		 886 if (!is_valid_ether_addr(addr->sa_data))
887 return -EINVAL;
4d6f6af8 888
4d6ea9c3
DK		 889 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
890 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
4d6f6af8 891
4d6ea9c3
DK		 892 slic_config_set(adapter, true);
893 return 0;
4d6f6af8
GKH		 894}
895
4d6ea9c3 896static void slic_timer_load_check(ulong cardaddr)
4d6f6af8 897{
4d6ea9c3
DK		 898 struct sliccard *card = (struct sliccard *)cardaddr;
899 struct adapter *adapter = card->master;
900 u32 __iomem *intagg;
901 u32 load = card->events;
902 u32 level = 0;
4d6f6af8 903
4d6ea9c3 904 intagg = &adapter->slic_regs->slic_intagg;
4d6f6af8 905
4d6ea9c3
DK		 906 if ((adapter) && (adapter->state == ADAPT_UP) &&
907 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
908 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
909 if (adapter->linkspeed == LINK_1000MB)
910 level = 100;
911 else {
912 if (load > SLIC_LOAD_5)
913 level = SLIC_INTAGG_5;
914 else if (load > SLIC_LOAD_4)
915 level = SLIC_INTAGG_4;
916 else if (load > SLIC_LOAD_3)
917 level = SLIC_INTAGG_3;
918 else if (load > SLIC_LOAD_2)
919 level = SLIC_INTAGG_2;
920 else if (load > SLIC_LOAD_1)
921 level = SLIC_INTAGG_1;
922 else
923 level = SLIC_INTAGG_0;
4d6f6af8 924 }
4d6ea9c3
DK		 925 if (card->loadlevel_current != level) {
926 card->loadlevel_current = level;
927 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8 928 }
4d6ea9c3
DK		 929 } else {
930 if (load > SLIC_LOAD_5)
931 level = SLIC_INTAGG_5;
932 else if (load > SLIC_LOAD_4)
933 level = SLIC_INTAGG_4;
934 else if (load > SLIC_LOAD_3)
935 level = SLIC_INTAGG_3;
936 else if (load > SLIC_LOAD_2)
937 level = SLIC_INTAGG_2;
938 else if (load > SLIC_LOAD_1)
939 level = SLIC_INTAGG_1;
940 else
941 level = SLIC_INTAGG_0;
942 if (card->loadlevel_current != level) {
943 card->loadlevel_current = level;
944 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8 945 }
4d6f6af8 946 }
4d6f6af8 947 }
4d6ea9c3
DK		 948 card->events = 0;
949 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
950 add_timer(&card->loadtimer);
4d6f6af8
GKH		 951}
952
4d6ea9c3
DK		 953static int slic_upr_queue_request(struct adapter *adapter,
954 u32 upr_request,
955 u32 upr_data,
956 u32 upr_data_h,
957 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 958{
4d6ea9c3
DK		 959 struct slic_upr *upr;
960 struct slic_upr *uprqueue;
4d6f6af8 961
4d6ea9c3
DK		 962 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
963 if (!upr)
964 return -ENOMEM;
4d6f6af8 965
4d6ea9c3
DK		 966 upr->adapter = adapter->port;
967 upr->upr_request = upr_request;
968 upr->upr_data = upr_data;
969 upr->upr_buffer = upr_buffer;
970 upr->upr_data_h = upr_data_h;
971 upr->upr_buffer_h = upr_buffer_h;
972 upr->next = NULL;
973 if (adapter->upr_list) {
974 uprqueue = adapter->upr_list;
a0a1cbef 975
4d6ea9c3
DK		 976 while (uprqueue->next)
977 uprqueue = uprqueue->next;
978 uprqueue->next = upr;
979 } else {
980 adapter->upr_list = upr;
4d6f6af8 981 }
4d6ea9c3 982 return 0;
4d6f6af8
GKH		 983}
984
4d6ea9c3 985static void slic_upr_start(struct adapter *adapter)
4d6f6af8 986{
4d6ea9c3
DK		 987 struct slic_upr *upr;
988 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 989/*
4d6ea9c3
DK		 990 char * ptr1;
991 char * ptr2;
992 uint cmdoffset;
993*/
994 upr = adapter->upr_list;
995 if (!upr)
996 return;
997 if (adapter->upr_busy)
998 return;
999 adapter->upr_busy = 1;
4d6f6af8 1000
4d6ea9c3
DK		 1001 switch (upr->upr_request) {
1002 case SLIC_UPR_STATS:
1003 if (upr->upr_data_h == 0) {
1004 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
1005 FLUSH);
1006 } else {
1007 slic_reg64_write(adapter, &slic_regs->slic_stats64,
1008 upr->upr_data,
1009 &slic_regs->slic_addr_upper,
1010 upr->upr_data_h, FLUSH);
1011 }
1012 break;
4d6f6af8 1013
4d6ea9c3
DK		 1014 case SLIC_UPR_RLSR:
1015 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
1016 &slic_regs->slic_addr_upper, upr->upr_data_h,
1017 FLUSH);
1018 break;
4d6f6af8 1019
4d6ea9c3
DK		 1020 case SLIC_UPR_RCONFIG:
1021 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
1022 upr->upr_data, &slic_regs->slic_addr_upper,
1023 upr->upr_data_h, FLUSH);
1024 break;
1025 case SLIC_UPR_PING:
1026 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
1027 break;
4d6ea9c3 1028 }
4d6f6af8
GKH		 1029}
1030
4d6ea9c3
DK		 1031static int slic_upr_request(struct adapter *adapter,
1032 u32 upr_request,
1033 u32 upr_data,
1034 u32 upr_data_h,
1035 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 1036{
4d6ea9c3 1037 int rc;
4d6f6af8 1038
4d6ea9c3
DK		 1039 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1040 rc = slic_upr_queue_request(adapter,
1041 upr_request,
1042 upr_data,
1043 upr_data_h, upr_buffer, upr_buffer_h);
1044 if (rc)
1045 goto err_unlock_irq;
4d6f6af8 1046
4d6ea9c3
DK		 1047 slic_upr_start(adapter);
1048err_unlock_irq:
1049 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1050 adapter->upr_lock.flags);
1051 return rc;
4d6f6af8
GKH		 1052}
1053
4d6ea9c3 1054static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
4d6f6af8 1055{
4d6ea9c3
DK		 1056 u32 linkstatus = adapter->pshmem->linkstatus;
1057 uint linkup;
1058 unsigned char linkspeed;
1059 unsigned char linkduplex;
4d6f6af8 1060
4d6ea9c3
DK		 1061 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1062 struct slic_shmem *pshmem;
4d6f6af8 1063
4d6ea9c3 1064 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1033f1f7 1065#if BITS_PER_LONG == 64
4d6ea9c3
DK		 1066 slic_upr_queue_request(adapter,
1067 SLIC_UPR_RLSR,
1068 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1069 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1070 0, 0);
1033f1f7 1071#else
4d6ea9c3
DK		 1072 slic_upr_queue_request(adapter,
1073 SLIC_UPR_RLSR,
1074 (u32) &pshmem->linkstatus,
1075 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
4d6ea9c3
DK		 1076#endif
1077 return;
1078 }
1079 if (adapter->state != ADAPT_UP)
1080 return;
4d6f6af8 1081
4d6ea9c3
DK		 1082 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1083 if (linkstatus & GIG_SPEED_1000)
1084 linkspeed = LINK_1000MB;
1085 else if (linkstatus & GIG_SPEED_100)
1086 linkspeed = LINK_100MB;
1087 else
1088 linkspeed = LINK_10MB;
4d6f6af8 1089
4d6ea9c3
DK		 1090 if (linkstatus & GIG_FULLDUPLEX)
1091 linkduplex = LINK_FULLD;
1092 else
1093 linkduplex = LINK_HALFD;
4d6f6af8 1094
4d6ea9c3
DK		 1095 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1096 return;
4d6f6af8 1097
4d6ea9c3
DK		 1098 /* link up event, but nothing has changed */
1099 if ((adapter->linkstate == LINK_UP) &&
1100 (linkup == LINK_UP) &&
1101 (adapter->linkspeed == linkspeed) &&
1102 (adapter->linkduplex == linkduplex))
1103 return;
4d6f6af8 1104
4d6ea9c3 1105 /* link has changed at this point */
4d6f6af8 1106
4d6ea9c3
DK		 1107 /* link has gone from up to down */
1108 if (linkup == LINK_DOWN) {
1109 adapter->linkstate = LINK_DOWN;
1110 return;
4d6f6af8
GKH		 1111 }
1112
4d6ea9c3
DK		 1113 /* link has gone from down to up */
1114 adapter->linkspeed = linkspeed;
1115 adapter->linkduplex = linkduplex;
1116
1117 if (adapter->linkstate != LINK_UP) {
1118 /* setup the mac */
b574488e 1119 slic_config_set(adapter, true);
4d6ea9c3
DK		 1120 adapter->linkstate = LINK_UP;
1121 netif_start_queue(adapter->netdev);
4d6f6af8 1122 }
4d6f6af8
GKH		 1123}
1124
4d6ea9c3 1125static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
4d6f6af8 1126{
4d6ea9c3
DK		 1127 struct sliccard *card = adapter->card;
1128 struct slic_upr *upr;
4d6f6af8 1129
4d6ea9c3
DK		 1130 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1131 upr = adapter->upr_list;
1132 if (!upr) {
4d6ea9c3
DK		 1133 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1134 adapter->upr_lock.flags);
1135 return;
4d6f6af8 1136 }
4d6ea9c3
DK		 1137 adapter->upr_list = upr->next;
1138 upr->next = NULL;
1139 adapter->upr_busy = 0;
4d6ea9c3
DK		 1140 switch (upr->upr_request) {
1141 case SLIC_UPR_STATS:
1142 {
1143 struct slic_stats *slicstats =
1144 (struct slic_stats *) &adapter->pshmem->inicstats;
1145 struct slic_stats *newstats = slicstats;
1146 struct slic_stats *old = &adapter->inicstats_prev;
1147 struct slicnet_stats *stst = &adapter->slic_stats;
4d6f6af8 1148
4d6ea9c3
DK		 1149 if (isr & ISR_UPCERR) {
1150 dev_err(&adapter->netdev->dev,
1151 "SLIC_UPR_STATS command failed isr[%x]\n",
1152 isr);
4d6f6af8 1153
4d6ea9c3
DK		 1154 break;
1155 }
1156 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1157 newstats->xmit_tcp_segs_gb,
1158 old->xmit_tcp_segs_gb);
4d6f6af8 1159
4d6ea9c3
DK		 1160 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1161 newstats->xmit_tcp_bytes_gb,
1162 old->xmit_tcp_bytes_gb);
4d6f6af8 1163
4d6ea9c3
DK		 1164 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1165 newstats->rcv_tcp_segs_gb,
1166 old->rcv_tcp_segs_gb);
4d6f6af8 1167
4d6ea9c3
DK		 1168 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1169 newstats->rcv_tcp_bytes_gb,
1170 old->rcv_tcp_bytes_gb);
4d6f6af8 1171
4d6ea9c3
DK		 1172 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1173 newstats->xmit_bytes_gb,
1174 old->xmit_bytes_gb);
4d6f6af8 1175
4d6ea9c3
DK		 1176 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1177 newstats->xmit_unicasts_gb,
1178 old->xmit_unicasts_gb);
4d6f6af8 1179
4d6ea9c3
DK		 1180 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1181 newstats->rcv_bytes_gb,
1182 old->rcv_bytes_gb);
4d6f6af8 1183
4d6ea9c3
DK		 1184 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1185 newstats->rcv_unicasts_gb,
1186 old->rcv_unicasts_gb);
4d6f6af8 1187
4d6ea9c3
DK		 1188 UPDATE_STATS_GB(stst->iface.xmt_errors,
1189 newstats->xmit_collisions_gb,
1190 old->xmit_collisions_gb);
4d6f6af8 1191
4d6ea9c3
DK		 1192 UPDATE_STATS_GB(stst->iface.xmt_errors,
1193 newstats->xmit_excess_collisions_gb,
1194 old->xmit_excess_collisions_gb);
4d6f6af8 1195
4d6ea9c3
DK		 1196 UPDATE_STATS_GB(stst->iface.xmt_errors,
1197 newstats->xmit_other_error_gb,
1198 old->xmit_other_error_gb);
4d6f6af8 1199
4d6ea9c3
DK		 1200 UPDATE_STATS_GB(stst->iface.rcv_errors,
1201 newstats->rcv_other_error_gb,
1202 old->rcv_other_error_gb);
4d6f6af8 1203
4d6ea9c3
DK		 1204 UPDATE_STATS_GB(stst->iface.rcv_discards,
1205 newstats->rcv_drops_gb,
1206 old->rcv_drops_gb);
a0a1cbef 1207
4d6ea9c3
DK		 1208 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1209 adapter->rcv_drops +=
1210 (newstats->rcv_drops_gb -
1211 old->rcv_drops_gb);
1212 }
1213 memcpy(old, newstats, sizeof(struct slic_stats));
1214 break;
1215 }
1216 case SLIC_UPR_RLSR:
1217 slic_link_upr_complete(adapter, isr);
1218 break;
1219 case SLIC_UPR_RCONFIG:
1220 break;
4d6ea9c3
DK		 1221 case SLIC_UPR_PING:
1222 card->pingstatus |= (isr & ISR_PINGDSMASK);
1223 break;
4d6f6af8 1224 }
4d6ea9c3
DK		 1225 kfree(upr);
1226 slic_upr_start(adapter);
1227 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1228 adapter->upr_lock.flags);
4d6f6af8
GKH		 1229}
1230
4d6ea9c3
DK		 1231static void slic_config_get(struct adapter *adapter, u32 config,
1232 u32 config_h)
4d6f6af8 1233{
4d6ea9c3
DK		 1234 int status;
1235
1236 status = slic_upr_request(adapter,
1237 SLIC_UPR_RCONFIG,
1238 (u32) config, (u32) config_h, 0, 0);
4d6f6af8
GKH		 1239}
1240
4d6ea9c3
DK		 1241/*
1242 * this is here to checksum the eeprom, there is some ucode bug
1243 * which prevens us from using the ucode result.
1244 * remove this once ucode is fixed.
1245 */
1246static ushort slic_eeprom_cksum(char *m, int len)
4d6f6af8 1247{
4d6ea9c3
DK		 1248#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
1249#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
1250 }
4d6f6af8 1251
4d6ea9c3
DK		 1252 u16 *w;
1253 u32 sum = 0;
1254 u32 byte_swapped = 0;
1255 u32 w_int;
4d6f6af8 1256
4d6ea9c3
DK		 1257 union {
1258 char c[2];
1259 ushort s;
1260 } s_util;
4d6f6af8 1261
4d6ea9c3
DK		 1262 union {
1263 ushort s[2];
1264 int l;
1265 } l_util;
4d6f6af8 1266
4d6ea9c3
DK		 1267 l_util.l = 0;
1268 s_util.s = 0;
1269
1270 w = (u16 *)m;
1033f1f7 1271#if BITS_PER_LONG == 64
4d6ea9c3
DK		 1272 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
1273#else
1274 w_int = (u32) (w);
1275#endif
1276 if ((1 & w_int) && (len > 0)) {
1277 REDUCE;
1278 sum <<= 8;
1279 s_util.c[0] = *(unsigned char *)w;
1280 w = (u16 *)((char *)w + 1);
1281 len--;
1282 byte_swapped = 1;
1283 }
1284
1285 /* Unroll the loop to make overhead from branches &c small. */
1286 while ((len -= 32) >= 0) {
1287 sum += w[0];
1288 sum += w[1];
1289 sum += w[2];
1290 sum += w[3];
1291 sum += w[4];
1292 sum += w[5];
1293 sum += w[6];
1294 sum += w[7];
1295 sum += w[8];
1296 sum += w[9];
1297 sum += w[10];
1298 sum += w[11];
1299 sum += w[12];
1300 sum += w[13];
1301 sum += w[14];
1302 sum += w[15];
1303 w = (u16 *)((ulong) w + 16); /* verify */
1304 }
1305 len += 32;
1306 while ((len -= 8) >= 0) {
1307 sum += w[0];
1308 sum += w[1];
1309 sum += w[2];
1310 sum += w[3];
1311 w = (u16 *)((ulong) w + 4); /* verify */
1312 }
1313 len += 8;
1314 if (len != 0 || byte_swapped != 0) {
1315 REDUCE;
1316 while ((len -= 2) >= 0)
1317 sum += *w++; /* verify */
1318 if (byte_swapped) {
1319 REDUCE;
1320 sum <<= 8;
1321 byte_swapped = 0;
1322 if (len == -1) {
1323 s_util.c[1] = *(char *) w;
1324 sum += s_util.s;
1325 len = 0;
1326 } else {
1327 len = -1;
1328 }
1329
1330 } else if (len == -1) {
1331 s_util.c[0] = *(char *) w;
1332 }
1333
1334 if (len == -1) {
1335 s_util.c[1] = 0;
1336 sum += s_util.s;
4d6f6af8 1337 }
4d6f6af8 1338 }
4d6ea9c3
DK		 1339 REDUCE;
1340 return (ushort) sum;
4d6f6af8
GKH		 1341}
1342
4d6ea9c3 1343static void slic_rspqueue_free(struct adapter *adapter)
4d6f6af8 1344{
4d6ea9c3
DK		 1345 int i;
1346 struct slic_rspqueue *rspq = &adapter->rspqueue;
4d6f6af8 1347
4d6ea9c3
DK		 1348 for (i = 0; i < rspq->num_pages; i++) {
1349 if (rspq->vaddr[i]) {
1350 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1351 rspq->vaddr[i], rspq->paddr[i]);
1352 }
1353 rspq->vaddr[i] = NULL;
1354 rspq->paddr[i] = 0;
1355 }
1356 rspq->offset = 0;
1357 rspq->pageindex = 0;
1358 rspq->rspbuf = NULL;
4d6f6af8
GKH		 1359}
1360
4d6ea9c3 1361static int slic_rspqueue_init(struct adapter *adapter)
4d6f6af8 1362{
4d6ea9c3
DK		 1363 int i;
1364 struct slic_rspqueue *rspq = &adapter->rspqueue;
1365 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1366 u32 paddrh = 0;
1367
4d6ea9c3
DK		 1368 memset(rspq, 0, sizeof(struct slic_rspqueue));
1369
1370 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1371
1372 for (i = 0; i < rspq->num_pages; i++) {
1373 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
1374 PAGE_SIZE,
1375 &rspq->paddr[i]);
1376 if (!rspq->vaddr[i]) {
1377 dev_err(&adapter->pcidev->dev,
1378 "pci_alloc_consistent failed\n");
1379 slic_rspqueue_free(adapter);
1380 return -ENOMEM;
1381 }
1033f1f7
DK		 1382 /* FIXME:
1383 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */
4d6ea9c3
DK		 1384 memset(rspq->vaddr[i], 0, PAGE_SIZE);
1385
1386 if (paddrh == 0) {
1387 slic_reg32_write(&slic_regs->slic_rbar,
1388 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1389 DONT_FLUSH);
1390 } else {
1391 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1392 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1393 &slic_regs->slic_addr_upper,
1394 paddrh, DONT_FLUSH);
1395 }
1396 }
1397 rspq->offset = 0;
1398 rspq->pageindex = 0;
1399 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1400 return 0;
4d6f6af8
GKH		 1401}
1402
4d6ea9c3 1403static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
4d6f6af8 1404{
4d6ea9c3
DK		 1405 struct slic_rspqueue *rspq = &adapter->rspqueue;
1406 struct slic_rspbuf *buf;
4d6f6af8 1407
4d6ea9c3
DK		 1408 if (!(rspq->rspbuf->status))
1409 return NULL;
4d6f6af8 1410
4d6ea9c3 1411 buf = rspq->rspbuf;
4d6ea9c3
DK		 1412 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1413 rspq->rspbuf++;
4d6ea9c3 1414 } else {
4d6ea9c3
DK		 1415 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1416 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1417 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1418 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
1419 rspq->offset = 0;
1420 rspq->rspbuf = (struct slic_rspbuf *)
1421 rspq->vaddr[rspq->pageindex];
4d6ea9c3 1422 }
40991e4f 1423
4d6ea9c3
DK		 1424 return buf;
1425}
4d6f6af8 1426
4d6ea9c3
DK		 1427static void slic_cmdqmem_free(struct adapter *adapter)
1428{
1429 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1430 int i;
4d6f6af8 1431
4d6ea9c3
DK		 1432 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1433 if (cmdqmem->pages[i]) {
1434 pci_free_consistent(adapter->pcidev,
1435 PAGE_SIZE,
1436 (void *) cmdqmem->pages[i],
1437 cmdqmem->dma_pages[i]);
1438 }
1439 }
1440 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1441}
4d6f6af8 1442
4d6ea9c3
DK		 1443static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1444{
1445 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1446 u32 *pageaddr;
4d6f6af8 1447
4d6ea9c3
DK		 1448 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1449 return NULL;
1450 pageaddr = pci_alloc_consistent(adapter->pcidev,
1451 PAGE_SIZE,
1452 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1453 if (!pageaddr)
1454 return NULL;
40991e4f 1455
4d6ea9c3
DK		 1456 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1457 cmdqmem->pagecnt++;
1458 return pageaddr;
1459}
4d6f6af8 1460
4d6ea9c3
DK		 1461static void slic_cmdq_free(struct adapter *adapter)
1462{
1463 struct slic_hostcmd *cmd;
4d6f6af8 1464
4d6ea9c3
DK		 1465 cmd = adapter->cmdq_all.head;
1466 while (cmd) {
1467 if (cmd->busy) {
1468 struct sk_buff *tempskb;
4d6f6af8 1469
4d6ea9c3
DK		 1470 tempskb = cmd->skb;
1471 if (tempskb) {
1472 cmd->skb = NULL;
1473 dev_kfree_skb_irq(tempskb);
4d6f6af8
GKH		 1474 }
1475 }
4d6ea9c3
DK		 1476 cmd = cmd->next_all;
1477 }
1478 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1479 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1480 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1481 slic_cmdqmem_free(adapter);
1482}
4d6f6af8 1483
4d6ea9c3
DK		 1484static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1485{
1486 struct slic_hostcmd *cmd;
1487 struct slic_hostcmd *prev;
1488 struct slic_hostcmd *tail;
1489 struct slic_cmdqueue *cmdq;
1490 int cmdcnt;
1491 void *cmdaddr;
1492 ulong phys_addr;
1493 u32 phys_addrl;
1494 u32 phys_addrh;
1495 struct slic_handle *pslic_handle;
4d6f6af8 1496
4d6ea9c3
DK		 1497 cmdaddr = page;
1498 cmd = (struct slic_hostcmd *)cmdaddr;
1499 cmdcnt = 0;
4d6f6af8 1500
4d6ea9c3
DK		 1501 phys_addr = virt_to_bus((void *)page);
1502 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1503 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4d6f6af8 1504
4d6ea9c3
DK		 1505 prev = NULL;
1506 tail = cmd;
1507 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1508 (adapter->slic_handle_ix < 256)) {
1509 /* Allocate and initialize a SLIC_HANDLE for this command */
1510 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
4d6ea9c3
DK		 1511 pslic_handle->type = SLIC_HANDLE_CMD;
1512 pslic_handle->address = (void *) cmd;
1513 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1514 pslic_handle->other_handle = NULL;
1515 pslic_handle->next = NULL;
1516
1517 cmd->pslic_handle = pslic_handle;
1518 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1519 cmd->busy = false;
1520 cmd->paddrl = phys_addrl;
1521 cmd->paddrh = phys_addrh;
1522 cmd->next_all = prev;
1523 cmd->next = prev;
1524 prev = cmd;
1525 phys_addrl += SLIC_HOSTCMD_SIZE;
1526 cmdaddr += SLIC_HOSTCMD_SIZE;
1527
1528 cmd = (struct slic_hostcmd *)cmdaddr;
1529 cmdcnt++;
4d6f6af8 1530 }
4d6ea9c3
DK		 1531
1532 cmdq = &adapter->cmdq_all;
1533 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1534 tail->next_all = cmdq->head;
1535 cmdq->head = prev;
1536 cmdq = &adapter->cmdq_free;
1537 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1538 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1539 tail->next = cmdq->head;
1540 cmdq->head = prev;
1541 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 1542}
1543
4d6ea9c3 1544static int slic_cmdq_init(struct adapter *adapter)
4d6f6af8 1545{
4d6ea9c3
DK		 1546 int i;
1547 u32 *pageaddr;
4d6f6af8 1548
4d6ea9c3
DK		 1549 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1550 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1551 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1552 spin_lock_init(&adapter->cmdq_all.lock.lock);
1553 spin_lock_init(&adapter->cmdq_free.lock.lock);
1554 spin_lock_init(&adapter->cmdq_done.lock.lock);
bae5c3d1 1555 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6ea9c3
DK		 1556 adapter->slic_handle_ix = 1;
1557 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1558 pageaddr = slic_cmdqmem_addpage(adapter);
4d6ea9c3
DK		 1559 if (!pageaddr) {
1560 slic_cmdq_free(adapter);
1561 return -ENOMEM;
1562 }
1563 slic_cmdq_addcmdpage(adapter, pageaddr);
1564 }
1565 adapter->slic_handle_ix = 1;
4d6f6af8 1566
4d6ea9c3 1567 return 0;
4d6f6af8
GKH		 1568}
1569
4d6ea9c3 1570static void slic_cmdq_reset(struct adapter *adapter)
4d6f6af8 1571{
4d6ea9c3
DK		 1572 struct slic_hostcmd *hcmd;
1573 struct sk_buff *skb;
1574 u32 outstanding;
4d6f6af8 1575
4d6ea9c3
DK		 1576 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1577 adapter->cmdq_free.lock.flags);
1578 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1579 adapter->cmdq_done.lock.flags);
1580 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1581 outstanding -= adapter->cmdq_free.count;
1582 hcmd = adapter->cmdq_all.head;
1583 while (hcmd) {
1584 if (hcmd->busy) {
1585 skb = hcmd->skb;
4d6ea9c3
DK		 1586 hcmd->busy = 0;
1587 hcmd->skb = NULL;
1588 dev_kfree_skb_irq(skb);
1589 }
1590 hcmd = hcmd->next_all;
470c5736 1591 }
4d6ea9c3
DK		 1592 adapter->cmdq_free.count = 0;
1593 adapter->cmdq_free.head = NULL;
1594 adapter->cmdq_free.tail = NULL;
1595 adapter->cmdq_done.count = 0;
1596 adapter->cmdq_done.head = NULL;
1597 adapter->cmdq_done.tail = NULL;
1598 adapter->cmdq_free.head = adapter->cmdq_all.head;
1599 hcmd = adapter->cmdq_all.head;
1600 while (hcmd) {
1601 adapter->cmdq_free.count++;
1602 hcmd->next = hcmd->next_all;
1603 hcmd = hcmd->next_all;
4d6f6af8 1604 }
4d6ea9c3
DK		 1605 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1606 dev_err(&adapter->netdev->dev,
1607 "free_count %d != all count %d\n",
1608 adapter->cmdq_free.count, adapter->cmdq_all.count);
4d6f6af8 1609 }
4d6ea9c3
DK		 1610 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1611 adapter->cmdq_done.lock.flags);
1612 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1613 adapter->cmdq_free.lock.flags);
4d6f6af8
GKH		 1614}
1615
4d6ea9c3 1616static void slic_cmdq_getdone(struct adapter *adapter)
4d6f6af8 1617{
4d6ea9c3
DK		 1618 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1619 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4d6f6af8 1620
4d6ea9c3 1621 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8 1622
4d6ea9c3
DK		 1623 free_cmdq->head = done_cmdq->head;
1624 free_cmdq->count = done_cmdq->count;
1625 done_cmdq->head = NULL;
1626 done_cmdq->tail = NULL;
1627 done_cmdq->count = 0;
1628 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1629}
874073ea 1630
4d6ea9c3
DK		 1631static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1632{
1633 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1634 struct slic_hostcmd *cmd = NULL;
4d6f6af8 1635
4d6ea9c3
DK		 1636lock_and_retry:
1637 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1638retry:
1639 cmd = cmdq->head;
1640 if (cmd) {
1641 cmdq->head = cmd->next;
1642 cmdq->count--;
1643 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1644 } else {
1645 slic_cmdq_getdone(adapter);
1646 cmd = cmdq->head;
1647 if (cmd) {
1648 goto retry;
1649 } else {
1650 u32 *pageaddr;
874073ea 1651
4d6ea9c3
DK		 1652 spin_unlock_irqrestore(&cmdq->lock.lock,
1653 cmdq->lock.flags);
1654 pageaddr = slic_cmdqmem_addpage(adapter);
1655 if (pageaddr) {
1656 slic_cmdq_addcmdpage(adapter, pageaddr);
1657 goto lock_and_retry;
1658 }
4d6f6af8
GKH		 1659 }
1660 }
4d6ea9c3 1661 return cmd;
4d6f6af8
GKH		 1662}
1663
4d6ea9c3
DK		 1664static void slic_cmdq_putdone_irq(struct adapter *adapter,
1665 struct slic_hostcmd *cmd)
4d6f6af8 1666{
4d6ea9c3 1667 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4d6f6af8 1668
4d6ea9c3
DK		 1669 spin_lock(&cmdq->lock.lock);
1670 cmd->busy = 0;
1671 cmd->next = cmdq->head;
1672 cmdq->head = cmd;
1673 cmdq->count++;
1674 if ((adapter->xmitq_full) && (cmdq->count > 10))
1675 netif_wake_queue(adapter->netdev);
1676 spin_unlock(&cmdq->lock.lock);
4d6f6af8
GKH		 1677}
1678
4d6ea9c3 1679static int slic_rcvqueue_fill(struct adapter *adapter)
4d6f6af8 1680{
4d6ea9c3
DK		 1681 void *paddr;
1682 u32 paddrl;
1683 u32 paddrh;
1684 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1685 int i = 0;
1686 struct device *dev = &adapter->netdev->dev;
1687
1688 while (i < SLIC_RCVQ_FILLENTRIES) {
1689 struct slic_rcvbuf *rcvbuf;
1690 struct sk_buff *skb;
1691#ifdef KLUDGE_FOR_4GB_BOUNDARY
1692retry_rcvqfill:
1693#endif
1694 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1695 if (skb) {
1696 paddr = (void *)pci_map_single(adapter->pcidev,
1697 skb->data,
1698 SLIC_RCVQ_RCVBUFSIZE,
1699 PCI_DMA_FROMDEVICE);
1700 paddrl = SLIC_GET_ADDR_LOW(paddr);
1701 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1702
1703 skb->len = SLIC_RCVBUF_HEADSIZE;
1704 rcvbuf = (struct slic_rcvbuf *)skb->head;
1705 rcvbuf->status = 0;
1706 skb->next = NULL;
1707#ifdef KLUDGE_FOR_4GB_BOUNDARY
1708 if (paddrl == 0) {
1709 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1710 __func__);
1711 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1712 dev_err(dev, " skbdata[%p]\n", skb->data);
1713 dev_err(dev, " skblen[%x]\n", skb->len);
1714 dev_err(dev, " paddr[%p]\n", paddr);
1715 dev_err(dev, " paddrl[%x]\n", paddrl);
1716 dev_err(dev, " paddrh[%x]\n", paddrh);
1717 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1718 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1719 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1720 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1721 goto retry_rcvqfill;
1722 }
1723#else
1724 if (paddrl == 0) {
1725 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1726 __func__);
1727 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1728 dev_err(dev, " skbdata[%p]\n", skb->data);
1729 dev_err(dev, " skblen[%x]\n", skb->len);
1730 dev_err(dev, " paddr[%p]\n", paddr);
1731 dev_err(dev, " paddrl[%x]\n", paddrl);
1732 dev_err(dev, " paddrh[%x]\n", paddrh);
1733 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1734 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1735 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1736 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1737 }
1738#endif
1739 if (paddrh == 0) {
1740 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1741 (u32)paddrl, DONT_FLUSH);
1742 } else {
1743 slic_reg64_write(adapter,
1744 &adapter->slic_regs->slic_hbar64,
1745 paddrl,
1746 &adapter->slic_regs->slic_addr_upper,
1747 paddrh, DONT_FLUSH);
1748 }
1749 if (rcvq->head)
1750 rcvq->tail->next = skb;
1751 else
1752 rcvq->head = skb;
1753 rcvq->tail = skb;
1754 rcvq->count++;
1755 i++;
1756 } else {
1757 dev_err(&adapter->netdev->dev,
1758 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1759 i);
1760 break;
1761 }
1762 }
1763 return i;
4d6f6af8
GKH		 1764}
1765
4d6ea9c3 1766static void slic_rcvqueue_free(struct adapter *adapter)
4d6f6af8 1767{
4d6ea9c3
DK		 1768 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1769 struct sk_buff *skb;
4d6f6af8 1770
4d6ea9c3
DK		 1771 while (rcvq->head) {
1772 skb = rcvq->head;
1773 rcvq->head = rcvq->head->next;
1774 dev_kfree_skb(skb);
1775 }
1776 rcvq->tail = NULL;
1777 rcvq->head = NULL;
1778 rcvq->count = 0;
1779}
4d6f6af8 1780
4d6ea9c3
DK		 1781static int slic_rcvqueue_init(struct adapter *adapter)
1782{
1783 int i, count;
1784 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 1785
4d6ea9c3
DK		 1786 rcvq->tail = NULL;
1787 rcvq->head = NULL;
1788 rcvq->size = SLIC_RCVQ_ENTRIES;
1789 rcvq->errors = 0;
1790 rcvq->count = 0;
1791 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
1792 count = 0;
1793 while (i) {
1794 count += slic_rcvqueue_fill(adapter);
1795 i--;
1796 }
1797 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1798 slic_rcvqueue_free(adapter);
1799 return -ENOMEM;
4d6f6af8 1800 }
4d6ea9c3
DK		 1801 return 0;
1802}
4d6f6af8 1803
4d6ea9c3
DK		 1804static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1805{
1806 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1807 struct sk_buff *skb;
1808 struct slic_rcvbuf *rcvbuf;
1809 int count;
4d6f6af8 1810
4d6ea9c3
DK		 1811 if (rcvq->count) {
1812 skb = rcvq->head;
1813 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8 1814
4d6ea9c3
DK		 1815 if (rcvbuf->status & IRHDDR_SVALID) {
1816 rcvq->head = rcvq->head->next;
1817 skb->next = NULL;
1818 rcvq->count--;
4d6f6af8 1819 } else {
4d6ea9c3 1820 skb = NULL;
4d6f6af8 1821 }
4d6ea9c3
DK		 1822 } else {
1823 dev_err(&adapter->netdev->dev,
1824 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1825 skb = NULL;
1826 }
1827 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1828 count = slic_rcvqueue_fill(adapter);
1829 if (!count)
1830 break;
1831 }
1832 if (skb)
1833 rcvq->errors = 0;
1834 return skb;
1835}
4d6f6af8 1836
4d6ea9c3
DK		 1837static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1838{
1839 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1840 void *paddr;
1841 u32 paddrl;
1842 u32 paddrh;
1843 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1844 struct device *dev;
4d6f6af8 1845
4d6ea9c3
DK		 1846 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
1847 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1848 rcvbuf->status = 0;
1849 skb->next = NULL;
4d6f6af8 1850
4d6ea9c3
DK		 1851 paddrl = SLIC_GET_ADDR_LOW(paddr);
1852 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4d6f6af8 1853
4d6ea9c3
DK		 1854 if (paddrl == 0) {
1855 dev = &adapter->netdev->dev;
1856 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1857 __func__);
1858 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1859 dev_err(dev, " skbdata[%p]\n", skb->data);
1860 dev_err(dev, " skblen[%x]\n", skb->len);
1861 dev_err(dev, " paddr[%p]\n", paddr);
1862 dev_err(dev, " paddrl[%x]\n", paddrl);
1863 dev_err(dev, " paddrh[%x]\n", paddrh);
1864 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1865 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1866 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
4d6f6af8 1867 }
4d6ea9c3
DK		 1868 if (paddrh == 0) {
1869 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1870 DONT_FLUSH);
1871 } else {
1872 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1873 paddrl, &adapter->slic_regs->slic_addr_upper,
1874 paddrh, DONT_FLUSH);
4d6f6af8 1875 }
4d6ea9c3
DK		 1876 if (rcvq->head)
1877 rcvq->tail->next = skb;
e8bc9b7a 1878 else
4d6ea9c3
DK		 1879 rcvq->head = skb;
1880 rcvq->tail = skb;
1881 rcvq->count++;
1882 return rcvq->count;
4d6f6af8
GKH		 1883}
1884
4d6ea9c3 1885static int slic_debug_card_show(struct seq_file *seq, void *v)
4d6f6af8 1886{
4d6ea9c3
DK		 1887#ifdef MOOKTODO
1888 int i;
1889 struct sliccard *card = seq->private;
1890 struct slic_config *config = &card->config;
1891 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
1892 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
1893#endif
4d6f6af8 1894
4d6ea9c3
DK		 1895 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
1896 seq_printf(seq, "Microcode versions: \n");
1897 seq_printf(seq, " Gigabit (gb) : %s %s\n",
1898 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
1899 seq_printf(seq, " Gigabit Receiver : %s %s\n",
1900 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
1901 seq_printf(seq, "Vendor : %s\n", slic_vendor);
1902 seq_printf(seq, "Product Name : %s\n", slic_product_name);
1903#ifdef MOOKTODO
1904 seq_printf(seq, "VendorId : %4.4X\n",
1905 config->VendorId);
1906 seq_printf(seq, "DeviceId : %4.4X\n",
1907 config->DeviceId);
1908 seq_printf(seq, "RevisionId : %2.2x\n",
1909 config->RevisionId);
1910 seq_printf(seq, "Bus # : %d\n", card->busnumber);
1911 seq_printf(seq, "Device # : %d\n", card->slotnumber);
1912 seq_printf(seq, "Interfaces : %d\n", card->card_size);
1913 seq_printf(seq, " Initialized : %d\n",
1914 card->adapters_activated);
1915 seq_printf(seq, " Allocated : %d\n",
1916 card->adapters_allocated);
4d6ea9c3
DK		 1917 for (i = 0; i < card->card_size; i++) {
1918 seq_printf(seq,
1919 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
1920 i, config->macinfo[i].macaddrA[0],
1921 config->macinfo[i].macaddrA[1],
1922 config->macinfo[i].macaddrA[2],
1923 config->macinfo[i].macaddrA[3],
1924 config->macinfo[i].macaddrA[4],
1925 config->macinfo[i].macaddrA[5]);
4d6f6af8 1926 }
4d6ea9c3
DK		 1927 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
1928 seq_printf(seq, " -------------------------------\n");
1929 for (i = 0; i < card->adapters_allocated; i++) {
1930 struct adapter *adapter;
4d6f6af8 1931
4d6ea9c3
DK		 1932 adapter = card->adapter[i];
1933 if (adapter) {
1934 seq_printf(seq,
1935 " %d %d %s %s %s 0x%X\n",
1936 adapter->physport, adapter->state,
1937 SLIC_LINKSTATE(adapter->linkstate),
1938 SLIC_DUPLEX(adapter->linkduplex),
1939 SLIC_SPEED(adapter->linkspeed),
1940 (uint) adapter->irq);
1941 }
1942 }
1943 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
1944 seq_printf(seq, "RcvQ max entries : %4.4X\n",
1945 SLIC_RCVQ_ENTRIES);
1946 seq_printf(seq, "Ping Status : %8.8X\n",
1947 card->pingstatus);
1948 seq_printf(seq, "Minimum grant : %2.2x\n",
1949 config->MinGrant);
1950 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
1951 seq_printf(seq, "PciStatus : %4.4x\n",
1952 config->Pcistatus);
1953 seq_printf(seq, "Debug Device Id : %4.4x\n",
1954 config->DbgDevId);
1955 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
1956 config->DramRomFn);
1957 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
1958 config->NetIntPin1);
1959 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
1960 config->NetIntPin1);
1961 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
1962 config->NetIntPin1);
1963 seq_printf(seq, "PM capabilities : %4.4X\n",
1964 config->PMECapab);
1965 seq_printf(seq, "Network Clock Controls : %4.4X\n",
1966 config->NwClkCtrls);
4d6f6af8 1967
4d6ea9c3
DK		 1968 switch (config->FruFormat) {
1969 case ATK_FRU_FORMAT:
1970 {
1971 seq_printf(seq,
1972 "Vendor : Alacritech, Inc.\n");
1973 seq_printf(seq,
1974 "Assembly # : %c%c%c%c%c%c\n",
1975 fru[0], fru[1], fru[2], fru[3], fru[4],
1976 fru[5]);
1977 seq_printf(seq,
1978 "Revision # : %c%c\n",
1979 fru[6], fru[7]);
4d6f6af8 1980
4d6ea9c3
DK		 1981 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
1982 seq_printf(seq,
1983 "Serial # : "
1984 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
1985 fru[8], fru[9], fru[10],
1986 fru[11], fru[12], fru[13],
1987 fru[16], fru[17], fru[18],
1988 fru[19], fru[20], fru[21]);
1989 } else {
1990 seq_printf(seq,
1991 "Serial # : "
1992 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
1993 fru[8], fru[9], fru[10],
1994 fru[11], fru[12], fru[13],
1995 fru[14], fru[15], fru[16],
1996 fru[17], fru[18], fru[19],
1997 fru[20], fru[21]);
4d6f6af8 1998 }
4d6ea9c3 1999 break;
4d6f6af8 2000 }
4d6f6af8 2001
4d6ea9c3
DK		 2002 default:
2003 {
2004 seq_printf(seq,
2005 "Vendor : Alacritech, Inc.\n");
2006 seq_printf(seq,
2007 "Serial # : Empty FRU\n");
2008 break;
4d6f6af8
GKH		 2009 }
2010 }
2011
4d6ea9c3
DK		 2012 switch (config->OEMFruFormat) {
2013 case VENDOR1_FRU_FORMAT:
2014 {
2015 seq_printf(seq, "FRU Information:\n");
2016 seq_printf(seq, " Commodity # : %c\n",
2017 oemfru[0]);
2018 seq_printf(seq,
2019 " Assembly # : %c%c%c%c\n",
2020 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
2021 seq_printf(seq,
2022 " Revision # : %c%c\n",
2023 oemfru[5], oemfru[6]);
2024 seq_printf(seq,
2025 " Supplier # : %c%c\n",
2026 oemfru[7], oemfru[8]);
2027 seq_printf(seq,
2028 " Date : %c%c\n",
2029 oemfru[9], oemfru[10]);
2030 seq_sprintf(seq,
2031 " Sequence # : %c%c%c\n",
2032 oemfru[11], oemfru[12], oemfru[13]);
2033 break;
2034 }
4d6f6af8 2035
4d6ea9c3
DK		 2036 case VENDOR2_FRU_FORMAT:
2037 {
2038 seq_printf(seq, "FRU Information:\n");
2039 seq_printf(seq,
2040 " Part # : "
2041 "%c%c%c%c%c%c%c%c\n",
2042 oemfru[0], oemfru[1], oemfru[2],
2043 oemfru[3], oemfru[4], oemfru[5],
2044 oemfru[6], oemfru[7]);
2045 seq_printf(seq,
2046 " Supplier # : %c%c%c%c%c\n",
2047 oemfru[8], oemfru[9], oemfru[10],
2048 oemfru[11], oemfru[12]);
2049 seq_printf(seq,
2050 " Date : %c%c%c\n",
2051 oemfru[13], oemfru[14], oemfru[15]);
2052 seq_sprintf(seq,
2053 " Sequence # : %c%c%c%c\n",
2054 oemfru[16], oemfru[17], oemfru[18],
2055 oemfru[19]);
2056 break;
2057 }
4d6f6af8 2058
4d6ea9c3
DK		 2059 case VENDOR3_FRU_FORMAT:
2060 {
2061 seq_printf(seq, "FRU Information:\n");
4d6f6af8 2062 }
4d6ea9c3
DK		 2063
2064 case VENDOR4_FRU_FORMAT:
2065 {
2066 seq_printf(seq, "FRU Information:\n");
2067 seq_printf(seq,
2068 " FRU Number : "
2069 "%c%c%c%c%c%c%c%c\n",
2070 oemfru[0], oemfru[1], oemfru[2],
2071 oemfru[3], oemfru[4], oemfru[5],
2072 oemfru[6], oemfru[7]);
2073 seq_sprintf(seq,
2074 " Part Number : "
2075 "%c%c%c%c%c%c%c%c\n",
2076 oemfru[8], oemfru[9], oemfru[10],
2077 oemfru[11], oemfru[12], oemfru[13],
2078 oemfru[14], oemfru[15]);
2079 seq_printf(seq,
2080 " EC Level : "
2081 "%c%c%c%c%c%c%c%c\n",
2082 oemfru[16], oemfru[17], oemfru[18],
2083 oemfru[19], oemfru[20], oemfru[21],
2084 oemfru[22], oemfru[23]);
4d6f6af8 2085 break;
4d6ea9c3 2086 }
4d6f6af8 2087
4d6ea9c3
DK		 2088 default:
2089 break;
4d6f6af8 2090 }
4d6ea9c3 2091#endif
4d6f6af8
GKH		 2092
2093 return 0;
2094}
2095
4d6ea9c3 2096static int slic_debug_adapter_show(struct seq_file *seq, void *v)
4d6f6af8 2097{
4d6ea9c3 2098 struct adapter *adapter = seq->private;
9092de6d 2099 struct net_device *netdev = adapter->netdev;
4d6ea9c3 2100
9092de6d 2101 seq_printf(seq, "info: interface : %s\n",
4d6ea9c3 2102 adapter->netdev->name);
4d6ea9c3
DK		 2103 seq_printf(seq, "info: status : %s\n",
2104 SLIC_LINKSTATE(adapter->linkstate));
2105 seq_printf(seq, "info: port : %d\n",
2106 adapter->physport);
2107 seq_printf(seq, "info: speed : %s\n",
2108 SLIC_SPEED(adapter->linkspeed));
2109 seq_printf(seq, "info: duplex : %s\n",
2110 SLIC_DUPLEX(adapter->linkduplex));
2111 seq_printf(seq, "info: irq : 0x%X\n",
2112 (uint) adapter->irq);
2113 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
2114 adapter->card->loadlevel_current);
2115 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
2116 SLIC_RCVQ_ENTRIES);
2117 seq_printf(seq, "info: RcvQ current : %4.4X\n",
2118 adapter->rcvqueue.count);
2119 seq_printf(seq, "rx stats: packets : %8.8lX\n",
9092de6d 2120 netdev->stats.rx_packets);
4d6ea9c3 2121 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
9092de6d 2122 netdev->stats.rx_bytes);
4d6ea9c3
DK		 2123 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
2124 adapter->rcv_broadcasts);
2125 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
2126 adapter->rcv_multicasts);
2127 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
2128 adapter->rcv_unicasts);
2129 seq_printf(seq, "rx stats: errors : %8.8X\n",
2130 (u32) adapter->slic_stats.iface.rcv_errors);
2131 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
2132 (u32) adapter->slic_stats.iface.rcv_discards);
2133 seq_printf(seq, "rx stats: drops : %8.8X\n",
2134 (u32) adapter->rcv_drops);
2135 seq_printf(seq, "tx stats: packets : %8.8lX\n",
9092de6d 2136 netdev->stats.tx_packets);
4d6ea9c3 2137 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
9092de6d 2138 netdev->stats.tx_bytes);
4d6ea9c3
DK		 2139 seq_printf(seq, "tx stats: errors : %8.8X\n",
2140 (u32) adapter->slic_stats.iface.xmt_errors);
2141 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
9092de6d 2142 netdev->stats.multicast);
4d6ea9c3
DK		 2143 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
2144 (u32) adapter->slic_stats.iface.xmit_collisions);
2145 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
2146 adapter->max_isr_rcvs);
2147 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
2148 adapter->rcv_interrupt_yields);
2149 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
2150 adapter->max_isr_xmits);
2151 seq_printf(seq, "perf: error interrupts : %8.8X\n",
2152 adapter->error_interrupts);
2153 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
2154 adapter->error_rmiss_interrupts);
2155 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
2156 adapter->rcv_interrupts);
2157 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
2158 adapter->xmit_interrupts);
2159 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
2160 adapter->linkevent_interrupts);
2161 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
2162 adapter->upr_interrupts);
2163 seq_printf(seq, "perf: interrupt count : %8.8X\n",
2164 adapter->num_isrs);
2165 seq_printf(seq, "perf: false interrupts : %8.8X\n",
2166 adapter->false_interrupts);
2167 seq_printf(seq, "perf: All register writes : %8.8X\n",
2168 adapter->all_reg_writes);
2169 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
2170 adapter->icr_reg_writes);
2171 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
2172 adapter->isr_reg_writes);
2173 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
2174 adapter->if_events.oflow802);
2175 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
2176 adapter->if_events.Tprtoflow);
2177 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
2178 adapter->if_events.uflow802);
2179 seq_printf(seq, "ifevents: receive early : %8.8X\n",
2180 adapter->if_events.rcvearly);
2181 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
2182 adapter->if_events.Bufov);
2183 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
2184 adapter->if_events.Carre);
2185 seq_printf(seq, "ifevents: Long : %8.8X\n",
2186 adapter->if_events.Longe);
2187 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
2188 adapter->if_events.Invp);
2189 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
2190 adapter->if_events.Crc);
2191 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
2192 adapter->if_events.Drbl);
2193 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
2194 adapter->if_events.Code);
2195 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
2196 adapter->if_events.TpCsum);
2197 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
2198 adapter->if_events.TpHlen);
2199 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
2200 adapter->if_events.IpCsum);
2201 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
2202 adapter->if_events.IpLen);
2203 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
2204 adapter->if_events.IpHlen);
4d6f6af8 2205
4d6ea9c3 2206 return 0;
4d6f6af8 2207}
4d6ea9c3 2208static int slic_debug_adapter_open(struct inode *inode, struct file *file)
4d6f6af8 2209{
4d6ea9c3 2210 return single_open(file, slic_debug_adapter_show, inode->i_private);
4d6f6af8
GKH		 2211}
2212
4d6ea9c3 2213static int slic_debug_card_open(struct inode *inode, struct file *file)
4d6f6af8 2214{
4d6ea9c3
DK		 2215 return single_open(file, slic_debug_card_show, inode->i_private);
2216}
4d6f6af8 2217
4d6ea9c3
DK		 2218static const struct file_operations slic_debug_adapter_fops = {
2219 .owner = THIS_MODULE,
2220 .open = slic_debug_adapter_open,
2221 .read = seq_read,
2222 .llseek = seq_lseek,
2223 .release = single_release,
2224};
2225
2226static const struct file_operations slic_debug_card_fops = {
2227 .owner = THIS_MODULE,
2228 .open = slic_debug_card_open,
2229 .read = seq_read,
2230 .llseek = seq_lseek,
2231 .release = single_release,
2232};
4d6f6af8 2233
4d6ea9c3
DK		 2234static void slic_debug_adapter_create(struct adapter *adapter)
2235{
2236 struct dentry *d;
2237 char name[7];
2238 struct sliccard *card = adapter->card;
4d6f6af8 2239
4d6ea9c3
DK		 2240 if (!card->debugfs_dir)
2241 return;
4d6f6af8 2242
4d6ea9c3
DK		 2243 sprintf(name, "port%d", adapter->port);
2244 d = debugfs_create_file(name, S_IRUGO,
2245 card->debugfs_dir, adapter,
2246 &slic_debug_adapter_fops);
2247 if (!d || IS_ERR(d))
2248 pr_info(PFX "%s: debugfs create failed\n", name);
2249 else
2250 adapter->debugfs_entry = d;
2251}
4d6f6af8 2252
4d6ea9c3
DK		 2253static void slic_debug_adapter_destroy(struct adapter *adapter)
2254{
2255 debugfs_remove(adapter->debugfs_entry);
2256 adapter->debugfs_entry = NULL;
4d6f6af8
GKH		 2257}
2258
4d6ea9c3 2259static void slic_debug_card_create(struct sliccard *card)
4d6f6af8 2260{
4d6ea9c3
DK		 2261 struct dentry *d;
2262 char name[IFNAMSIZ];
4d6f6af8 2263
4d6ea9c3
DK		 2264 snprintf(name, sizeof(name), "slic%d", card->cardnum);
2265 d = debugfs_create_dir(name, slic_debugfs);
2266 if (!d || IS_ERR(d))
2267 pr_info(PFX "%s: debugfs create dir failed\n",
2268 name);
2269 else {
2270 card->debugfs_dir = d;
2271 d = debugfs_create_file("cardinfo", S_IRUGO,
2272 slic_debugfs, card,
2273 &slic_debug_card_fops);
2274 if (!d || IS_ERR(d))
2275 pr_info(PFX "%s: debugfs create failed\n",
2276 name);
2277 else
2278 card->debugfs_cardinfo = d;
2279 }
4d6f6af8
GKH		 2280}
2281
4d6ea9c3 2282static void slic_debug_card_destroy(struct sliccard *card)
4d6f6af8 2283{
4d6ea9c3 2284 int i;
4d6f6af8 2285
4d6ea9c3
DK		 2286 for (i = 0; i < card->card_size; i++) {
2287 struct adapter *adapter;
4d6f6af8 2288
4d6ea9c3
DK		 2289 adapter = card->adapter[i];
2290 if (adapter)
2291 slic_debug_adapter_destroy(adapter);
2292 }
2293 if (card->debugfs_cardinfo) {
2294 debugfs_remove(card->debugfs_cardinfo);
2295 card->debugfs_cardinfo = NULL;
2296 }
2297 if (card->debugfs_dir) {
2298 debugfs_remove(card->debugfs_dir);
2299 card->debugfs_dir = NULL;
2300 }
2301}
4d6f6af8 2302
4d6ea9c3
DK		 2303static void slic_debug_init(void)
2304{
2305 struct dentry *ent;
4d6f6af8 2306
4d6ea9c3
DK		 2307 ent = debugfs_create_dir("slic", NULL);
2308 if (!ent || IS_ERR(ent)) {
2309 pr_info(PFX "debugfs create directory failed\n");
2310 return;
2311 }
2312
2313 slic_debugfs = ent;
4d6f6af8
GKH		 2314}
2315
4d6ea9c3 2316static void slic_debug_cleanup(void)
4d6f6af8 2317{
4d6ea9c3
DK		 2318 if (slic_debugfs) {
2319 debugfs_remove(slic_debugfs);
2320 slic_debugfs = NULL;
4d6f6af8 2321 }
4d6ea9c3 2322}
4d6f6af8 2323
4d6ea9c3
DK		 2324/*
2325 * slic_link_event_handler -
2326 *
2327 * Initiate a link configuration sequence. The link configuration begins
2328 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
2329 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
2330 * routine will follow it up witha UP configuration write command, which
2331 * will also complete asynchronously.
2332 *
2333 */
2334static void slic_link_event_handler(struct adapter *adapter)
2335{
2336 int status;
2337 struct slic_shmem *pshmem;
4d6f6af8 2338
4d6ea9c3
DK		 2339 if (adapter->state != ADAPT_UP) {
2340 /* Adapter is not operational. Ignore. */
2341 return;
4d6f6af8
GKH		 2342 }
2343
4d6ea9c3 2344 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8 2345
1033f1f7 2346#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2347 status = slic_upr_request(adapter,
2348 SLIC_UPR_RLSR,
2349 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2350 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2351 0, 0);
1033f1f7 2352#else
4d6ea9c3
DK		 2353 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
2354 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
2355 0, 0, 0);
4d6ea9c3 2356#endif
4d6f6af8
GKH		 2357}
2358
4d6ea9c3 2359static void slic_init_cleanup(struct adapter *adapter)
4d6f6af8 2360{
4d6ea9c3
DK		 2361 if (adapter->intrregistered) {
2362 adapter->intrregistered = 0;
2363 free_irq(adapter->netdev->irq, adapter->netdev);
4d6f6af8 2364
4d6f6af8 2365 }
4d6ea9c3
DK		 2366 if (adapter->pshmem) {
2367 pci_free_consistent(adapter->pcidev,
2368 sizeof(struct slic_shmem),
2369 adapter->pshmem, adapter->phys_shmem);
2370 adapter->pshmem = NULL;
2371 adapter->phys_shmem = (dma_addr_t) NULL;
4d6f6af8 2372 }
4d6ea9c3
DK		 2373
2374 if (adapter->pingtimerset) {
2375 adapter->pingtimerset = 0;
2376 del_timer(&adapter->pingtimer);
4d6f6af8 2377 }
4d6f6af8 2378
4d6ea9c3
DK		 2379 slic_rspqueue_free(adapter);
2380 slic_cmdq_free(adapter);
2381 slic_rcvqueue_free(adapter);
4d6f6af8
GKH		 2382}
2383
4d6ea9c3
DK		 2384/*
2385 * Allocate a mcast_address structure to hold the multicast address.
2386 * Link it in.
2387 */
2388static int slic_mcast_add_list(struct adapter *adapter, char *address)
4d6f6af8 2389{
4d6ea9c3 2390 struct mcast_address *mcaddr, *mlist;
4d6f6af8 2391
4d6ea9c3
DK		 2392 /* Check to see if it already exists */
2393 mlist = adapter->mcastaddrs;
2394 while (mlist) {
2395 if (!compare_ether_addr(mlist->address, address))
2396 return 0;
2397 mlist = mlist->next;
2398 }
e8bc9b7a 2399
4d6ea9c3
DK		 2400 /* Doesn't already exist. Allocate a structure to hold it */
2401 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
2402 if (mcaddr == NULL)
2403 return 1;
a71b9978 2404
4d6ea9c3
DK		 2405 memcpy(mcaddr->address, address, 6);
2406
2407 mcaddr->next = adapter->mcastaddrs;
2408 adapter->mcastaddrs = mcaddr;
4d6f6af8 2409
4d6f6af8
GKH		 2410 return 0;
2411}
2412
4d6ea9c3 2413static void slic_mcast_set_list(struct net_device *dev)
4d6f6af8 2414{
4d6ea9c3
DK		 2415 struct adapter *adapter = netdev_priv(dev);
2416 int status = 0;
2417 char *addresses;
2418 struct netdev_hw_addr *ha;
4d6f6af8 2419
4d6ea9c3
DK		 2420 netdev_for_each_mc_addr(ha, dev) {
2421 addresses = (char *) &ha->addr;
2422 status = slic_mcast_add_list(adapter, addresses);
2423 if (status != 0)
2424 break;
2425 slic_mcast_set_bit(adapter, addresses);
2426 }
2427
2428 if (adapter->devflags_prev != dev->flags) {
2429 adapter->macopts = MAC_DIRECTED;
2430 if (dev->flags) {
2431 if (dev->flags & IFF_BROADCAST)
2432 adapter->macopts |= MAC_BCAST;
2433 if (dev->flags & IFF_PROMISC)
2434 adapter->macopts |= MAC_PROMISC;
2435 if (dev->flags & IFF_ALLMULTI)
2436 adapter->macopts |= MAC_ALLMCAST;
2437 if (dev->flags & IFF_MULTICAST)
2438 adapter->macopts |= MAC_MCAST;
4d6f6af8 2439 }
4d6ea9c3
DK		 2440 adapter->devflags_prev = dev->flags;
2441 slic_config_set(adapter, true);
2442 } else {
2443 if (status == 0)
2444 slic_mcast_set_mask(adapter);
4d6f6af8 2445 }
4d6f6af8
GKH		 2446}
2447
4d6ea9c3
DK		 2448#define XMIT_FAIL_LINK_STATE 1
2449#define XMIT_FAIL_ZERO_LENGTH 2
2450#define XMIT_FAIL_HOSTCMD_FAIL 3
2451
2452static void slic_xmit_build_request(struct adapter *adapter,
2453 struct slic_hostcmd *hcmd, struct sk_buff *skb)
4d6f6af8 2454{
4d6ea9c3
DK		 2455 struct slic_host64_cmd *ihcmd;
2456 ulong phys_addr;
4d6f6af8 2457
4d6ea9c3
DK		 2458 ihcmd = &hcmd->cmd64;
2459
2460 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
2461 ihcmd->command = IHCMD_XMT_REQ;
2462 ihcmd->u.slic_buffers.totlen = skb->len;
2463 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
2464 PCI_DMA_TODEVICE);
2465 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
2466 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
2467 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1033f1f7 2468#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2469 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
2470 (u64) hcmd) + 31) >> 5);
1033f1f7 2471#else
4d6ea9c3
DK		 2472 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
2473 (u32) hcmd) + 31) >> 5);
4d6ea9c3 2474#endif
4d6f6af8
GKH		 2475}
2476
4d6ea9c3
DK		 2477static void slic_xmit_fail(struct adapter *adapter,
2478 struct sk_buff *skb,
2479 void *cmd, u32 skbtype, u32 status)
4d6f6af8 2480{
4d6ea9c3
DK		 2481 if (adapter->xmitq_full)
2482 netif_stop_queue(adapter->netdev);
2483 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
2484 switch (status) {
2485 case XMIT_FAIL_LINK_STATE:
2486 dev_err(&adapter->netdev->dev,
2487 "reject xmit skb[%p: %x] linkstate[%s] "
2488 "adapter[%s:%d] card[%s:%d]\n",
2489 skb, skb->pkt_type,
2490 SLIC_LINKSTATE(adapter->linkstate),
2491 SLIC_ADAPTER_STATE(adapter->state),
2492 adapter->state,
2493 SLIC_CARD_STATE(adapter->card->state),
2494 adapter->card->state);
2495 break;
2496 case XMIT_FAIL_ZERO_LENGTH:
2497 dev_err(&adapter->netdev->dev,
2498 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
2499 skb, skb->pkt_type);
2500 break;
2501 case XMIT_FAIL_HOSTCMD_FAIL:
2502 dev_err(&adapter->netdev->dev,
2503 "xmit_start skb[%p] type[%x] No host commands "
2504 "available\n", skb, skb->pkt_type);
2505 break;
4d6ea9c3
DK		 2506 }
2507 }
2508 dev_kfree_skb(skb);
9092de6d 2509 adapter->netdev->stats.tx_dropped++;
4d6ea9c3 2510}
e8bc9b7a 2511
4d6ea9c3
DK		 2512static void slic_rcv_handle_error(struct adapter *adapter,
2513 struct slic_rcvbuf *rcvbuf)
2514{
2515 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
9092de6d 2516 struct net_device *netdev = adapter->netdev;
4d6f6af8 2517
4d6ea9c3
DK		 2518 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
2519 if (hdr->frame_status14 & VRHSTAT_802OE)
2520 adapter->if_events.oflow802++;
2521 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
2522 adapter->if_events.Tprtoflow++;
2523 if (hdr->frame_status_b14 & VRHSTATB_802UE)
2524 adapter->if_events.uflow802++;
2525 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
2526 adapter->if_events.rcvearly++;
9092de6d 2527 netdev->stats.rx_fifo_errors++;
4d6ea9c3
DK		 2528 }
2529 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
2530 adapter->if_events.Bufov++;
9092de6d 2531 netdev->stats.rx_over_errors++;
4d6ea9c3
DK		 2532 }
2533 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
2534 adapter->if_events.Carre++;
9092de6d 2535 netdev->stats.tx_carrier_errors++;
4d6ea9c3
DK		 2536 }
2537 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
2538 adapter->if_events.Longe++;
2539 if (hdr->frame_status_b14 & VRHSTATB_PREA)
2540 adapter->if_events.Invp++;
2541 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
2542 adapter->if_events.Crc++;
9092de6d 2543 netdev->stats.rx_crc_errors++;
4d6ea9c3
DK		 2544 }
2545 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
2546 adapter->if_events.Drbl++;
2547 if (hdr->frame_status_b14 & VRHSTATB_CODE)
2548 adapter->if_events.Code++;
2549 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
2550 adapter->if_events.TpCsum++;
2551 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
2552 adapter->if_events.TpHlen++;
2553 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
2554 adapter->if_events.IpCsum++;
2555 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
2556 adapter->if_events.IpLen++;
2557 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
2558 adapter->if_events.IpHlen++;
4d6f6af8 2559 } else {
4d6ea9c3
DK		 2560 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
2561 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
2562
2563 if (xerr == VGBSTAT_XCSERR)
2564 adapter->if_events.TpCsum++;
2565 if (xerr == VGBSTAT_XUFLOW)
2566 adapter->if_events.Tprtoflow++;
2567 if (xerr == VGBSTAT_XHLEN)
2568 adapter->if_events.TpHlen++;
2569 }
2570 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
2571 u32 nerr =
2572 (hdr->
2573 frame_statusGB >> VGBSTAT_NERRSHFT) &
2574 VGBSTAT_NERRMSK;
2575 if (nerr == VGBSTAT_NCSERR)
2576 adapter->if_events.IpCsum++;
2577 if (nerr == VGBSTAT_NUFLOW)
2578 adapter->if_events.IpLen++;
2579 if (nerr == VGBSTAT_NHLEN)
2580 adapter->if_events.IpHlen++;
2581 }
2582 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
2583 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
2584
2585 if (lerr == VGBSTAT_LDEARLY)
2586 adapter->if_events.rcvearly++;
2587 if (lerr == VGBSTAT_LBOFLO)
2588 adapter->if_events.Bufov++;
2589 if (lerr == VGBSTAT_LCODERR)
2590 adapter->if_events.Code++;
2591 if (lerr == VGBSTAT_LDBLNBL)
2592 adapter->if_events.Drbl++;
2593 if (lerr == VGBSTAT_LCRCERR)
2594 adapter->if_events.Crc++;
2595 if (lerr == VGBSTAT_LOFLO)
2596 adapter->if_events.oflow802++;
2597 if (lerr == VGBSTAT_LUFLO)
2598 adapter->if_events.uflow802++;
2599 }
4d6f6af8 2600 }
4d6ea9c3 2601 return;
4d6f6af8
GKH		 2602}
2603
4d6ea9c3
DK		 2604#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
2605#define M_FAST_PATH 0x0040
4d6f6af8 2606
4d6ea9c3 2607static void slic_rcv_handler(struct adapter *adapter)
4d6f6af8 2608{
9092de6d 2609 struct net_device *netdev = adapter->netdev;
4d6ea9c3
DK		 2610 struct sk_buff *skb;
2611 struct slic_rcvbuf *rcvbuf;
2612 u32 frames = 0;
4d6f6af8 2613
4d6ea9c3
DK		 2614 while ((skb = slic_rcvqueue_getnext(adapter))) {
2615 u32 rx_bytes;
4d6f6af8 2616
4d6ea9c3
DK		 2617 rcvbuf = (struct slic_rcvbuf *)skb->head;
2618 adapter->card->events++;
2619 if (rcvbuf->status & IRHDDR_ERR) {
2620 adapter->rx_errors++;
2621 slic_rcv_handle_error(adapter, rcvbuf);
2622 slic_rcvqueue_reinsert(adapter, skb);
2623 continue;
2624 }
4d6f6af8 2625
4d6ea9c3
DK		 2626 if (!slic_mac_filter(adapter, (struct ether_header *)
2627 rcvbuf->data)) {
2628 slic_rcvqueue_reinsert(adapter, skb);
2629 continue;
2630 }
2631 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2632 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2633 skb_put(skb, rx_bytes);
9092de6d
DK		 2634 netdev->stats.rx_packets++;
2635 netdev->stats.rx_bytes += rx_bytes;
4d6ea9c3
DK		 2636#if SLIC_OFFLOAD_IP_CHECKSUM
2637 skb->ip_summed = CHECKSUM_UNNECESSARY;
2638#endif
4d6f6af8 2639
4d6ea9c3
DK		 2640 skb->dev = adapter->netdev;
2641 skb->protocol = eth_type_trans(skb, skb->dev);
2642 netif_rx(skb);
4d6f6af8 2643
4d6ea9c3
DK		 2644 ++frames;
2645#if SLIC_INTERRUPT_PROCESS_LIMIT
2646 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2647 adapter->rcv_interrupt_yields++;
4d6f6af8
GKH		 2648 break;
2649 }
4d6ea9c3 2650#endif
4d6f6af8 2651 }
4d6ea9c3 2652 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
4d6f6af8
GKH		 2653}
2654
4d6ea9c3 2655static void slic_xmit_complete(struct adapter *adapter)
4d6f6af8 2656{
4d6ea9c3
DK		 2657 struct slic_hostcmd *hcmd;
2658 struct slic_rspbuf *rspbuf;
2659 u32 frames = 0;
2660 struct slic_handle_word slic_handle_word;
4d6f6af8 2661
4d6ea9c3
DK		 2662 do {
2663 rspbuf = slic_rspqueue_getnext(adapter);
2664 if (!rspbuf)
2665 break;
2666 adapter->xmit_completes++;
2667 adapter->card->events++;
2668 /*
2669 Get the complete host command buffer
2670 */
2671 slic_handle_word.handle_token = rspbuf->hosthandle;
4d6ea9c3
DK		 2672 hcmd =
2673 (struct slic_hostcmd *)
2674 adapter->slic_handles[slic_handle_word.handle_index].
2675 address;
2676/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
4d6ea9c3
DK		 2677 if (hcmd->type == SLIC_CMD_DUMB) {
2678 if (hcmd->skb)
2679 dev_kfree_skb_irq(hcmd->skb);
2680 slic_cmdq_putdone_irq(adapter, hcmd);
4d6f6af8 2681 }
4d6ea9c3
DK		 2682 rspbuf->status = 0;
2683 rspbuf->hosthandle = 0;
2684 frames++;
2685 } while (1);
2686 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
4d6f6af8
GKH		 2687}
2688
4d6ea9c3 2689static irqreturn_t slic_interrupt(int irq, void *dev_id)
4d6f6af8 2690{
4d6ea9c3
DK		 2691 struct net_device *dev = (struct net_device *)dev_id;
2692 struct adapter *adapter = netdev_priv(dev);
2693 u32 isr;
4d6f6af8 2694
4d6ea9c3
DK		 2695 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2696 slic_reg32_write(&adapter->slic_regs->slic_icr,
2697 ICR_INT_MASK, FLUSH);
2698 isr = adapter->isrcopy = adapter->pshmem->isr;
2699 adapter->pshmem->isr = 0;
2700 adapter->num_isrs++;
2701 switch (adapter->card->state) {
2702 case CARD_UP:
2703 if (isr & ~ISR_IO) {
2704 if (isr & ISR_ERR) {
2705 adapter->error_interrupts++;
2706 if (isr & ISR_RMISS) {
2707 int count;
2708 int pre_count;
2709 int errors;
4d6f6af8 2710
4d6ea9c3
DK		 2711 struct slic_rcvqueue *rcvq =
2712 &adapter->rcvqueue;
4d6f6af8 2713
4d6ea9c3
DK		 2714 adapter->
2715 error_rmiss_interrupts++;
2716 if (!rcvq->errors)
2717 rcv_count = rcvq->count;
2718 pre_count = rcvq->count;
2719 errors = rcvq->errors;
4d6f6af8 2720
4d6ea9c3
DK		 2721 while (rcvq->count <
2722 SLIC_RCVQ_FILLTHRESH) {
2723 count =
2724 slic_rcvqueue_fill
2725 (adapter);
2726 if (!count)
2727 break;
2728 }
2729 } else if (isr & ISR_XDROP) {
2730 dev_err(&dev->dev,
2731 "isr & ISR_ERR [%x] "
2732 "ISR_XDROP \n", isr);
2733 } else {
2734 dev_err(&dev->dev,
2735 "isr & ISR_ERR [%x]\n",
2736 isr);
2737 }
2738 }
e8bc9b7a 2739
4d6ea9c3
DK		 2740 if (isr & ISR_LEVENT) {
2741 adapter->linkevent_interrupts++;
2742 slic_link_event_handler(adapter);
2743 }
4d6f6af8 2744
4d6ea9c3
DK		 2745 if ((isr & ISR_UPC) ||
2746 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2747 adapter->upr_interrupts++;
2748 slic_upr_request_complete(adapter, isr);
2749 }
2750 }
4d6f6af8 2751
4d6ea9c3
DK		 2752 if (isr & ISR_RCV) {
2753 adapter->rcv_interrupts++;
2754 slic_rcv_handler(adapter);
2755 }
4d6f6af8 2756
4d6ea9c3
DK		 2757 if (isr & ISR_CMD) {
2758 adapter->xmit_interrupts++;
2759 slic_xmit_complete(adapter);
2760 }
2761 break;
4d6f6af8 2762
4d6ea9c3
DK		 2763 case CARD_DOWN:
2764 if ((isr & ISR_UPC) ||
2765 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2766 adapter->upr_interrupts++;
2767 slic_upr_request_complete(adapter, isr);
2768 }
2769 break;
4d6ea9c3 2770 }
4d6f6af8 2771
4d6ea9c3
DK		 2772 adapter->isrcopy = 0;
2773 adapter->all_reg_writes += 2;
2774 adapter->isr_reg_writes++;
2775 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2776 } else {
2777 adapter->false_interrupts++;
4d6f6af8 2778 }
4d6ea9c3 2779 return IRQ_HANDLED;
4d6f6af8
GKH		 2780}
2781
4d6ea9c3 2782#define NORMAL_ETHFRAME 0
4d6f6af8 2783
4d6ea9c3
DK		 2784static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2785{
2786 struct sliccard *card;
2787 struct adapter *adapter = netdev_priv(dev);
2788 struct slic_hostcmd *hcmd = NULL;
2789 u32 status = 0;
2790 u32 skbtype = NORMAL_ETHFRAME;
2791 void *offloadcmd = NULL;
4d6f6af8 2792
4d6ea9c3 2793 card = adapter->card;
4d6ea9c3
DK		 2794 if ((adapter->linkstate != LINK_UP) ||
2795 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2796 status = XMIT_FAIL_LINK_STATE;
2797 goto xmit_fail;
4d6f6af8 2798
4d6ea9c3
DK		 2799 } else if (skb->len == 0) {
2800 status = XMIT_FAIL_ZERO_LENGTH;
2801 goto xmit_fail;
4d6f6af8
GKH		 2802 }
2803
4d6ea9c3
DK		 2804 if (skbtype == NORMAL_ETHFRAME) {
2805 hcmd = slic_cmdq_getfree(adapter);
2806 if (!hcmd) {
2807 adapter->xmitq_full = 1;
2808 status = XMIT_FAIL_HOSTCMD_FAIL;
2809 goto xmit_fail;
2810 }
4d6ea9c3
DK		 2811 hcmd->skb = skb;
2812 hcmd->busy = 1;
2813 hcmd->type = SLIC_CMD_DUMB;
2814 if (skbtype == NORMAL_ETHFRAME)
2815 slic_xmit_build_request(adapter, hcmd, skb);
2816 }
9092de6d
DK		 2817 dev->stats.tx_packets++;
2818 dev->stats.tx_bytes += skb->len;
4d6f6af8 2819
4d6ea9c3
DK		 2820#ifdef DEBUG_DUMP
2821 if (adapter->kill_card) {
2822 struct slic_host64_cmd ihcmd;
4d6f6af8 2823
4d6ea9c3
DK		 2824 ihcmd = &hcmd->cmd64;
2825
2826 ihcmd->flags |= 0x40;
2827 adapter->kill_card = 0; /* only do this once */
4d6f6af8 2828 }
4d6ea9c3
DK		 2829#endif
2830 if (hcmd->paddrh == 0) {
2831 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2832 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2833 } else {
2834 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2835 (hcmd->paddrl | hcmd->cmdsize),
2836 &adapter->slic_regs->slic_addr_upper,
2837 hcmd->paddrh, DONT_FLUSH);
2838 }
2839xmit_done:
2840 return NETDEV_TX_OK;
2841xmit_fail:
2842 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
2843 goto xmit_done;
4d6f6af8
GKH		 2844}
2845
4d6ea9c3
DK		 2846
2847static void slic_adapter_freeresources(struct adapter *adapter)
4d6f6af8 2848{
4d6ea9c3 2849 slic_init_cleanup(adapter);
4d6ea9c3
DK		 2850 adapter->error_interrupts = 0;
2851 adapter->rcv_interrupts = 0;
2852 adapter->xmit_interrupts = 0;
2853 adapter->linkevent_interrupts = 0;
2854 adapter->upr_interrupts = 0;
2855 adapter->num_isrs = 0;
2856 adapter->xmit_completes = 0;
2857 adapter->rcv_broadcasts = 0;
2858 adapter->rcv_multicasts = 0;
2859 adapter->rcv_unicasts = 0;
2860}
4d6f6af8 2861
4d6ea9c3
DK		 2862static int slic_adapter_allocresources(struct adapter *adapter)
2863{
2864 if (!adapter->intrregistered) {
2865 int retval;
4d6f6af8 2866
4d6ea9c3
DK		 2867 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2868 slic_global.driver_lock.flags);
4d6f6af8 2869
4d6ea9c3
DK		 2870 retval = request_irq(adapter->netdev->irq,
2871 &slic_interrupt,
2872 IRQF_SHARED,
2873 adapter->netdev->name, adapter->netdev);
4d6f6af8 2874
4d6ea9c3
DK		 2875 spin_lock_irqsave(&slic_global.driver_lock.lock,
2876 slic_global.driver_lock.flags);
2877
2878 if (retval) {
2879 dev_err(&adapter->netdev->dev,
2880 "request_irq (%s) FAILED [%x]\n",
2881 adapter->netdev->name, retval);
2882 return retval;
4d6f6af8 2883 }
4d6ea9c3 2884 adapter->intrregistered = 1;
4d6f6af8 2885 }
d1939786 2886 return 0;
4d6f6af8
GKH		 2887}
2888
4d6ea9c3
DK		 2889/*
2890 * slic_if_init
2891 *
2892 * Perform initialization of our slic interface.
2893 *
2894 */
2895static int slic_if_init(struct adapter *adapter)
4d6f6af8 2896{
4d6ea9c3
DK		 2897 struct sliccard *card = adapter->card;
2898 struct net_device *dev = adapter->netdev;
2899 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2900 struct slic_shmem *pshmem;
2901 int rc;
4d6f6af8 2902
4d6ea9c3
DK		 2903 /* adapter should be down at this point */
2904 if (adapter->state != ADAPT_DOWN) {
2905 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2906 __func__);
2907 rc = -EIO;
2908 goto err;
4d6f6af8 2909 }
4d6f6af8 2910
4d6ea9c3
DK		 2911 adapter->devflags_prev = dev->flags;
2912 adapter->macopts = MAC_DIRECTED;
2913 if (dev->flags) {
2914 if (dev->flags & IFF_BROADCAST)
2915 adapter->macopts |= MAC_BCAST;
2916 if (dev->flags & IFF_PROMISC)
2917 adapter->macopts |= MAC_PROMISC;
2918 if (dev->flags & IFF_ALLMULTI)
2919 adapter->macopts |= MAC_ALLMCAST;
2920 if (dev->flags & IFF_MULTICAST)
2921 adapter->macopts |= MAC_MCAST;
2922 }
2923 rc = slic_adapter_allocresources(adapter);
2924 if (rc) {
2925 dev_err(&dev->dev,
2926 "%s: slic_adapter_allocresources FAILED %x\n",
2927 __func__, rc);
2928 slic_adapter_freeresources(adapter);
2929 goto err;
2930 }
4d6f6af8 2931
4d6ea9c3 2932 if (!adapter->queues_initialized) {
83682cd2
CJB		 2933 rc = slic_rspqueue_init(adapter);
2934 if (rc)
4d6ea9c3 2935 goto err;
83682cd2
CJB		 2936 rc = slic_cmdq_init(adapter);
2937 if (rc)
4d6ea9c3 2938 goto err;
83682cd2
CJB		 2939 rc = slic_rcvqueue_init(adapter);
2940 if (rc)
4d6ea9c3
DK		 2941 goto err;
2942 adapter->queues_initialized = 1;
2943 }
4d6f6af8 2944
4d6ea9c3
DK		 2945 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2946 mdelay(1);
2947
2948 if (!adapter->isp_initialized) {
2949 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2950
2951 spin_lock_irqsave(&adapter->bit64reglock.lock,
2952 adapter->bit64reglock.flags);
2953
1033f1f7 2954#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2955 slic_reg32_write(&slic_regs->slic_addr_upper,
2956 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2957 slic_reg32_write(&slic_regs->slic_isp,
2958 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1033f1f7 2959#else
4d6ea9c3
DK		 2960 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2961 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
4d6f6af8 2962#endif
4d6ea9c3
DK		 2963 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2964 adapter->bit64reglock.flags);
2965 adapter->isp_initialized = 1;
4d6f6af8 2966 }
4d6f6af8 2967
4d6ea9c3
DK		 2968 adapter->state = ADAPT_UP;
2969 if (!card->loadtimerset) {
2970 init_timer(&card->loadtimer);
2971 card->loadtimer.expires =
2972 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2973 card->loadtimer.data = (ulong) card;
2974 card->loadtimer.function = &slic_timer_load_check;
2975 add_timer(&card->loadtimer);
2976
2977 card->loadtimerset = 1;
2978 }
2979
2980 if (!adapter->pingtimerset) {
2981 init_timer(&adapter->pingtimer);
2982 adapter->pingtimer.expires =
2983 jiffies + (PING_TIMER_INTERVAL * HZ);
2984 adapter->pingtimer.data = (ulong) dev;
2985 adapter->pingtimer.function = &slic_timer_ping;
2986 add_timer(&adapter->pingtimer);
2987 adapter->pingtimerset = 1;
2988 adapter->card->pingstatus = ISR_PINGMASK;
2989 }
2990
2991 /*
2992 * clear any pending events, then enable interrupts
2993 */
2994 adapter->isrcopy = 0;
2995 adapter->pshmem->isr = 0;
2996 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2997 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2998
2999 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
3000 slic_link_event_handler(adapter);
4d6f6af8 3001
4d6ea9c3
DK		 3002err:
3003 return rc;
4d6f6af8
GKH		 3004}
3005
4d6ea9c3 3006static int slic_entry_open(struct net_device *dev)
4d6f6af8 3007{
4d6ea9c3
DK		 3008 struct adapter *adapter = netdev_priv(dev);
3009 struct sliccard *card = adapter->card;
4d6ea9c3 3010 int status;
4d6f6af8 3011
4d6ea9c3 3012 netif_stop_queue(adapter->netdev);
4d6f6af8 3013
4d6ea9c3
DK		 3014 spin_lock_irqsave(&slic_global.driver_lock.lock,
3015 slic_global.driver_lock.flags);
4d6ea9c3
DK		 3016 if (!adapter->activated) {
3017 card->adapters_activated++;
3018 slic_global.num_slic_ports_active++;
3019 adapter->activated = 1;
3020 }
3021 status = slic_if_init(adapter);
4d6f6af8 3022
4d6ea9c3
DK		 3023 if (status != 0) {
3024 if (adapter->activated) {
3025 card->adapters_activated--;
3026 slic_global.num_slic_ports_active--;
3027 adapter->activated = 0;
4d6f6af8 3028 }
71329965 3029 goto spin_unlock;
4d6ea9c3
DK		 3030 }
3031 if (!card->master)
3032 card->master = adapter;
3033
71329965
DN		 3034spin_unlock:
3035 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3036 slic_global.driver_lock.flags);
3037 return status;
4d6f6af8
GKH		 3038}
3039
4d6ea9c3 3040static void slic_card_cleanup(struct sliccard *card)
4d6f6af8 3041{
4d6ea9c3
DK		 3042 if (card->loadtimerset) {
3043 card->loadtimerset = 0;
3044 del_timer(&card->loadtimer);
3045 }
4d6f6af8 3046
4d6ea9c3 3047 slic_debug_card_destroy(card);
4d6f6af8 3048
4d6ea9c3 3049 kfree(card);
4d6f6af8
GKH		 3050}
3051
ecb4f387 3052static void slic_entry_remove(struct pci_dev *pcidev)
4d6f6af8 3053{
4d6ea9c3
DK		 3054 struct net_device *dev = pci_get_drvdata(pcidev);
3055 u32 mmio_start = 0;
3056 uint mmio_len = 0;
3057 struct adapter *adapter = netdev_priv(dev);
3058 struct sliccard *card;
3059 struct mcast_address *mcaddr, *mlist;
4d6f6af8 3060
4d6ea9c3
DK		 3061 slic_adapter_freeresources(adapter);
3062 slic_unmap_mmio_space(adapter);
3063 unregister_netdev(dev);
3064
3065 mmio_start = pci_resource_start(pcidev, 0);
3066 mmio_len = pci_resource_len(pcidev, 0);
3067
3068 release_mem_region(mmio_start, mmio_len);
3069
3070 iounmap((void __iomem *)dev->base_addr);
3071 /* free multicast addresses */
3072 mlist = adapter->mcastaddrs;
3073 while (mlist) {
3074 mcaddr = mlist;
3075 mlist = mlist->next;
3076 kfree(mcaddr);
4d6f6af8 3077 }
4d6ea9c3 3078 card = adapter->card;
4d6ea9c3
DK		 3079 card->adapters_allocated--;
3080 adapter->allocated = 0;
3081 if (!card->adapters_allocated) {
3082 struct sliccard *curr_card = slic_global.slic_card;
3083 if (curr_card == card) {
3084 slic_global.slic_card = card->next;
3085 } else {
3086 while (curr_card->next != card)
3087 curr_card = curr_card->next;
4d6ea9c3
DK		 3088 curr_card->next = card->next;
3089 }
4d6ea9c3
DK		 3090 slic_global.num_slic_cards--;
3091 slic_card_cleanup(card);
4d6f6af8 3092 }
20caa14c 3093 free_netdev(dev);
4d6ea9c3 3094 pci_release_regions(pcidev);
d99b5ac6 3095 pci_disable_device(pcidev);
4d6f6af8
GKH		 3096}
3097
4d6ea9c3 3098static int slic_entry_halt(struct net_device *dev)
4d6f6af8 3099{
4d6ea9c3
DK		 3100 struct adapter *adapter = netdev_priv(dev);
3101 struct sliccard *card = adapter->card;
3102 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 3103
4d6ea9c3
DK		 3104 spin_lock_irqsave(&slic_global.driver_lock.lock,
3105 slic_global.driver_lock.flags);
4d6ea9c3
DK		 3106 netif_stop_queue(adapter->netdev);
3107 adapter->state = ADAPT_DOWN;
3108 adapter->linkstate = LINK_DOWN;
3109 adapter->upr_list = NULL;
3110 adapter->upr_busy = 0;
3111 adapter->devflags_prev = 0;
4d6ea9c3
DK		 3112 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3113 adapter->all_reg_writes++;
3114 adapter->icr_reg_writes++;
3115 slic_config_clear(adapter);
3116 if (adapter->activated) {
3117 card->adapters_activated--;
3118 slic_global.num_slic_ports_active--;
3119 adapter->activated = 0;
3120 }
3121#ifdef AUTOMATIC_RESET
3122 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
3123#endif
3124 /*
3125 * Reset the adapter's cmd queues
3126 */
3127 slic_cmdq_reset(adapter);
4d6f6af8 3128
4d6ea9c3
DK		 3129#ifdef AUTOMATIC_RESET
3130 if (!card->adapters_activated)
3131 slic_card_init(card, adapter);
3132#endif
4d6f6af8 3133
4d6ea9c3
DK		 3134 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
3135 slic_global.driver_lock.flags);
3136 return 0;
3137}
4d6f6af8 3138
4d6ea9c3
DK		 3139static struct net_device_stats *slic_get_stats(struct net_device *dev)
3140{
3141 struct adapter *adapter = netdev_priv(dev);
4d6f6af8 3142
4d6ea9c3
DK		 3143 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
3144 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
3145 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
3146 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
3147 dev->stats.tx_heartbeat_errors = 0;
3148 dev->stats.tx_aborted_errors = 0;
3149 dev->stats.tx_window_errors = 0;
3150 dev->stats.tx_fifo_errors = 0;
3151 dev->stats.rx_frame_errors = 0;
3152 dev->stats.rx_length_errors = 0;
3153
3154 return &dev->stats;
4d6f6af8
GKH		 3155}
3156
4d6ea9c3 3157static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4d6f6af8 3158{
4d6ea9c3
DK		 3159 struct adapter *adapter = netdev_priv(dev);
3160 struct ethtool_cmd edata;
3161 struct ethtool_cmd ecmd;
3162 u32 data[7];
3163 u32 intagg;
4d6f6af8 3164
4d6ea9c3
DK		 3165 switch (cmd) {
3166 case SIOCSLICSETINTAGG:
3167 if (copy_from_user(data, rq->ifr_data, 28))
3168 return -EFAULT;
3169 intagg = data[0];
3170 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
3171 __func__, intagg);
3172 slic_intagg_set(adapter, intagg);
3173 return 0;
4d6f6af8 3174
4d6ea9c3
DK		 3175#ifdef SLIC_TRACE_DUMP_ENABLED
3176 case SIOCSLICTRACEDUMP:
3177 {
3178 u32 value;
3179 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
3180
3181 if (copy_from_user(data, rq->ifr_data, 28)) {
3182 PRINT_ERROR
3183 ("slic: copy_from_user FAILED getting initial simba param\n");
3184 return -EFAULT;
3185 }
3186
3187 value = data[0];
3188 if (tracemon_request == SLIC_DUMP_DONE) {
3189 PRINT_ERROR
3190 ("ATK Diagnostic Trace Dump Requested\n");
3191 tracemon_request = SLIC_DUMP_REQUESTED;
3192 tracemon_request_type = value;
3193 tracemon_timestamp = jiffies;
3194 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
3195 (tracemon_request ==
3196 SLIC_DUMP_IN_PROGRESS)) {
3197 PRINT_ERROR
3198 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
3199 } else {
3200 PRINT_ERROR
3201 ("ATK Diagnostic Trace Dump Requested\n");
3202 tracemon_request = SLIC_DUMP_REQUESTED;
3203 tracemon_request_type = value;
3204 tracemon_timestamp = jiffies;
4d6f6af8 3205 }
4d6ea9c3 3206 return 0;
4d6f6af8 3207 }
4d6ea9c3
DK		 3208#endif
3209 case SIOCETHTOOL:
4d6ea9c3
DK		 3210 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
3211 return -EFAULT;
4d6f6af8 3212
4d6ea9c3
DK		 3213 if (ecmd.cmd == ETHTOOL_GSET) {
3214 edata.supported = (SUPPORTED_10baseT_Half |
3215 SUPPORTED_10baseT_Full |
3216 SUPPORTED_100baseT_Half |
3217 SUPPORTED_100baseT_Full |
3218 SUPPORTED_Autoneg | SUPPORTED_MII);
3219 edata.port = PORT_MII;
3220 edata.transceiver = XCVR_INTERNAL;
3221 edata.phy_address = 0;
3222 if (adapter->linkspeed == LINK_100MB)
3223 edata.speed = SPEED_100;
3224 else if (adapter->linkspeed == LINK_10MB)
3225 edata.speed = SPEED_10;
3226 else
3227 edata.speed = 0;
4d6f6af8 3228
4d6ea9c3
DK		 3229 if (adapter->linkduplex == LINK_FULLD)
3230 edata.duplex = DUPLEX_FULL;
3231 else
3232 edata.duplex = DUPLEX_HALF;
4d6f6af8 3233
4d6ea9c3
DK		 3234 edata.autoneg = AUTONEG_ENABLE;
3235 edata.maxtxpkt = 1;
3236 edata.maxrxpkt = 1;
3237 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
3238 return -EFAULT;
4d6f6af8 3239
4d6ea9c3
DK		 3240 } else if (ecmd.cmd == ETHTOOL_SSET) {
3241 if (!capable(CAP_NET_ADMIN))
3242 return -EPERM;
4d6f6af8 3243
4d6ea9c3
DK		 3244 if (adapter->linkspeed == LINK_100MB)
3245 edata.speed = SPEED_100;
3246 else if (adapter->linkspeed == LINK_10MB)
3247 edata.speed = SPEED_10;
3248 else
3249 edata.speed = 0;
3250
3251 if (adapter->linkduplex == LINK_FULLD)
3252 edata.duplex = DUPLEX_FULL;
3253 else
3254 edata.duplex = DUPLEX_HALF;
3255
3256 edata.autoneg = AUTONEG_ENABLE;
3257 edata.maxtxpkt = 1;
3258 edata.maxrxpkt = 1;
3259 if ((ecmd.speed != edata.speed) ||
3260 (ecmd.duplex != edata.duplex)) {
3261 u32 speed;
3262 u32 duplex;
3263
3264 if (ecmd.speed == SPEED_10)
3265 speed = 0;
3266 else
3267 speed = PCR_SPEED_100;
3268 if (ecmd.duplex == DUPLEX_FULL)
3269 duplex = PCR_DUPLEX_FULL;
3270 else
3271 duplex = 0;
3272 slic_link_config(adapter, speed, duplex);
3273 slic_link_event_handler(adapter);
3274 }
3275 }
3276 return 0;
3277 default:
3278 return -EOPNOTSUPP;
3279 }
4d6f6af8
GKH		 3280}
3281
4d6ea9c3 3282static void slic_config_pci(struct pci_dev *pcidev)
4d6f6af8 3283{
4d6ea9c3
DK		 3284 u16 pci_command;
3285 u16 new_command;
4d6f6af8 3286
4d6ea9c3
DK		 3287 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
3288
3289 new_command = pci_command | PCI_COMMAND_MASTER
3290 | PCI_COMMAND_MEMORY
3291 | PCI_COMMAND_INVALIDATE
3292 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
3293 if (pci_command != new_command)
3294 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
4d6f6af8
GKH		 3295}
3296
4d6ea9c3 3297static int slic_card_init(struct sliccard *card, struct adapter *adapter)
4d6f6af8 3298{
4d6ea9c3
DK		 3299 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3300 struct slic_eeprom *peeprom;
3301 struct oslic_eeprom *pOeeprom;
3302 dma_addr_t phys_config;
3303 u32 phys_configh;
3304 u32 phys_configl;
3305 u32 i = 0;
3306 struct slic_shmem *pshmem;
3307 int status;
3308 uint macaddrs = card->card_size;
3309 ushort eecodesize;
3310 ushort dramsize;
3311 ushort ee_chksum;
3312 ushort calc_chksum;
3313 struct slic_config_mac *pmac;
3314 unsigned char fruformat;
3315 unsigned char oemfruformat;
3316 struct atk_fru *patkfru;
3317 union oemfru *poemfru;
4d6f6af8 3318
4d6ea9c3
DK		 3319 /* Reset everything except PCI configuration space */
3320 slic_soft_reset(adapter);
3321
3322 /* Download the microcode */
3323 status = slic_card_download(adapter);
3324
3325 if (status != 0) {
3326 dev_err(&adapter->pcidev->dev,
3327 "download failed bus %d slot %d\n",
3328 adapter->busnumber, adapter->slotnumber);
3329 return status;
4d6f6af8 3330 }
4d6f6af8 3331
4d6ea9c3
DK		 3332 if (!card->config_set) {
3333 peeprom = pci_alloc_consistent(adapter->pcidev,
3334 sizeof(struct slic_eeprom),
3335 &phys_config);
4d6f6af8 3336
4d6ea9c3
DK		 3337 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
3338 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
4d6f6af8 3339
4d6ea9c3
DK		 3340 if (!peeprom) {
3341 dev_err(&adapter->pcidev->dev,
3342 "eeprom read failed to get memory "
3343 "bus %d slot %d\n", adapter->busnumber,
3344 adapter->slotnumber);
3345 return -ENOMEM;
4d6f6af8 3346 } else {
4d6ea9c3 3347 memset(peeprom, 0, sizeof(struct slic_eeprom));
4d6f6af8 3348 }
4d6ea9c3
DK		 3349 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
3350 mdelay(1);
3351 pshmem = (struct slic_shmem *)adapter->phys_shmem;
4d6f6af8 3352
4d6ea9c3
DK		 3353 spin_lock_irqsave(&adapter->bit64reglock.lock,
3354 adapter->bit64reglock.flags);
3355 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3356 slic_reg32_write(&slic_regs->slic_isp,
3357 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
3358 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
3359 adapter->bit64reglock.flags);
4d6f6af8 3360
4d6ea9c3 3361 slic_config_get(adapter, phys_configl, phys_configh);
4d6f6af8 3362
4d6ea9c3
DK		 3363 for (;;) {
3364 if (adapter->pshmem->isr) {
3365 if (adapter->pshmem->isr & ISR_UPC) {
3366 adapter->pshmem->isr = 0;
3367 slic_reg64_write(adapter,
3368 &slic_regs->slic_isp, 0,
3369 &slic_regs->slic_addr_upper,
3370 0, FLUSH);
3371 slic_reg32_write(&slic_regs->slic_isr,
3372 0, FLUSH);
3373
3374 slic_upr_request_complete(adapter, 0);
3375 break;
3376 } else {
3377 adapter->pshmem->isr = 0;
3378 slic_reg32_write(&slic_regs->slic_isr,
3379 0, FLUSH);
3380 }
4d6f6af8 3381 } else {
4d6ea9c3
DK		 3382 mdelay(1);
3383 i++;
3384 if (i > 5000) {
3385 dev_err(&adapter->pcidev->dev,
3386 "%d config data fetch timed out!\n",
3387 adapter->port);
3388 slic_reg64_write(adapter,
3389 &slic_regs->slic_isp, 0,
3390 &slic_regs->slic_addr_upper,
3391 0, FLUSH);
3392 return -EINVAL;
3393 }
4d6f6af8 3394 }
4d6ea9c3
DK		 3395 }
3396
3397 switch (adapter->devid) {
3398 /* Oasis card */
3399 case SLIC_2GB_DEVICE_ID:
3400 /* extract EEPROM data and pointers to EEPROM data */
3401 pOeeprom = (struct oslic_eeprom *) peeprom;
3402 eecodesize = pOeeprom->EecodeSize;
3403 dramsize = pOeeprom->DramSize;
3404 pmac = pOeeprom->MacInfo;
3405 fruformat = pOeeprom->FruFormat;
3406 patkfru = &pOeeprom->AtkFru;
3407 oemfruformat = pOeeprom->OemFruFormat;
3408 poemfru = &pOeeprom->OemFru;
3409 macaddrs = 2;
3410 /* Minor kludge for Oasis card
3411 get 2 MAC addresses from the
3412 EEPROM to ensure that function 1
3413 gets the Port 1 MAC address */
3414 break;
3415 default:
3416 /* extract EEPROM data and pointers to EEPROM data */
3417 eecodesize = peeprom->EecodeSize;
3418 dramsize = peeprom->DramSize;
3419 pmac = peeprom->u2.mac.MacInfo;
3420 fruformat = peeprom->FruFormat;
3421 patkfru = &peeprom->AtkFru;
3422 oemfruformat = peeprom->OemFruFormat;
3423 poemfru = &peeprom->OemFru;
4d6f6af8
GKH		 3424 break;
3425 }
4d6f6af8 3426
4d6ea9c3
DK		 3427 card->config.EepromValid = false;
3428
3429 /* see if the EEPROM is valid by checking it's checksum */
3430 if ((eecodesize <= MAX_EECODE_SIZE) &&
3431 (eecodesize >= MIN_EECODE_SIZE)) {
3432
3433 ee_chksum =
3434 *(u16 *) ((char *) peeprom + (eecodesize - 2));
3435 /*
3436 calculate the EEPROM checksum
3437 */
3438 calc_chksum =
3439 ~slic_eeprom_cksum((char *) peeprom,
3440 (eecodesize - 2));
3441 /*
3442 if the ucdoe chksum flag bit worked,
7864a0ac 3443 we wouldn't need this
4d6ea9c3
DK		 3444 */
3445 if (ee_chksum == calc_chksum)
3446 card->config.EepromValid = true;
3447 }
3448 /* copy in the DRAM size */
3449 card->config.DramSize = dramsize;
3450
3451 /* copy in the MAC address(es) */
3452 for (i = 0; i < macaddrs; i++) {
3453 memcpy(&card->config.MacInfo[i],
3454 &pmac[i], sizeof(struct slic_config_mac));
3455 }
4d6f6af8 3456
4d6ea9c3
DK		 3457 /* copy the Alacritech FRU information */
3458 card->config.FruFormat = fruformat;
3459 memcpy(&card->config.AtkFru, patkfru,
3460 sizeof(struct atk_fru));
e9eff9d6 3461
4d6ea9c3
DK		 3462 pci_free_consistent(adapter->pcidev,
3463 sizeof(struct slic_eeprom),
3464 peeprom, phys_config);
4d6f6af8 3465
4d6ea9c3
DK		 3466 if ((!card->config.EepromValid) &&
3467 (adapter->reg_params.fail_on_bad_eeprom)) {
3468 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
3469 &slic_regs->slic_addr_upper,
3470 0, FLUSH);
3471 dev_err(&adapter->pcidev->dev,
3472 "unsupported CONFIGURATION EEPROM invalid\n");
3473 return -EINVAL;
3474 }
4d6f6af8 3475
4d6ea9c3 3476 card->config_set = 1;
4d6f6af8 3477 }
4d6ea9c3
DK		 3478
3479 if (slic_card_download_gbrcv(adapter)) {
3480 dev_err(&adapter->pcidev->dev,
3481 "unable to download GB receive microcode\n");
3482 return -EINVAL;
4d6f6af8 3483 }
4d6ea9c3
DK		 3484
3485 if (slic_global.dynamic_intagg)
3486 slic_intagg_set(adapter, 0);
4d6f6af8 3487 else
4d6ea9c3 3488 slic_intagg_set(adapter, intagg_delay);
4d6f6af8 3489
4d6ea9c3
DK		 3490 /*
3491 * Initialize ping status to "ok"
3492 */
3493 card->pingstatus = ISR_PINGMASK;
4d6f6af8 3494
4d6ea9c3
DK		 3495 /*
3496 * Lastly, mark our card state as up and return success
3497 */
3498 card->state = CARD_UP;
3499 card->reset_in_progress = 0;
4d6f6af8 3500
4d6ea9c3
DK		 3501 return 0;
3502}
3503
3504static void slic_init_driver(void)
3505{
3506 if (slic_first_init) {
3507 slic_first_init = 0;
3508 spin_lock_init(&slic_global.driver_lock.lock);
3509 slic_debug_init();
4d6f6af8 3510 }
4d6ea9c3 3511}
4d6f6af8 3512
4d6ea9c3
DK		 3513static void slic_init_adapter(struct net_device *netdev,
3514 struct pci_dev *pcidev,
3515 const struct pci_device_id *pci_tbl_entry,
3516 void __iomem *memaddr, int chip_idx)
3517{
3518 ushort index;
3519 struct slic_handle *pslic_handle;
3520 struct adapter *adapter = netdev_priv(netdev);
4d6f6af8 3521
4d6ea9c3
DK		 3522/* adapter->pcidev = pcidev;*/
3523 adapter->vendid = pci_tbl_entry->vendor;
3524 adapter->devid = pci_tbl_entry->device;
3525 adapter->subsysid = pci_tbl_entry->subdevice;
3526 adapter->busnumber = pcidev->bus->number;
3527 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
3528 adapter->functionnumber = (pcidev->devfn & 0x7);
3529 adapter->memorylength = pci_resource_len(pcidev, 0);
3530 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
3531 adapter->irq = pcidev->irq;
3532/* adapter->netdev = netdev;*/
3533 adapter->next_netdevice = head_netdevice;
3534 head_netdevice = netdev;
3535 adapter->chipid = chip_idx;
3536 adapter->port = 0; /*adapter->functionnumber;*/
3537 adapter->cardindex = adapter->port;
3538 adapter->memorybase = memaddr;
3539 spin_lock_init(&adapter->upr_lock.lock);
3540 spin_lock_init(&adapter->bit64reglock.lock);
3541 spin_lock_init(&adapter->adapter_lock.lock);
3542 spin_lock_init(&adapter->reset_lock.lock);
3543 spin_lock_init(&adapter->handle_lock.lock);
4d6f6af8 3544
4d6ea9c3
DK		 3545 adapter->card_size = 1;
3546 /*
3547 Initialize slic_handle array
3548 */
4d6ea9c3
DK		 3549 /*
3550 Start with 1. 0 is an invalid host handle.
3551 */
3552 for (index = 1, pslic_handle = &adapter->slic_handles[1];
3553 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
3554
3555 pslic_handle->token.handle_index = index;
3556 pslic_handle->type = SLIC_HANDLE_FREE;
3557 pslic_handle->next = adapter->pfree_slic_handles;
3558 adapter->pfree_slic_handles = pslic_handle;
4d6f6af8 3559 }
4d6ea9c3
DK		 3560 adapter->pshmem = (struct slic_shmem *)
3561 pci_alloc_consistent(adapter->pcidev,
3562 sizeof(struct slic_shmem),
3563 &adapter->
3564 phys_shmem);
b8131fc0
DN		 3565 if (adapter->pshmem)
3566 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
4d6ea9c3 3567}
4d6f6af8 3568
4d6ea9c3
DK		 3569static const struct net_device_ops slic_netdev_ops = {
3570 .ndo_open = slic_entry_open,
3571 .ndo_stop = slic_entry_halt,
3572 .ndo_start_xmit = slic_xmit_start,
3573 .ndo_do_ioctl = slic_ioctl,
3574 .ndo_set_mac_address = slic_mac_set_address,
3575 .ndo_get_stats = slic_get_stats,
afc4b13d 3576 .ndo_set_rx_mode = slic_mcast_set_list,
4d6ea9c3
DK		 3577 .ndo_validate_addr = eth_validate_addr,
3578 .ndo_change_mtu = eth_change_mtu,
3579};
4d6f6af8 3580
4d6ea9c3
DK		 3581static u32 slic_card_locate(struct adapter *adapter)
3582{
3583 struct sliccard *card = slic_global.slic_card;
3584 struct physcard *physcard = slic_global.phys_card;
3585 ushort card_hostid;
3586 u16 __iomem *hostid_reg;
3587 uint i;
3588 uint rdhostid_offset = 0;
4d6f6af8 3589
4d6ea9c3
DK		 3590 switch (adapter->devid) {
3591 case SLIC_2GB_DEVICE_ID:
3592 rdhostid_offset = SLIC_RDHOSTID_2GB;
3593 break;
3594 case SLIC_1GB_DEVICE_ID:
3595 rdhostid_offset = SLIC_RDHOSTID_1GB;
3596 break;
4d6f6af8 3597 default:
0ab19005 3598 return -ENODEV;
4d6f6af8 3599 }
4d6f6af8 3600
4d6ea9c3
DK		 3601 hostid_reg =
3602 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
3603 rdhostid_offset);
4d6f6af8 3604
4d6ea9c3
DK		 3605 /* read the 16 bit hostid from SRAM */
3606 card_hostid = (ushort) readw(hostid_reg);
4d6f6af8 3607
4d6ea9c3
DK		 3608 /* Initialize a new card structure if need be */
3609 if (card_hostid == SLIC_HOSTID_DEFAULT) {
3610 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
3611 if (card == NULL)
3612 return -ENOMEM;
3613
3614 card->next = slic_global.slic_card;
3615 slic_global.slic_card = card;
3616 card->busnumber = adapter->busnumber;
3617 card->slotnumber = adapter->slotnumber;
3618
3619 /* Find an available cardnum */
3620 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3621 if (slic_global.cardnuminuse[i] == 0) {
3622 slic_global.cardnuminuse[i] = 1;
3623 card->cardnum = i;
3624 break;
3625 }
3626 }
3627 slic_global.num_slic_cards++;
3628
3629 slic_debug_card_create(card);
3630 } else {
3631 /* Card exists, find the card this adapter belongs to */
3632 while (card) {
3633 if (card->cardnum == card_hostid)
3634 break;
3635 card = card->next;
3636 }
3637 }
3638
4d6ea9c3
DK		 3639 if (!card)
3640 return -ENXIO;
3641 /* Put the adapter in the card's adapter list */
4d6ea9c3
DK		 3642 if (!card->adapter[adapter->port]) {
3643 card->adapter[adapter->port] = adapter;
3644 adapter->card = card;
3645 }
3646
3647 card->card_size = 1; /* one port per *logical* card */
3648
3649 while (physcard) {
3650 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3651 if (!physcard->adapter[i])
3652 continue;
3653 else
3654 break;
3655 }
4d6ea9c3
DK		 3656 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3657 break;
3658 physcard = physcard->next;
3659 }
3660 if (!physcard) {
3661 /* no structure allocated for this physical card yet */
3662 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
34ec83f4
DN		 3663 if (!physcard) {
3664 if (card_hostid == SLIC_HOSTID_DEFAULT)
3665 kfree(card);
0608882d 3666 return -ENOMEM;
34ec83f4 3667 }
4d6ea9c3
DK		 3668
3669 physcard->next = slic_global.phys_card;
3670 slic_global.phys_card = physcard;
3671 physcard->adapters_allocd = 1;
3672 } else {
3673 physcard->adapters_allocd++;
3674 }
3675 /* Note - this is ZERO relative */
3676 adapter->physport = physcard->adapters_allocd - 1;
3677
4d6ea9c3
DK		 3678 physcard->adapter[adapter->physport] = adapter;
3679 adapter->physcard = physcard;
4d6f6af8
GKH		 3680
3681 return 0;
3682}
4d6f6af8 3683
a0c2feb1 3684static int slic_entry_probe(struct pci_dev *pcidev,
4d6ea9c3 3685 const struct pci_device_id *pci_tbl_entry)
4d6f6af8 3686{
4d6ea9c3
DK		 3687 static int cards_found;
3688 static int did_version;
3689 int err = -ENODEV;
3690 struct net_device *netdev;
3691 struct adapter *adapter;
3692 void __iomem *memmapped_ioaddr = NULL;
3693 u32 status = 0;
3694 ulong mmio_start = 0;
3695 ulong mmio_len = 0;
3696 struct sliccard *card = NULL;
3697 int pci_using_dac = 0;
4d6f6af8 3698
4d6ea9c3 3699 slic_global.dynamic_intagg = dynamic_intagg;
4d6f6af8 3700
4d6ea9c3 3701 err = pci_enable_device(pcidev);
4d6f6af8 3702
4d6ea9c3
DK		 3703 if (err)
3704 return err;
4d6f6af8 3705
4d6ea9c3
DK		 3706 if (slic_debug > 0 && did_version++ == 0) {
3707 printk(KERN_DEBUG "%s\n", slic_banner);
3708 printk(KERN_DEBUG "%s\n", slic_proc_version);
3709 }
4d6f6af8 3710
4d6ea9c3
DK		 3711 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3712 pci_using_dac = 1;
3713 if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3714 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for "
3715 "consistent allocations\n");
3716 goto err_out_disable_pci;
3717 }
3718 } else if (pci_set_dma_mask(pcidev, DMA_BIT_MASK(32))) {
3719 pci_using_dac = 0;
3720 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3721 } else {
3722 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3723 goto err_out_disable_pci;
3724 }
4d6f6af8 3725
4d6ea9c3
DK		 3726 err = pci_request_regions(pcidev, DRV_NAME);
3727 if (err) {
3728 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3729 goto err_out_disable_pci;
3730 }
4d6f6af8 3731
4d6ea9c3 3732 pci_set_master(pcidev);
4d6f6af8 3733
4d6ea9c3
DK		 3734 netdev = alloc_etherdev(sizeof(struct adapter));
3735 if (!netdev) {
3736 err = -ENOMEM;
3737 goto err_out_exit_slic_probe;
4d6f6af8 3738 }
4d6f6af8 3739
4d6ea9c3 3740 SET_NETDEV_DEV(netdev, &pcidev->dev);
4d6f6af8 3741
4d6ea9c3
DK		 3742 pci_set_drvdata(pcidev, netdev);
3743 adapter = netdev_priv(netdev);
3744 adapter->netdev = netdev;
3745 adapter->pcidev = pcidev;
3746 if (pci_using_dac)
3747 netdev->features |= NETIF_F_HIGHDMA;
4d6f6af8 3748
4d6ea9c3
DK		 3749 mmio_start = pci_resource_start(pcidev, 0);
3750 mmio_len = pci_resource_len(pcidev, 0);
3751
3752
3753/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3754 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3755 if (!memmapped_ioaddr) {
3756 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3757 mmio_len, mmio_start);
3758 goto err_out_free_netdev;
4d6f6af8 3759 }
4d6ea9c3
DK		 3760
3761 slic_config_pci(pcidev);
3762
3763 slic_init_driver();
3764
3765 slic_init_adapter(netdev,
3766 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3767
3768 status = slic_card_locate(adapter);
3769 if (status) {
3770 dev_err(&pcidev->dev, "cannot locate card\n");
3771 goto err_out_free_mmio_region;
4d6f6af8 3772 }
4d6ea9c3
DK		 3773
3774 card = adapter->card;
3775
3776 if (!adapter->allocated) {
3777 card->adapters_allocated++;
3778 adapter->allocated = 1;
4d6f6af8 3779 }
4d6f6af8 3780
4d6ea9c3 3781 status = slic_card_init(card, adapter);
4d6f6af8 3782
4d6ea9c3
DK		 3783 if (status != 0) {
3784 card->state = CARD_FAIL;
3785 adapter->state = ADAPT_FAIL;
3786 adapter->linkstate = LINK_DOWN;
3787 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
3788 } else {
3789 slic_adapter_set_hwaddr(adapter);
4d6f6af8
GKH		 3790 }
3791
4d6ea9c3
DK		 3792 netdev->base_addr = (unsigned long)adapter->memorybase;
3793 netdev->irq = adapter->irq;
3794 netdev->netdev_ops = &slic_netdev_ops;
4d6f6af8 3795
4d6ea9c3
DK		 3796 slic_debug_adapter_create(adapter);
3797
3798 strcpy(netdev->name, "eth%d");
3799 err = register_netdev(netdev);
3800 if (err) {
3801 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3802 goto err_out_unmap;
4d6f6af8 3803 }
4d6f6af8 3804
4d6ea9c3
DK		 3805 cards_found++;
3806
3807 return status;
3808
3809err_out_unmap:
3810 iounmap(memmapped_ioaddr);
3811err_out_free_mmio_region:
3812 release_mem_region(mmio_start, mmio_len);
3813err_out_free_netdev:
3814 free_netdev(netdev);
3815err_out_exit_slic_probe:
3816 pci_release_regions(pcidev);
3817err_out_disable_pci:
3818 pci_disable_device(pcidev);
3819 return err;
3820}
4d6f6af8
GKH		 3821
3822static struct pci_driver slic_driver = {
3823 .name = DRV_NAME,
3824 .id_table = slic_pci_tbl,
3825 .probe = slic_entry_probe,
2e0d79c5 3826 .remove = slic_entry_remove,
4d6f6af8
GKH		 3827};
3828
3829static int __init slic_module_init(void)
3830{
4d6f6af8
GKH		 3831 slic_init_driver();
3832
3833 if (debug >= 0 && slic_debug != debug)
e5bac598
GKH		 3834 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
3835 debug);
4d6f6af8
GKH		 3836 if (debug >= 0)
3837 slic_debug = debug;
3838
e8bc9b7a 3839 return pci_register_driver(&slic_driver);
4d6f6af8
GKH		 3840}
3841
3842static void __exit slic_module_cleanup(void)
3843{
4d6f6af8
GKH		 3844 pci_unregister_driver(&slic_driver);
3845 slic_debug_cleanup();
4d6f6af8
GKH		 3846}
3847
3848module_init(slic_module_init);
3849module_exit(slic_module_cleanup);
kernel source for telekom puls (alcatel/mediatek)