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4d6f6af8 GKH |
1 | /************************************************************************** |
2 | * | |
3 | * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. | |
4 | * | |
4d6f6af8 GKH |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | |
9 | * | |
10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above | |
13 | * copyright notice, this list of conditions and the following | |
14 | * disclaimer in the documentation and/or other materials provided | |
15 | * with the distribution. | |
16 | * | |
17 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY | |
18 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
20 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR | |
21 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
22 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
23 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
24 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
25 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT | |
27 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
28 | * SUCH DAMAGE. | |
29 | * | |
30 | * The views and conclusions contained in the software and documentation | |
31 | * are those of the authors and should not be interpreted as representing | |
32 | * official policies, either expressed or implied, of Alacritech, Inc. | |
33 | * | |
34 | **************************************************************************/ | |
35 | ||
36 | /* | |
37 | * FILENAME: slic.h | |
38 | * | |
39 | * This is the base set of header definitions for the SLICOSS driver. | |
40 | */ | |
41 | #ifndef __SLIC_DRIVER_H__ | |
42 | #define __SLIC_DRIVER_H__ | |
43 | ||
470c5736 LD |
44 | /* firmware stuff */ |
45 | #define OASIS_UCODE_VERS_STRING "1.2" | |
46 | #define OASIS_UCODE_VERS_DATE "2006/03/27 15:10:37" | |
47 | #define OASIS_UCODE_HOSTIF_ID 3 | |
48 | ||
470c5736 LD |
49 | #define MOJAVE_UCODE_VERS_STRING "1.2" |
50 | #define MOJAVE_UCODE_VERS_DATE "2006/03/27 15:12:22" | |
51 | #define MOJAVE_UCODE_HOSTIF_ID 3 | |
52 | ||
470c5736 LD |
53 | #define GB_RCVUCODE_VERS_STRING "1.2" |
54 | #define GB_RCVUCODE_VERS_DATE "2006/03/27 15:12:15" | |
55 | static u32 OasisRcvUCodeLen = 512; | |
56 | static u32 GBRcvUCodeLen = 512; | |
57 | #define SECTION_SIZE 65536 | |
4d6f6af8 GKH |
58 | |
59 | struct slic_spinlock { | |
60 | spinlock_t lock; | |
61 | unsigned long flags; | |
62 | }; | |
63 | ||
64 | #define SLIC_RSPQ_PAGES_GB 10 | |
65 | #define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE) | |
66 | ||
e9eff9d6 LD |
67 | struct slic_rspqueue { |
68 | u32 offset; | |
69 | u32 pageindex; | |
70 | u32 num_pages; | |
71 | struct slic_rspbuf *rspbuf; | |
72 | u32 *vaddr[SLIC_RSPQ_PAGES_GB]; | |
4d6f6af8 | 73 | dma_addr_t paddr[SLIC_RSPQ_PAGES_GB]; |
e9eff9d6 | 74 | }; |
4d6f6af8 GKH |
75 | |
76 | #define SLIC_RCVQ_EXPANSION 1 | |
77 | #define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION) | |
78 | #define SLIC_RCVQ_MINENTRIES (SLIC_RCVQ_ENTRIES / 2) | |
79 | #define SLIC_RCVQ_MAX_PROCESS_ISR ((SLIC_RCVQ_ENTRIES * 4)) | |
80 | #define SLIC_RCVQ_RCVBUFSIZE 2048 | |
81 | #define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION) | |
82 | #define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES) | |
83 | ||
e9eff9d6 | 84 | struct slic_rcvqueue { |
4d6f6af8 GKH |
85 | struct sk_buff *head; |
86 | struct sk_buff *tail; | |
e9eff9d6 LD |
87 | u32 count; |
88 | u32 size; | |
89 | u32 errors; | |
90 | }; | |
91 | ||
92 | struct slic_rcvbuf_info { | |
93 | u32 id; | |
94 | u32 starttime; | |
95 | u32 stoptime; | |
96 | u32 slicworld; | |
97 | u32 lasttime; | |
98 | u32 lastid; | |
99 | }; | |
4d6f6af8 GKH |
100 | /* |
101 | SLIC Handle structure. Used to restrict handle values to | |
102 | 32 bits by using an index rather than an address. | |
103 | Simplifies ucode in 64-bit systems | |
104 | */ | |
e9eff9d6 | 105 | struct slic_handle_word { |
4d6f6af8 GKH |
106 | union { |
107 | struct { | |
108 | ushort index; | |
109 | ushort bottombits; /* to denote num bufs to card */ | |
110 | } parts; | |
e9eff9d6 | 111 | u32 whole; |
4d6f6af8 | 112 | } handle; |
e9eff9d6 | 113 | }; |
4d6f6af8 | 114 | |
e9eff9d6 LD |
115 | struct slic_handle { |
116 | struct slic_handle_word token; /* token passed between host and card*/ | |
4d6f6af8 | 117 | ushort type; |
e9eff9d6 | 118 | void *address; /* actual address of the object*/ |
4d6f6af8 | 119 | ushort offset; |
e9eff9d6 LD |
120 | struct slic_handle *other_handle; |
121 | struct slic_handle *next; | |
122 | }; | |
4d6f6af8 GKH |
123 | |
124 | #define SLIC_HANDLE_FREE 0x0000 | |
125 | #define SLIC_HANDLE_DATA 0x0001 | |
126 | #define SLIC_HANDLE_CMD 0x0002 | |
127 | #define SLIC_HANDLE_CONTEXT 0x0003 | |
128 | #define SLIC_HANDLE_TEAM 0x0004 | |
129 | ||
130 | #define handle_index handle.parts.index | |
131 | #define handle_bottom handle.parts.bottombits | |
132 | #define handle_token handle.whole | |
133 | ||
134 | #define SLIC_HOSTCMD_SIZE 512 | |
135 | ||
e9eff9d6 LD |
136 | struct slic_hostcmd { |
137 | struct slic_host64_cmd cmd64; | |
138 | u32 type; | |
4d6f6af8 | 139 | struct sk_buff *skb; |
e9eff9d6 LD |
140 | u32 paddrl; |
141 | u32 paddrh; | |
142 | u32 busy; | |
143 | u32 cmdsize; | |
4d6f6af8 | 144 | ushort numbufs; |
e9eff9d6 LD |
145 | struct slic_handle *pslic_handle;/* handle associated with command */ |
146 | struct slic_hostcmd *next; | |
147 | struct slic_hostcmd *next_all; | |
148 | }; | |
4d6f6af8 GKH |
149 | |
150 | #define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE) | |
151 | #define SLIC_CMD_DUMB 3 | |
152 | #define SLIC_CMDQ_INITCMDS 256 | |
153 | #define SLIC_CMDQ_MAXCMDS 256 | |
154 | #define SLIC_CMDQ_MAXOUTSTAND SLIC_CMDQ_MAXCMDS | |
155 | #define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE) | |
156 | #define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE) | |
157 | ||
e9eff9d6 LD |
158 | struct slic_cmdqmem { |
159 | int pagecnt; | |
160 | u32 *pages[SLIC_CMDQ_MAXPAGES]; | |
161 | dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES]; | |
162 | }; | |
4d6f6af8 | 163 | |
e9eff9d6 LD |
164 | struct slic_cmdqueue { |
165 | struct slic_hostcmd *head; | |
166 | struct slic_hostcmd *tail; | |
167 | int count; | |
168 | struct slic_spinlock lock; | |
169 | }; | |
4d6f6af8 GKH |
170 | |
171 | #ifdef STATUS_SUCCESS | |
172 | #undef STATUS_SUCCESS | |
173 | #endif | |
174 | ||
175 | #define STATUS_SUCCESS 0 | |
176 | #define STATUS_PENDING 0 | |
177 | #define STATUS_FAILURE -1 | |
178 | #define STATUS_ERROR -2 | |
179 | #define STATUS_NOT_SUPPORTED -3 | |
180 | #define STATUS_BUFFER_TOO_SHORT -4 | |
181 | ||
182 | #define SLIC_MAX_CARDS 32 | |
183 | #define SLIC_MAX_PORTS 4 /* Max # of ports per card */ | |
4d6f6af8 GKH |
184 | |
185 | ||
e9eff9d6 LD |
186 | struct mcast_address { |
187 | unsigned char address[6]; | |
188 | struct mcast_address *next; | |
189 | }; | |
4d6f6af8 GKH |
190 | |
191 | #define CARD_DOWN 0x00000000 | |
192 | #define CARD_UP 0x00000001 | |
193 | #define CARD_FAIL 0x00000002 | |
194 | #define CARD_DIAG 0x00000003 | |
195 | #define CARD_SLEEP 0x00000004 | |
196 | ||
197 | #define ADAPT_DOWN 0x00 | |
198 | #define ADAPT_UP 0x01 | |
199 | #define ADAPT_FAIL 0x02 | |
200 | #define ADAPT_RESET 0x03 | |
201 | #define ADAPT_SLEEP 0x04 | |
202 | ||
203 | #define ADAPT_FLAGS_BOOTTIME 0x0001 | |
204 | #define ADAPT_FLAGS_IS64BIT 0x0002 | |
205 | #define ADAPT_FLAGS_PENDINGLINKDOWN 0x0004 | |
206 | #define ADAPT_FLAGS_FIBERMEDIA 0x0008 | |
207 | #define ADAPT_FLAGS_LOCKS_ALLOCED 0x0010 | |
208 | #define ADAPT_FLAGS_INT_REGISTERED 0x0020 | |
209 | #define ADAPT_FLAGS_LOAD_TIMER_SET 0x0040 | |
210 | #define ADAPT_FLAGS_STATS_TIMER_SET 0x0080 | |
211 | #define ADAPT_FLAGS_RESET_TIMER_SET 0x0100 | |
212 | ||
213 | #define LINK_DOWN 0x00 | |
214 | #define LINK_CONFIG 0x01 | |
215 | #define LINK_UP 0x02 | |
216 | ||
217 | #define LINK_10MB 0x00 | |
218 | #define LINK_100MB 0x01 | |
219 | #define LINK_AUTOSPEED 0x02 | |
220 | #define LINK_1000MB 0x03 | |
221 | #define LINK_10000MB 0x04 | |
222 | ||
223 | #define LINK_HALFD 0x00 | |
224 | #define LINK_FULLD 0x01 | |
225 | #define LINK_AUTOD 0x02 | |
226 | ||
227 | #define MAC_DIRECTED 0x00000001 | |
228 | #define MAC_BCAST 0x00000002 | |
229 | #define MAC_MCAST 0x00000004 | |
230 | #define MAC_PROMISC 0x00000008 | |
231 | #define MAC_LOOPBACK 0x00000010 | |
232 | #define MAC_ALLMCAST 0x00000020 | |
233 | ||
234 | #define SLIC_DUPLEX(x) ((x == LINK_FULLD) ? "FDX" : "HDX") | |
235 | #define SLIC_SPEED(x) ((x == LINK_100MB) ? "100Mb" : ((x == LINK_1000MB) ?\ | |
236 | "1000Mb" : " 10Mb")) | |
237 | #define SLIC_LINKSTATE(x) ((x == LINK_DOWN) ? "Down" : "Up ") | |
238 | #define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down") | |
239 | #define SLIC_CARD_STATE(x) ((x == CARD_UP) ? "UP" : "Down") | |
240 | ||
e9eff9d6 | 241 | struct slic_iface_stats { |
4d6f6af8 GKH |
242 | /* |
243 | * Stats | |
244 | */ | |
e9eff9d6 LD |
245 | u64 xmt_bytes; |
246 | u64 xmt_ucast; | |
247 | u64 xmt_mcast; | |
248 | u64 xmt_bcast; | |
249 | u64 xmt_errors; | |
250 | u64 xmt_discards; | |
251 | u64 xmit_collisions; | |
252 | u64 xmit_excess_xmit_collisions; | |
253 | u64 rcv_bytes; | |
254 | u64 rcv_ucast; | |
255 | u64 rcv_mcast; | |
256 | u64 rcv_bcast; | |
257 | u64 rcv_errors; | |
258 | u64 rcv_discards; | |
259 | }; | |
260 | ||
261 | struct sliccp_stats { | |
262 | u64 xmit_tcp_segs; | |
263 | u64 xmit_tcp_bytes; | |
264 | u64 rcv_tcp_segs; | |
265 | u64 rcv_tcp_bytes; | |
266 | }; | |
267 | ||
268 | struct slicnet_stats { | |
269 | struct sliccp_stats tcp; | |
270 | struct slic_iface_stats iface; | |
271 | }; | |
4d6f6af8 GKH |
272 | |
273 | #define SLIC_LOADTIMER_PERIOD 1 | |
274 | #define SLIC_INTAGG_DEFAULT 200 | |
275 | #define SLIC_LOAD_0 0 | |
276 | #define SLIC_INTAGG_0 0 | |
277 | #define SLIC_LOAD_1 8000 | |
278 | #define SLIC_LOAD_2 10000 | |
279 | #define SLIC_LOAD_3 12000 | |
280 | #define SLIC_LOAD_4 14000 | |
281 | #define SLIC_LOAD_5 16000 | |
282 | #define SLIC_INTAGG_1 50 | |
283 | #define SLIC_INTAGG_2 100 | |
284 | #define SLIC_INTAGG_3 150 | |
285 | #define SLIC_INTAGG_4 200 | |
286 | #define SLIC_INTAGG_5 250 | |
287 | #define SLIC_LOAD_1GB 3000 | |
288 | #define SLIC_LOAD_2GB 6000 | |
289 | #define SLIC_LOAD_3GB 12000 | |
290 | #define SLIC_LOAD_4GB 24000 | |
291 | #define SLIC_LOAD_5GB 48000 | |
292 | #define SLIC_INTAGG_1GB 50 | |
293 | #define SLIC_INTAGG_2GB 75 | |
294 | #define SLIC_INTAGG_3GB 100 | |
295 | #define SLIC_INTAGG_4GB 100 | |
296 | #define SLIC_INTAGG_5GB 100 | |
297 | ||
e9eff9d6 LD |
298 | struct ether_header { |
299 | unsigned char ether_dhost[6]; | |
300 | unsigned char ether_shost[6]; | |
4d6f6af8 | 301 | ushort ether_type; |
e9eff9d6 | 302 | }; |
4d6f6af8 | 303 | |
e9eff9d6 | 304 | struct sliccard { |
4d6f6af8 GKH |
305 | uint busnumber; |
306 | uint slotnumber; | |
307 | uint state; | |
308 | uint cardnum; | |
309 | uint card_size; | |
310 | uint adapters_activated; | |
311 | uint adapters_allocated; | |
312 | uint adapters_sleeping; | |
313 | uint gennumber; | |
e9eff9d6 LD |
314 | u32 events; |
315 | u32 loadlevel_current; | |
316 | u32 load; | |
4d6f6af8 | 317 | uint reset_in_progress; |
e9eff9d6 LD |
318 | u32 pingstatus; |
319 | u32 bad_pingstatus; | |
4d6f6af8 | 320 | struct timer_list loadtimer; |
e9eff9d6 | 321 | u32 loadtimerset; |
4d6f6af8 | 322 | uint config_set; |
e9eff9d6 | 323 | struct slic_config config; |
4d6f6af8 GKH |
324 | struct dentry *debugfs_dir; |
325 | struct dentry *debugfs_cardinfo; | |
e9eff9d6 LD |
326 | struct adapter *master; |
327 | struct adapter *adapter[SLIC_MAX_PORTS]; | |
328 | struct sliccard *next; | |
329 | u32 error_interrupts; | |
330 | u32 error_rmiss_interrupts; | |
331 | u32 rcv_interrupts; | |
332 | u32 xmit_interrupts; | |
333 | u32 num_isrs; | |
334 | u32 false_interrupts; | |
335 | u32 max_isr_rcvs; | |
336 | u32 max_isr_xmits; | |
337 | u32 rcv_interrupt_yields; | |
338 | u32 tx_packets; | |
e9eff9d6 | 339 | u32 debug_ix; |
4d6f6af8 GKH |
340 | ushort reg_type[32]; |
341 | ushort reg_offset[32]; | |
e9eff9d6 LD |
342 | u32 reg_value[32]; |
343 | u32 reg_valueh[32]; | |
344 | }; | |
4d6f6af8 GKH |
345 | |
346 | #define NUM_CFG_SPACES 2 | |
347 | #define NUM_CFG_REGS 64 | |
e9eff9d6 | 348 | #define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(u32)) |
4d6f6af8 | 349 | |
e9eff9d6 LD |
350 | struct physcard { |
351 | struct adapter *adapter[SLIC_MAX_PORTS]; | |
352 | struct physcard *next; | |
4d6f6af8 GKH |
353 | uint adapters_allocd; |
354 | ||
355 | /* the following is not currently needed | |
e9eff9d6 LD |
356 | u32 bridge_busnum; |
357 | u32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS]; | |
4d6f6af8 | 358 | */ |
e9eff9d6 | 359 | }; |
4d6f6af8 | 360 | |
e9eff9d6 | 361 | struct base_driver { |
4d6f6af8 | 362 | struct slic_spinlock driver_lock; |
e9eff9d6 LD |
363 | u32 num_slic_cards; |
364 | u32 num_slic_ports; | |
365 | u32 num_slic_ports_active; | |
366 | u32 dynamic_intagg; | |
367 | struct sliccard *slic_card; | |
368 | struct physcard *phys_card; | |
4d6f6af8 | 369 | uint cardnuminuse[SLIC_MAX_CARDS]; |
e9eff9d6 LD |
370 | }; |
371 | ||
372 | struct slic_shmem { | |
373 | volatile u32 isr; | |
374 | volatile u32 linkstatus; | |
375 | volatile struct slic_stats inicstats; | |
376 | }; | |
377 | ||
378 | struct slic_reg_params { | |
379 | u32 linkspeed; | |
380 | u32 linkduplex; | |
381 | u32 fail_on_bad_eeprom; | |
382 | }; | |
383 | ||
384 | struct slic_upr { | |
385 | uint adapter; | |
386 | u32 upr_request; | |
387 | u32 upr_data; | |
388 | u32 upr_data_h; | |
389 | u32 upr_buffer; | |
390 | u32 upr_buffer_h; | |
391 | struct slic_upr *next; | |
392 | }; | |
393 | ||
394 | struct slic_ifevents { | |
4d6f6af8 GKH |
395 | uint oflow802; |
396 | uint uflow802; | |
397 | uint Tprtoflow; | |
398 | uint rcvearly; | |
399 | uint Bufov; | |
400 | uint Carre; | |
401 | uint Longe; | |
402 | uint Invp; | |
403 | uint Crc; | |
404 | uint Drbl; | |
405 | uint Code; | |
406 | uint IpHlen; | |
407 | uint IpLen; | |
408 | uint IpCsum; | |
409 | uint TpCsum; | |
410 | uint TpHlen; | |
e9eff9d6 | 411 | }; |
4d6f6af8 | 412 | |
e9eff9d6 LD |
413 | struct adapter { |
414 | void *ifp; | |
415 | struct sliccard *card; | |
4d6f6af8 | 416 | uint port; |
e9eff9d6 | 417 | struct physcard *physcard; |
4d6f6af8 GKH |
418 | uint physport; |
419 | uint cardindex; | |
420 | uint card_size; | |
421 | uint chipid; | |
e9eff9d6 LD |
422 | struct net_device *netdev; |
423 | struct net_device *next_netdevice; | |
4d6f6af8 GKH |
424 | struct slic_spinlock adapter_lock; |
425 | struct slic_spinlock reset_lock; | |
426 | struct pci_dev *pcidev; | |
427 | uint busnumber; | |
428 | uint slotnumber; | |
429 | uint functionnumber; | |
430 | ushort vendid; | |
431 | ushort devid; | |
432 | ushort subsysid; | |
e9eff9d6 | 433 | u32 irq; |
4d6f6af8 | 434 | void __iomem *memorybase; |
e9eff9d6 LD |
435 | u32 memorylength; |
436 | u32 drambase; | |
437 | u32 dramlength; | |
4d6f6af8 GKH |
438 | uint queues_initialized; |
439 | uint allocated; | |
440 | uint activated; | |
e9eff9d6 | 441 | u32 intrregistered; |
4d6f6af8 GKH |
442 | uint isp_initialized; |
443 | uint gennumber; | |
e9eff9d6 LD |
444 | u32 curaddrupper; |
445 | struct slic_shmem *pshmem; | |
4d6f6af8 | 446 | dma_addr_t phys_shmem; |
e9eff9d6 LD |
447 | u32 isrcopy; |
448 | __iomem struct slic_regs *slic_regs; | |
449 | unsigned char state; | |
450 | unsigned char linkstate; | |
451 | unsigned char linkspeed; | |
452 | unsigned char linkduplex; | |
4d6f6af8 | 453 | uint flags; |
e9eff9d6 LD |
454 | unsigned char macaddr[6]; |
455 | unsigned char currmacaddr[6]; | |
456 | u32 macopts; | |
4d6f6af8 | 457 | ushort devflags_prev; |
e9eff9d6 LD |
458 | u64 mcastmask; |
459 | struct mcast_address *mcastaddrs; | |
460 | struct slic_upr *upr_list; | |
4d6f6af8 GKH |
461 | uint upr_busy; |
462 | struct timer_list pingtimer; | |
e9eff9d6 | 463 | u32 pingtimerset; |
4d6f6af8 | 464 | struct timer_list loadtimer; |
e9eff9d6 | 465 | u32 loadtimerset; |
4d6f6af8 GKH |
466 | struct dentry *debugfs_entry; |
467 | struct slic_spinlock upr_lock; | |
468 | struct slic_spinlock bit64reglock; | |
e9eff9d6 LD |
469 | struct slic_rspqueue rspqueue; |
470 | struct slic_rcvqueue rcvqueue; | |
471 | struct slic_cmdqueue cmdq_free; | |
472 | struct slic_cmdqueue cmdq_done; | |
473 | struct slic_cmdqueue cmdq_all; | |
474 | struct slic_cmdqmem cmdqmem; | |
4d6f6af8 GKH |
475 | /* |
476 | * SLIC Handles | |
477 | */ | |
e9eff9d6 LD |
478 | struct slic_handle slic_handles[SLIC_CMDQ_MAXCMDS+1]; /* Object handles*/ |
479 | struct slic_handle *pfree_slic_handles; /* Free object handles*/ | |
4d6f6af8 GKH |
480 | struct slic_spinlock handle_lock; /* Object handle list lock*/ |
481 | ushort slic_handle_ix; | |
482 | ||
e9eff9d6 LD |
483 | u32 xmitq_full; |
484 | u32 all_reg_writes; | |
485 | u32 icr_reg_writes; | |
486 | u32 isr_reg_writes; | |
487 | u32 error_interrupts; | |
488 | u32 error_rmiss_interrupts; | |
489 | u32 rx_errors; | |
490 | u32 rcv_drops; | |
491 | u32 rcv_interrupts; | |
492 | u32 xmit_interrupts; | |
493 | u32 linkevent_interrupts; | |
494 | u32 upr_interrupts; | |
495 | u32 num_isrs; | |
496 | u32 false_interrupts; | |
497 | u32 tx_packets; | |
498 | u32 xmit_completes; | |
499 | u32 tx_drops; | |
500 | u32 rcv_broadcasts; | |
501 | u32 rcv_multicasts; | |
502 | u32 rcv_unicasts; | |
503 | u32 max_isr_rcvs; | |
504 | u32 max_isr_xmits; | |
505 | u32 rcv_interrupt_yields; | |
506 | u32 intagg_period; | |
507 | struct inicpm_state *inicpm_info; | |
508 | void *pinicpm_info; | |
509 | struct slic_reg_params reg_params; | |
510 | struct slic_ifevents if_events; | |
511 | struct slic_stats inicstats_prev; | |
512 | struct slicnet_stats slic_stats; | |
4d6f6af8 | 513 | struct net_device_stats stats; |
e9eff9d6 | 514 | }; |
4d6f6af8 | 515 | |
4d6f6af8 GKH |
516 | |
517 | #define UPDATE_STATS(largestat, newstat, oldstat) \ | |
518 | { \ | |
519 | if ((newstat) < (oldstat)) \ | |
520 | (largestat) += ((newstat) + (0xFFFFFFFF - oldstat + 1)); \ | |
521 | else \ | |
522 | (largestat) += ((newstat) - (oldstat)); \ | |
523 | } | |
524 | ||
525 | #define UPDATE_STATS_GB(largestat, newstat, oldstat) \ | |
526 | { \ | |
527 | (largestat) += ((newstat) - (oldstat)); \ | |
528 | } | |
529 | ||
530 | #define ETHER_EQ_ADDR(_AddrA, _AddrB, _Result) \ | |
531 | { \ | |
b574488e | 532 | _Result = true; \ |
e9eff9d6 | 533 | if (*(u32 *)(_AddrA) != *(u32 *)(_AddrB)) \ |
b574488e | 534 | _Result = false; \ |
e9eff9d6 | 535 | if (*(u16 *)(&((_AddrA)[4])) != *(u16 *)(&((_AddrB)[4]))) \ |
b574488e | 536 | _Result = false; \ |
4d6f6af8 GKH |
537 | } |
538 | ||
539 | #if defined(CONFIG_X86_64) || defined(CONFIG_IA64) | |
e9eff9d6 | 540 | #define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \ |
4d6f6af8 | 541 | 0x00000000FFFFFFFF) |
e9eff9d6 | 542 | #define SLIC_GET_ADDR_HIGH(_addr) (u32)(((u64)(_addr) >> 32) & \ |
4d6f6af8 GKH |
543 | 0x00000000FFFFFFFF) |
544 | #else | |
e9eff9d6 LD |
545 | #define SLIC_GET_ADDR_LOW(_addr) (u32)_addr |
546 | #define SLIC_GET_ADDR_HIGH(_addr) (u32)0 | |
4d6f6af8 GKH |
547 | #endif |
548 | ||
b574488e GKH |
549 | #define FLUSH true |
550 | #define DONT_FLUSH false | |
4d6f6af8 GKH |
551 | |
552 | #define SIOCSLICDUMPCARD (SIOCDEVPRIVATE+9) | |
553 | #define SIOCSLICSETINTAGG (SIOCDEVPRIVATE+10) | |
554 | #define SIOCSLICTRACEDUMP (SIOCDEVPRIVATE+11) | |
555 | ||
556 | #endif /* __SLIC_DRIVER_H__ */ |