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1 | /* Driver for Realtek RTS51xx USB card reader |
2 | * Header file |
3 | * |
4 | * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved. |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the |
8 | * Free Software Foundation; either version 2, or (at your option) any |
9 | * later version. |
10 | * |
11 | * This program is distributed in the hope that it will be useful, but |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
14 | * General Public License for more details. |
15 | * |
16 | * You should have received a copy of the GNU General Public License along |
17 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
18 | * |
19 | * Author: |
20 | * wwang (wei_wang@realsil.com.cn) |
21 | * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China |
22 | * Maintainer: |
23 | * Edwin Rong (edwin_rong@realsil.com.cn) |
24 | * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China |
25 | */ |
26 | |
27 | #ifndef __RTS51X_MS_H |
28 | #define __RTS51X_MS_H |
29 | |
30 | #include "rts51x_chip.h" |
31 | |
32 | #define MS_MAX_RETRY_COUNT 3 |
33 | |
34 | #define MS_EXTRA_SIZE 0x9 |
35 | |
36 | #define WRT_PRTCT 0x01 |
37 | |
38 | /* Error Code */ |
39 | #define MS_NO_ERROR 0x00 |
40 | #define MS_CRC16_ERROR 0x80 |
41 | #define MS_TO_ERROR 0x40 |
42 | #define MS_NO_CARD 0x20 |
43 | #define MS_NO_MEMORY 0x10 |
44 | #define MS_CMD_NK 0x08 |
45 | #define MS_FLASH_READ_ERROR 0x04 |
46 | #define MS_FLASH_WRITE_ERROR 0x02 |
47 | #define MS_BREQ_ERROR 0x01 |
48 | #define MS_NOT_FOUND 0x03 |
49 | |
50 | /* Transfer Protocol Command */ |
51 | #define READ_PAGE_DATA 0x02 |
52 | #define READ_REG 0x04 |
53 | #define GET_INT 0x07 |
54 | #define WRITE_PAGE_DATA 0x0D |
55 | #define WRITE_REG 0x0B |
56 | #define SET_RW_REG_ADRS 0x08 |
57 | #define SET_CMD 0x0E |
58 | |
59 | #define PRO_READ_LONG_DATA 0x02 |
60 | #define PRO_READ_SHORT_DATA 0x03 |
61 | #define PRO_READ_REG 0x04 |
62 | #define PRO_READ_QUAD_DATA 0x05 |
63 | #define PRO_GET_INT 0x07 |
64 | #define PRO_WRITE_LONG_DATA 0x0D |
65 | #define PRO_WRITE_SHORT_DATA 0x0C |
66 | #define PRO_WRITE_QUAD_DATA 0x0A |
67 | #define PRO_WRITE_REG 0x0B |
68 | #define PRO_SET_RW_REG_ADRS 0x08 |
69 | #define PRO_SET_CMD 0x0E |
70 | #define PRO_EX_SET_CMD 0x09 |
71 | |
72 | #ifdef SUPPORT_MAGIC_GATE |
73 | #define MG_GET_ID 0x40 |
74 | #define MG_SET_LID 0x41 |
75 | #define MG_GET_LEKB 0x42 |
76 | #define MG_SET_RD 0x43 |
77 | #define MG_MAKE_RMS 0x44 |
78 | #define MG_MAKE_KSE 0x45 |
79 | #define MG_SET_IBD 0x46 |
80 | #define MG_GET_IBD 0x47 |
81 | #endif |
82 | |
83 | #ifdef XC_POWERCLASS |
84 | #define XC_CHG_POWER 0x16 |
85 | #endif |
86 | |
87 | /* ++ CMD over Memory Stick */ |
88 | /* Flash CMD */ |
89 | #define BLOCK_READ 0xAA |
90 | #define BLOCK_WRITE 0x55 |
91 | #define BLOCK_END 0x33 |
92 | #define BLOCK_ERASE 0x99 |
93 | #define FLASH_STOP 0xCC |
94 | |
95 | /* Function CMD */ |
96 | #define SLEEP 0x5A |
97 | #define CLEAR_BUF 0xC3 |
98 | #define MS_RESET 0x3C |
99 | /* -- CMD over Memory Stick */ |
100 | |
101 | /* ++ CMD over Memory Stick Pro */ |
102 | /* Flash CMD */ |
103 | #define PRO_READ_DATA 0x20 |
104 | #define PRO_WRITE_DATA 0x21 |
105 | #define PRO_READ_ATRB 0x24 |
106 | #define PRO_STOP 0x25 |
107 | #define PRO_ERASE 0x26 |
108 | #define PRO_READ_2K_DATA 0x27 |
109 | #define PRO_WRITE_2K_DATA 0x28 |
110 | |
111 | /* Function CMD */ |
112 | #define PRO_FORMAT 0x10 |
113 | #define PRO_SLEEP 0x11 |
114 | /* -- CMD over Memory Stick Pro */ |
115 | |
116 | /* register inside memory stick */ |
117 | #define IntReg 0x01 |
118 | #define StatusReg0 0x02 |
119 | #define StatusReg1 0x03 |
120 | |
121 | #define SystemParm 0x10 |
122 | #define BlockAdrs 0x11 |
123 | #define CMDParm 0x14 |
124 | #define PageAdrs 0x15 |
125 | |
126 | #define OverwriteFlag 0x16 |
127 | #define ManagemenFlag 0x17 |
128 | #define LogicalAdrs 0x18 |
129 | #define ReserveArea 0x1A |
130 | |
131 | /* register inside memory pro */ |
132 | #define Pro_IntReg 0x01 |
133 | #define Pro_StatusReg 0x02 |
134 | #define Pro_TypeReg 0x04 |
135 | #define Pro_IFModeReg 0x05 |
136 | #define Pro_CatagoryReg 0x06 |
137 | #define Pro_ClassReg 0x07 |
138 | |
139 | #define Pro_SystemParm 0x10 |
140 | #define Pro_DataCount1 0x11 |
141 | #define Pro_DataCount0 0x12 |
142 | #define Pro_DataAddr3 0x13 |
143 | #define Pro_DataAddr2 0x14 |
144 | #define Pro_DataAddr1 0x15 |
145 | #define Pro_DataAddr0 0x16 |
146 | |
147 | #define Pro_TPCParm 0x17 |
148 | #define Pro_CMDParm 0x18 |
149 | |
150 | /* define for INT Register */ |
151 | #define INT_REG_CED 0x80 |
152 | #define INT_REG_ERR 0x40 |
153 | #define INT_REG_BREQ 0x20 |
154 | #define INT_REG_CMDNK 0x01 |
155 | |
156 | /* INT signal */ |
157 | #define INT_CED 0x01 |
158 | #define INT_ERR 0x02 |
159 | #define INT_BREQ 0x04 |
160 | #define INT_CMDNK 0x08 |
161 | |
162 | /* define for OverwriteFlag Register */ |
163 | #define BLOCK_BOOT 0xC0 |
164 | #define BLOCK_OK 0x80 |
165 | #define PAGE_OK 0x60 |
166 | #define DATA_COMPL 0x10 |
167 | |
168 | /* define for ManagemenFlag Register */ |
169 | #define NOT_BOOT_BLOCK 0x4 |
170 | #define NOT_TRANSLATION_TABLE 0x8 |
171 | |
172 | /* Header */ |
173 | #define HEADER_ID0 (PPBUF_BASE2) /* 0 */ |
174 | #define HEADER_ID1 (PPBUF_BASE2 + 1) /* 1 */ |
175 | /* System Entry */ |
176 | #define DISABLED_BLOCK0 (PPBUF_BASE2 + 0x170 + 4) /* 2 */ |
177 | #define DISABLED_BLOCK1 (PPBUF_BASE2 + 0x170 + 5) /* 3 */ |
178 | #define DISABLED_BLOCK2 (PPBUF_BASE2 + 0x170 + 6) /* 4 */ |
179 | #define DISABLED_BLOCK3 (PPBUF_BASE2 + 0x170 + 7) /* 5 */ |
180 | /* Boot & Attribute Information */ |
181 | #define BLOCK_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 2) /* 6 */ |
182 | #define BLOCK_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 3) /* 7 */ |
183 | #define BLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 4) /* 8 */ |
184 | #define BLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 5) /* 9 */ |
185 | #define EBLOCK_COUNT_0 (PPBUF_BASE2 + 0x1a0 + 6) /* 10 */ |
186 | #define EBLOCK_COUNT_1 (PPBUF_BASE2 + 0x1a0 + 7) /* 11 */ |
187 | #define PAGE_SIZE_0 (PPBUF_BASE2 + 0x1a0 + 8) /* 12 */ |
188 | #define PAGE_SIZE_1 (PPBUF_BASE2 + 0x1a0 + 9) /* 13 */ |
189 | |
190 | /* joey 2004-08-07 for MS check Procedure */ |
191 | #define MS_Device_Type (PPBUF_BASE2 + 0x1D8) /* 14 */ |
192 | /* end */ |
193 | |
194 | /* joey 2004-05-03 */ |
195 | #define MS_4bit_Support (PPBUF_BASE2 + 0x1D3) /* 15 */ |
196 | /* end */ |
197 | |
198 | #define setPS_NG 1 |
199 | #define setPS_Error 0 |
200 | |
201 | /* define for Pro_SystemParm Register */ |
202 | #define PARALLEL_8BIT_IF 0x40 |
203 | #define PARALLEL_4BIT_IF 0x00 |
204 | #define SERIAL_IF 0x80 |
205 | |
206 | /* define for StatusReg0 Register */ |
207 | #define BUF_FULL 0x10 |
208 | #define BUF_EMPTY 0x20 |
209 | |
210 | /* define for StatusReg1 Register */ |
211 | #define MEDIA_BUSY 0x80 |
212 | #define FLASH_BUSY 0x40 |
213 | #define DATA_ERROR 0x20 |
214 | #define STS_UCDT 0x10 |
215 | #define EXTRA_ERROR 0x08 |
216 | #define STS_UCEX 0x04 |
217 | #define FLAG_ERROR 0x02 |
218 | #define STS_UCFG 0x01 |
219 | |
220 | #define MS_SHORT_DATA_LEN 32 |
221 | |
222 | #define FORMAT_SUCCESS 0 |
223 | #define FORMAT_FAIL 1 |
224 | #define FORMAT_IN_PROGRESS 2 |
225 | |
226 | #define MS_SET_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag |= 0x80) |
227 | #define MS_CLR_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag &= 0x7F) |
228 | #define MS_TST_BAD_BLOCK_FLG(ms_card) ((ms_card)->multi_flag & 0x80) |
229 | |
230 | #define CHECK_MS_TRANS_FAIL(chip, retval) \ |
231 | (((retval) != STATUS_SUCCESS) || \ |
232 | (chip->rsp_buf[0] & MS_TRANSFER_ERR)) |
233 | |
234 | void mspro_polling_format_status(struct rts51x_chip *chip); |
235 | void mspro_format_sense(struct rts51x_chip *chip, unsigned int lun); |
236 | |
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237 | int reset_ms_card(struct rts51x_chip *chip); |
238 | int ms_rw(struct scsi_cmnd *srb, struct rts51x_chip *chip, u32 start_sector, |
239 | u16 sector_cnt); |
240 | int mspro_format(struct scsi_cmnd *srb, struct rts51x_chip *chip, |
241 | int short_data_len, int quick_format); |
242 | void ms_free_l2p_tbl(struct rts51x_chip *chip); |
243 | void ms_cleanup_work(struct rts51x_chip *chip); |
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244 | int release_ms_card(struct rts51x_chip *chip); |
245 | int ms_delay_write(struct rts51x_chip *chip); |
246 | |
247 | #ifdef SUPPORT_MAGIC_GATE |
248 | |
249 | int ms_switch_clock(struct rts51x_chip *chip); |
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250 | int ms_write_bytes(struct rts51x_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *data, |
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251 | int data_len); |
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252 | int ms_read_bytes(struct rts51x_chip *chip, u8 tpc, u8 cnt, u8 cfg, u8 *data, |
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253 | int data_len); |
254 | int ms_set_rw_reg_addr(struct rts51x_chip *chip, u8 read_start, u8 read_cnt, |
255 | u8 write_start, u8 write_cnt); |
256 | int ms_transfer_data(struct rts51x_chip *chip, u8 trans_mode, u8 tpc, |
257 | u16 sec_cnt, u8 cfg, int mode_2k, int use_sg, void *buf, |
258 | int buf_len); |
259 | #endif |
260 | |
261 | #endif /* __RTS51X_MS_H */ |