Commit | Line | Data |
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5f53d8ca JC |
1 | |
2 | #include "r8192U.h" | |
3 | #include "r8192S_hw.h" | |
4 | #include "r8192S_phyreg.h" | |
5 | #include "r8192S_phy.h" | |
6 | #include "r8192S_rtl8225.h" | |
7 | ||
8 | /*---------------------Define local function prototype-----------------------*/ | |
9 | void phy_RF8225_Config_HardCode(struct net_device* dev ); | |
10 | bool phy_RF8225_Config_ParaFile(struct net_device* dev ); | |
11 | /*---------------------Define local function prototype-----------------------*/ | |
12 | void PHY_SetRF8225OfdmTxPower(struct net_device* dev ,u8 powerlevel) | |
13 | { | |
14 | ||
15 | } | |
16 | ||
17 | ||
18 | ||
19 | void PHY_SetRF8225CckTxPower( struct net_device* dev , u8 powerlevel) | |
20 | { | |
21 | ||
22 | } | |
23 | ||
24 | ||
25 | // TODO: The following RF 022D related function should be removed to HalPhy0222D.c. | |
26 | void PHY_SetRF0222DOfdmTxPower(struct net_device* dev ,u8 powerlevel) | |
27 | { | |
28 | //TODO: We should set RF TxPower for RF 0222D here!! | |
29 | } | |
30 | ||
31 | ||
32 | ||
33 | void PHY_SetRF0222DCckTxPower(struct net_device* dev ,u8 powerlevel) | |
34 | { | |
35 | //TODO: We should set RF TxPower for RF 0222D here!! | |
36 | } | |
37 | ||
38 | ||
39 | /*----------------------------------------------------------------------------- | |
40 | * Function: PHY_SetRF0222DBandwidth() | |
41 | * | |
42 | * Overview: This function is called by SetBWModeCallback8190Pci() only | |
43 | * | |
44 | * Input: PADAPTER Adapter | |
45 | * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M | |
46 | * | |
47 | * Output: NONE | |
48 | * | |
49 | * Return: NONE | |
50 | * | |
51 | * Note: For RF type 0222D | |
52 | *---------------------------------------------------------------------------*/ | |
53 | //just in phy | |
54 | void PHY_SetRF0222DBandwidth(struct net_device* dev , HT_CHANNEL_WIDTH Bandwidth) //20M or 40M | |
55 | { | |
56 | u8 eRFPath; | |
57 | struct r8192_priv *priv = ieee80211_priv(dev); | |
58 | ||
59 | ||
60 | //if (IS_HARDWARE_TYPE_8192S(dev)) | |
61 | if (1) | |
62 | { | |
63 | #ifndef RTL92SE_FPGA_VERIFY | |
64 | switch(Bandwidth) | |
65 | { | |
66 | case HT_CHANNEL_WIDTH_20: | |
67 | #ifdef FIB_MODIFICATION | |
68 | write_nic_byte(dev, rFPGA0_AnalogParameter2, 0x58); | |
69 | #endif | |
70 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x01); | |
71 | break; | |
72 | case HT_CHANNEL_WIDTH_20_40: | |
73 | #ifdef FIB_MODIFICATION | |
74 | write_nic_byte(dev, rFPGA0_AnalogParameter2, 0x18); | |
75 | #endif | |
76 | rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, BIT10|BIT11, 0x00); | |
77 | break; | |
78 | default: | |
79 | ;//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); | |
80 | break; | |
81 | } | |
82 | #endif | |
83 | } | |
84 | else | |
85 | { | |
86 | for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) | |
87 | { | |
88 | switch(Bandwidth) | |
89 | { | |
90 | case HT_CHANNEL_WIDTH_20: | |
91 | //rtl8192_phy_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x01); | |
92 | break; | |
93 | case HT_CHANNEL_WIDTH_20_40: | |
94 | //rtl8192_phy_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x00); | |
95 | break; | |
96 | default: | |
97 | ;//RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); | |
98 | break; | |
99 | ||
100 | } | |
101 | } | |
102 | } | |
103 | ||
104 | } | |
105 | ||
106 | // TODO: Aabove RF 022D related function should be removed to HalPhy0222D.c. | |
107 | ||
108 | /*----------------------------------------------------------------------------- | |
109 | * Function: PHY_SetRF8225Bandwidth() | |
110 | * | |
111 | * Overview: This function is called by SetBWModeCallback8190Pci() only | |
112 | * | |
113 | * Input: PADAPTER Adapter | |
114 | * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M | |
115 | * | |
116 | * Output: NONE | |
117 | * | |
118 | * Return: NONE | |
119 | * | |
120 | * Note: 8225(zebra1) support 20M only | |
121 | *---------------------------------------------------------------------------*/ | |
122 | //just in phy | |
123 | void PHY_SetRF8225Bandwidth(struct net_device* dev ,HT_CHANNEL_WIDTH Bandwidth) //20M or 40M | |
124 | { | |
125 | u8 eRFPath; | |
126 | struct r8192_priv *priv = ieee80211_priv(dev); | |
127 | ||
128 | //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) | |
129 | for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) | |
130 | { | |
131 | switch(Bandwidth) | |
132 | { | |
133 | case HT_CHANNEL_WIDTH_20: | |
134 | // TODO: Update the parameters here | |
135 | break; | |
136 | case HT_CHANNEL_WIDTH_20_40: | |
137 | RT_TRACE(COMP_DBG, "SetChannelBandwidth8190Pci():8225 does not support 40M mode\n"); | |
138 | break; | |
139 | default: | |
140 | RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ); | |
141 | break; | |
142 | ||
143 | } | |
144 | } | |
145 | ||
146 | } | |
147 | ||
148 | //just in phy | |
149 | bool PHY_RF8225_Config(struct net_device* dev ) | |
150 | { | |
151 | struct r8192_priv *priv = ieee80211_priv(dev); | |
152 | bool rtStatus = true; | |
153 | //RF90_RADIO_PATH_E eRFPath; | |
154 | //BB_REGISTER_DEFINITION_T *pPhyReg; | |
155 | //u32 OrgStoreRFIntSW[RF90_PATH_D+1]; | |
156 | ||
157 | // | |
158 | // Initialize general global value | |
159 | // | |
160 | // TODO: Extend RF_PATH_C and RF_PATH_D in the future | |
161 | priv->NumTotalRFPath = 2; | |
162 | ||
163 | // | |
164 | // Config BB and RF | |
165 | // | |
166 | //switch( Adapter->MgntInfo.bRegHwParaFile ) | |
167 | //{ | |
168 | // case 0: | |
169 | // phy_RF8225_Config_HardCode(dev); | |
170 | // break; | |
171 | ||
172 | // case 1: | |
173 | // rtStatus = phy_RF8225_Config_ParaFile(dev); | |
174 | // break; | |
175 | ||
176 | // case 2: | |
177 | // Partial Modify. | |
178 | phy_RF8225_Config_HardCode(dev); | |
179 | phy_RF8225_Config_ParaFile(dev); | |
180 | // break; | |
181 | ||
182 | // default: | |
183 | // phy_RF8225_Config_HardCode(dev); | |
184 | // break; | |
185 | //} | |
186 | return rtStatus; | |
187 | ||
188 | } | |
189 | ||
190 | //just in 8225 | |
191 | void phy_RF8225_Config_HardCode(struct net_device* dev) | |
192 | { | |
193 | ||
194 | // Set Default Bandwidth to 20M | |
195 | //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); | |
196 | ||
197 | // TODO: Set Default Channel to channel one for RTL8225 | |
198 | ||
199 | } | |
200 | ||
201 | //just in 8225 | |
202 | bool phy_RF8225_Config_ParaFile(struct net_device* dev) | |
203 | { | |
204 | u32 u4RegValue = 0; | |
205 | //static char szRadioAFile[] = RTL819X_PHY_RADIO_A; | |
206 | //static char szRadioBFile[] = RTL819X_PHY_RADIO_B; | |
207 | u8 eRFPath; | |
208 | bool rtStatus = true; | |
209 | struct r8192_priv *priv = ieee80211_priv(dev); | |
210 | BB_REGISTER_DEFINITION_T *pPhyReg; | |
211 | //u8 eCheckItem; | |
212 | ||
213 | #if 1 | |
214 | //3//----------------------------------------------------------------- | |
215 | //3// <2> Initialize RF | |
216 | //3//----------------------------------------------------------------- | |
217 | //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) | |
218 | for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) | |
219 | { | |
220 | ||
221 | pPhyReg = &priv->PHYRegDef[eRFPath]; | |
222 | ||
223 | /*----Store original RFENV control type----*/ | |
224 | switch(eRFPath) | |
225 | { | |
226 | case RF90_PATH_A: | |
227 | case RF90_PATH_C: | |
228 | u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); | |
229 | break; | |
230 | case RF90_PATH_B : | |
231 | case RF90_PATH_D: | |
232 | u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); | |
233 | break; | |
234 | } | |
235 | ||
236 | /*----Set RF_ENV enable----*/ | |
237 | rtl8192_setBBreg(dev, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); | |
238 | ||
239 | /*----Set RF_ENV output high----*/ | |
240 | rtl8192_setBBreg(dev, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); | |
241 | ||
242 | /* Set bit number of Address and Data for RF register */ | |
243 | rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 | |
244 | rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 | |
245 | ||
246 | ||
247 | /*----Initialize RF fom connfiguration file----*/ | |
248 | switch(eRFPath) | |
249 | { | |
250 | case RF90_PATH_A: | |
251 | //rtStatus = PHY_ConfigRFWithParaFile(dev, (char* )&szRadioAFile, (RF90_RADIO_PATH_E)eRFPath); | |
252 | rtStatus = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); | |
253 | break; | |
254 | case RF90_PATH_B: | |
255 | //rtStatus = PHY_ConfigRFWithParaFile(dev, (char* )&szRadioBFile, (RF90_RADIO_PATH_E)eRFPath); | |
256 | rtStatus = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); | |
257 | break; | |
258 | case RF90_PATH_C: | |
259 | break; | |
260 | case RF90_PATH_D: | |
261 | break; | |
262 | } | |
263 | ||
264 | /*----Restore RFENV control type----*/; | |
265 | switch(eRFPath) | |
266 | { | |
267 | case RF90_PATH_A: | |
268 | case RF90_PATH_C: | |
269 | rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); | |
270 | break; | |
271 | case RF90_PATH_B : | |
272 | case RF90_PATH_D: | |
273 | rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); | |
274 | break; | |
275 | } | |
276 | ||
277 | if(rtStatus == false){ | |
278 | //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF8225_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); | |
279 | goto phy_RF8225_Config_ParaFile_Fail; | |
280 | } | |
281 | ||
282 | } | |
283 | ||
284 | //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF8225_Config_ParaFile()\n")); | |
285 | return rtStatus; | |
286 | ||
287 | phy_RF8225_Config_ParaFile_Fail: | |
288 | #endif | |
289 | return rtStatus; | |
290 | } | |
291 | ||
292 |