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Staging: add rtl8187se driver
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / rtl8187se / r8180_core.c
CommitLineData
c8d86be3
GKH		 1/*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25*/
26
27#if 0
28double __floatsidf (int i) { return i; }
29unsigned int __fixunsdfsi (double d) { return d; }
30double __adddf3(double a, double b) { return a+b; }
31double __addsf3(float a, float b) { return a+b; }
32double __subdf3(double a, double b) { return a-b; }
33double __extendsfdf2(float a) {return a;}
34#endif
35
36
37#undef DEBUG_TX_DESC2
38#undef RX_DONT_PASS_UL
39#undef DEBUG_EPROM
40#undef DEBUG_RX_VERBOSE
41#undef DUMMY_RX
42#undef DEBUG_ZERO_RX
43#undef DEBUG_RX_SKB
44#undef DEBUG_TX_FRAG
45#undef DEBUG_RX_FRAG
46#undef DEBUG_TX_FILLDESC
47#undef DEBUG_TX
48#undef DEBUG_IRQ
49#undef DEBUG_RX
50#undef DEBUG_RXALLOC
51#undef DEBUG_REGISTERS
52#undef DEBUG_RING
53#undef DEBUG_IRQ_TASKLET
54#undef DEBUG_TX_ALLOC
55#undef DEBUG_TX_DESC
56
57//#define DEBUG_TX
58//#define DEBUG_TX_DESC2
59//#define DEBUG_RX
60//#define DEBUG_RX_SKB
61
62//#define CONFIG_RTL8180_IO_MAP
63#include <linux/syscalls.h>
64//#include <linux/fcntl.h>
65//#include <asm/uaccess.h>
66#include "r8180_hw.h"
67#include "r8180.h"
68#include "r8180_sa2400.h" /* PHILIPS Radio frontend */
69#include "r8180_max2820.h" /* MAXIM Radio frontend */
70#include "r8180_gct.h" /* GCT Radio frontend */
71#include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
72#include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
73#include "r8180_93cx6.h" /* Card EEPROM */
74#include "r8180_wx.h"
75#include "r8180_dm.h"
76
77#ifdef CONFIG_RTL8180_PM
78#include "r8180_pm.h"
79#endif
80
81#ifdef ENABLE_DOT11D
82#include "dot11d.h"
83#endif
84
85#ifdef CONFIG_RTL8185B
86//#define CONFIG_RTL8180_IO_MAP
87#endif
88
89#ifndef PCI_VENDOR_ID_BELKIN
90 #define PCI_VENDOR_ID_BELKIN 0x1799
91#endif
92#ifndef PCI_VENDOR_ID_DLINK
93 #define PCI_VENDOR_ID_DLINK 0x1186
94#endif
95
96static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
97 {
98 .vendor = PCI_VENDOR_ID_REALTEK,
99// .device = 0x8180,
100 .device = 0x8199,
101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID,
103 .driver_data = 0,
104 },
105 {
106 .vendor = PCI_VENDOR_ID_BELKIN,
107 .device = 0x6001,
108 .subvendor = PCI_ANY_ID,
109 .subdevice = PCI_ANY_ID,
110 .driver_data = 1,
111 },
112 { /* Belkin F5D6020 v3 */
113 .vendor = PCI_VENDOR_ID_BELKIN,
114 .device = 0x6020,
115 .subvendor = PCI_ANY_ID,
116 .subdevice = PCI_ANY_ID,
117 .driver_data = 2,
118 },
119 { /* D-Link DWL-610 */
120 .vendor = PCI_VENDOR_ID_DLINK,
121 .device = 0x3300,
122 .subvendor = PCI_ANY_ID,
123 .subdevice = PCI_ANY_ID,
124 .driver_data = 3,
125 },
126 {
127 .vendor = PCI_VENDOR_ID_REALTEK,
128 .device = 0x8185,
129 .subvendor = PCI_ANY_ID,
130 .subdevice = PCI_ANY_ID,
131 .driver_data = 4,
132 },
133 {
134 .vendor = 0,
135 .device = 0,
136 .subvendor = 0,
137 .subdevice = 0,
138 .driver_data = 0,
139 }
140};
141
142
143static char* ifname = "wlan%d";
144static int hwseqnum = 0;
145//static char* ifname = "ath%d";
146static int hwwep = 0;
147static int channels = 0x3fff;
148
149#define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
150#define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
151MODULE_LICENSE("GPL");
152MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
153MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
154MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
155
156
157
158/*
159MODULE_PARM(ifname, "s");
160MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
161
162MODULE_PARM(hwseqnum,"i");
163MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
164
165MODULE_PARM(hwwep,"i");
166MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
167
168MODULE_PARM(channels,"i");
169MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
170*/
171
172#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
173module_param(ifname, charp, S_IRUGO|S_IWUSR );
174module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
175module_param(hwwep,int, S_IRUGO|S_IWUSR);
176module_param(channels,int, S_IRUGO|S_IWUSR);
177#else
178MODULE_PARM(ifname, "s");
179MODULE_PARM(hwseqnum,"i");
180MODULE_PARM(hwwep,"i");
181MODULE_PARM(channels,"i");
182#endif
183
184MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
185//MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
186MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
187MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
188MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
189
190
191static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
192 const struct pci_device_id *id);
193
194static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
195
196static void rtl8180_shutdown (struct pci_dev *pdev)
197{
198 struct net_device *dev = pci_get_drvdata(pdev);
199 dev->stop(dev);
200 pci_disable_device(pdev);
201}
202
203static struct pci_driver rtl8180_pci_driver = {
204 .name = RTL8180_MODULE_NAME, /* Driver name */
205 .id_table = rtl8180_pci_id_tbl, /* PCI_ID table */
206 .probe = rtl8180_pci_probe, /* probe fn */
207 .remove = __devexit_p(rtl8180_pci_remove),/* remove fn */
208#ifdef CONFIG_RTL8180_PM
209 .suspend = rtl8180_suspend, /* PM suspend fn */
210 .resume = rtl8180_resume, /* PM resume fn */
211#else
212 .suspend = NULL, /* PM suspend fn */
213 .resume = NULL, /* PM resume fn */
214#endif
215 .shutdown = rtl8180_shutdown,
216};
217
218
219
220#ifdef CONFIG_RTL8180_IO_MAP
221
222u8 read_nic_byte(struct net_device *dev, int x)
223{
224 return 0xff&inb(dev->base_addr +x);
225}
226
227u32 read_nic_dword(struct net_device *dev, int x)
228{
229 return inl(dev->base_addr +x);
230}
231
232u16 read_nic_word(struct net_device *dev, int x)
233{
234 return inw(dev->base_addr +x);
235}
236
237void write_nic_byte(struct net_device *dev, int x,u8 y)
238{
239 outb(y&0xff,dev->base_addr +x);
240}
241
242void write_nic_word(struct net_device *dev, int x,u16 y)
243{
244 outw(y,dev->base_addr +x);
245}
246
247void write_nic_dword(struct net_device *dev, int x,u32 y)
248{
249 outl(y,dev->base_addr +x);
250}
251
252#else /* RTL_IO_MAP */
253
254u8 read_nic_byte(struct net_device *dev, int x)
255{
256 return 0xff&readb((u8*)dev->mem_start +x);
257}
258
259u32 read_nic_dword(struct net_device *dev, int x)
260{
261 return readl((u8*)dev->mem_start +x);
262}
263
264u16 read_nic_word(struct net_device *dev, int x)
265{
266 return readw((u8*)dev->mem_start +x);
267}
268
269void write_nic_byte(struct net_device *dev, int x,u8 y)
270{
271 writeb(y,(u8*)dev->mem_start +x);
272 udelay(20);
273}
274
275void write_nic_dword(struct net_device *dev, int x,u32 y)
276{
277 writel(y,(u8*)dev->mem_start +x);
278 udelay(20);
279}
280
281void write_nic_word(struct net_device *dev, int x,u16 y)
282{
283 writew(y,(u8*)dev->mem_start +x);
284 udelay(20);
285}
286
287#endif /* RTL_IO_MAP */
288
289
290
291
292
293inline void force_pci_posting(struct net_device *dev)
294{
295 read_nic_byte(dev,EPROM_CMD);
296#ifndef CONFIG_RTL8180_IO_MAP
297 mb();
298#endif
299}
300
301
302irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
303void set_nic_rxring(struct net_device *dev);
304void set_nic_txring(struct net_device *dev);
305static struct net_device_stats *rtl8180_stats(struct net_device *dev);
306void rtl8180_commit(struct net_device *dev);
307void rtl8180_start_tx_beacon(struct net_device *dev);
308
309/****************************************************************************
310 -----------------------------PROCFS STUFF-------------------------
311*****************************************************************************/
312
313static struct proc_dir_entry *rtl8180_proc = NULL;
314
315static int proc_get_registers(char *page, char **start,
316 off_t offset, int count,
317 int *eof, void *data)
318{
319 struct net_device *dev = data;
320// struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
321
322 int len = 0;
323 int i,n;
324
325 int max=0xff;
326
327 /* This dump the current register page */
328 for(n=0;n<=max;)
329 {
330 //printk( "\nD: %2x> ", n);
331 len += snprintf(page + len, count - len,
332 "\nD: %2x > ",n);
333
334 for(i=0;i<16 && n<=max;i++,n++)
335 len += snprintf(page + len, count - len,
336 "%2x ",read_nic_byte(dev,n));
337
338 // printk("%2x ",read_nic_byte(dev,n));
339 }
340 len += snprintf(page + len, count - len,"\n");
341
342
343
344 *eof = 1;
345 return len;
346
347}
348
349int get_curr_tx_free_desc(struct net_device *dev, int priority);
350
351static int proc_get_stats_hw(char *page, char **start,
352 off_t offset, int count,
353 int *eof, void *data)
354{
355 //struct net_device *dev = data;
356 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
357
358 int len = 0;
359#ifdef CONFIG_RTL8185B
360
361#else
362 len += snprintf(page + len, count - len,
363 "NIC int: %lu\n"
364 "Total int: %lu\n"
365 "--------------------\n"
366 "LP avail desc %d\n"
367 "NP avail desc %d\n"
368 "--------------------\n"
369 "LP phys dma addr %x\n"
370 "LP NIC ptr %x\n"
371 "LP virt 32base %x\n"
372 "LP virt 32tail %x\n"
373 "--------------------\n"
374 "NP phys dma addr %x\n"
375 "NP NIC ptr %x\n"
376 "NP virt 32base %x\n"
377 "NP virt 32tail %x\n"
378 "--------------------\n"
379 "BP phys dma addr %x\n"
380 "BP NIC ptr %x\n"
381 "BP virt 32base %x\n"
382 "BP virt 32tail %x\n",
383 priv->stats.ints,
384 priv->stats.shints,
385 get_curr_tx_free_desc(dev,LOW_PRIORITY),
386 get_curr_tx_free_desc(dev,NORM_PRIORITY),
387 (u32)priv->txvipringdma,
388 read_nic_dword(dev,TLPDA),
389 (u32)priv->txvipring,
390 (u32)priv->txvipringtail,
391 (u32)priv->txvopringdma,
392 read_nic_dword(dev,TNPDA),
393 (u32)priv->txvopring,
394 (u32)priv->txvopringtail,
395 (u32)priv->txbeaconringdma,
396 read_nic_dword(dev,TBDA),
397 (u32)priv->txbeaconring,
398 (u32)priv->txbeaconringtail);
399#endif
400 *eof = 1;
401 return len;
402}
403
404
405static int proc_get_stats_rx(char *page, char **start,
406 off_t offset, int count,
407 int *eof, void *data)
408{
409 struct net_device *dev = data;
410 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
411
412 int len = 0;
413
414 len += snprintf(page + len, count - len,
415 /* "RX descriptor not available: %lu\n"
416 "RX incomplete (missing last descriptor): %lu\n"
417 "RX not data: %lu\n"
418 //"RX descriptor pointer reset: %lu\n"
419 "RX descriptor pointer lost: %lu\n"
420 //"RX pointer workaround: %lu\n"
421 "RX error int: %lu\n"
422 "RX fifo overflow: %lu\n"
423 "RX int: %lu\n"
424 "RX packet: %lu\n"
425 "RX bytes: %lu\n"
426 "RX DMA fail: %lu\n",
427 priv->stats.rxrdu,
428 priv->stats.rxnolast,
429 priv->stats.rxnodata,
430 //priv->stats.rxreset,
431 priv->stats.rxnopointer,
432 //priv->stats.rxwrkaround,
433 priv->stats.rxerr,
434 priv->stats.rxoverflow,
435 priv->stats.rxint,
436 priv->ieee80211->stats.rx_packets,
437 priv->ieee80211->stats.rx_bytes,
438 priv->stats.rxdmafail */
439 "RX OK: %lu\n"
440 "RX Retry: %lu\n"
441 "RX CRC Error(0-500): %lu\n"
442 "RX CRC Error(500-1000): %lu\n"
443 "RX CRC Error(>1000): %lu\n"
444 "RX ICV Error: %lu\n",
445 priv->stats.rxint,
446 priv->stats.rxerr,
447 priv->stats.rxcrcerrmin,
448 priv->stats.rxcrcerrmid,
449 priv->stats.rxcrcerrmax,
450 priv->stats.rxicverr
451 );
452
453 *eof = 1;
454 return len;
455}
456
457#if 0
458static int proc_get_stats_ieee(char *page, char **start,
459 off_t offset, int count,
460 int *eof, void *data)
461{
462 struct net_device *dev = data;
463 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
464
465 int len = 0;
466
467 len += snprintf(page + len, count - len,
468 "TXed association requests: %u\n"
469 "TXed authentication requests: %u\n"
470 "RXed successful association response: %u\n"
471 "RXed failed association response: %u\n"
472 "RXed successful authentication response: %u\n"
473 "RXed failed authentication response: %u\n"
474 "Association requests without response: %u\n"
475 "Authentication requests without response: %u\n"
476 "TX probe response: %u\n"
477 "RX probe request: %u\n"
478 "TX probe request: %lu\n"
479 "RX authentication requests: %lu\n"
480 "RX association requests: %lu\n"
481 "Reassociations: %lu\n",
482 priv->ieee80211->ieee_stats.tx_ass,
483 priv->ieee80211->ieee_stats.tx_aut,
484 priv->ieee80211->ieee_stats.rx_ass_ok,
485 priv->ieee80211->ieee_stats.rx_ass_err,
486 priv->ieee80211->ieee_stats.rx_aut_ok,
487 priv->ieee80211->ieee_stats.rx_aut_err,
488 priv->ieee80211->ieee_stats.ass_noresp,
489 priv->ieee80211->ieee_stats.aut_noresp,
490 priv->ieee80211->ieee_stats.tx_probe,
491 priv->ieee80211->ieee_stats.rx_probe,
492 priv->ieee80211->ieee_stats.tx_probe_rq,
493 priv->ieee80211->ieee_stats.rx_auth_rq,
494 priv->ieee80211->ieee_stats.rx_assoc_rq,
495 priv->ieee80211->ieee_stats.reassoc);
496
497 *eof = 1;
498 return len;
499}
500#endif
501#if 0
502static int proc_get_stats_ap(char *page, char **start,
503 off_t offset, int count,
504 int *eof, void *data)
505{
506 struct net_device *dev = data;
507 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
508 struct mac_htable_t *list;
509 int i;
510 int len = 0;
511
512 if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
513 len += snprintf(page + len, count - len,
514 "Card is not acting as AP...\n"
515 );
516 }else{
517 len += snprintf(page + len, count - len,
518 "List of associated STA:\n"
519 );
520
521 for(i=0;i<MAC_HTABLE_ENTRY;i++)
522 for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
523 len += snprintf(page + len, count - len,
524 MACSTR"\n",MAC2STR(list->adr));
525 }
526
527 }
528 *eof = 1;
529 return len;
530}
531#endif
532
533static int proc_get_stats_tx(char *page, char **start,
534 off_t offset, int count,
535 int *eof, void *data)
536{
537 struct net_device *dev = data;
538 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
539
540 int len = 0;
541 unsigned long totalOK;
542
543 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
544 len += snprintf(page + len, count - len,
545 /* "TX normal priority ok int: %lu\n"
546 "TX normal priority error int: %lu\n"
547 "TX high priority ok int: %lu\n"
548 "TX high priority failed error int: %lu\n"
549 "TX low priority ok int: %lu\n"
550 "TX low priority failed error int: %lu\n"
551 "TX bytes: %lu\n"
552 "TX packets: %lu\n"
553 "TX queue resume: %lu\n"
554 "TX queue stopped?: %d\n"
555 "TX fifo overflow: %lu\n"
556 //"SW TX stop: %lu\n"
557 //"SW TX wake: %lu\n"
558 "TX beacon: %lu\n"
559 "TX beacon aborted: %lu\n",
560 priv->stats.txnpokint,
561 priv->stats.txnperr,
562 priv->stats.txhpokint,
563 priv->stats.txhperr,
564 priv->stats.txlpokint,
565 priv->stats.txlperr,
566 priv->ieee80211->stats.tx_bytes,
567 priv->ieee80211->stats.tx_packets,
568 priv->stats.txresumed,
569 netif_queue_stopped(dev),
570 priv->stats.txoverflow,
571 //priv->ieee80211->ieee_stats.swtxstop,
572 //priv->ieee80211->ieee_stats.swtxawake,
573 priv->stats.txbeacon,
574 priv->stats.txbeaconerr */
575 "TX OK: %lu\n"
576 "TX Error: %lu\n"
577 "TX Retry: %lu\n"
578 "TX beacon OK: %lu\n"
579 "TX beacon error: %lu\n",
580 totalOK,
581 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
582 priv->stats.txretry,
583 priv->stats.txbeacon,
584 priv->stats.txbeaconerr
585 );
586
587 *eof = 1;
588 return len;
589}
590
591
592#if WIRELESS_EXT < 17
593static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
594{
595 struct r8180_priv *priv = ieee80211_priv(dev);
596
597 return &priv->wstats;
598}
599#endif
600void rtl8180_proc_module_init(void)
601{
602 DMESG("Initializing proc filesystem");
603#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
604 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, proc_net);
605#else
606 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
607#endif
608}
609
610
611void rtl8180_proc_module_remove(void)
612{
613#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
614 remove_proc_entry(RTL8180_MODULE_NAME, proc_net);
615#else
616 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
617#endif
618}
619
620
621void rtl8180_proc_remove_one(struct net_device *dev)
622{
623 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
624 if (priv->dir_dev) {
625 remove_proc_entry("stats-hw", priv->dir_dev);
626 remove_proc_entry("stats-tx", priv->dir_dev);
627 remove_proc_entry("stats-rx", priv->dir_dev);
628// remove_proc_entry("stats-ieee", priv->dir_dev);
629// remove_proc_entry("stats-ap", priv->dir_dev);
630 remove_proc_entry("registers", priv->dir_dev);
631 remove_proc_entry(dev->name, rtl8180_proc);
632 priv->dir_dev = NULL;
633 }
634}
635
636
637void rtl8180_proc_init_one(struct net_device *dev)
638{
639 struct proc_dir_entry *e;
640 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
641 priv->dir_dev = create_proc_entry(dev->name,
642 S_IFDIR | S_IRUGO | S_IXUGO,
643 rtl8180_proc);
644 if (!priv->dir_dev) {
645 DMESGE("Unable to initialize /proc/net/rtl8180/%s\n",
646 dev->name);
647 return;
648 }
649
650 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
651 priv->dir_dev, proc_get_stats_hw, dev);
652
653 if (!e) {
654 DMESGE("Unable to initialize "
655 "/proc/net/rtl8180/%s/stats-hw\n",
656 dev->name);
657 }
658
659 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
660 priv->dir_dev, proc_get_stats_rx, dev);
661
662 if (!e) {
663 DMESGE("Unable to initialize "
664 "/proc/net/rtl8180/%s/stats-rx\n",
665 dev->name);
666 }
667
668
669 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
670 priv->dir_dev, proc_get_stats_tx, dev);
671
672 if (!e) {
673 DMESGE("Unable to initialize "
674 "/proc/net/rtl8180/%s/stats-tx\n",
675 dev->name);
676 }
677 #if 0
678 e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
679 priv->dir_dev, proc_get_stats_ieee, dev);
680
681 if (!e) {
682 DMESGE("Unable to initialize "
683 "/proc/net/rtl8180/%s/stats-ieee\n",
684 dev->name);
685 }
686 #endif
687 #if 0
688 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
689 priv->dir_dev, proc_get_stats_ap, dev);
690
691 if (!e) {
692 DMESGE("Unable to initialize "
693 "/proc/net/rtl8180/%s/stats-ap\n",
694 dev->name);
695 }
696 #endif
697
698 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
699 priv->dir_dev, proc_get_registers, dev);
700
701 if (!e) {
702 DMESGE("Unable to initialize "
703 "/proc/net/rtl8180/%s/registers\n",
704 dev->name);
705 }
706}
707/****************************************************************************
708 -----------------------------MISC STUFF-------------------------
709*****************************************************************************/
710/*
711 FIXME: check if we can use some standard already-existent
712 data type+functions in kernel
713*/
714
715short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
716 struct buffer **bufferhead)
717{
718#ifdef DEBUG_RING
719 DMESG("adding buffer to TX/RX struct");
720#endif
721
722 struct buffer *tmp;
723
724 if(! *buffer){
725
726 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
727
728 if (*buffer == NULL) {
729 DMESGE("Failed to kmalloc head of TX/RX struct");
730 return -1;
731 }
732 (*buffer)->next=*buffer;
733 (*buffer)->buf=buf;
734 (*buffer)->dma=dma;
735 if(bufferhead !=NULL)
736 (*bufferhead) = (*buffer);
737 return 0;
738 }
739 tmp=*buffer;
740
741 while(tmp->next!=(*buffer)) tmp=tmp->next;
742 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
743 DMESGE("Failed to kmalloc TX/RX struct");
744 return -1;
745 }
746 tmp->next->buf=buf;
747 tmp->next->dma=dma;
748 tmp->next->next=*buffer;
749
750 return 0;
751}
752
753
754void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
755consistent)
756{
757
758 struct buffer *tmp,*next;
759 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
760 struct pci_dev *pdev=priv->pdev;
761 //int i;
762
763 if(! *buffer) return;
764
765 /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
766
767 */
768 tmp=*buffer;
769 do{
770 next=tmp->next;
771 if(consistent){
772 pci_free_consistent(pdev,len,
773 tmp->buf,tmp->dma);
774 }else{
775 pci_unmap_single(pdev, tmp->dma,
776 len,PCI_DMA_FROMDEVICE);
777 kfree(tmp->buf);
778 }
779 kfree(tmp);
780 tmp = next;
781 }
782 while(next != *buffer);
783
784 *buffer=NULL;
785}
786
787
788void print_buffer(u32 *buffer, int len)
789{
790 int i;
791 u8 *buf =(u8*)buffer;
792
793 printk("ASCII BUFFER DUMP (len: %x):\n",len);
794
795 for(i=0;i<len;i++)
796 printk("%c",buf[i]);
797
798 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
799
800 for(i=0;i<len;i++)
801 printk("%02x",buf[i]);
802
803 printk("\n");
804}
805
806
807int get_curr_tx_free_desc(struct net_device *dev, int priority)
808{
809 struct r8180_priv *priv = ieee80211_priv(dev);
810 u32* tail;
811 u32* head;
812 int ret;
813
814 switch (priority){
815 case MANAGE_PRIORITY:
816 head = priv->txmapringhead;
817 tail = priv->txmapringtail;
818 break;
819 case BK_PRIORITY:
820 head = priv->txbkpringhead;
821 tail = priv->txbkpringtail;
822 break;
823 case BE_PRIORITY:
824 head = priv->txbepringhead;
825 tail = priv->txbepringtail;
826 break;
827 case VI_PRIORITY:
828 head = priv->txvipringhead;
829 tail = priv->txvipringtail;
830 break;
831 case VO_PRIORITY:
832 head = priv->txvopringhead;
833 tail = priv->txvopringtail;
834 break;
835 case HI_PRIORITY:
836 head = priv->txhpringhead;
837 tail = priv->txhpringtail;
838 break;
839 default:
840 return -1;
841 }
842
843 //DMESG("%x %x", head, tail);
844
845 /* FIXME FIXME FIXME FIXME */
846
847#if 0
848 if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
849 return (head - tail)/8/4;
850#else
851 if( head <= tail )
852 ret = priv->txringcount - (tail - head)/8;
853 else
854 ret = (head - tail)/8;
855
856 if(ret > priv->txringcount ) DMESG("BUG");
857 return ret;
858#endif
859}
860
861
862short check_nic_enought_desc(struct net_device *dev, int priority)
863{
864 struct r8180_priv *priv = ieee80211_priv(dev);
865 struct ieee80211_device *ieee = netdev_priv(dev);
866
867 int requiredbyte, required;
868 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
869
870 if(ieee->current_network.QoS_Enable) {
871 requiredbyte += 2;
872 };
873
874 required = requiredbyte / (priv->txbuffsize-4);
875 if (requiredbyte % priv->txbuffsize) required++;
876 /* for now we keep two free descriptor as a safety boundary
877 * between the tail and the head
878 */
879
880 return (required+2 < get_curr_tx_free_desc(dev,priority));
881}
882
883
884/* This function is only for debuging purpose */
885void check_tx_ring(struct net_device *dev, int pri)
886{
887 static int maxlog =3;
888 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
889 u32* tmp;
890 struct buffer *buf;
891 int i;
892 int nic;
893 u32* tail;
894 u32* head;
895 u32* begin;
896 u32 nicbegin;
897 struct buffer* buffer;
898
899 maxlog --;
900 if (maxlog <0 ) return;
901
902 switch(pri) {
903 case MANAGE_PRIORITY:
904 tail = priv->txmapringtail;
905 begin = priv->txmapring;
906 head = priv->txmapringhead;
907 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
908 buffer = priv->txmapbufs;
909 nicbegin = priv->txmapringdma;
910 break;
911
912
913 case BK_PRIORITY:
914 tail = priv->txbkpringtail;
915 begin = priv->txbkpring;
916 head = priv->txbkpringhead;
917 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
918 buffer = priv->txbkpbufs;
919 nicbegin = priv->txbkpringdma;
920 break;
921
922 case BE_PRIORITY:
923 tail = priv->txbepringtail;
924 begin = priv->txbepring;
925 head = priv->txbepringhead;
926 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
927 buffer = priv->txbepbufs;
928 nicbegin = priv->txbepringdma;
929 break;
930
931 case VI_PRIORITY:
932 tail = priv->txvipringtail;
933 begin = priv->txvipring;
934 head = priv->txvipringhead;
935 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
936 buffer = priv->txvipbufs;
937 nicbegin = priv->txvipringdma;
938 break;
939
940
941 case VO_PRIORITY:
942 tail = priv->txvopringtail;
943 begin = priv->txvopring;
944 head = priv->txvopringhead;
945 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
946 buffer = priv->txvopbufs;
947 nicbegin = priv->txvopringdma;
948 break;
949
950 case HI_PRIORITY:
951 tail = priv->txhpringtail;
952 begin = priv->txhpring;
953 head = priv->txhpringhead;
954 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
955 buffer = priv->txhpbufs;
956 nicbegin = priv->txhpringdma;
957 break;
958
959 default:
960 return ;
961 break;
962 }
963
964 if(!priv->txvopbufs)
965 DMESGE ("NIC TX ack, but TX queue corrupted!");
966 else{
967
968 for(i=0,buf=buffer, tmp=begin;
969 tmp<begin+(priv->txringcount)*8;
970 tmp+=8,buf=buf->next,i++)
971
972 DMESG("BUF%d %s %x %s. Next : %x",i,
973 *tmp & (1<<31) ? "filled" : "empty",
974 *(buf->buf),
975 *tmp & (1<<15)? "ok": "err", *(tmp+4));
976 }
977
978 DMESG("nic at %d",
979 (nic-nicbegin) / 8 /4);
980 DMESG("tail at %d", ((int)tail - (int)begin) /8 /4);
981 DMESG("head at %d", ((int)head - (int)begin) /8 /4);
982 DMESG("check free desc returns %d", check_nic_enought_desc(dev,pri));
983 DMESG("free desc is %d\n", get_curr_tx_free_desc(dev,pri));
984 //rtl8180_reset(dev);
985 return;
986}
987
988
989
990/* this function is only for debugging purpose */
991void check_rxbuf(struct net_device *dev)
992{
993 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
994 u32* tmp;
995 struct buffer *buf;
996 u8 rx_desc_size;
997
998#ifdef CONFIG_RTL8185B
999 rx_desc_size = 8;
1000#else
1001 rx_desc_size = 4;
1002#endif
1003
1004 if(!priv->rxbuffer)
1005 DMESGE ("NIC RX ack, but RX queue corrupted!");
1006
1007 else{
1008
1009 for(buf=priv->rxbuffer, tmp=priv->rxring;
1010 tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
1011 tmp+=rx_desc_size, buf=buf->next)
1012
1013 DMESG("BUF %s %x",
1014 *tmp & (1<<31) ? "empty" : "filled",
1015 *(buf->buf));
1016 }
1017
1018 return;
1019}
1020
1021
1022void dump_eprom(struct net_device *dev)
1023{
1024 int i;
1025 for(i=0; i<63; i++)
1026 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
1027}
1028
1029
1030void rtl8180_dump_reg(struct net_device *dev)
1031{
1032 int i;
1033 int n;
1034 int max=0xff;
1035
1036 DMESG("Dumping NIC register map");
1037
1038 for(n=0;n<=max;)
1039 {
1040 printk( "\nD: %2x> ", n);
1041 for(i=0;i<16 && n<=max;i++,n++)
1042 printk("%2x ",read_nic_byte(dev,n));
1043 }
1044 printk("\n");
1045}
1046
1047
1048void fix_tx_fifo(struct net_device *dev)
1049{
1050 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1051 u32 *tmp;
1052 int i;
1053#ifdef DEBUG_TX_ALLOC
1054 DMESG("FIXING TX FIFOs");
1055#endif
1056 for (tmp=priv->txmapring, i=0;
1057 i < priv->txringcount;
1058 tmp+=8, i++){
1059 *tmp = *tmp &~ (1<<31);
1060 }
1061
1062 for (tmp=priv->txbkpring, i=0;
1063 i < priv->txringcount;
1064 tmp+=8, i++) {
1065 *tmp = *tmp &~ (1<<31);
1066 }
1067
1068 for (tmp=priv->txbepring, i=0;
1069 i < priv->txringcount;
1070 tmp+=8, i++){
1071 *tmp = *tmp &~ (1<<31);
1072 }
1073 for (tmp=priv->txvipring, i=0;
1074 i < priv->txringcount;
1075 tmp+=8, i++) {
1076 *tmp = *tmp &~ (1<<31);
1077 }
1078
1079 for (tmp=priv->txvopring, i=0;
1080 i < priv->txringcount;
1081 tmp+=8, i++){
1082 *tmp = *tmp &~ (1<<31);
1083 }
1084
1085 for (tmp=priv->txhpring, i=0;
1086 i < priv->txringcount;
1087 tmp+=8,i++){
1088 *tmp = *tmp &~ (1<<31);
1089 }
1090
1091 for (tmp=priv->txbeaconring, i=0;
1092 i < priv->txbeaconcount;
1093 tmp+=8, i++){
1094 *tmp = *tmp &~ (1<<31);
1095 }
1096#ifdef DEBUG_TX_ALLOC
1097 DMESG("TX FIFOs FIXED");
1098#endif
1099 priv->txmapringtail = priv->txmapring;
1100 priv->txmapringhead = priv->txmapring;
1101 priv->txmapbufstail = priv->txmapbufs;
1102
1103 priv->txbkpringtail = priv->txbkpring;
1104 priv->txbkpringhead = priv->txbkpring;
1105 priv->txbkpbufstail = priv->txbkpbufs;
1106
1107 priv->txbepringtail = priv->txbepring;
1108 priv->txbepringhead = priv->txbepring;
1109 priv->txbepbufstail = priv->txbepbufs;
1110
1111 priv->txvipringtail = priv->txvipring;
1112 priv->txvipringhead = priv->txvipring;
1113 priv->txvipbufstail = priv->txvipbufs;
1114
1115 priv->txvopringtail = priv->txvopring;
1116 priv->txvopringhead = priv->txvopring;
1117 priv->txvopbufstail = priv->txvopbufs;
1118
1119 priv->txhpringtail = priv->txhpring;
1120 priv->txhpringhead = priv->txhpring;
1121 priv->txhpbufstail = priv->txhpbufs;
1122
1123 priv->txbeaconringtail = priv->txbeaconring;
1124 priv->txbeaconbufstail = priv->txbeaconbufs;
1125 set_nic_txring(dev);
1126
1127 ieee80211_reset_queue(priv->ieee80211);
1128 priv->ack_tx_to_ieee = 0;
1129}
1130
1131
1132void fix_rx_fifo(struct net_device *dev)
1133{
1134 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1135 u32 *tmp;
1136 struct buffer *rxbuf;
1137 u8 rx_desc_size;
1138
1139#ifdef CONFIG_RTL8185B
1140 rx_desc_size = 8; // 4*8 = 32 bytes
1141#else
1142 rx_desc_size = 4;
1143#endif
1144
1145#ifdef DEBUG_RXALLOC
1146 DMESG("FIXING RX FIFO");
1147 check_rxbuf(dev);
1148#endif
1149
1150 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1151 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1152 tmp+=rx_desc_size,rxbuf=rxbuf->next){
1153 *(tmp+2) = rxbuf->dma;
1154 *tmp=*tmp &~ 0xfff;
1155 *tmp=*tmp | priv->rxbuffersize;
1156 *tmp |= (1<<31);
1157 }
1158
1159#ifdef DEBUG_RXALLOC
1160 DMESG("RX FIFO FIXED");
1161 check_rxbuf(dev);
1162#endif
1163
1164 priv->rxringtail=priv->rxring;
1165 priv->rxbuffer=priv->rxbufferhead;
1166 priv->rx_skb_complete=1;
1167 set_nic_rxring(dev);
1168}
1169
1170
1171/****************************************************************************
1172 ------------------------------HW STUFF---------------------------
1173*****************************************************************************/
1174
1175unsigned char QUALITY_MAP[] = {
1176 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1177 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1178 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1179 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1180 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1181 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1182 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1183 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1184 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1185 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1186};
1187
1188unsigned char STRENGTH_MAP[] = {
1189 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1190 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1191 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1192 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1193 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1194 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1195 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1196 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1197 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1198 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1199};
1200
1201void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1202 //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1203 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1204 u32 temp;
1205 u32 temp2;
1206 u32 temp3;
1207 u32 lsb;
1208 u32 q;
1209 u32 orig_qual;
1210 u8 _rssi;
1211
1212 q = *qual;
1213 orig_qual = *qual;
1214 _rssi = 0; // avoid gcc complains..
1215
1216 if (q <= 0x4e) {
1217 temp = QUALITY_MAP[q];
1218 } else {
1219 if( q & 0x80 ) {
1220 temp = 0x32;
1221 } else {
1222 temp = 1;
1223 }
1224 }
1225
1226 *qual = temp;
1227 temp2 = *rssi;
1228
1229 switch(priv->rf_chip){
1230 case RFCHIPID_RFMD:
1231 lsb = temp2 & 1;
1232 temp2 &= 0x7e;
1233 if ( !lsb || !(temp2 <= 0x3c) ) {
1234 temp2 = 0x64;
1235 } else {
1236 temp2 = 100 * temp2 / 0x3c;
1237 }
1238 *rssi = temp2 & 0xff;
1239 _rssi = temp2 & 0xff;
1240 break;
1241 case RFCHIPID_INTERSIL:
1242 lsb = temp2;
1243 temp2 &= 0xfffffffe;
1244 temp2 *= 251;
1245 temp3 = temp2;
1246 temp2 <<= 6;
1247 temp3 += temp2;
1248 temp3 <<= 1;
1249 temp2 = 0x4950df;
1250 temp2 -= temp3;
1251 lsb &= 1;
1252 if ( temp2 <= 0x3e0000 ) {
1253 if ( temp2 < 0xffef0000 )
1254 temp2 = 0xffef0000;
1255 } else {
1256 temp2 = 0x3e0000;
1257 }
1258 if ( !lsb ) {
1259 temp2 -= 0xf0000;
1260 } else {
1261 temp2 += 0xf0000;
1262 }
1263
1264 temp3 = 0x4d0000;
1265 temp3 -= temp2;
1266 temp3 *= 100;
1267 temp3 = temp3 / 0x6d;
1268 temp3 >>= 0x10;
1269 _rssi = temp3 & 0xff;
1270 *rssi = temp3 & 0xff;
1271 break;
1272 case RFCHIPID_GCT:
1273 lsb = temp2 & 1;
1274 temp2 &= 0x7e;
1275 if ( ! lsb || !(temp2 <= 0x3c) ){
1276 temp2 = 0x64;
1277 } else {
1278 temp2 = (100 * temp2) / 0x3c;
1279 }
1280 *rssi = temp2 & 0xff;
1281 _rssi = temp2 & 0xff;
1282 break;
1283 case RFCHIPID_PHILIPS:
1284 if( orig_qual <= 0x4e ){
1285 _rssi = STRENGTH_MAP[orig_qual];
1286 *rssi = _rssi;
1287 } else {
1288 orig_qual -= 0x80;
1289 if ( !orig_qual ){
1290 _rssi = 1;
1291 *rssi = 1;
1292 } else {
1293 _rssi = 0x32;
1294 *rssi = 0x32;
1295 }
1296 }
1297 break;
1298
1299 /* case 4 */
1300 case RFCHIPID_MAXIM:
1301 lsb = temp2 & 1;
1302 temp2 &= 0x7e;
1303 temp2 >>= 1;
1304 temp2 += 0x42;
1305 if( lsb != 0 ){
1306 temp2 += 0xa;
1307 }
1308 *rssi = temp2 & 0xff;
1309 _rssi = temp2 & 0xff;
1310 break;
1311 }
1312
1313 if ( _rssi < 0x64 ){
1314 if ( _rssi == 0 ) {
1315 *rssi = 1;
1316 }
1317 } else {
1318 *rssi = 0x64;
1319 }
1320
1321 return;
1322}
1323
1324
1325void rtl8180_irq_enable(struct net_device *dev)
1326{
1327 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1328 priv->irq_enabled = 1;
1329/*
1330 write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1331 INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1332 INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1333 INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1334*/
1335 write_nic_word(dev,INTA_MASK, priv->irq_mask);
1336}
1337
1338
1339void rtl8180_irq_disable(struct net_device *dev)
1340{
1341 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1342
1343#ifdef CONFIG_RTL8185B
1344 write_nic_dword(dev,IMR,0);
1345#else
1346 write_nic_word(dev,INTA_MASK,0);
1347#endif
1348 force_pci_posting(dev);
1349 priv->irq_enabled = 0;
1350}
1351
1352
1353void rtl8180_set_mode(struct net_device *dev,int mode)
1354{
1355 u8 ecmd;
1356 ecmd=read_nic_byte(dev, EPROM_CMD);
1357 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1358 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1359 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1360 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1361 write_nic_byte(dev, EPROM_CMD, ecmd);
1362}
1363
1364void rtl8180_adapter_start(struct net_device *dev);
1365void rtl8180_beacon_tx_enable(struct net_device *dev);
1366
1367void rtl8180_update_msr(struct net_device *dev)
1368{
1369 struct r8180_priv *priv = ieee80211_priv(dev);
1370 u8 msr;
1371 u32 rxconf;
1372
1373 msr = read_nic_byte(dev, MSR);
1374 msr &= ~ MSR_LINK_MASK;
1375
1376 rxconf=read_nic_dword(dev,RX_CONF);
1377
1378 if(priv->ieee80211->state == IEEE80211_LINKED)
1379 {
1380 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1381 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1382 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1383 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1384 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1385 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1386 else
1387 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1388 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1389
1390 }else {
1391 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1392 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1393 }
1394
1395 write_nic_byte(dev, MSR, msr);
1396 write_nic_dword(dev, RX_CONF, rxconf);
1397
1398}
1399
1400
1401
1402void rtl8180_set_chan(struct net_device *dev,short ch)
1403{
1404 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1405
1406 if((ch > 14) || (ch < 1))
1407 {
1408 printk("In %s: Invalid chnanel %d\n", __FUNCTION__, ch);
1409 return;
1410 }
1411
1412 priv->chan=ch;
1413 //printk("in %s:channel is %d\n",__FUNCTION__,ch);
1414 priv->rf_set_chan(dev,priv->chan);
1415
1416}
1417
1418
1419void rtl8180_rx_enable(struct net_device *dev)
1420{
1421 u8 cmd;
1422 u32 rxconf;
1423 /* for now we accept data, management & ctl frame*/
1424 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1425
1426 rxconf=read_nic_dword(dev,RX_CONF);
1427 rxconf = rxconf &~ MAC_FILTER_MASK;
1428 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1429 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1430 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1431 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1432// rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1433 if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1434
1435 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1436 dev->flags & IFF_PROMISC){
1437 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1438 }else{
1439 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1440 if(priv->card_8185 == 0)
1441 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1442 }
1443
1444 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1445 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1446 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1447 }*/
1448
1449 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1450 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1451 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1452 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1453 }
1454
1455 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1456 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1457
1458 //if(!priv->card_8185){
1459 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1460 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1461 //}
1462
1463 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1464 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1465 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1466
1467 //if(!priv->card_8185)
1468 rxconf = rxconf | RCR_ONLYERLPKT;
1469
1470 rxconf = rxconf &~ RCR_CS_MASK;
1471 if(!priv->card_8185)
1472 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1473// rxconf &=~ 0xfff00000;
1474// rxconf |= 0x90100000;//9014f76f;
1475 write_nic_dword(dev, RX_CONF, rxconf);
1476
1477 fix_rx_fifo(dev);
1478
1479#ifdef DEBUG_RX
1480 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1481#endif
1482 cmd=read_nic_byte(dev,CMD);
1483 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1484
1485 /* In rtl8139 driver seems that DMA threshold has to be written
1486 * after enabling RX, so we rewrite RX_CONFIG register
1487 */
1488 //mdelay(100);
1489// write_nic_dword(dev, RX_CONF, rxconf);
1490
1491}
1492
1493
1494void set_nic_txring(struct net_device *dev)
1495{
1496 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1497// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1498
1499 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1500// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1501 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1502// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1503 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1504// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1505 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1506// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1507 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1508// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1509 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1510// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1511
1512 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1513}
1514
1515
1516void rtl8180_conttx_enable(struct net_device *dev)
1517{
1518 u32 txconf;
1519 txconf = read_nic_dword(dev,TX_CONF);
1520 txconf = txconf &~ TX_LOOPBACK_MASK;
1521 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1522 write_nic_dword(dev,TX_CONF,txconf);
1523}
1524
1525
1526void rtl8180_conttx_disable(struct net_device *dev)
1527{
1528 u32 txconf;
1529 txconf = read_nic_dword(dev,TX_CONF);
1530 txconf = txconf &~ TX_LOOPBACK_MASK;
1531 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1532 write_nic_dword(dev,TX_CONF,txconf);
1533}
1534
1535
1536void rtl8180_tx_enable(struct net_device *dev)
1537{
1538 u8 cmd;
1539 u8 tx_agc_ctl;
1540 u8 byte;
1541 u32 txconf;
1542 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1543 txconf= read_nic_dword(dev,TX_CONF);
1544
1545
1546 if(priv->card_8185){
1547
1548
1549 byte = read_nic_byte(dev,CW_CONF);
1550 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1551 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1552 write_nic_byte(dev, CW_CONF, byte);
1553
1554 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1555 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1556 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1557 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1558 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1559 /*
1560 write_nic_word(dev, 0x5e, 0x01);
1561 force_pci_posting(dev);
1562 mdelay(1);
1563 write_nic_word(dev, 0xfe, 0x10);
1564 force_pci_posting(dev);
1565 mdelay(1);
1566 write_nic_word(dev, 0x5e, 0x00);
1567 force_pci_posting(dev);
1568 mdelay(1);
1569 */
1570 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1571 }
1572
1573 if(priv->card_8185){
1574
1575 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1576
1577 }else{
1578
1579 if(hwseqnum)
1580 txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1581 else
1582 txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1583 }
1584
1585 txconf = txconf &~ TX_LOOPBACK_MASK;
1586 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1587 txconf = txconf &~ TCR_DPRETRY_MASK;
1588 txconf = txconf &~ TCR_RTSRETRY_MASK;
1589 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1590 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1591 txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1592
1593 if(priv->card_8185){
1594 if(priv->hw_plcp_len)
1595 txconf = txconf &~ TCR_PLCP_LEN;
1596 else
1597 txconf = txconf | TCR_PLCP_LEN;
1598 }else{
1599 txconf = txconf &~ TCR_SAT;
1600 }
1601 txconf = txconf &~ TCR_MXDMA_MASK;
1602 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1603 txconf = txconf | TCR_CWMIN;
1604 txconf = txconf | TCR_DISCW;
1605
1606// if(priv->ieee80211->hw_wep)
1607// txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1608// else
1609 txconf=txconf | (1<<TX_NOICV_SHIFT);
1610
1611 write_nic_dword(dev,TX_CONF,txconf);
1612
1613
1614 fix_tx_fifo(dev);
1615
1616#ifdef DEBUG_TX
1617 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1618#endif
1619
1620 cmd=read_nic_byte(dev,CMD);
1621 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1622
1623// mdelay(100);
1624 write_nic_dword(dev,TX_CONF,txconf);
1625// #endif
1626/*
1627 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1628 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1629 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1630 */
1631}
1632
1633
1634void rtl8180_beacon_tx_enable(struct net_device *dev)
1635{
1636 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1637
1638 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1639#ifdef CONFIG_RTL8185B
1640 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1641 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1642#else
1643 priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1644 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1645#endif
1646 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1647}
1648
1649
1650void rtl8180_beacon_tx_disable(struct net_device *dev)
1651{
1652 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1653
1654 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1655#ifdef CONFIG_RTL8185B
1656 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1657 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1658#else
1659 priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1660 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1661#endif
1662 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1663
1664}
1665
1666
1667void rtl8180_rtx_disable(struct net_device *dev)
1668{
1669 u8 cmd;
1670 struct r8180_priv *priv = ieee80211_priv(dev);
1671
1672 cmd=read_nic_byte(dev,CMD);
1673 write_nic_byte(dev, CMD, cmd &~ \
1674 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1675 force_pci_posting(dev);
1676 mdelay(10);
1677 /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1678 udelay(10);
1679 */
1680
1681 if(!priv->rx_skb_complete)
1682 dev_kfree_skb_any(priv->rx_skb);
1683}
1684
1685#if 0
1686int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1687{
1688 int i;
1689 u32 *tmp;
1690 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1691
1692 priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1693 sizeof(u32)*8*count,
1694 &priv->txbeaconringdma);
1695 if (!priv->txbeaconring) return -1;
1696 for (tmp=priv->txbeaconring,i=0;i<count;i++){
1697 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1698 /*
1699 *(tmp+2) = (u32)dma_tmp;
1700 *(tmp+3) = bufsize;
1701 */
1702 if(i+1<count)
1703 *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1704 else
1705 *(tmp+4) = (u32)priv->txbeaconringdma;
1706
1707 tmp=tmp+8;
1708 }
1709 return 0;
1710}
1711#endif
1712
1713short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1714 int addr)
1715{
1716 int i;
1717 u32 *desc;
1718 u32 *tmp;
1719 dma_addr_t dma_desc, dma_tmp;
1720 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1721 struct pci_dev *pdev = priv->pdev;
1722 void *buf;
1723
1724 if((bufsize & 0xfff) != bufsize) {
1725 DMESGE ("TX buffer allocation too large");
1726 return 0;
1727 }
1728 desc = (u32*)pci_alloc_consistent(pdev,
1729 sizeof(u32)*8*count+256, &dma_desc);
1730 if(desc==NULL) return -1;
1731 if(dma_desc & 0xff){
1732
1733 /*
1734 * descriptor's buffer must be 256 byte aligned
1735 * we shouldn't be here, since we set DMA mask !
1736 */
1737 DMESGW("Fixing TX alignment");
1738 desc = (u32*)((u8*)desc + 256);
1739#if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR))
1740 desc = (u32*)((u64)desc &~ 0xff);
1741 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1742 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff);
1743#else
1744 desc = (u32*)((u32)desc &~ 0xff);
1745 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1746 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff);
1747#endif
1748 }
1749 tmp=desc;
1750 for (i=0;i<count;i++)
1751 {
1752 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1753 if (buf == NULL) return -ENOMEM;
1754
1755 switch(addr) {
1756#if 0
1757 case TX_NORMPRIORITY_RING_ADDR:
1758 if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1759 DMESGE("Unable to allocate mem for buffer NP");
1760 return -ENOMEM;
1761 }
1762 break;
1763
1764 case TX_LOWPRIORITY_RING_ADDR:
1765 if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1766 DMESGE("Unable to allocate mem for buffer LP");
1767 return -ENOMEM;
1768 }
1769 break;
1770
1771 case TX_HIGHPRIORITY_RING_ADDR:
1772 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1773 DMESGE("Unable to allocate mem for buffer HP");
1774 return -ENOMEM;
1775 }
1776 break;
1777#else
1778 case TX_MANAGEPRIORITY_RING_ADDR:
1779 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1780 DMESGE("Unable to allocate mem for buffer NP");
1781 return -ENOMEM;
1782 }
1783 break;
1784
1785 case TX_BKPRIORITY_RING_ADDR:
1786 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1787 DMESGE("Unable to allocate mem for buffer LP");
1788 return -ENOMEM;
1789 }
1790 break;
1791 case TX_BEPRIORITY_RING_ADDR:
1792 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1793 DMESGE("Unable to allocate mem for buffer NP");
1794 return -ENOMEM;
1795 }
1796 break;
1797
1798 case TX_VIPRIORITY_RING_ADDR:
1799 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1800 DMESGE("Unable to allocate mem for buffer LP");
1801 return -ENOMEM;
1802 }
1803 break;
1804 case TX_VOPRIORITY_RING_ADDR:
1805 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1806 DMESGE("Unable to allocate mem for buffer NP");
1807 return -ENOMEM;
1808 }
1809 break;
1810#endif
1811 case TX_HIGHPRIORITY_RING_ADDR:
1812 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1813 DMESGE("Unable to allocate mem for buffer HP");
1814 return -ENOMEM;
1815 }
1816 break;
1817 case TX_BEACON_RING_ADDR:
1818 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1819 DMESGE("Unable to allocate mem for buffer BP");
1820 return -ENOMEM;
1821 }
1822 break;
1823 }
1824 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1825 *(tmp+2) = (u32)dma_tmp;
1826 *(tmp+3) = bufsize;
1827
1828 if(i+1<count)
1829 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1830 else
1831 *(tmp+4) = (u32)dma_desc;
1832
1833 tmp=tmp+8;
1834 }
1835
1836 switch(addr) {
1837 case TX_MANAGEPRIORITY_RING_ADDR:
1838 priv->txmapringdma=dma_desc;
1839 priv->txmapring=desc;
1840 break;
1841
1842 case TX_BKPRIORITY_RING_ADDR:
1843 priv->txbkpringdma=dma_desc;
1844 priv->txbkpring=desc;
1845 break;
1846
1847 case TX_BEPRIORITY_RING_ADDR:
1848 priv->txbepringdma=dma_desc;
1849 priv->txbepring=desc;
1850 break;
1851
1852 case TX_VIPRIORITY_RING_ADDR:
1853 priv->txvipringdma=dma_desc;
1854 priv->txvipring=desc;
1855 break;
1856
1857 case TX_VOPRIORITY_RING_ADDR:
1858 priv->txvopringdma=dma_desc;
1859 priv->txvopring=desc;
1860 break;
1861
1862 case TX_HIGHPRIORITY_RING_ADDR:
1863 priv->txhpringdma=dma_desc;
1864 priv->txhpring=desc;
1865 break;
1866
1867 case TX_BEACON_RING_ADDR:
1868 priv->txbeaconringdma=dma_desc;
1869 priv->txbeaconring=desc;
1870 break;
1871
1872 }
1873
1874#ifdef DEBUG_TX
1875 DMESG("Tx dma physical address: %x",dma_desc);
1876#endif
1877
1878 return 0;
1879}
1880
1881
1882void free_tx_desc_rings(struct net_device *dev)
1883{
1884
1885 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1886 struct pci_dev *pdev=priv->pdev;
1887 int count = priv->txringcount;
1888
1889 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1890 priv->txmapring, priv->txmapringdma);
1891 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1892
1893 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1894 priv->txbkpring, priv->txbkpringdma);
1895 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1896
1897 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1898 priv->txbepring, priv->txbepringdma);
1899 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1900
1901 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1902 priv->txvipring, priv->txvipringdma);
1903 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1904
1905 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1906 priv->txvopring, priv->txvopringdma);
1907 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1908
1909 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1910 priv->txhpring, priv->txhpringdma);
1911 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1912
1913 count = priv->txbeaconcount;
1914 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1915 priv->txbeaconring, priv->txbeaconringdma);
1916 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1917}
1918
1919#if 0
1920void free_beacon_desc_ring(struct net_device *dev,int count)
1921{
1922
1923 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1924 struct pci_dev *pdev=priv->pdev;
1925
1926 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1927 priv->txbeaconring, priv->txbeaconringdma);
1928
1929 if (priv->beacon_buf)
1930 pci_free_consistent(priv->pdev,
1931 priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1932
1933}
1934#endif
1935void free_rx_desc_ring(struct net_device *dev)
1936{
1937 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1938 struct pci_dev *pdev = priv->pdev;
1939
1940 int count = priv->rxringcount;
1941
1942#ifdef CONFIG_RTL8185B
1943 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1944 priv->rxring, priv->rxringdma);
1945#else
1946 pci_free_consistent(pdev, sizeof(u32)*4*count+256,
1947 priv->rxring, priv->rxringdma);
1948#endif
1949
1950 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1951}
1952
1953
1954short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1955{
1956 int i;
1957 u32 *desc;
1958 u32 *tmp;
1959 dma_addr_t dma_desc,dma_tmp;
1960 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1961 struct pci_dev *pdev=priv->pdev;
1962 void *buf;
1963 u8 rx_desc_size;
1964
1965#ifdef CONFIG_RTL8185B
1966 rx_desc_size = 8; // 4*8 = 32 bytes
1967#else
1968 rx_desc_size = 4;
1969#endif
1970
1971 if((bufsize & 0xfff) != bufsize){
1972 DMESGE ("RX buffer allocation too large");
1973 return -1;
1974 }
1975
1976 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1977 &dma_desc);
1978
1979 if(dma_desc & 0xff){
1980
1981 /*
1982 * descriptor's buffer must be 256 byte aligned
1983 * should never happen since we specify the DMA mask
1984 */
1985
1986 DMESGW("Fixing RX alignment");
1987 desc = (u32*)((u8*)desc + 256);
1988#if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR))
1989 desc = (u32*)((u64)desc &~ 0xff);
1990 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1991 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff);
1992#else
1993 desc = (u32*)((u32)desc &~ 0xff);
1994 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1995 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff);
1996#endif
1997 }
1998
1999 priv->rxring=desc;
2000 priv->rxringdma=dma_desc;
2001 tmp=desc;
2002
2003 for (i=0;i<count;i++){
2004
2005 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
2006 DMESGE("Failed to kmalloc RX buffer");
2007 return -1;
2008 }
2009
2010 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
2011 PCI_DMA_FROMDEVICE);
2012
2013#ifdef DEBUG_ZERO_RX
2014 int j;
2015 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
2016#endif
2017
2018 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
2019 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
2020 &(priv->rxbufferhead))){
2021 DMESGE("Unable to allocate mem RX buf");
2022 return -1;
2023 }
2024 *tmp = 0; //zero pads the header of the descriptor
2025 *tmp = *tmp |( bufsize&0xfff);
2026 *(tmp+2) = (u32)dma_tmp;
2027 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
2028
2029#ifdef DEBUG_RXALLOC
2030 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
2031 (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
2032#endif
2033
2034 tmp=tmp+rx_desc_size;
2035 }
2036
2037 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
2038
2039
2040#ifdef DEBUG_RXALLOC
2041 DMESG("RX DMA physical address: %x",dma_desc);
2042#endif
2043
2044 return 0;
2045}
2046
2047
2048void set_nic_rxring(struct net_device *dev)
2049{
2050 u8 pgreg;
2051 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2052
2053 //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2054
2055 pgreg=read_nic_byte(dev, PGSELECT);
2056 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
2057
2058 //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2059
2060 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
2061}
2062
2063
2064void rtl8180_reset(struct net_device *dev)
2065{
2066 //u32 txconf = 0x80e00707; //FIXME: Make me understandable
2067 u8 cr;
2068
2069 //write_nic_dword(dev,TX_CONF,txconf);
2070
2071 rtl8180_irq_disable(dev);
2072
2073 cr=read_nic_byte(dev,CMD);
2074 cr = cr & 2;
2075 cr = cr | (1<<CMD_RST_SHIFT);
2076 write_nic_byte(dev,CMD,cr);
2077
2078 force_pci_posting(dev);
2079
2080 mdelay(200);
2081
2082 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
2083 DMESGW("Card reset timeout!");
2084 else
2085 DMESG("Card successfully reset");
2086
2087//#ifndef CONFIG_RTL8185B
2088 rtl8180_set_mode(dev,EPROM_CMD_LOAD);
2089 force_pci_posting(dev);
2090 mdelay(200);
2091//#endif
2092}
2093
2094inline u16 ieeerate2rtlrate(int rate)
2095{
2096 switch(rate){
2097 case 10:
2098 return 0;
2099 case 20:
2100 return 1;
2101 case 55:
2102 return 2;
2103 case 110:
2104 return 3;
2105 case 60:
2106 return 4;
2107 case 90:
2108 return 5;
2109 case 120:
2110 return 6;
2111 case 180:
2112 return 7;
2113 case 240:
2114 return 8;
2115 case 360:
2116 return 9;
2117 case 480:
2118 return 10;
2119 case 540:
2120 return 11;
2121 default:
2122 return 3;
2123
2124 }
2125}
2126
2127static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
2128inline u16 rtl8180_rate2rate(short rate)
2129{
2130 if (rate >12) return 10;
2131 return rtl_rate[rate];
2132}
2133inline u8 rtl8180_IsWirelessBMode(u16 rate)
2134{
2135 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2136 return 1;
2137 else return 0;
2138}
2139u16 N_DBPSOfRate(u16 DataRate);
2140u16 ComputeTxTime(
2141 u16 FrameLength,
2142 u16 DataRate,
2143 u8 bManagementFrame,
2144 u8 bShortPreamble
2145)
2146{
2147 u16 FrameTime;
2148 u16 N_DBPS;
2149 u16 Ceiling;
2150
2151 if( rtl8180_IsWirelessBMode(DataRate) )
2152 {
2153 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2154 { // long preamble
2155 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2156 }
2157 else
2158 { // Short preamble
2159 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2160 }
2161 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2162 FrameTime ++;
2163 } else { //802.11g DSSS-OFDM PLCP length field calculation.
2164 N_DBPS = N_DBPSOfRate(DataRate);
2165 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2166 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2167 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2168 }
2169 return FrameTime;
2170}
2171u16 N_DBPSOfRate(u16 DataRate)
2172{
2173 u16 N_DBPS = 24;
2174
2175 switch(DataRate)
2176 {
2177 case 60:
2178 N_DBPS = 24;
2179 break;
2180
2181 case 90:
2182 N_DBPS = 36;
2183 break;
2184
2185 case 120:
2186 N_DBPS = 48;
2187 break;
2188
2189 case 180:
2190 N_DBPS = 72;
2191 break;
2192
2193 case 240:
2194 N_DBPS = 96;
2195 break;
2196
2197 case 360:
2198 N_DBPS = 144;
2199 break;
2200
2201 case 480:
2202 N_DBPS = 192;
2203 break;
2204
2205 case 540:
2206 N_DBPS = 216;
2207 break;
2208
2209 default:
2210 break;
2211 }
2212
2213 return N_DBPS;
2214}
2215
2216//{by amy 080312
2217//
2218// Description:
2219// For Netgear case, they want good-looking singal strength.
2220// 2004.12.05, by rcnjko.
2221//
2222long
2223NetgearSignalStrengthTranslate(
2224 long LastSS,
2225 long CurrSS
2226 )
2227{
2228 long RetSS;
2229
2230 // Step 1. Scale mapping.
2231 if(CurrSS >= 71 && CurrSS <= 100)
2232 {
2233 RetSS = 90 + ((CurrSS - 70) / 3);
2234 }
2235 else if(CurrSS >= 41 && CurrSS <= 70)
2236 {
2237 RetSS = 78 + ((CurrSS - 40) / 3);
2238 }
2239 else if(CurrSS >= 31 && CurrSS <= 40)
2240 {
2241 RetSS = 66 + (CurrSS - 30);
2242 }
2243 else if(CurrSS >= 21 && CurrSS <= 30)
2244 {
2245 RetSS = 54 + (CurrSS - 20);
2246 }
2247 else if(CurrSS >= 5 && CurrSS <= 20)
2248 {
2249 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2250 }
2251 else if(CurrSS == 4)
2252 {
2253 RetSS = 36;
2254 }
2255 else if(CurrSS == 3)
2256 {
2257 RetSS = 27;
2258 }
2259 else if(CurrSS == 2)
2260 {
2261 RetSS = 18;
2262 }
2263 else if(CurrSS == 1)
2264 {
2265 RetSS = 9;
2266 }
2267 else
2268 {
2269 RetSS = CurrSS;
2270 }
2271 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2272
2273 // Step 2. Smoothing.
2274 if(LastSS > 0)
2275 {
2276 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2277 }
2278 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2279
2280 return RetSS;
2281}
2282//
2283// Description:
2284// Translate 0-100 signal strength index into dBm.
2285//
2286long
2287TranslateToDbm8185(
2288 u8 SignalStrengthIndex // 0-100 index.
2289 )
2290{
2291 long SignalPower; // in dBm.
2292
2293 // Translate to dBm (x=0.5y-95).
2294 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2295 SignalPower -= 95;
2296
2297 return SignalPower;
2298}
2299//
2300// Description:
2301// Perform signal smoothing for dynamic mechanism.
2302// This is different with PerformSignalSmoothing8185 in smoothing fomula.
2303// No dramatic adjustion is apply because dynamic mechanism need some degree
2304// of correctness. Ported from 8187B.
2305// 2007-02-26, by Bruce.
2306//
2307void
2308PerformUndecoratedSignalSmoothing8185(
2309 struct r8180_priv *priv,
2310 bool bCckRate
2311 )
2312{
2313
2314
2315 // Determin the current packet is CCK rate.
2316 priv->bCurCCKPkt = bCckRate;
2317
2318 if(priv->UndecoratedSmoothedSS >= 0)
2319 {
2320 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2321 }
2322 else
2323 {
2324 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2325 }
2326
2327 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2328
2329// printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2330// printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2331
2332 //if(priv->CurCCKRSSI >= 0 && bCckRate)
2333 if(bCckRate)
2334 {
2335 priv->CurCCKRSSI = priv->RSSI;
2336 }
2337 else
2338 {
2339 priv->CurCCKRSSI = 0;
2340 }
2341
2342 // Boundary checking.
2343 // TODO: The overflow condition does happen, if we want to fix,
2344 // we shall recalculate thresholds first.
2345 if(priv->UndecoratedSmoothedSS > 100)
2346 {
2347// printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2348 }
2349 if(priv->UndecoratedSmoothedSS < 0)
2350 {
2351// printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2352 }
2353
2354}
2355
2356//by amy 080312}
2357
2358/* This is rough RX isr handling routine*/
2359void rtl8180_rx(struct net_device *dev)
2360{
2361 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2362 struct sk_buff *tmp_skb;
2363
2364 //struct sk_buff *skb;
2365 short first,last;
2366 u32 len;
2367 int lastlen;
2368 unsigned char quality, signal;
2369 u8 rate;
2370 //u32 *prism_hdr;
2371 u32 *tmp,*tmp2;
2372 u8 rx_desc_size;
2373 u8 padding;
2374 //u32 count=0;
2375 char rxpower = 0;
2376 u32 RXAGC = 0;
2377 long RxAGC_dBm = 0;
2378 u8 LNA=0, BB=0;
2379 u8 LNA_gain[4]={02, 17, 29, 39};
2380 u8 Antenna = 0;
2381 struct ieee80211_hdr *hdr;//by amy
2382 u16 fc,type;
2383 u8 bHwError = 0,bCRC = 0,bICV = 0;
2384 //bHwError = 0;
2385 //bCRC = 0;
2386 //bICV = 0;
2387 bool bCckRate = false;
2388 u8 RSSI = 0;
2389 long SignalStrengthIndex = 0;//+by amy 080312
2390// u8 SignalStrength = 0;
2391 struct ieee80211_rx_stats stats = {
2392 .signal = 0,
2393 .noise = -98,
2394 .rate = 0,
2395 // .mac_time = jiffies,
2396 .freq = IEEE80211_24GHZ_BAND,
2397 };
2398
2399#ifdef CONFIG_RTL8185B
2400 stats.nic_type = NIC_8185B;
2401 rx_desc_size = 8;
2402
2403#else
2404 stats.nic_type = NIC_8185;
2405 rx_desc_size = 4;
2406#endif
2407 //printk("receive frame!%d\n",count++);
2408 //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2409 //else {
2410
2411 if ((*(priv->rxringtail)) & (1<<31)) {
2412
2413 /* we have got an RX int, but the descriptor
2414 * we are pointing is empty*/
2415
2416 priv->stats.rxnodata++;
2417 priv->ieee80211->stats.rx_errors++;
2418
2419 /* if (! *(priv->rxring) & (1<<31)) {
2420
2421 priv->stats.rxreset++;
2422 priv->rxringtail=priv->rxring;
2423 priv->rxbuffer=priv->rxbufferhead;
2424
2425 }else{*/
2426
2427 #if 0
2428 /* Maybe it is possible that the NIC has skipped some descriptors or
2429 * it has reset its internal pointer to the beginning of the ring
2430 * we search for the first filled descriptor in the ring, or we break
2431 * putting again the pointer in the old location if we do not found any.
2432 * This is quite dangerous, what does happen if the nic writes
2433 * two descriptor (say A and B) when we have just checked the descriptor
2434 * A and we are going to check the descriptor B..This might happen if the
2435 * interrupt was dummy, there was not really filled descriptors and
2436 * the NIC didn't lose pointer
2437 */
2438
2439 //priv->stats.rxwrkaround++;
2440
2441 tmp = priv->rxringtail;
2442 while (*(priv->rxringtail) & (1<<31)){
2443
2444 priv->rxringtail+=4;
2445
2446 if(priv->rxringtail >=
2447 (priv->rxring)+(priv->rxringcount )*4)
2448 priv->rxringtail=priv->rxring;
2449
2450 priv->rxbuffer=(priv->rxbuffer->next);
2451
2452 if(priv->rxringtail == tmp ){
2453 //DMESG("EE: Could not find RX pointer");
2454 priv->stats.rxnopointer++;
2455 break;
2456 }
2457 }
2458 #else
2459
2460 tmp2 = NULL;
2461 tmp = priv->rxringtail;
2462 do{
2463 if(tmp == priv->rxring)
2464 //tmp = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2465 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2466 else
2467 tmp -= rx_desc_size;
2468
2469 if(! (*tmp & (1<<31)))
2470 tmp2 = tmp;
2471 }while(tmp != priv->rxring);
2472
2473 if(tmp2) priv->rxringtail = tmp2;
2474 #endif
2475 //}
2476 }
2477
2478 /* while there are filled descriptors */
2479 while(!(*(priv->rxringtail) & (1<<31))){
2480 if(*(priv->rxringtail) & (1<<26))
2481 DMESGW("RX buffer overflow");
2482 if(*(priv->rxringtail) & (1<<12))
2483 priv->stats.rxicverr++;
2484
2485 if(*(priv->rxringtail) & (1<<27)){
2486 priv->stats.rxdmafail++;
2487 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2488 goto drop;
2489 }
2490
2491 pci_dma_sync_single_for_cpu(priv->pdev,
2492 priv->rxbuffer->dma,
2493 priv->rxbuffersize * \
2494 sizeof(u8),
2495 PCI_DMA_FROMDEVICE);
2496
2497 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2498 if(first) priv->rx_prevlen=0;
2499
2500 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2501 if(last){
2502 lastlen=((*priv->rxringtail) &0xfff);
2503
2504 /* if the last descriptor (that should
2505 * tell us the total packet len) tell
2506 * us something less than the descriptors
2507 * len we had until now, then there is some
2508 * problem..
2509 * workaround to prevent kernel panic
2510 */
2511 if(lastlen < priv->rx_prevlen)
2512 len=0;
2513 else
2514 len=lastlen-priv->rx_prevlen;
2515
2516 if(*(priv->rxringtail) & (1<<13)) {
2517//lastlen=((*priv->rxringtail) &0xfff);
2518 if ((*(priv->rxringtail) & 0xfff) <500)
2519 priv->stats.rxcrcerrmin++;
2520 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2521 priv->stats.rxcrcerrmax++;
2522 else
2523 priv->stats.rxcrcerrmid++;
2524
2525 }
2526
2527 }else{
2528 len = priv->rxbuffersize;
2529 }
2530
2531#ifdef CONFIG_RTL8185B
2532 if(first && last) {
2533 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2534 }else if(first) {
2535 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2536 if(padding) {
2537 len -= 2;
2538 }
2539 }else {
2540 padding = 0;
2541 }
2542#ifdef CONFIG_RTL818X_S
2543 padding = 0;
2544#endif
2545#endif
2546 priv->rx_prevlen+=len;
2547
2548 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2549 /* HW is probably passing several buggy frames
2550 * without FD or LD flag set.
2551 * Throw this garbage away to prevent skb
2552 * memory exausting
2553 */
2554 if(!priv->rx_skb_complete)
2555 dev_kfree_skb_any(priv->rx_skb);
2556 priv->rx_skb_complete = 1;
2557 }
2558
2559#ifdef DEBUG_RX_FRAG
2560 DMESG("Iteration.. len %x",len);
2561 if(first) DMESG ("First descriptor");
2562 if(last) DMESG("Last descriptor");
2563
2564#endif
2565#ifdef DEBUG_RX_VERBOSE
2566 print_buffer( priv->rxbuffer->buf, len);
2567#endif
2568
2569#ifdef CONFIG_RTL8185B
2570 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2571 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2572
2573 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2574
2575 stats.mac_time[0] = *(priv->rxringtail+1);
2576 stats.mac_time[1] = *(priv->rxringtail+2);
2577 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2578 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2579
2580#else
2581 signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
2582 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2583
2584 quality=((*(priv->rxringtail+1)) & (0xff));
2585
2586 stats.mac_time[0] = *(priv->rxringtail+2);
2587 stats.mac_time[1] = *(priv->rxringtail+3);
2588#endif
2589 rate=((*(priv->rxringtail)) &
2590 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2591
2592 stats.rate = rtl8180_rate2rate(rate);
2593 //DMESG("%d",rate);
2594 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2595// printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2596//by amy for antenna
2597 if(!rtl8180_IsWirelessBMode(stats.rate))
2598 { // OFDM rate.
2599
2600 RxAGC_dBm = rxpower+1; //bias
2601 }
2602 else
2603 { // CCK rate.
2604 RxAGC_dBm = signal;//bit 0 discard
2605
2606 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2607 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0
2608
2609 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2610
2611 RxAGC_dBm +=4; //bias
2612 }
2613
2614 if(RxAGC_dBm & 0x80) //absolute value
2615 RXAGC= ~(RxAGC_dBm)+1;
2616 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2617 // Translate RXAGC into 1-100.
2618 if(!rtl8180_IsWirelessBMode(stats.rate))
2619 { // OFDM rate.
2620 if(RXAGC>90)
2621 RXAGC=90;
2622 else if(RXAGC<25)
2623 RXAGC=25;
2624 RXAGC=(90-RXAGC)*100/65;
2625 }
2626 else
2627 { // CCK rate.
2628 if(RXAGC>95)
2629 RXAGC=95;
2630 else if(RXAGC<30)
2631 RXAGC=30;
2632 RXAGC=(95-RXAGC)*100/65;
2633 }
2634 priv->SignalStrength = (u8)RXAGC;
2635 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin
2636 priv->RxPower = rxpower;
2637 priv->RSSI = RSSI;
2638//{by amy 080312
2639 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2640 if(quality >= 127)
2641 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2642 else if(quality < 27)
2643 quality = 100;
2644 else
2645 quality = 127 - quality;
2646 priv->SignalQuality = quality;
2647 if(!priv->card_8185)
2648 printk("check your card type\n");
2649
2650 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2651 stats.signalstrength = RXAGC;
2652 if(stats.signalstrength > 100)
2653 stats.signalstrength = 100;
2654 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2655 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2656 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2657 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2658//by amy 080312}
2659 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2660 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2661 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2662 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2663 hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2664 fc = le16_to_cpu(hdr->frame_ctl);
2665 type = WLAN_FC_GET_TYPE(fc);
2666
2667 if((IEEE80211_FTYPE_CTL != type) &&
2668 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2669 && (!bHwError) && (!bCRC)&& (!bICV))
2670 {
2671//by amy 080312
2672 // Perform signal smoothing for dynamic mechanism on demand.
2673 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2674 // No dramatic adjustion is apply because dynamic mechanism need some degree
2675 // of correctness. 2007.01.23, by shien chang.
2676 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2677 //
2678 // For good-looking singal strength.
2679 //
2680 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2681 priv->LastSignalStrengthInPercent,
2682 priv->SignalStrength);
2683
2684 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2685 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2686 //
2687 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
2688 // so we record the correct power here.
2689 //
2690 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2691 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2692
2693 // Figure out which antenna that received the lasted packet.
2694 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2695//by amy 080312
2696 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2697 }
2698
2699//by amy for antenna
2700
2701
2702
2703
2704
2705
2706#ifndef DUMMY_RX
2707 if(first){
2708 if(!priv->rx_skb_complete){
2709 /* seems that HW sometimes fails to reiceve and
2710 doesn't provide the last descriptor */
2711#ifdef DEBUG_RX_SKB
2712 DMESG("going to free incomplete skb");
2713#endif
2714 dev_kfree_skb_any(priv->rx_skb);
2715 priv->stats.rxnolast++;
2716#ifdef DEBUG_RX_SKB
2717 DMESG("free incomplete skb OK");
2718#endif
2719 }
2720 /* support for prism header has been originally added by Christian */
2721 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2722
2723#if 0
2724 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2725 if(! priv->rx_skb) goto drop;
2726
2727 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2728 prism_hdr[0]=htonl(0x80211001); //version
2729 prism_hdr[1]=htonl(0x40); //length
2730 prism_hdr[2]=htonl(stats.mac_time[1]); //mactime (HIGH)
2731 prism_hdr[3]=htonl(stats.mac_time[0]); //mactime (LOW)
2732 rdtsc(prism_hdr[5], prism_hdr[4]); //hostime (LOW+HIGH)
2733 prism_hdr[4]=htonl(prism_hdr[4]); //Byte-Order aendern
2734 prism_hdr[5]=htonl(prism_hdr[5]); //Byte-Order aendern
2735 prism_hdr[6]=0x00; //phytype
2736 prism_hdr[7]=htonl(priv->chan); //channel
2737 prism_hdr[8]=htonl(stats.rate); //datarate
2738 prism_hdr[9]=0x00; //antenna
2739 prism_hdr[10]=0x00; //priority
2740 prism_hdr[11]=0x00; //ssi_type
2741 prism_hdr[12]=htonl(stats.signal); //ssi_signal
2742 prism_hdr[13]=htonl(stats.noise); //ssi_noise
2743 prism_hdr[14]=0x00; //preamble
2744 prism_hdr[15]=0x00; //encoding
2745
2746#endif
2747 }else{
2748 priv->rx_skb = dev_alloc_skb(len+2);
2749 if( !priv->rx_skb) goto drop;
2750#ifdef DEBUG_RX_SKB
2751 DMESG("Alloc initial skb %x",len+2);
2752#endif
2753 }
2754
2755 priv->rx_skb_complete=0;
2756 priv->rx_skb->dev=dev;
2757 }else{
2758 /* if we are here we should have already RXed
2759 * the first frame.
2760 * If we get here and the skb is not allocated then
2761 * we have just throw out garbage (skb not allocated)
2762 * and we are still rxing garbage....
2763 */
2764 if(!priv->rx_skb_complete){
2765
2766 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2767
2768 if(!tmp_skb) goto drop;
2769
2770 tmp_skb->dev=dev;
2771#ifdef DEBUG_RX_SKB
2772 DMESG("Realloc skb %x",len+2);
2773#endif
2774
2775#ifdef DEBUG_RX_SKB
2776 DMESG("going copy prev frag %x",priv->rx_skb->len);
2777#endif
2778 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2779 priv->rx_skb->data,
2780 priv->rx_skb->len);
2781#ifdef DEBUG_RX_SKB
2782 DMESG("skb copy prev frag complete");
2783#endif
2784
2785 dev_kfree_skb_any(priv->rx_skb);
2786#ifdef DEBUG_RX_SKB
2787 DMESG("prev skb free ok");
2788#endif
2789
2790 priv->rx_skb=tmp_skb;
2791 }
2792 }
2793#ifdef DEBUG_RX_SKB
2794 DMESG("going to copy current payload %x",len);
2795#endif
2796 if(!priv->rx_skb_complete) {
2797#ifdef CONFIG_RTL8185B
2798 if(padding) {
2799 memcpy(skb_put(priv->rx_skb,len),
2800 (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2801 } else {
2802#endif
2803 memcpy(skb_put(priv->rx_skb,len),
2804 priv->rxbuffer->buf,len);
2805#ifdef CONFIG_RTL8185B
2806 }
2807#endif
2808 }
2809#ifdef DEBUG_RX_SKB
2810 DMESG("current fragment skb copy complete");
2811#endif
2812
2813 if(last && !priv->rx_skb_complete){
2814
2815#ifdef DEBUG_RX_SKB
2816 DMESG("Got last fragment");
2817#endif
2818
2819 if(priv->rx_skb->len > 4)
2820 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2821#ifdef DEBUG_RX_SKB
2822 DMESG("yanked out crc, passing to the upper layer");
2823#endif
2824
2825#ifndef RX_DONT_PASS_UL
2826 if(!ieee80211_rx(priv->ieee80211,
2827 priv->rx_skb, &stats)){
2828#ifdef DEBUG_RX
2829 DMESGW("Packet not consumed");
2830#endif
2831#endif // RX_DONT_PASS_UL
2832
2833 dev_kfree_skb_any(priv->rx_skb);
2834#ifndef RX_DONT_PASS_UL
2835 }
2836#endif
2837#ifdef DEBUG_RX
2838 else{
2839 DMESG("Rcv frag");
2840 }
2841#endif
2842 priv->rx_skb_complete=1;
2843 }
2844
2845#endif //DUMMY_RX
2846
2847 pci_dma_sync_single_for_device(priv->pdev,
2848 priv->rxbuffer->dma,
2849 priv->rxbuffersize * \
2850 sizeof(u8),
2851 PCI_DMA_FROMDEVICE);
2852
2853
2854drop: // this is used when we have not enought mem
2855
2856 /* restore the descriptor */
2857 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2858 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2859 *(priv->rxringtail)=
2860 *(priv->rxringtail) | priv->rxbuffersize;
2861
2862 *(priv->rxringtail)=
2863 *(priv->rxringtail) | (1<<31);
2864 //^empty descriptor
2865
2866 //wmb();
2867
2868#ifdef DEBUG_RX
2869 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2870#endif
2871 //unsigned long flags;
2872 //spin_lock_irqsave(&priv->irq_lock,flags);
2873
2874 priv->rxringtail+=rx_desc_size;
2875 if(priv->rxringtail >=
2876 (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2877 priv->rxringtail=priv->rxring;
2878
2879 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2880
2881
2882 priv->rxbuffer=(priv->rxbuffer->next);
2883
2884 }
2885
2886
2887
2888// if(get_curr_tx_free_desc(dev,priority))
2889// ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2890
2891
2892
2893}
2894
2895
2896void rtl8180_dma_kick(struct net_device *dev, int priority)
2897{
2898 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2899
2900 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2901/*
2902
2903 switch(priority){
2904
2905 case LOW_PRIORITY:
2906
2907 write_nic_byte(dev,TX_DMA_POLLING,
2908 (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2909 priv->dma_poll_mask);
2910 break;
2911
2912 case NORM_PRIORITY:
2913
2914 write_nic_byte(dev,TX_DMA_POLLING,
2915 (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2916 priv->dma_poll_mask);
2917 break;
2918
2919 case HI_PRIORITY:
2920
2921 write_nic_byte(dev,TX_DMA_POLLING,
2922 (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2923 priv->dma_poll_mask);
2924 break;
2925
2926 }
2927*/
2928 write_nic_byte(dev, TX_DMA_POLLING,
2929 (1 << (priority + 1)) | priv->dma_poll_mask);
2930 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2931
2932 force_pci_posting(dev);
2933}
2934
2935#if 0
2936void rtl8180_tx_queues_stop(struct net_device *dev)
2937{
2938 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2939 u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2940 dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2941 dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2942 dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2943
2944 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2945 write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2946 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2947}
2948#endif
2949
2950void rtl8180_data_hard_stop(struct net_device *dev)
2951{
2952 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2953
2954 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2955#ifdef CONFIG_RTL8185B
2956 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2957 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2958#else
2959 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2960 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2961#endif
2962 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2963}
2964
2965
2966void rtl8180_data_hard_resume(struct net_device *dev)
2967{
2968 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2969
2970 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2971#ifdef CONFIG_RTL8185B
2972 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2973 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2974#else
2975 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2976 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2977#endif
2978 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2979}
2980
2981
2982/* this function TX data frames when the ieee80211 stack requires this.
2983 * It checks also if we need to stop the ieee tx queue, eventually do it
2984 */
2985void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2986rate)
2987{
2988 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2989 int mode;
2990 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
2991 short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2992 unsigned long flags;
2993 int priority;
2994 //static int count = 0;
2995
2996 mode = priv->ieee80211->iw_mode;
2997
2998 rate = ieeerate2rtlrate(rate);
2999 /*
3000 * This function doesn't require lock because we make
3001 * sure it's called with the tx_lock already acquired.
3002 * this come from the kernel's hard_xmit callback (trought
3003 * the ieee stack, or from the try_wake_queue (again trought
3004 * the ieee stack.
3005 */
3006#ifdef CONFIG_RTL8185B
3007 priority = AC2Q(skb->priority);
3008#else
3009 priority = LOW_PRIORITY;
3010#endif
3011 spin_lock_irqsave(&priv->tx_lock,flags);
3012
3013 if(priv->ieee80211->bHwRadioOff)
3014 {
3015 spin_unlock_irqrestore(&priv->tx_lock,flags);
3016
3017 return;
3018 }
3019
3020 //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
3021 if (!check_nic_enought_desc(dev, priority)){
3022 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
3023 // get_curr_tx_free_desc(dev, priority));
3024 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
3025 get_curr_tx_free_desc(dev, priority));
3026 //printk(KERN_WARNING "==============================================================> \n");
3027 ieee80211_stop_queue(priv->ieee80211);
3028 }
3029 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
3030 if (!check_nic_enought_desc(dev, priority))
3031 ieee80211_stop_queue(priv->ieee80211);
3032
3033 //dev_kfree_skb_any(skb);
3034 spin_unlock_irqrestore(&priv->tx_lock,flags);
3035
3036}
3037
3038/* This is a rough attempt to TX a frame
3039 * This is called by the ieee 80211 stack to TX management frames.
3040 * If the ring is full packet are dropped (for data frame the queue
3041 * is stopped before this can happen). For this reason it is better
3042 * if the descriptors are larger than the largest management frame
3043 * we intend to TX: i'm unsure what the HW does if it will not found
3044 * the last fragment of a frame because it has been dropped...
3045 * Since queues for Management and Data frames are different we
3046 * might use a different lock than tx_lock (for example mgmt_tx_lock)
3047 */
3048/* these function may loops if invoked with 0 descriptors or 0 len buffer*/
3049int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
3050{
3051 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3052
3053 unsigned long flags;
3054
3055 int priority;
3056
3057#ifdef CONFIG_RTL8185B
3058 priority = MANAGE_PRIORITY;
3059#else
3060 priority = NORM_PRIORITY;
3061#endif
3062
3063 spin_lock_irqsave(&priv->tx_lock,flags);
3064
3065 if(priv->ieee80211->bHwRadioOff)
3066 {
3067 spin_unlock_irqrestore(&priv->tx_lock,flags);
3068
3069 dev_kfree_skb_any(skb);
3070 return 0;
3071 }
3072
3073 rtl8180_tx(dev, skb->data, skb->len, priority,
3074 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3075
3076 priv->ieee80211->stats.tx_bytes+=skb->len;
3077 priv->ieee80211->stats.tx_packets++;
3078 spin_unlock_irqrestore(&priv->tx_lock,flags);
3079
3080 dev_kfree_skb_any(skb);
3081 return 0;
3082}
3083
3084// longpre 144+48 shortpre 72+24
3085u16 rtl8180_len2duration(u32 len, short rate,short* ext)
3086{
3087 u16 duration;
3088 u16 drift;
3089 *ext=0;
3090
3091 switch(rate){
3092 case 0://1mbps
3093 *ext=0;
3094 duration = ((len+4)<<4) /0x2;
3095 drift = ((len+4)<<4) % 0x2;
3096 if(drift ==0 ) break;
3097 duration++;
3098 break;
3099
3100 case 1://2mbps
3101 *ext=0;
3102 duration = ((len+4)<<4) /0x4;
3103 drift = ((len+4)<<4) % 0x4;
3104 if(drift ==0 ) break;
3105 duration++;
3106 break;
3107
3108 case 2: //5.5mbps
3109 *ext=0;
3110 duration = ((len+4)<<4) /0xb;
3111 drift = ((len+4)<<4) % 0xb;
3112 if(drift ==0 )
3113 break;
3114 duration++;
3115 break;
3116
3117 default:
3118 case 3://11mbps
3119 *ext=0;
3120 duration = ((len+4)<<4) /0x16;
3121 drift = ((len+4)<<4) % 0x16;
3122 if(drift ==0 )
3123 break;
3124 duration++;
3125 if(drift > 6)
3126 break;
3127 *ext=1;
3128 break;
3129 }
3130
3131 return duration;
3132}
3133
3134
3135void rtl8180_prepare_beacon(struct net_device *dev)
3136{
3137
3138 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3139
3140 struct sk_buff *skb;
3141
3142 u16 word = read_nic_word(dev, BcnItv);
3143 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
3144 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
3145 write_nic_word(dev, BcnItv, word);
3146
3147
3148 skb = ieee80211_get_beacon(priv->ieee80211);
3149 if(skb){
3150 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
3151 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3152 dev_kfree_skb_any(skb);
3153 }
3154 #if 0
3155 //DMESG("size %x",len);
3156 if(*tail & (1<<31)){
3157
3158 //DMESG("No more beacon TX desc");
3159 return ;
3160
3161 }
3162 //while(! *tail & (1<<31)){
3163 *tail= 0; // zeroes header
3164
3165 *tail = *tail| (1<<29) ; //fist segment of the packet
3166 *tail = (*tail) | (1<<28); // last segment
3167 // *tail = *tail | (1<<18); // this is a beacon frame
3168 *(tail+3)=*(tail+3) &~ 0xfff;
3169 *(tail+3)=*(tail+3) | len; // buffer lenght
3170 *tail = *tail |len;
3171 // zeroes the second 32-bits dword of the descriptor
3172 *(tail+1)= 0;
3173 *tail = *tail | (rate << 24);
3174
3175 duration = rtl8180_len2duration(len,rate,&ext);
3176
3177 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3178
3179 *tail = *tail | (1<<31);
3180 //^ descriptor ready to be txed
3181 if((tail - begin)/8 == priv->txbeaconcount-1)
3182 tail=begin;
3183 else
3184 tail=tail+8;
3185 //}
3186#endif
3187}
3188
3189/* This function do the real dirty work: it enqueues a TX command
3190 * descriptor in the ring buffer, copyes the frame in a TX buffer
3191 * and kicks the NIC to ensure it does the DMA transfer.
3192 */
3193short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
3194 short morefrag, short descfrag, int rate)
3195{
3196 struct r8180_priv *priv = ieee80211_priv(dev);
3197 u32 *tail,*temp_tail;
3198 u32 *begin;
3199 u32 *buf;
3200 int i;
3201 int remain;
3202 int buflen;
3203 int count;
3204 //u16 AckCtsTime;
3205 //u16 FrameTime;
3206 u16 duration;
3207 short ext;
3208 struct buffer* buflist;
3209 //unsigned long flags;
3210#ifdef CONFIG_RTL8185B
3211 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
3212 u8 dest[ETH_ALEN];
3213 u8 bUseShortPreamble = 0;
3214 u8 bCTSEnable = 0;
3215 u8 bRTSEnable = 0;
3216 //u16 RTSRate = 22;
3217 //u8 RetryLimit = 0;
3218 u16 Duration = 0;
3219 u16 RtsDur = 0;
3220 u16 ThisFrameTime = 0;
3221 u16 TxDescDuration = 0;
3222 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3223#endif
3224
3225 switch(priority) {
3226 case MANAGE_PRIORITY:
3227 tail=priv->txmapringtail;
3228 begin=priv->txmapring;
3229 buflist = priv->txmapbufstail;
3230 count = priv->txringcount;
3231 break;
3232
3233 case BK_PRIORITY:
3234 tail=priv->txbkpringtail;
3235 begin=priv->txbkpring;
3236 buflist = priv->txbkpbufstail;
3237 count = priv->txringcount;
3238 break;
3239
3240 case BE_PRIORITY:
3241 tail=priv->txbepringtail;
3242 begin=priv->txbepring;
3243 buflist = priv->txbepbufstail;
3244 count = priv->txringcount;
3245 break;
3246
3247 case VI_PRIORITY:
3248 tail=priv->txvipringtail;
3249 begin=priv->txvipring;
3250 buflist = priv->txvipbufstail;
3251 count = priv->txringcount;
3252 break;
3253
3254 case VO_PRIORITY:
3255 tail=priv->txvopringtail;
3256 begin=priv->txvopring;
3257 buflist = priv->txvopbufstail;
3258 count = priv->txringcount;
3259 break;
3260
3261 case HI_PRIORITY:
3262 tail=priv->txhpringtail;
3263 begin=priv->txhpring;
3264 buflist = priv->txhpbufstail;
3265 count = priv->txringcount;
3266 break;
3267
3268 case BEACON_PRIORITY:
3269 tail=priv->txbeaconringtail;
3270 begin=priv->txbeaconring;
3271 buflist = priv->txbeaconbufstail;
3272 count = priv->txbeaconcount;
3273 break;
3274
3275 default:
3276 return -1;
3277 break;
3278 }
3279
3280 //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3281#if 1
3282 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3283 if (is_multicast_ether_addr(dest) ||
3284 is_broadcast_ether_addr(dest))
3285 {
3286 Duration = 0;
3287 RtsDur = 0;
3288 bRTSEnable = 0;
3289 bCTSEnable = 0;
3290
3291 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3292 TxDescDuration = ThisFrameTime;
3293 } else {// Unicast packet
3294 //u8 AckRate;
3295 u16 AckTime;
3296
3297 //YJ,add,080828,for Keep alive
3298 priv->NumTxUnicast++;
3299
3300 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3301 //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3302 // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3303 //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3304 //For simplicity, just use the 1M basic rate
3305 //AckTime = ComputeTxTime(14, 540,0, 0); // AckCTSLng = 14 use 1M bps send
3306 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3307 //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send
3308
3309 if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3310 { // RTS/CTS.
3311 u16 RtsTime, CtsTime;
3312 //u16 CtsRate;
3313 bRTSEnable = 1;
3314 bCTSEnable = 0;
3315
3316 // Rate and time required for RTS.
3317 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3318 // Rate and time required for CTS.
3319 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3320
3321 // Figure out time required to transmit this frame.
3322 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3323 rtl8180_rate2rate(rate),
3324 0,
3325 bUseShortPreamble);
3326
3327 // RTS-CTS-ThisFrame-ACK.
3328 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3329
3330 TxDescDuration = RtsTime + RtsDur;
3331 }
3332 else {// Normal case.
3333 bCTSEnable = 0;
3334 bRTSEnable = 0;
3335 RtsDur = 0;
3336
3337 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3338 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3339 }
3340
3341 if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3342 // ThisFrame-ACK.
3343 Duration = aSifsTime + AckTime;
3344 } else { // One or more fragments remained.
3345 u16 NextFragTime;
3346 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3347 rtl8180_rate2rate(rate),
3348 0,
3349 bUseShortPreamble );
3350
3351 //ThisFrag-ACk-NextFrag-ACK.
3352 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3353 }
3354
3355 } // End of Unicast packet
3356
3357 frag_hdr->duration_id = Duration;
3358#endif
3359
3360 buflen=priv->txbuffsize;
3361 remain=len;
3362 temp_tail = tail;
3363//printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3364 while(remain!=0){
3365#ifdef DEBUG_TX_FRAG
3366 DMESG("TX iteration");
3367#endif
3368#ifdef DEBUG_TX
3369 DMESG("TX: filling descriptor %x",(u32)tail);
3370#endif
3371 mb();
3372 if(!buflist){
3373 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3374 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3375 return -1;
3376 }
3377 buf=buflist->buf;
3378
3379 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3380
3381 DMESGW("No more TX desc, returning %x of %x",
3382 remain,len);
3383 priv->stats.txrdu++;
3384#ifdef DEBUG_TX_DESC
3385 check_tx_ring(dev,priority);
3386 // netif_stop_queue(dev);
3387 // netif_carrier_off(dev);
3388#endif
3389 // spin_unlock_irqrestore(&priv->tx_lock,flags);
3390
3391 return remain;
3392
3393 }
3394
3395 *tail= 0; // zeroes header
3396 *(tail+1) = 0;
3397 *(tail+3) = 0;
3398 *(tail+5) = 0;
3399 *(tail+6) = 0;
3400 *(tail+7) = 0;
3401
3402 if(priv->card_8185){
3403 //FIXME: this should be triggered by HW encryption parameters.
3404 *tail |= (1<<15); //no encrypt
3405// *tail |= (1<<30); //raise int when completed
3406 }
3407 // *tail = *tail | (1<<16);
3408 if(remain==len && !descfrag) {
3409 ownbit_flag = false; //added by david woo,2007.12.14
3410#ifdef DEBUG_TX_FRAG
3411 DMESG("First descriptor");
3412#endif
3413 *tail = *tail| (1<<29) ; //fist segment of the packet
3414 *tail = *tail |(len);
3415 } else {
3416 ownbit_flag = true;
3417 }
3418
3419 for(i=0;i<buflen&& remain >0;i++,remain--){
3420 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3421 if(remain == 4 && i+4 >= buflen) break;
3422 /* ensure the last desc has at least 4 bytes payload */
3423
3424 }
3425 txbuf = txbuf + i;
3426 *(tail+3)=*(tail+3) &~ 0xfff;
3427 *(tail+3)=*(tail+3) | i; // buffer lenght
3428 // Use short preamble or not
3429 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3430 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long!
3431 // *tail |= (1<<16); // enable short preamble mode.
3432
3433#ifdef CONFIG_RTL8185B
3434 if(bCTSEnable) {
3435 *tail |= (1<<18);
3436 }
3437
3438 if(bRTSEnable) //rts enable
3439 {
3440 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3441 *tail |= (1<<23);//rts enable
3442 *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3443 }
3444 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3445// *(tail+3) |= (0xe6<<16);
3446 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3447#else
3448 //Use RTS or not
3449#ifdef CONFIG_RTL8187B
3450 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
3451#else
3452 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
3453#endif
3454 *tail |= (1<<23); //enalbe RTS function
3455 *tail |= (0<<19); //use 1M bps send RTS packet
3456 AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3457 FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
3458 // RTS/CTS time is calculate as follow
3459 duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime;
3460 *(tail+1) |= duration; //Need to edit here! ----hikaru
3461 }else{
3462 *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
3463 }
3464#endif
3465
3466 *tail = *tail | ((rate&0xf) << 24);
3467 //DMESG("rate %d",rate);
3468
3469 if(priv->card_8185){
3470
3471 #if 0
3472 *(tail+5)&= ~(1<<24); /* tx ant 0 */
3473
3474 *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3475 *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3476
3477 *(tail+5) &=
3478~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3479 *(tail+5) |= (7<<8); // Max retry limit
3480
3481 *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3482 *(tail+5) |= (8<<4); // Max contention window
3483 *(tail+6) |= 4; // Min contention window
3484 #endif
3485 // *(tail+5) = 0;
3486 }
3487
3488 /* hw_plcp_len is not used for rtl8180 chip */
3489 /* FIXME */
3490 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3491
3492 duration = rtl8180_len2duration(len,
3493 rate,&ext);
3494
3495
3496#ifdef DEBUG_TX
3497 DMESG("PLCP duration %d",duration );
3498 //DMESG("drift %d",drift);
3499 DMESG("extension %s", (ext==1) ? "on":"off");
3500#endif
3501 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3502 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3503 }
3504
3505 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3506 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3507
3508#ifdef DEBUG_TX_FRAG
3509 if(!remain)DMESG("Last descriptor");
3510 if(morefrag)DMESG("More frag");
3511#endif
3512 *(tail+5) = *(tail+5)|(2<<27);
3513 *(tail+7) = *(tail+7)|(1<<4);
3514
3515 wmb();
3516 if(ownbit_flag)
3517 {
3518 *tail = *tail | (1<<31); // descriptor ready to be txed
3519 }
3520
3521#ifdef DEBUG_TX_DESC2
3522 printk("tx desc is:\n");
3523 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3524 tail[4], tail[5], tail[6], tail[7]);
3525#endif
3526
3527 if((tail - begin)/8 == count-1)
3528 tail=begin;
3529
3530 else
3531 tail=tail+8;
3532
3533 buflist=buflist->next;
3534
3535 mb();
3536
3537 switch(priority) {
3538 case MANAGE_PRIORITY:
3539 priv->txmapringtail=tail;
3540 priv->txmapbufstail=buflist;
3541 break;
3542
3543 case BK_PRIORITY:
3544 priv->txbkpringtail=tail;
3545 priv->txbkpbufstail=buflist;
3546 break;
3547
3548 case BE_PRIORITY:
3549 priv->txbepringtail=tail;
3550 priv->txbepbufstail=buflist;
3551 break;
3552
3553 case VI_PRIORITY:
3554 priv->txvipringtail=tail;
3555 priv->txvipbufstail=buflist;
3556 break;
3557
3558 case VO_PRIORITY:
3559 priv->txvopringtail=tail;
3560 priv->txvopbufstail=buflist;
3561 break;
3562
3563 case HI_PRIORITY:
3564 priv->txhpringtail=tail;
3565 priv->txhpbufstail = buflist;
3566 break;
3567
3568 case BEACON_PRIORITY:
3569 /* the HW seems to be happy with the 1st
3570 * descriptor filled and the 2nd empty...
3571 * So always update descriptor 1 and never
3572 * touch 2nd
3573 */
3574 // priv->txbeaconringtail=tail;
3575 // priv->txbeaconbufstail=buflist;
3576
3577 break;
3578
3579 }
3580
3581 //rtl8180_dma_kick(dev,priority);
3582 }
3583 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3584 rtl8180_dma_kick(dev,priority);
3585 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3586
3587 return 0;
3588
3589}
3590
3591
3592void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3593
3594
3595void rtl8180_link_change(struct net_device *dev)
3596{
3597 struct r8180_priv *priv = ieee80211_priv(dev);
3598 u16 beacon_interval;
3599
3600 struct ieee80211_network *net = &priv->ieee80211->current_network;
3601// rtl8180_adapter_start(dev);
3602 rtl8180_update_msr(dev);
3603
3604
3605 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3606
3607 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3608 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3609
3610
3611 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL);
3612 beacon_interval &= ~ BEACON_INTERVAL_MASK;
3613 beacon_interval |= net->beacon_interval;
3614 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3615
3616 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3617
3618
3619 /*
3620 u16 atim = read_nic_dword(dev,ATIM);
3621 u16 = u16 &~ ATIM_MASK;
3622 u16 = u16 | beacon->atim;
3623 */
3624#if 0
3625 if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3626 if (priv->hw_wep) {
3627 DMESG("Enabling hardware WEP support");
3628 rtl8180_set_hw_wep(dev);
3629 priv->ieee80211->host_encrypt=0;
3630 priv->ieee80211->host_decrypt=0;
3631 }
3632#ifndef CONFIG_IEEE80211_NOWEP
3633 else {
3634 priv->ieee80211->host_encrypt=1;
3635 priv->ieee80211->host_decrypt=1;
3636 }
3637#endif
3638 }
3639#ifndef CONFIG_IEEE80211_NOWEP
3640 else{
3641 priv->ieee80211->host_encrypt=0;
3642 priv->ieee80211->host_decrypt=0;
3643 }
3644#endif
3645#endif
3646
3647
3648 if(priv->card_8185)
3649 rtl8180_set_chan(dev, priv->chan);
3650
3651
3652}
3653
3654void rtl8180_rq_tx_ack(struct net_device *dev){
3655
3656 struct r8180_priv *priv = ieee80211_priv(dev);
3657// printk("====================>%s\n",__FUNCTION__);
3658 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3659 priv->ack_tx_to_ieee = 1;
3660}
3661
3662short rtl8180_is_tx_queue_empty(struct net_device *dev){
3663
3664 struct r8180_priv *priv = ieee80211_priv(dev);
3665 u32* d;
3666
3667 for (d = priv->txmapring;
3668 d < priv->txmapring + priv->txringcount;d+=8)
3669 if(*d & (1<<31)) return 0;
3670
3671 for (d = priv->txbkpring;
3672 d < priv->txbkpring + priv->txringcount;d+=8)
3673 if(*d & (1<<31)) return 0;
3674
3675 for (d = priv->txbepring;
3676 d < priv->txbepring + priv->txringcount;d+=8)
3677 if(*d & (1<<31)) return 0;
3678
3679 for (d = priv->txvipring;
3680 d < priv->txvipring + priv->txringcount;d+=8)
3681 if(*d & (1<<31)) return 0;
3682
3683 for (d = priv->txvopring;
3684 d < priv->txvopring + priv->txringcount;d+=8)
3685 if(*d & (1<<31)) return 0;
3686
3687 for (d = priv->txhpring;
3688 d < priv->txhpring + priv->txringcount;d+=8)
3689 if(*d & (1<<31)) return 0;
3690 return 1;
3691}
3692/* FIXME FIXME 5msecs is random */
3693#define HW_WAKE_DELAY 5
3694
3695void rtl8180_hw_wakeup(struct net_device *dev)
3696{
3697 unsigned long flags;
3698
3699 struct r8180_priv *priv = ieee80211_priv(dev);
3700
3701 spin_lock_irqsave(&priv->ps_lock,flags);
3702 //DMESG("Waken up!");
3703 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3704
3705 if(priv->rf_wakeup)
3706 priv->rf_wakeup(dev);
3707// mdelay(HW_WAKE_DELAY);
3708 spin_unlock_irqrestore(&priv->ps_lock,flags);
3709}
3710
3711void rtl8180_hw_sleep_down(struct net_device *dev)
3712{
3713 unsigned long flags;
3714
3715 struct r8180_priv *priv = ieee80211_priv(dev);
3716
3717 spin_lock_irqsave(&priv->ps_lock,flags);
3718 //DMESG("Sleep!");
3719
3720 if(priv->rf_sleep)
3721 priv->rf_sleep(dev);
3722 spin_unlock_irqrestore(&priv->ps_lock,flags);
3723}
3724
3725
3726void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3727{
3728
3729 struct r8180_priv *priv = ieee80211_priv(dev);
3730
3731 u32 rb = jiffies;
3732 unsigned long flags;
3733
3734 spin_lock_irqsave(&priv->ps_lock,flags);
3735
3736 /* Writing HW register with 0 equals to disable
3737 * the timer, that is not really what we want
3738 */
3739 tl -= MSECS(4+16+7);
3740
3741 //if(tl == 0) tl = 1;
3742
3743 /* FIXME HACK FIXME HACK */
3744// force_pci_posting(dev);
3745 //mdelay(1);
3746
3747// rb = read_nic_dword(dev, TSFTR);
3748
3749 /* If the interval in witch we are requested to sleep is too
3750 * short then give up and remain awake
3751 */
3752 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3753 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3754 spin_unlock_irqrestore(&priv->ps_lock,flags);
3755 printk("too short to sleep\n");
3756 return;
3757 }
3758
3759// write_nic_dword(dev, TimerInt, tl);
3760// rb = read_nic_dword(dev, TSFTR);
3761 {
3762 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3763 // if (tl<rb)
3764
3765 //lzm,add,080828
3766 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3767
3768 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3769 }
3770 /* if we suspect the TimerInt is gone beyond tl
3771 * while setting it, then give up
3772 */
3773#if 1
3774 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3775 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3776 spin_unlock_irqrestore(&priv->ps_lock,flags);
3777 return;
3778 }
3779#endif
3780// if(priv->rf_sleep)
3781// priv->rf_sleep(dev);
3782
3783 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3784 spin_unlock_irqrestore(&priv->ps_lock,flags);
3785}
3786
3787
3788//void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3789#if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
3790void rtl8180_wmm_param_update(struct work_struct * work)
3791{
3792 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3793 //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3794 struct net_device *dev = ieee->dev;
3795#else
3796void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
3797{
3798 struct net_device *dev = ieee->dev;
3799 struct r8180_priv *priv = ieee80211_priv(dev);
3800#endif
3801 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3802 u8 mode = ieee->current_network.mode;
3803 AC_CODING eACI;
3804 AC_PARAM AcParam;
3805 PAC_PARAM pAcParam;
3806 u8 i;
3807
3808#ifndef CONFIG_RTL8185B
3809 //for legacy 8185 keep the PARAM unchange.
3810 return;
3811#else
3812 if(!ieee->current_network.QoS_Enable){
3813 //legacy ac_xx_param update
3814 AcParam.longData = 0;
3815 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3816 AcParam.f.AciAifsn.f.ACM = 0;
3817 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3818 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3819 AcParam.f.TXOPLimit = 0;
3820 for(eACI = 0; eACI < AC_MAX; eACI++){
3821 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3822 {
3823 u8 u1bAIFS;
3824 u32 u4bAcParam;
3825 pAcParam = (PAC_PARAM)(&AcParam);
3826 // Retrive paramters to udpate.
3827 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3828 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3829 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3830 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3831 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3832 switch(eACI){
3833 case AC1_BK:
3834 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3835 break;
3836
3837 case AC0_BE:
3838 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3839 break;
3840
3841 case AC2_VI:
3842 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3843 break;
3844
3845 case AC3_VO:
3846 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3847 break;
3848
3849 default:
3850 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3851 break;
3852 }
3853 }
3854 }
3855 return;
3856 }
3857
3858 for(i = 0; i < AC_MAX; i++){
3859 //AcParam.longData = 0;
3860 pAcParam = (AC_PARAM * )ac_param;
3861 {
3862 AC_CODING eACI;
3863 u8 u1bAIFS;
3864 u32 u4bAcParam;
3865
3866 // Retrive paramters to udpate.
3867 eACI = pAcParam->f.AciAifsn.f.ACI;
3868 //Mode G/A: slotTimeTimer = 9; Mode B: 20
3869 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3870 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
3871 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
3872 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
3873 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3874
3875 switch(eACI){
3876 case AC1_BK:
3877 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3878 break;
3879
3880 case AC0_BE:
3881 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3882 break;
3883
3884 case AC2_VI:
3885 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3886 break;
3887
3888 case AC3_VO:
3889 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3890 break;
3891
3892 default:
3893 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3894 break;
3895 }
3896 }
3897 ac_param += (sizeof(AC_PARAM));
3898 }
3899#endif
3900}
3901
3902#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3903void rtl8180_tx_irq_wq(struct work_struct *work);
3904#else
3905void rtl8180_tx_irq_wq(struct net_device *dev);
3906#endif
3907
3908
3909
3910
3911#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3912void rtl8180_restart_wq(struct work_struct *work);
3913//void rtl8180_rq_tx_ack(struct work_struct *work);
3914#else
3915 void rtl8180_restart_wq(struct net_device *dev);
3916//void rtl8180_rq_tx_ack(struct net_device *dev);
3917#endif
3918#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3919void rtl8180_watch_dog_wq(struct work_struct *work);
3920#else
3921void rtl8180_watch_dog_wq(struct net_device *dev);
3922#endif
3923#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3924void rtl8180_hw_wakeup_wq(struct work_struct *work);
3925#else
3926void rtl8180_hw_wakeup_wq(struct net_device *dev);
3927#endif
3928
3929#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3930void rtl8180_hw_sleep_wq(struct work_struct *work);
3931#else
3932void rtl8180_hw_sleep_wq(struct net_device *dev);
3933#endif
3934
3935
3936
3937#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3938void rtl8180_sw_antenna_wq(struct work_struct *work);
3939#else
3940void rtl8180_sw_antenna_wq(struct net_device *dev);
3941#endif
3942 void rtl8180_watch_dog(struct net_device *dev);
3943void watch_dog_adaptive(unsigned long data)
3944{
3945 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3946// DMESG("---->watch_dog_adaptive()\n");
3947 if(!priv->up)
3948 {
3949 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3950 return;
3951 }
3952
3953 // queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3954//{by amy 080312
3955#if 1
3956 // Tx High Power Mechanism.
3957#ifdef HIGH_POWER
3958 if(CheckHighPower((struct net_device *)data))
3959 {
3960 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3961 }
3962#endif
3963
3964#ifdef CONFIG_RTL818X_S
3965 // Tx Power Tracking on 87SE.
3966#ifdef TX_TRACK
3967 //if( priv->bTxPowerTrack ) //lzm mod 080826
3968 if( CheckTxPwrTracking((struct net_device *)data));
3969 TxPwrTracking87SE((struct net_device *)data);
3970#endif
3971#endif
3972
3973 // Perform DIG immediately.
3974#ifdef SW_DIG
3975 if(CheckDig((struct net_device *)data) == true)
3976 {
3977 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3978 }
3979#endif
3980#endif
3981//by amy 080312}
3982 rtl8180_watch_dog((struct net_device *)data);
3983
3984
3985 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3986
3987 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3988 add_timer(&priv->watch_dog_timer);
3989// DMESG("<----watch_dog_adaptive()\n");
3990}
3991
3992#ifdef ENABLE_DOT11D
3993
3994static CHANNEL_LIST ChannelPlan[] = {
3995 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC
3996 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
3997 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
3998 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI.
3999 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI.
4000 {{14,36,40,44,48,52,56,60,64},9}, //MKK
4001 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
4002 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel.
4003 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC
4004 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
4005 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
4006};
4007
4008static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
4009{
4010 int i;
4011
4012 //lzm add 080826
4013 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
4014 ieee->IbssStartChnl=0;
4015
4016 switch (channel_plan)
4017 {
4018 case COUNTRY_CODE_FCC:
4019 case COUNTRY_CODE_IC:
4020 case COUNTRY_CODE_ETSI:
4021 case COUNTRY_CODE_SPAIN:
4022 case COUNTRY_CODE_FRANCE:
4023 case COUNTRY_CODE_MKK:
4024 case COUNTRY_CODE_MKK1:
4025 case COUNTRY_CODE_ISRAEL:
4026 case COUNTRY_CODE_TELEC:
4027 {
4028 Dot11d_Init(ieee);
4029 ieee->bGlobalDomain = false;
4030 if (ChannelPlan[channel_plan].Len != 0){
4031 // Clear old channel map
4032 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4033 // Set new channel map
4034 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
4035 {
4036 if(ChannelPlan[channel_plan].Channel[i] <= 14)
4037 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
4038 }
4039 }
4040 break;
4041 }
4042 case COUNTRY_CODE_GLOBAL_DOMAIN:
4043 {
4044 GET_DOT11D_INFO(ieee)->bEnabled = 0;
4045 Dot11d_Reset(ieee);
4046 ieee->bGlobalDomain = true;
4047 break;
4048 }
4049 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
4050 {
4051 ieee->MinPassiveChnlNum=12;
4052 ieee->IbssStartChnl= 10;
4053 break;
4054 }
4055 default:
4056 {
4057 Dot11d_Init(ieee);
4058 ieee->bGlobalDomain = false;
4059 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4060 for (i=1;i<=14;i++)
4061 {
4062 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
4063 }
4064 break;
4065 }
4066 }
4067}
4068#endif
4069
4070//Add for RF power on power off by lizhaoming 080512
4071#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4072void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
4073#else
4074void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
4075#endif
4076
4077//YJ,add,080828
4078static void rtl8180_statistics_init(struct Stats *pstats)
4079{
4080 memset(pstats, 0, sizeof(struct Stats));
4081}
4082static void rtl8180_link_detect_init(plink_detect_t plink_detect)
4083{
4084 memset(plink_detect, 0, sizeof(link_detect_t));
4085 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
4086}
4087//YJ,add,080828,end
4088
4089short rtl8180_init(struct net_device *dev)
4090{
4091 struct r8180_priv *priv = ieee80211_priv(dev);
4092 u16 word;
4093 u16 version;
4094 u8 hw_version;
4095 //u8 config3;
4096 u32 usValue;
4097 u16 tmpu16;
4098 int i, j;
4099
4100#ifdef ENABLE_DOT11D
4101#if 0
4102 for(i=0;i<0xFF;i++) {
4103 if(i%16 == 0)
4104 printk("\n[%x]: ", i/16);
4105 printk("\t%4.4x", eprom_read(dev,i));
4106 }
4107#endif
4108 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
4109 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
4110 printk("rtl8180_init:Error channel plan! Set to default.\n");
4111 priv->channel_plan = 0;
4112 }
4113 //priv->channel_plan = 9; //Global Domain
4114
4115 DMESG("Channel plan is %d\n",priv->channel_plan);
4116 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
4117#else
4118 int ch;
4119 //Set Default Channel Plan
4120 if(!channels){
4121 DMESG("No channels, aborting");
4122 return -1;
4123 }
4124 ch=channels;
4125 priv->channel_plan = 0;//hikaru
4126 // set channels 1..14 allowed in given locale
4127 for (i=1; i<=14; i++) {
4128 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
4129 ch >>= 1;
4130 }
4131#endif
4132
4133 //memcpy(priv->stats,0,sizeof(struct Stats));
4134
4135 //FIXME: these constants are placed in a bad pleace.
4136 priv->txbuffsize = 2048;//1024;
4137 priv->txringcount = 32;//32;
4138 priv->rxbuffersize = 2048;//1024;
4139 priv->rxringcount = 64;//32;
4140 priv->txbeaconcount = 2;
4141 priv->rx_skb_complete = 1;
4142 //priv->txnp_pending.ispending=0;
4143 /* ^^ the SKB does not containt a partial RXed
4144 * packet (is empty)
4145 */
4146
4147#ifdef CONFIG_RTL8185B
4148#ifdef CONFIG_RTL818X_S
4149 priv->RegThreeWireMode = HW_THREE_WIRE_SI;
4150#else
4151 priv->RegThreeWireMode = SW_THREE_WIRE;
4152#endif
4153#endif
4154
4155//Add for RF power on power off by lizhaoming 080512
4156 priv->RFChangeInProgress = false;
4157 priv->SetRFPowerStateInProgress = false;
4158 priv->RFProgType = 0;
4159 priv->bInHctTest = false;
4160
4161 priv->irq_enabled=0;
4162
4163//YJ,modified,080828
4164#if 0
4165 priv->stats.rxdmafail=0;
4166 priv->stats.txrdu=0;
4167 priv->stats.rxrdu=0;
4168 priv->stats.rxnolast=0;
4169 priv->stats.rxnodata=0;
4170 //priv->stats.rxreset=0;
4171 //priv->stats.rxwrkaround=0;
4172 priv->stats.rxnopointer=0;
4173 priv->stats.txnperr=0;
4174 priv->stats.txresumed=0;
4175 priv->stats.rxerr=0;
4176 priv->stats.rxoverflow=0;
4177 priv->stats.rxint=0;
4178 priv->stats.txnpokint=0;
4179 priv->stats.txhpokint=0;
4180 priv->stats.txhperr=0;
4181 priv->stats.ints=0;
4182 priv->stats.shints=0;
4183 priv->stats.txoverflow=0;
4184 priv->stats.txbeacon=0;
4185 priv->stats.txbeaconerr=0;
4186 priv->stats.txlperr=0;
4187 priv->stats.txlpokint=0;
4188 priv->stats.txretry=0;//tony 20060601
4189 priv->stats.rxcrcerrmin=0;
4190 priv->stats.rxcrcerrmid=0;
4191 priv->stats.rxcrcerrmax=0;
4192 priv->stats.rxicverr=0;
4193#else
4194 rtl8180_statistics_init(&priv->stats);
4195 rtl8180_link_detect_init(&priv->link_detect);
4196#endif
4197//YJ,modified,080828,end
4198
4199
4200 priv->ack_tx_to_ieee = 0;
4201 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4202 priv->ieee80211->iw_mode = IW_MODE_INFRA;
4203 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
4204 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4205 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
4206 priv->ieee80211->active_scan = 1;
4207 priv->ieee80211->rate = 110; //11 mbps
4208 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
4209 priv->ieee80211->host_encrypt = 1;
4210 priv->ieee80211->host_decrypt = 1;
4211 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
4212 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
4213 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
4214 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
4215
4216 priv->hw_wep = hwwep;
4217 priv->prism_hdr=0;
4218 priv->dev=dev;
4219 priv->retry_rts = DEFAULT_RETRY_RTS;
4220 priv->retry_data = DEFAULT_RETRY_DATA;
4221 priv->RFChangeInProgress = false;
4222 priv->SetRFPowerStateInProgress = false;
4223 priv->RFProgType = 0;
4224 priv->bInHctTest = false;
4225 priv->bInactivePs = true;//false;
4226 priv->ieee80211->bInactivePs = priv->bInactivePs;
4227 priv->bSwRfProcessing = false;
4228 priv->eRFPowerState = eRfOff;
4229 priv->RfOffReason = 0;
4230 priv->LedStrategy = SW_LED_MODE0;
4231 //priv->NumRxOkInPeriod = 0; //YJ,del,080828
4232 //priv->NumTxOkInPeriod = 0; //YJ,del,080828
4233 priv->TxPollingTimes = 0;//lzm add 080826
4234 priv->bLeisurePs = true;
4235 priv->dot11PowerSaveMode = eActive;
4236//by amy for antenna
4237 priv->AdMinCheckPeriod = 5;
4238 priv->AdMaxCheckPeriod = 10;
4239// Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
4240 priv->AdMaxRxSsThreshold = 30;//60->30
4241 priv->AdRxSsThreshold = 20;//50->20
4242 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
4243 priv->AdTickCount = 0;
4244 priv->AdRxSignalStrength = -1;
4245 priv->RegSwAntennaDiversityMechanism = 0;
4246 priv->RegDefaultAntenna = 0;
4247 priv->SignalStrength = 0;
4248 priv->AdRxOkCnt = 0;
4249 priv->CurrAntennaIndex = 0;
4250 priv->AdRxSsBeforeSwitched = 0;
4251 init_timer(&priv->SwAntennaDiversityTimer);
4252 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
4253 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
4254//by amy for antenna
4255//{by amy 080312
4256 priv->bDigMechanism = 1;
4257 priv->InitialGain = 6;
4258 priv->bXtalCalibration = false;
4259 priv->XtalCal_Xin = 0;
4260 priv->XtalCal_Xout = 0;
4261 priv->bTxPowerTrack = false;
4262 priv->ThermalMeter = 0;
4263 priv->FalseAlarmRegValue = 0;
4264 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
4265 priv->DIG_NumberFallbackVote = 0;
4266 priv->DIG_NumberUpgradeVote = 0;
4267 priv->LastSignalStrengthInPercent = 0;
4268 priv->Stats_SignalStrength = 0;
4269 priv->LastRxPktAntenna = 0;
4270 priv->SignalQuality = 0; // in 0-100 index.
4271 priv->Stats_SignalQuality = 0;
4272 priv->RecvSignalPower = 0; // in dBm.
4273 priv->Stats_RecvSignalPower = 0;
4274 priv->AdMainAntennaRxOkCnt = 0;
4275 priv->AdAuxAntennaRxOkCnt = 0;
4276 priv->bHWAdSwitched = false;
4277 priv->bRegHighPowerMechanism = true;
4278 priv->RegHiPwrUpperTh = 77;
4279 priv->RegHiPwrLowerTh = 75;
4280 priv->RegRSSIHiPwrUpperTh = 70;
4281 priv->RegRSSIHiPwrLowerTh = 20;
4282 priv->bCurCCKPkt = false;
4283 priv->UndecoratedSmoothedSS = -1;
4284 priv->bToUpdateTxPwr = false;
4285 priv->CurCCKRSSI = 0;
4286 priv->RxPower = 0;
4287 priv->RSSI = 0;
4288 //YJ,add,080828
4289 priv->NumTxOkTotal = 0;
4290 priv->NumTxUnicast = 0;
4291 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
4292 priv->PowerProfile = POWER_PROFILE_AC;
4293 //YJ,add,080828,end
4294//by amy for rate adaptive
4295 priv->CurrRetryCnt=0;
4296 priv->LastRetryCnt=0;
4297 priv->LastTxokCnt=0;
4298 priv->LastRxokCnt=0;
4299 priv->LastRetryRate=0;
4300 priv->bTryuping=0;
4301 priv->CurrTxRate=0;
4302 priv->CurrRetryRate=0;
4303 priv->TryupingCount=0;
4304 priv->TryupingCountNoData=0;
4305 priv->TryDownCountLowData=0;
4306 priv->LastTxOKBytes=0;
4307 priv->LastFailTxRate=0;
4308 priv->LastFailTxRateSS=0;
4309 priv->FailTxRateCount=0;
4310 priv->LastTxThroughput=0;
4311 priv->NumTxOkBytesTotal=0;
4312 priv->ForcedDataRate = 0;
4313 priv->RegBModeGainStage = 1;
4314
4315//by amy for rate adaptive
4316//by amy 080312}
4317 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4318 spin_lock_init(&priv->irq_lock);
4319 spin_lock_init(&priv->irq_th_lock);
4320 spin_lock_init(&priv->tx_lock);
4321 spin_lock_init(&priv->ps_lock);
4322 spin_lock_init(&priv->rf_ps_lock);
4323 sema_init(&priv->wx_sem,1);
4324 sema_init(&priv->rf_state,1);
4325#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4326 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4327 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4328 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4329 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4330 //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4331 //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4332 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4333 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4334 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4335 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4336
4337 //add for RF power on power off by lizhaoming 080512
4338 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4339#else
4340 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4341 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq,dev);
4342 //INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq,dev);
4343 INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq,dev);
4344 INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq,dev);
4345 //INIT_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq,dev);
4346 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update,priv->ieee80211);
4347 INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);//+by amy 080312
4348 INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);//+by amy 080312
4349 INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);//+by amy 080312
4350
4351 //add for RF power on power off by lizhaoming 080512
4352 INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
4353#endif
4354 //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4355
4356 tasklet_init(&priv->irq_rx_tasklet,
4357 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4358 (unsigned long)priv);
4359//by amy
4360 init_timer(&priv->watch_dog_timer);
4361 priv->watch_dog_timer.data = (unsigned long)dev;
4362 priv->watch_dog_timer.function = watch_dog_adaptive;
4363//by amy
4364
4365//{by amy 080312
4366//by amy for rate adaptive
4367 init_timer(&priv->rateadapter_timer);
4368 priv->rateadapter_timer.data = (unsigned long)dev;
4369 priv->rateadapter_timer.function = timer_rate_adaptive;
4370 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4371 priv->bEnhanceTxPwr=false;
4372//by amy for rate adaptive
4373//by amy 080312}
4374 //priv->ieee80211->func =
4375 // kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4376 //memset(priv->ieee80211->func, 0,
4377 // sizeof(struct ieee80211_helper_functions));
4378
4379 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4380 priv->ieee80211->set_chan = rtl8180_set_chan;
4381 priv->ieee80211->link_change = rtl8180_link_change;
4382 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4383 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4384 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4385
4386 priv->ieee80211->init_wmmparam_flag = 0;
4387
4388 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4389 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4390 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4391
4392#ifdef CONFIG_RTL8185B
4393 priv->MWIEnable = 0;
4394
4395 priv->ShortRetryLimit = 7;
4396 priv->LongRetryLimit = 7;
4397 priv->EarlyRxThreshold = 7;
4398
4399 priv->CSMethod = (0x01 << 29);
4400
4401 priv->TransmitConfig =
4402 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW
4403 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4404 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
4405 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
4406 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4407
4408 priv->ReceiveConfig =
4409#ifdef CONFIG_RTL818X_S
4410#else
4411 priv->CSMethod |
4412#endif
4413// RCR_ENMARP |
4414 RCR_AMF | RCR_ADF | //accept management/data
4415 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4416 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
4417 //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
4418 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4419 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4420 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4421
4422 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4423 IMR_THPDER | IMR_THPDOK |
4424 IMR_TVODER | IMR_TVODOK |
4425 IMR_TVIDER | IMR_TVIDOK |
4426 IMR_TBEDER | IMR_TBEDOK |
4427 IMR_TBKDER | IMR_TBKDOK |
4428 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4429 IMR_RER | IMR_ROK |
4430 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4431
4432 priv->InitialGain = 6;
4433#endif
4434
4435 hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4436
4437 switch (hw_version){
4438#ifdef CONFIG_RTL8185B
4439 case HW_VERID_R8185B_B:
4440#ifdef CONFIG_RTL818X_S
4441 priv->card_8185 = VERSION_8187S_C;
4442 DMESG("MAC controller is a RTL8187SE b/g");
4443 priv->phy_ver = 2;
4444 break;
4445#else
4446 DMESG("MAC controller is a RTL8185B b/g");
4447 priv->card_8185 = 3;
4448 priv->phy_ver = 2;
4449 break;
4450#endif
4451#endif
4452 case HW_VERID_R8185_ABC:
4453 DMESG("MAC controller is a RTL8185 b/g");
4454 priv->card_8185 = 1;
4455 /* you should not find a card with 8225 PHY ver < C*/
4456 priv->phy_ver = 2;
4457 break;
4458
4459 case HW_VERID_R8185_D:
4460 DMESG("MAC controller is a RTL8185 b/g (V. D)");
4461 priv->card_8185 = 2;
4462 /* you should not find a card with 8225 PHY ver < C*/
4463 priv->phy_ver = 2;
4464 break;
4465
4466 case HW_VERID_R8180_ABCD:
4467 DMESG("MAC controller is a RTL8180");
4468 priv->card_8185 = 0;
4469 break;
4470
4471 case HW_VERID_R8180_F:
4472 DMESG("MAC controller is a RTL8180 (v. F)");
4473 priv->card_8185 = 0;
4474 break;
4475
4476 default:
4477 DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4478 priv->card_8185 = 0;
4479 break;
4480 }
4481
4482 if(priv->card_8185){
4483 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4484 priv->ieee80211->short_slot = 1;
4485 }
4486 /* you should not found any 8185 Ver B Card */
4487 priv->card_8185_Bversion = 0;
4488
4489#ifdef CONFIG_RTL8185B
4490#ifdef CONFIG_RTL818X_S
4491 // just for sync 85
4492 priv->card_type = PCI;
4493 DMESG("This is a PCI NIC");
4494#else
4495 config3 = read_nic_byte(dev, CONFIG3);
4496 if(config3 & 0x8){
4497 priv->card_type = CARDBUS;
4498 DMESG("This is a CARDBUS NIC");
4499 }
4500 else if( config3 & 0x4){
4501 priv->card_type = MINIPCI;
4502 DMESG("This is a MINI-PCI NIC");
4503 }else{
4504 priv->card_type = PCI;
4505 DMESG("This is a PCI NIC");
4506 }
4507#endif
4508#endif
4509 priv->enable_gpio0 = 0;
4510
4511//by amy for antenna
4512#ifdef CONFIG_RTL8185B
4513 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4514 DMESG("usValue is 0x%x\n",usValue);
4515#ifdef CONFIG_RTL818X_S
4516 //3Read AntennaDiversity
4517 // SW Antenna Diversity.
4518 if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4519 {
4520 priv->EEPROMSwAntennaDiversity = false;
4521 //printk("EEPROM Disable SW Antenna Diversity\n");
4522 }
4523 else
4524 {
4525 priv->EEPROMSwAntennaDiversity = true;
4526 //printk("EEPROM Enable SW Antenna Diversity\n");
4527 }
4528 // Default Antenna to use.
4529 if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4530 {
4531 priv->EEPROMDefaultAntenna1 = false;
4532 //printk("EEPROM Default Antenna 0\n");
4533 }
4534 else
4535 {
4536 priv->EEPROMDefaultAntenna1 = true;
4537 //printk("EEPROM Default Antenna 1\n");
4538 }
4539
4540 //
4541 // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4542 //
4543 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4544 {// 0: default from EEPROM.
4545 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4546 }
4547 else
4548 {// 1:disable antenna diversity, 2: enable antenna diversity.
4549 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4550 }
4551 //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4552
4553
4554 //
4555 // Default antenna settings. Added by Roger, 2007.11.05.
4556 //
4557 if( priv->RegDefaultAntenna == 0)
4558 {// 0: default from EEPROM.
4559 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4560 }
4561 else
4562 {// 1: main, 2: aux.
4563 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4564 }
4565 //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4566#endif
4567#endif
4568//by amy for antenna
4569 /* rtl8185 can calc plcp len in HW.*/
4570 priv->hw_plcp_len = 1;
4571
4572 priv->plcp_preamble_mode = 2;
4573 /*the eeprom type is stored in RCR register bit #6 */
4574 if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4575 priv->epromtype=EPROM_93c56;
4576 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4577 }else{
4578 priv->epromtype=EPROM_93c46;
4579 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4580 }
4581
4582 dev->get_stats = rtl8180_stats;
4583
4584 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4585 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4586 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4587 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4588 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4589 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4590 //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4591
4592
4593 for(i=1,j=0; i<14; i+=2,j++){
4594
4595 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4596 priv->chtxpwr[i]=word & 0xff;
4597 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4598#ifdef DEBUG_EPROM
4599 DMESG("tx word %x:%x",j,word);
4600 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4601 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4602#endif
4603 }
4604 if(priv->card_8185){
4605 for(i=1,j=0; i<14; i+=2,j++){
4606
4607 word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4608 priv->chtxpwr_ofdm[i]=word & 0xff;
4609 priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4610#ifdef DEBUG_EPROM
4611 DMESG("ofdm tx word %x:%x",j,word);
4612 DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4613 DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4614#endif
4615 }
4616 }
4617//{by amy 080312
4618 //3Read crystal calibtration and thermal meter indication on 87SE.
4619
4620 // By SD3 SY's request. Added by Roger, 2007.12.11.
4621
4622 tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4623
4624 //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4625
4626 // Crystal calibration for Xin and Xout resp.
4627 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4628 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4629 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4630 priv->bXtalCalibration = true;
4631
4632 // Thermal meter reference indication.
4633 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4634 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4635 priv->bTxPowerTrack = true;
4636
4637//by amy 080312}
4638#ifdef CONFIG_RTL8185B
4639 word = eprom_read(dev,EPROM_TXPW_BASE);
4640 priv->cck_txpwr_base = word & 0xf;
4641 priv->ofdm_txpwr_base = (word>>4) & 0xf;
4642#endif
4643
4644 version = eprom_read(dev,EPROM_VERSION);
4645 DMESG("EEPROM version %x",version);
4646 if( (!priv->card_8185) && version < 0x0101){
4647 DMESG ("EEPROM version too old, assuming defaults");
4648 DMESG ("If you see this message *plase* send your \
4649DMESG output to andreamrl@tiscali.it THANKS");
4650 priv->digphy=1;
4651 priv->antb=0;
4652 priv->diversity=1;
4653 priv->cs_treshold=0xc;
4654 priv->rcr_csense=1;
4655 priv->rf_chip=RFCHIPID_PHILIPS;
4656 }else{
4657 if(!priv->card_8185){
4658 u8 rfparam = eprom_read(dev,RF_PARAM);
4659 DMESG("RfParam: %x",rfparam);
4660
4661 priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4662 priv->antb = rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4663
4664 priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4665 RF_PARAM_CARRIERSENSE_SHIFT;
4666
4667 priv->diversity =
4668 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4669 }else{
4670 priv->rcr_csense = 3;
4671 }
4672
4673 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4674
4675 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4676 }
4677
4678#ifdef CONFIG_RTL8185B
4679#ifdef CONFIG_RTL818X_S
4680 priv->rf_chip = RF_ZEBRA4;
4681 priv->rf_sleep = rtl8225z4_rf_sleep;
4682 priv->rf_wakeup = rtl8225z4_rf_wakeup;
4683#else
4684 priv->rf_chip = RF_ZEBRA2;
4685#endif
4686 //DMESG("Card reports RF frontend Realtek 8225z2");
4687 //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4688 //DMESGW("use it with care and at your own risk and");
4689 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4690
4691 priv->rf_close = rtl8225z2_rf_close;
4692 priv->rf_init = rtl8225z2_rf_init;
4693 priv->rf_set_chan = rtl8225z2_rf_set_chan;
4694 priv->rf_set_sens = NULL;
4695 //priv->rf_sleep = rtl8225_rf_sleep;
4696 //priv->rf_wakeup = rtl8225_rf_wakeup;
4697
4698#else
4699 /* check RF frontend chipset */
4700 switch (priv->rf_chip) {
4701
4702 case RFCHIPID_RTL8225:
4703
4704 if(priv->card_8185){
4705 DMESG("Card reports RF frontend Realtek 8225");
4706 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4707 DMESGW("use it with care and at your own risk and");
4708 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4709
4710 priv->rf_close = rtl8225_rf_close;
4711 priv->rf_init = rtl8225_rf_init;
4712 priv->rf_set_chan = rtl8225_rf_set_chan;
4713 priv->rf_set_sens = NULL;
4714 priv->rf_sleep = rtl8225_rf_sleep;
4715 priv->rf_wakeup = rtl8225_rf_wakeup;
4716
4717 }else{
4718 DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
4719 DMESGW("This could not be... something went wrong....");
4720 return -ENODEV;
4721 }
4722 break;
4723
4724 case RFCHIPID_RTL8255:
4725 if(priv->card_8185){
4726 DMESG("Card reports RF frontend Realtek 8255");
4727 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4728 DMESGW("use it with care and at your own risk and");
4729 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4730
4731 priv->rf_close = rtl8255_rf_close;
4732 priv->rf_init = rtl8255_rf_init;
4733 priv->rf_set_chan = rtl8255_rf_set_chan;
4734 priv->rf_set_sens = NULL;
4735 priv->rf_sleep = NULL;
4736 priv->rf_wakeup = NULL;
4737
4738 }else{
4739 DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
4740 DMESGW("This could not be... something went wrong....");
4741 return -ENODEV;
4742 }
4743 break;
4744
4745
4746 case RFCHIPID_INTERSIL:
4747 DMESGW("Card reports RF frontend by Intersil.");
4748 DMESGW("This driver has NO support for this chipset.");
4749 return -ENODEV;
4750 break;
4751
4752 case RFCHIPID_RFMD:
4753 DMESGW("Card reports RF frontend by RFMD.");
4754 DMESGW("This driver has NO support for this chipset.");
4755 return -ENODEV;
4756 break;
4757
4758 case RFCHIPID_GCT:
4759 DMESGW("Card reports RF frontend by GCT.");
4760 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4761 DMESGW("use it with care and at your own risk and");
4762 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4763 priv->rf_close = gct_rf_close;
4764 priv->rf_init = gct_rf_init;
4765 priv->rf_set_chan = gct_rf_set_chan;
4766 priv->rf_set_sens = NULL;
4767 priv->rf_sleep = NULL;
4768 priv->rf_wakeup = NULL;
4769 break;
4770
4771 case RFCHIPID_MAXIM:
4772 DMESGW("Card reports RF frontend by MAXIM.");
4773 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4774 DMESGW("use it with care and at your own risk and");
4775 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4776 priv->rf_close = maxim_rf_close;
4777 priv->rf_init = maxim_rf_init;
4778 priv->rf_set_chan = maxim_rf_set_chan;
4779 priv->rf_set_sens = NULL;
4780 priv->rf_sleep = NULL;
4781 priv->rf_wakeup = NULL;
4782 break;
4783
4784 case RFCHIPID_PHILIPS:
4785 DMESG("Card reports RF frontend by Philips.");
4786 DMESG("OK! Philips SA2400 radio chipset is supported.");
4787 priv->rf_close = sa2400_rf_close;
4788 priv->rf_init = sa2400_rf_init;
4789 priv->rf_set_chan = sa2400_rf_set_chan;
4790 priv->rf_set_sens = sa2400_rf_set_sens;
4791 priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
4792 priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
4793 priv->rf_sleep = NULL;
4794 priv->rf_wakeup = NULL;
4795
4796 if(priv->digphy){
4797 DMESGW("Digital PHY found");
4798 DMESGW("Philips DIGITAL PHY is untested! *Please*\
4799 report success/failure to <andreamrl@tiscali.it>");
4800 }else{
4801 DMESG ("Analog PHY found");
4802 }
4803
4804 break;
4805
4806 default:
4807 DMESGW("Unknown RF module %x",priv->rf_chip);
4808 DMESGW("Exiting...");
4809 return -1;
4810
4811 }
4812#endif
4813
4814
4815 if(!priv->card_8185){
4816 if(priv->antb)
4817 DMESG ("Antenna B is default antenna");
4818 else
4819 DMESG ("Antenna A is default antenna");
4820
4821 if(priv->diversity)
4822 DMESG ("Antenna diversity is enabled");
4823 else
4824 DMESG("Antenna diversity is disabled");
4825
4826 DMESG("Carrier sense %d",priv->rcr_csense);
4827 }
4828
4829 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4830 return -ENOMEM;
4831
4832 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4833 TX_MANAGEPRIORITY_RING_ADDR))
4834 return -ENOMEM;
4835
4836 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4837 TX_BKPRIORITY_RING_ADDR))
4838 return -ENOMEM;
4839
4840 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4841 TX_BEPRIORITY_RING_ADDR))
4842 return -ENOMEM;
4843
4844 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4845 TX_VIPRIORITY_RING_ADDR))
4846 return -ENOMEM;
4847
4848 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4849 TX_VOPRIORITY_RING_ADDR))
4850 return -ENOMEM;
4851
4852 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4853 TX_HIGHPRIORITY_RING_ADDR))
4854 return -ENOMEM;
4855
4856 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4857 TX_BEACON_RING_ADDR))
4858 return -ENOMEM;
4859
4860
4861 //priv->beacon_buf=NULL;
4862
4863 if(!priv->card_8185){
4864
4865 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4866 DMESG ("40-bit WEP is supported in hardware");
4867 else
4868 DMESG ("40-bit WEP is NOT supported in hardware");
4869
4870 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4871 DMESG ("104-bit WEP is supported in hardware");
4872 else
4873 DMESG ("104-bit WEP is NOT supported in hardware");
4874 }
4875#if !defined(SA_SHIRQ)
4876 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4877#else
4878 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4879#endif
4880 DMESGE("Error allocating IRQ %d",dev->irq);
4881 return -1;
4882 }else{
4883 priv->irq=dev->irq;
4884 DMESG("IRQ %d",dev->irq);
4885 }
4886
4887#ifdef DEBUG_EPROM
4888 dump_eprom(dev);
4889#endif
4890
4891 return 0;
4892
4893}
4894
4895
4896void rtl8180_no_hw_wep(struct net_device *dev)
4897{
4898 struct r8180_priv *priv = ieee80211_priv(dev);
4899
4900 if(!priv->card_8185)
4901 {
4902 u8 security;
4903
4904 security = read_nic_byte(dev, SECURITY);
4905 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4906 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4907
4908 write_nic_byte(dev, SECURITY, security);
4909
4910 }else{
4911
4912 //FIXME!!!
4913 }
4914 /*
4915 write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4916 (1<<TX_NOICV_SHIFT) );
4917 */
4918// priv->ieee80211->hw_wep=0;
4919}
4920
4921
4922void rtl8180_set_hw_wep(struct net_device *dev)
4923{
4924 struct r8180_priv *priv = ieee80211_priv(dev);
4925 u8 pgreg;
4926 u8 security;
4927 u32 key0_word4;
4928
4929 pgreg=read_nic_byte(dev, PGSELECT);
4930 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4931
4932 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4933 key0_word4 &= ~ 0xff;
4934 key0_word4 |= priv->key0[3]& 0xff;
4935 write_nic_dword(dev,KEY0,(priv->key0[0]));
4936 write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4937 write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4938 write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4939
4940 /*
4941 TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4942 */
4943
4944 security = read_nic_byte(dev,SECURITY);
4945 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4946 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4947 security &= ~ SECURITY_ENCRYP_MASK;
4948 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4949
4950 write_nic_byte(dev, SECURITY, security);
4951
4952 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4953 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4954 read_nic_dword(dev,KEY0));
4955
4956 //priv->ieee80211->hw_wep=1;
4957}
4958
4959
4960void rtl8185_rf_pins_enable(struct net_device *dev)
4961{
4962// u16 tmp;
4963// tmp = read_nic_word(dev, RFPinsEnable);
4964 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4965// write_nic_word(dev, RFPinsEnable,7 | tmp);
4966}
4967
4968
4969void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4970{
4971 u8 conf3;
4972
4973 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4974
4975 conf3 = read_nic_byte(dev, CONFIG3);
4976 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4977 write_nic_dword(dev, ANAPARAM2, a);
4978
4979 conf3 = read_nic_byte(dev, CONFIG3);
4980 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4981 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4982
4983}
4984
4985
4986void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4987{
4988 u8 conf3;
4989
4990 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4991
4992 conf3 = read_nic_byte(dev, CONFIG3);
4993 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4994 write_nic_dword(dev, ANAPARAM, a);
4995
4996 conf3 = read_nic_byte(dev, CONFIG3);
4997 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4998 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4999}
5000
5001
5002void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
5003{
5004 write_nic_byte(dev, TX_ANTENNA, ant);
5005 force_pci_posting(dev);
5006 mdelay(1);
5007}
5008
5009
5010void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
5011{
5012 //u8 phyr;
5013 u32 phyw;
5014 //int i;
5015
5016 adr |= 0x80;
5017
5018 phyw= ((data<<8) | adr);
5019#if 0
5020
5021 write_nic_dword(dev, PHY_ADR, phyw);
5022
5023 //read_nic_dword(dev, PHY_ADR);
5024 for(i=0;i<10;i++){
5025 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
5026 phyr = read_nic_byte(dev, PHY_READ);
5027 if(phyr == (data&0xff)) break;
5028
5029 }
5030#else
5031 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
5032 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
5033 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
5034 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
5035 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
5036#endif
5037 /* this is ok to fail when we write AGC table. check for AGC table might be
5038 * done by masking with 0x7f instead of 0xff
5039 */
5040 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
5041}
5042
5043
5044inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
5045{
5046 data = data & 0xff;
5047 rtl8185_write_phy(dev, adr, data);
5048}
5049
5050
5051void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
5052{
5053 data = data & 0xff;
5054 rtl8185_write_phy(dev, adr, data | 0x10000);
5055}
5056
5057
5058/* 70*3 = 210 ms
5059 * I hope this is enougth
5060 */
5061#define MAX_PHY 70
5062void write_phy(struct net_device *dev, u8 adr, u8 data)
5063{
5064 u32 phy;
5065 int i;
5066
5067 phy = 0xff0000;
5068 phy |= adr;
5069 phy |= 0x80; /* this should enable writing */
5070 phy |= (data<<8);
5071
5072 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword
5073 write_nic_dword(dev,PHY_ADR, phy);
5074
5075 phy= 0xffff00;
5076 phy |= adr;
5077
5078 write_nic_dword(dev,PHY_ADR, phy);
5079 for(i=0;i<MAX_PHY;i++){
5080 phy=read_nic_dword(dev,PHY_ADR);
5081 phy= phy & 0xff0000;
5082 phy= phy >> 16;
5083 if(phy == data){ //SUCCESS!
5084 force_pci_posting(dev);
5085 mdelay(3); //random value
5086#ifdef DEBUG_BB
5087 DMESG("Phy wr %x,%x",adr,data);
5088#endif
5089 return;
5090 }else{
5091 force_pci_posting(dev);
5092 mdelay(3); //random value
5093 }
5094 }
5095 DMESGW ("Phy writing %x %x failed!", adr,data);
5096}
5097
5098void rtl8185_set_rate(struct net_device *dev)
5099{
5100 int i;
5101 u16 word;
5102 int basic_rate,min_rr_rate,max_rr_rate;
5103
5104// struct r8180_priv *priv = ieee80211_priv(dev);
5105
5106 //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
5107// priv->ieee80211->state == IEEE80211_LINKED){
5108 basic_rate = ieeerate2rtlrate(240);
5109 min_rr_rate = ieeerate2rtlrate(60);
5110 max_rr_rate = ieeerate2rtlrate(240);
5111
5112//
5113// }else{
5114// basic_rate = ieeerate2rtlrate(20);
5115// min_rr_rate = ieeerate2rtlrate(10);
5116// max_rr_rate = ieeerate2rtlrate(110);
5117// }
5118
5119 write_nic_byte(dev, RESP_RATE,
5120 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
5121
5122 word = read_nic_word(dev, BRSR);
5123 word &= ~BRSR_MBR_8185;
5124
5125
5126 for(i=0;i<=basic_rate;i++)
5127 word |= (1<<i);
5128
5129 write_nic_word(dev, BRSR, word);
5130 //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
5131}
5132
5133
5134
5135void rtl8180_adapter_start(struct net_device *dev)
5136{
5137 struct r8180_priv *priv = ieee80211_priv(dev);
5138 u32 anaparam;
5139 u16 word;
5140 u8 config3;
5141// int i;
5142
5143 rtl8180_rtx_disable(dev);
5144 rtl8180_reset(dev);
5145
5146 /* seems that 0xffff or 0xafff will cause
5147 * HW interrupt line crash
5148 */
5149
5150 //priv->irq_mask = 0xafff;
5151// priv->irq_mask = 0x4fcf;
5152
5153 /* enable beacon timeout, beacon TX ok and err
5154 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
5155 * RX ok and ERR, and GP timer */
5156 priv->irq_mask = 0x6fcf;
5157
5158 priv->dma_poll_mask = 0;
5159
5160 rtl8180_beacon_tx_disable(dev);
5161
5162 if(priv->card_type == CARDBUS ){
5163 config3=read_nic_byte(dev, CONFIG3);
5164 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
5165 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
5166 read_nic_word(dev, FEMR));
5167 }
5168 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5169 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
5170 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
5171 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5172
5173 rtl8180_update_msr(dev);
5174
5175 if(!priv->card_8185){
5176 anaparam = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
5177 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
5178
5179 rtl8180_set_anaparam(dev,anaparam);
5180 }
5181 /* These might be unnecessary since we do in rx_enable / tx_enable */
5182 fix_rx_fifo(dev);
5183 fix_tx_fifo(dev);
5184 /*set_nic_rxring(dev);
5185 set_nic_txring(dev);*/
5186
5187 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5188
5189 /*
5190 The following is very strange. seems to be that 1 means test mode,
5191 but we need to acknolwledges the nic when a packet is ready
5192 altought we set it to 0
5193 */
5194
5195 write_nic_byte(dev,
5196 CONFIG2, read_nic_byte(dev,CONFIG2) &~\
5197 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
5198 //^the nic isn't in test mode
5199 if(priv->card_8185)
5200 write_nic_byte(dev,
5201 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
5202
5203 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5204
5205 write_nic_dword(dev,INT_TIMEOUT,0);
5206#ifdef DEBUG_REGISTERS
5207 rtl8180_dump_reg(dev);
5208#endif
5209
5210 if(!priv->card_8185)
5211 {
5212 /*
5213 experimental - this might be needed to calibrate AGC,
5214 anyway it shouldn't hurt
5215 */
5216 write_nic_byte(dev, CONFIG5,
5217 read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
5218 read_nic_byte(dev, CONFIG5);
5219 udelay(15);
5220 write_nic_byte(dev, CONFIG5,
5221 read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
5222 }else{
5223
5224 write_nic_byte(dev, WPA_CONFIG, 0);
5225 //write_nic_byte(dev, TESTR, 0xd);
5226 }
5227
5228 rtl8180_no_hw_wep(dev);
5229
5230 if(priv->card_8185){
5231 rtl8185_set_rate(dev);
5232 write_nic_byte(dev, RATE_FALLBACK, 0x81);
5233 // write_nic_byte(dev, 0xdf, 0x15);
5234 }else{
5235 word = read_nic_word(dev, BRSR);
5236 word &= ~BRSR_MBR;
5237 word &= ~BRSR_BPLCP;
5238 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
5239//by amy
5240 word |= 0x0f;
5241//by amy
5242 write_nic_word(dev, BRSR, word);
5243 }
5244
5245
5246 if(priv->card_8185){
5247 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
5248
5249 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
5250 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5251 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
5252|(1<<CONFIG3_CLKRUN_SHIFT));
5253 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5254
5255 }
5256
5257 priv->rf_init(dev);
5258
5259 if(priv->rf_set_sens != NULL)
5260 priv->rf_set_sens(dev,priv->sens);
5261 rtl8180_irq_enable(dev);
5262
5263 netif_start_queue(dev);
5264 /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
5265
5266 DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
5267
5268 DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
5269 if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
5270 if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
5271 if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
5272}
5273
5274
5275
5276/* this configures registers for beacon tx and enables it via
5277 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
5278 * be used to stop beacon transmission
5279 */
5280void rtl8180_start_tx_beacon(struct net_device *dev)
5281{
5282// struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5283 u16 word;
5284// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5285
5286 DMESG("Enabling beacon TX");
5287 //write_nic_byte(dev, 0x42,0xe6);// TCR
5288// set_nic_txring(dev);
5289// fix_tx_fifo(dev);
5290 rtl8180_prepare_beacon(dev);
5291 rtl8180_irq_disable(dev);
5292 rtl8180_beacon_tx_enable(dev);
5293#if 0
5294 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5295 //write_nic_byte(dev,0x9d,0x20); //DMA Poll
5296 //write_nic_word(dev,0x7a,0);
5297 //write_nic_word(dev,0x7a,0x8000);
5298
5299#if 0
5300 word = read_nic_word(dev, BcnItv);
5301 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
5302 word |= priv->ieee80211->current_network.beacon_interval;//0x64;
5303 write_nic_word(dev, BcnItv, word);
5304#endif
5305#endif
5306 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
5307 write_nic_word(dev, AtimWnd,word);// word |=
5308//priv->ieee80211->current_network.atim_window);
5309
5310 word = read_nic_word(dev, BintrItv);
5311 word &= ~BintrItv_BintrItv;
5312 word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
5313 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
5314 // FIXME: check if correct ^^ worked with 0x3e8;
5315 */
5316 write_nic_word(dev, BintrItv, word);
5317
5318
5319 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5320
5321// rtl8180_beacon_tx_enable(dev);
5322#ifdef CONFIG_RTL8185B
5323 rtl8185b_irq_enable(dev);
5324#else
5325 rtl8180_irq_enable(dev);
5326#endif
5327 /* VV !!!!!!!!!! VV*/
5328 /*
5329 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5330 write_nic_byte(dev,0x9d,0x00);
5331 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5332*/
5333// DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5334
5335}
5336
5337
5338
5339/***************************************************************************
5340 -------------------------------NET STUFF---------------------------
5341***************************************************************************/
5342static struct net_device_stats *rtl8180_stats(struct net_device *dev)
5343{
5344 struct r8180_priv *priv = ieee80211_priv(dev);
5345
5346 return &priv->ieee80211->stats;
5347}
5348//
5349// Change current and default preamble mode.
5350// 2005.01.06, by rcnjko.
5351//
5352bool
5353MgntActSet_802_11_PowerSaveMode(
5354 struct r8180_priv *priv,
5355 RT_PS_MODE rtPsMode
5356)
5357{
5358
5359 // Currently, we do not change power save mode on IBSS mode.
5360 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5361 {
5362 return false;
5363 }
5364
5365 //
5366 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
5367 // some AP will not response to our mgnt frames with PwrMgt bit set,
5368 // e.g. cannot associate the AP.
5369 // So I commented out it. 2005.02.16, by rcnjko.
5370 //
5371// // Change device's power save mode.
5372// Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
5373
5374 // Update power save mode configured.
5375// priv->dot11PowerSaveMode = rtPsMode;
5376 priv->ieee80211->ps = rtPsMode;
5377 // Determine ListenInterval.
5378#if 0
5379 if(priv->dot11PowerSaveMode == eMaxPs)
5380 {
5381 priv->ieee80211->ListenInterval = 10;
5382 }
5383 else
5384 {
5385 priv->ieee80211->ListenInterval = 2;
5386 }
5387#endif
5388 return true;
5389}
5390
5391//================================================================================
5392// Leisure Power Save in linked state.
5393//================================================================================
5394
5395//
5396// Description:
5397// Enter the leisure power save mode.
5398//
5399void
5400LeisurePSEnter(
5401 struct r8180_priv *priv
5402 )
5403{
5404 if (priv->bLeisurePs)
5405 {
5406 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
5407 {
5408 //printk("----Enter PS\n");
5409 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
5410 }
5411 }
5412}
5413
5414
5415//
5416// Description:
5417// Leave the leisure power save mode.
5418//
5419void
5420LeisurePSLeave(
5421 struct r8180_priv *priv
5422 )
5423{
5424 if (priv->bLeisurePs)
5425 {
5426 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
5427 {
5428 //printk("----Leave PS\n");
5429 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
5430 }
5431 }
5432}
5433#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5434void rtl8180_hw_wakeup_wq (struct work_struct *work)
5435{
5436// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5437// struct ieee80211_device * ieee = (struct ieee80211_device*)
5438// container_of(work, struct ieee80211_device, watch_dog_wq);
5439 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5440 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
5441 struct net_device *dev = ieee->dev;
5442#else
5443void rtl8180_hw_wakeup_wq(struct net_device *dev)
5444{
5445 struct r8180_priv *priv = ieee80211_priv(dev);
5446#endif
5447
5448// printk("dev is %d\n",dev);
5449// printk("&*&(^*(&(&=========>%s()\n", __FUNCTION__);
5450 rtl8180_hw_wakeup(dev);
5451
5452}
5453
5454#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5455void rtl8180_hw_sleep_wq (struct work_struct *work)
5456{
5457// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5458// struct ieee80211_device * ieee = (struct ieee80211_device*)
5459// container_of(work, struct ieee80211_device, watch_dog_wq);
5460 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5461 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
5462 struct net_device *dev = ieee->dev;
5463#else
5464void rtl8180_hw_sleep_wq(struct net_device *dev)
5465{
5466 struct r8180_priv *priv = ieee80211_priv(dev);
5467#endif
5468
5469 rtl8180_hw_sleep_down(dev);
5470}
5471
5472//YJ,add,080828,for KeepAlive
5473static void MgntLinkKeepAlive(struct r8180_priv *priv )
5474{
5475 if (priv->keepAliveLevel == 0)
5476 return;
5477
5478 if(priv->ieee80211->state == IEEE80211_LINKED)
5479 {
5480 //
5481 // Keep-Alive.
5482 //
5483 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
5484
5485 if ( (priv->keepAliveLevel== 2) ||
5486 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
5487 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
5488 )
5489 {
5490 priv->link_detect.IdleCount++;
5491
5492 //
5493 // Send a Keep-Alive packet packet to AP if we had been idle for a while.
5494 //
5495 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
5496 {
5497 priv->link_detect.IdleCount = 0;
5498 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5499 }
5500 }
5501 else
5502 {
5503 priv->link_detect.IdleCount = 0;
5504 }
5505 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5506 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5507 }
5508}
5509//YJ,add,080828,for KeepAlive,end
5510
5511static u8 read_acadapter_file(char *filename);
5512void rtl8180_watch_dog(struct net_device *dev)
5513{
5514 struct r8180_priv *priv = ieee80211_priv(dev);
5515 bool bEnterPS = false;
5516 bool bBusyTraffic = false;
5517 u32 TotalRxNum = 0;
5518 u16 SlotIndex = 0;
5519 u16 i = 0;
5520#ifdef ENABLE_IPS
5521 if(priv->ieee80211->actscanning == false){
5522 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5523 IPSEnter(dev);
5524 }
5525 }
5526#endif
5527 //YJ,add,080828,for link state check
5528 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5529 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5530 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5531 for( i=0; i<priv->link_detect.SlotNum; i++ )
5532 TotalRxNum+= priv->link_detect.RxFrameNum[i];
5533 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5534 if(TotalRxNum == 0){
5535 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5536 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5537 }
5538 }
5539
5540 //YJ,add,080828,for KeepAlive
5541 MgntLinkKeepAlive(priv);
5542
5543 //YJ,add,080828,for LPS
5544#ifdef ENABLE_LPS
5545 if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5546 {
5547 //Turn on LeisurePS on battery power
5548 //printk("!!!!!On battery power\n");
5549 priv->bLeisurePs = true;
5550 }
5551 else if(priv->PowerProfile == POWER_PROFILE_AC )
5552 {
5553 // Turn off LeisurePS on AC power
5554 //printk("----On AC power\n");
5555 LeisurePSLeave(priv);
5556 priv->bLeisurePs= false;
5557 }
5558#endif
5559
5560#if 0
5561#ifndef ENABLE_LPS
5562 if(priv->ieee80211->state == IEEE80211_LINKED){
5563 if( priv->NumRxOkInPeriod> 666 ||
5564 priv->NumTxOkInPeriod > 666 ) {
5565 bBusyTraffic = true;
5566 }
5567 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5568 bEnterPS= true;
5569 }
5570 if(bEnterPS) {
5571 LeisurePSEnter(priv);
5572 }
5573 else {
5574 LeisurePSLeave(priv);
5575 }
5576 }
5577 else {
5578 LeisurePSLeave(priv);
5579 }
5580#endif
5581 priv->NumRxOkInPeriod = 0;
5582 priv->NumTxOkInPeriod = 0;
5583 priv->ieee80211->NumRxData = 0;
5584#else
5585#ifdef ENABLE_LPS
5586 if(priv->ieee80211->state == IEEE80211_LINKED){
5587 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5588 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5589 if( priv->link_detect.NumRxOkInPeriod> 666 ||
5590 priv->link_detect.NumTxOkInPeriod> 666 ) {
5591 bBusyTraffic = true;
5592 }
5593 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5594 || (priv->link_detect.NumRxOkInPeriod > 2)) {
5595 bEnterPS= false;
5596 }
5597 else {
5598 bEnterPS= true;
5599 }
5600
5601 if(bEnterPS) {
5602 LeisurePSEnter(priv);
5603 }
5604 else {
5605 LeisurePSLeave(priv);
5606 }
5607 }
5608 else{
5609 LeisurePSLeave(priv);
5610 }
5611#endif
5612 priv->link_detect.bBusyTraffic = bBusyTraffic;
5613 priv->link_detect.NumRxOkInPeriod = 0;
5614 priv->link_detect.NumTxOkInPeriod = 0;
5615 priv->ieee80211->NumRxDataInPeriod = 0;
5616 priv->ieee80211->NumRxBcnInPeriod = 0;
5617#endif
5618}
5619int _rtl8180_up(struct net_device *dev)
5620{
5621 struct r8180_priv *priv = ieee80211_priv(dev);
5622 //int i;
5623
5624 priv->up=1;
5625
5626 DMESG("Bringing up iface");
5627#ifdef CONFIG_RTL8185B
5628 rtl8185b_adapter_start(dev);
5629 rtl8185b_rx_enable(dev);
5630 rtl8185b_tx_enable(dev);
5631#else
5632 rtl8180_adapter_start(dev);
5633 rtl8180_rx_enable(dev);
5634 rtl8180_tx_enable(dev);
5635#endif
5636#ifdef ENABLE_IPS
5637 if(priv->bInactivePs){
5638 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5639 IPSLeave(dev);
5640 }
5641#endif
5642//by amy 080312
5643#ifdef RATE_ADAPT
5644 timer_rate_adaptive((unsigned long)dev);
5645#endif
5646//by amy 080312
5647 watch_dog_adaptive((unsigned long)dev);
5648#ifdef SW_ANTE
5649 if(priv->bSwAntennaDiverity)
5650 SwAntennaDiversityTimerCallback(dev);
5651#endif
5652// IPSEnter(dev);
5653 ieee80211_softmac_start_protocol(priv->ieee80211);
5654
5655//Add for RF power on power off by lizhaoming 080512
5656// priv->eRFPowerState = eRfOn;
5657// printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5658// queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5659
5660 return 0;
5661}
5662
5663
5664int rtl8180_open(struct net_device *dev)
5665{
5666 struct r8180_priv *priv = ieee80211_priv(dev);
5667 int ret;
5668
5669 down(&priv->wx_sem);
5670 ret = rtl8180_up(dev);
5671 up(&priv->wx_sem);
5672 return ret;
5673
5674}
5675
5676
5677int rtl8180_up(struct net_device *dev)
5678{
5679 struct r8180_priv *priv = ieee80211_priv(dev);
5680
5681 if (priv->up == 1) return -1;
5682
5683 return _rtl8180_up(dev);
5684}
5685
5686
5687int rtl8180_close(struct net_device *dev)
5688{
5689 struct r8180_priv *priv = ieee80211_priv(dev);
5690 int ret;
5691
5692 down(&priv->wx_sem);
5693 ret = rtl8180_down(dev);
5694 up(&priv->wx_sem);
5695
5696 return ret;
5697
5698}
5699
5700int rtl8180_down(struct net_device *dev)
5701{
5702 struct r8180_priv *priv = ieee80211_priv(dev);
5703
5704 if (priv->up == 0) return -1;
5705
5706 priv->up=0;
5707
5708 ieee80211_softmac_stop_protocol(priv->ieee80211);
5709 /* FIXME */
5710 if (!netif_queue_stopped(dev))
5711 netif_stop_queue(dev);
5712 rtl8180_rtx_disable(dev);
5713 rtl8180_irq_disable(dev);
5714 del_timer_sync(&priv->watch_dog_timer);
5715 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5716//{by amy 080312
5717 del_timer_sync(&priv->rateadapter_timer);
5718 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5719//by amy 080312}
5720 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5721 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5722 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5723 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5724 del_timer_sync(&priv->SwAntennaDiversityTimer);
5725 SetZebraRFPowerState8185(dev,eRfOff);
5726 //ieee80211_softmac_stop_protocol(priv->ieee80211);
5727 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5728 priv->ieee80211->state = IEEE80211_NOLINK;
5729 return 0;
5730}
5731
5732#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5733void rtl8180_restart_wq(struct work_struct *work)
5734{
5735 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5736 struct net_device *dev = priv->dev;
5737#else
5738void rtl8180_restart_wq(struct net_device *dev)
5739{
5740 struct r8180_priv *priv = ieee80211_priv(dev);
5741#endif
5742 down(&priv->wx_sem);
5743
5744 rtl8180_commit(dev);
5745
5746 up(&priv->wx_sem);
5747}
5748
5749void rtl8180_restart(struct net_device *dev)
5750{
5751 struct r8180_priv *priv = ieee80211_priv(dev);
5752 //rtl8180_commit(dev);
5753 schedule_work(&priv->reset_wq);
5754 //DMESG("TXTIMEOUT");
5755}
5756
5757
5758void rtl8180_commit(struct net_device *dev)
5759{
5760 struct r8180_priv *priv = ieee80211_priv(dev);
5761
5762 if (priv->up == 0) return ;
5763//+by amy 080312
5764 del_timer_sync(&priv->watch_dog_timer);
5765 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5766//{by amy 080312
5767//by amy for rate adaptive
5768 del_timer_sync(&priv->rateadapter_timer);
5769 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5770//by amy for rate adaptive
5771//by amy 080312}
5772 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5773 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5774 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5775 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5776 del_timer_sync(&priv->SwAntennaDiversityTimer);
5777 ieee80211_softmac_stop_protocol(priv->ieee80211);
5778 rtl8180_irq_disable(dev);
5779 rtl8180_rtx_disable(dev);
5780 _rtl8180_up(dev);
5781}
5782
5783
5784static void r8180_set_multicast(struct net_device *dev)
5785{
5786 struct r8180_priv *priv = ieee80211_priv(dev);
5787 short promisc;
5788
5789 //down(&priv->wx_sem);
5790
5791 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5792
5793 if (promisc != priv->promisc)
5794 rtl8180_restart(dev);
5795
5796 priv->promisc = promisc;
5797
5798 //up(&priv->wx_sem);
5799}
5800
5801#if 0
5802/* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5803int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5804{
5805 struct r8180_priv *priv = ieee80211_priv(dev);
5806 int ret;
5807 unsigned long flags;
5808
5809 spin_lock_irqsave(&priv->tx_lock,flags);
5810 ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5811 spin_unlock_irqrestore(&priv->tx_lock,flags);
5812 return ret;
5813}
5814#endif
5815
5816int r8180_set_mac_adr(struct net_device *dev, void *mac)
5817{
5818 struct r8180_priv *priv = ieee80211_priv(dev);
5819 struct sockaddr *addr = mac;
5820
5821 down(&priv->wx_sem);
5822
5823 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5824
5825 if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5826 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5827
5828 if (priv->up) {
5829 rtl8180_down(dev);
5830 rtl8180_up(dev);
5831 }
5832
5833 up(&priv->wx_sem);
5834
5835 return 0;
5836}
5837
5838/* based on ipw2200 driver */
5839int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5840{
5841 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5842
5843 struct iwreq *wrq = (struct iwreq *) rq;
5844 int ret=-1;
5845 switch (cmd) {
5846 case RTL_IOCTL_WPA_SUPPLICANT:
5847 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5848 return ret;
5849
5850 default:
5851 return -EOPNOTSUPP;
5852 }
5853
5854 return -EOPNOTSUPP;
5855}
5856
5857
5858
5859/****************************************************************************
5860 -----------------------------PCI STUFF---------------------------
5861*****************************************************************************/
5862
5863
5864static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5865 const struct pci_device_id *id)
5866{
5867 unsigned long ioaddr = 0;
5868 struct net_device *dev = NULL;
5869 struct r8180_priv *priv= NULL;
5870 //u8 *ptr;
5871 u8 unit = 0;
5872
5873#ifdef CONFIG_RTL8180_IO_MAP
5874 unsigned long pio_start, pio_len, pio_flags;
5875#else
5876 unsigned long pmem_start, pmem_len, pmem_flags;
5877#endif //end #ifdef RTL_IO_MAP
5878
5879 DMESG("Configuring chip resources");
5880
5881 if( pci_enable_device (pdev) ){
5882 DMESG("Failed to enable PCI device");
5883 return -EIO;
5884 }
5885
5886 pci_set_master(pdev);
5887 //pci_set_wmi(pdev);
5888 pci_set_dma_mask(pdev, 0xffffff00ULL);
5889 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5890 dev = alloc_ieee80211(sizeof(struct r8180_priv));
5891 if (!dev)
5892 return -ENOMEM;
5893 priv = ieee80211_priv(dev);
5894 priv->ieee80211 = netdev_priv(dev);
5895
5896#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
5897 SET_MODULE_OWNER(dev);
5898#endif
5899 pci_set_drvdata(pdev, dev);
5900 SET_NETDEV_DEV(dev, &pdev->dev);
5901
5902 priv = ieee80211_priv(dev);
5903// memset(priv,0,sizeof(struct r8180_priv));
5904 priv->pdev=pdev;
5905
5906
5907#ifdef CONFIG_RTL8180_IO_MAP
5908
5909 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5910 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5911 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5912
5913 if (!(pio_flags & IORESOURCE_IO)) {
5914 DMESG("region #0 not a PIO resource, aborting");
5915 goto fail;
5916 }
5917
5918 //DMESG("IO space @ 0x%08lx", pio_start );
5919 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5920 DMESG("request_region failed!");
5921 goto fail;
5922 }
5923
5924 ioaddr = pio_start;
5925 dev->base_addr = ioaddr; // device I/O address
5926
5927#else
5928
5929 pmem_start = pci_resource_start(pdev, 1);
5930 pmem_len = pci_resource_len(pdev, 1);
5931 pmem_flags = pci_resource_flags (pdev, 1);
5932
5933 if (!(pmem_flags & IORESOURCE_MEM)) {
5934 DMESG("region #1 not a MMIO resource, aborting");
5935 goto fail;
5936 }
5937
5938 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5939 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5940 DMESG("request_mem_region failed!");
5941 goto fail;
5942 }
5943
5944
5945 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5946 if( ioaddr == (unsigned long)NULL ){
5947 DMESG("ioremap failed!");
5948 // release_mem_region( pmem_start, pmem_len );
5949 goto fail1;
5950 }
5951
5952 dev->mem_start = ioaddr; // shared mem start
5953 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5954
5955#endif //end #ifdef RTL_IO_MAP
5956
5957#ifdef CONFIG_RTL8185B
5958 //pci_read_config_byte(pdev, 0x05, ptr);
5959 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5960 pci_read_config_byte(pdev, 0x05, &unit);
5961 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5962#endif
5963
5964 dev->irq = pdev->irq;
5965 priv->irq = 0;
5966
5967 dev->open = rtl8180_open;
5968 dev->stop = rtl8180_close;
5969 //dev->hard_start_xmit = ieee80211_xmit;
5970 dev->tx_timeout = rtl8180_restart;
5971 dev->wireless_handlers = &r8180_wx_handlers_def;
5972 dev->do_ioctl = rtl8180_ioctl;
5973 dev->set_multicast_list = r8180_set_multicast;
5974 dev->set_mac_address = r8180_set_mac_adr;
5975
5976#if WIRELESS_EXT >= 12
5977#if WIRELESS_EXT < 17
5978 dev->get_wireless_stats = r8180_get_wireless_stats;
5979#endif
5980 dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
5981#endif
5982
5983 dev->type=ARPHRD_ETHER;
5984 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5985
5986 if (dev_alloc_name(dev, ifname) < 0){
5987 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5988 ifname = "wlan%d";
5989 // ifname = "ath%d";
5990 dev_alloc_name(dev, ifname);
5991 }
5992
5993
5994 if(rtl8180_init(dev)!=0){
5995 DMESG("Initialization failed");
5996 goto fail1;
5997 }
5998
5999 netif_carrier_off(dev);
6000
6001 register_netdev(dev);
6002
6003 rtl8180_proc_init_one(dev);
6004
6005 DMESG("Driver probe completed\n");
6006 return 0;
6007
6008fail1:
6009
6010#ifdef CONFIG_RTL8180_IO_MAP
6011
6012 if( dev->base_addr != 0 ){
6013
6014 release_region(dev->base_addr,
6015 pci_resource_len(pdev, 0) );
6016 }
6017#else
6018 if( dev->mem_start != (unsigned long)NULL ){
6019 iounmap( (void *)dev->mem_start );
6020 release_mem_region( pci_resource_start(pdev, 1),
6021 pci_resource_len(pdev, 1) );
6022 }
6023#endif //end #ifdef RTL_IO_MAP
6024
6025
6026fail:
6027 if(dev){
6028
6029 if (priv->irq) {
6030 free_irq(dev->irq, dev);
6031 dev->irq=0;
6032 }
6033 free_ieee80211(dev);
6034 }
6035
6036 pci_disable_device(pdev);
6037
6038 DMESG("wlan driver load failed\n");
6039 pci_set_drvdata(pdev, NULL);
6040 return -ENODEV;
6041
6042}
6043
6044
6045static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
6046{
6047 struct r8180_priv *priv;
6048 struct net_device *dev = pci_get_drvdata(pdev);
6049 if(dev){
6050
6051 unregister_netdev(dev);
6052
6053 priv=ieee80211_priv(dev);
6054
6055 rtl8180_proc_remove_one(dev);
6056 rtl8180_down(dev);
6057 priv->rf_close(dev);
6058 rtl8180_reset(dev);
6059 //rtl8180_rtx_disable(dev);
6060 //rtl8180_irq_disable(dev);
6061 mdelay(10);
6062 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
6063 //force_pci_posting(dev);
6064 //mdelay(10);
6065
6066 if(priv->irq){
6067
6068 DMESG("Freeing irq %d",dev->irq);
6069 free_irq(dev->irq, dev);
6070 priv->irq=0;
6071
6072 }
6073
6074 free_rx_desc_ring(dev);
6075 free_tx_desc_rings(dev);
6076 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6077
6078#ifdef CONFIG_RTL8180_IO_MAP
6079
6080 if( dev->base_addr != 0 ){
6081
6082 release_region(dev->base_addr,
6083 pci_resource_len(pdev, 0) );
6084 }
6085#else
6086 if( dev->mem_start != (unsigned long)NULL ){
6087 iounmap( (void *)dev->mem_start );
6088 release_mem_region( pci_resource_start(pdev, 1),
6089 pci_resource_len(pdev, 1) );
6090 }
6091#endif /*end #ifdef RTL_IO_MAP*/
6092
6093 free_ieee80211(dev);
6094 }
6095 pci_disable_device(pdev);
6096
6097 DMESG("wlan driver removed\n");
6098}
6099
6100
6101/* fun with the built-in ieee80211 stack... */
6102extern int ieee80211_crypto_init(void);
6103extern void ieee80211_crypto_deinit(void);
6104extern int ieee80211_crypto_tkip_init(void);
6105extern void ieee80211_crypto_tkip_exit(void);
6106extern int ieee80211_crypto_ccmp_init(void);
6107extern void ieee80211_crypto_ccmp_exit(void);
6108extern int ieee80211_crypto_wep_init(void);
6109extern void ieee80211_crypto_wep_exit(void);
6110
6111static int __init rtl8180_pci_module_init(void)
6112{
6113 int ret;
6114
6115 ret = ieee80211_crypto_init();
6116 if (ret) {
6117 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
6118 return ret;
6119 }
6120 ret = ieee80211_crypto_tkip_init();
6121 if (ret) {
6122 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
6123 return ret;
6124 }
6125 ret = ieee80211_crypto_ccmp_init();
6126 if (ret) {
6127 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
6128 return ret;
6129 }
6130 ret = ieee80211_crypto_wep_init();
6131 if (ret) {
6132 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
6133 return ret;
6134 }
6135
6136 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
6137/ RTL8185 based WLAN cards\n");
6138 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
6139 DMESG("Initializing module");
6140 DMESG("Wireless extensions version %d", WIRELESS_EXT);
6141 rtl8180_proc_module_init();
6142
6143#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
6144 if(0!=pci_module_init(&rtl8180_pci_driver))
6145#else
6146 if(0!=pci_register_driver(&rtl8180_pci_driver))
6147#endif
6148 //if(0!=pci_module_init(&rtl8180_pci_driver))
6149 {
6150 DMESG("No device found");
6151 /*pci_unregister_driver (&rtl8180_pci_driver);*/
6152 return -ENODEV;
6153 }
6154 return 0;
6155}
6156
6157
6158static void __exit rtl8180_pci_module_exit(void)
6159{
6160 pci_unregister_driver (&rtl8180_pci_driver);
6161 rtl8180_proc_module_remove();
6162 ieee80211_crypto_deinit();
6163 ieee80211_crypto_tkip_exit();
6164 ieee80211_crypto_ccmp_exit();
6165 ieee80211_crypto_wep_exit();
6166 DMESG("Exiting");
6167}
6168
6169
6170void rtl8180_try_wake_queue(struct net_device *dev, int pri)
6171{
6172 unsigned long flags;
6173 short enough_desc;
6174 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6175
6176 spin_lock_irqsave(&priv->tx_lock,flags);
6177 enough_desc = check_nic_enought_desc(dev,pri);
6178 spin_unlock_irqrestore(&priv->tx_lock,flags);
6179
6180 if(enough_desc)
6181 ieee80211_wake_queue(priv->ieee80211);
6182}
6183
6184/*****************************************************************************
6185 -----------------------------IRQ STUFF---------------------------
6186******************************************************************************/
6187
6188void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
6189{
6190 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6191
6192 u32 *tail; //tail virtual addr
6193 u32 *head; //head virtual addr
6194 u32 *begin;//start of ring virtual addr
6195 u32 *nicv; //nic pointer virtual addr
6196// u32 *txdv; //packet just TXed
6197 u32 nic; //nic pointer physical addr
6198 u32 nicbegin;// start of ring physical addr
6199// short txed;
6200 unsigned long flag;
6201 /* physical addr are ok on 32 bits since we set DMA mask*/
6202
6203 int offs;
6204 int j,i;
6205 int hd;
6206 if (error) priv->stats.txretry++; //tony 20060601
6207 spin_lock_irqsave(&priv->tx_lock,flag);
6208 switch(pri) {
6209 case MANAGE_PRIORITY:
6210 tail = priv->txmapringtail;
6211 begin = priv->txmapring;
6212 head = priv->txmapringhead;
6213 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
6214 nicbegin = priv->txmapringdma;
6215 break;
6216
6217 case BK_PRIORITY:
6218 tail = priv->txbkpringtail;
6219 begin = priv->txbkpring;
6220 head = priv->txbkpringhead;
6221 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
6222 nicbegin = priv->txbkpringdma;
6223 break;
6224
6225 case BE_PRIORITY:
6226 tail = priv->txbepringtail;
6227 begin = priv->txbepring;
6228 head = priv->txbepringhead;
6229 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
6230 nicbegin = priv->txbepringdma;
6231 break;
6232
6233 case VI_PRIORITY:
6234 tail = priv->txvipringtail;
6235 begin = priv->txvipring;
6236 head = priv->txvipringhead;
6237 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
6238 nicbegin = priv->txvipringdma;
6239 break;
6240
6241 case VO_PRIORITY:
6242 tail = priv->txvopringtail;
6243 begin = priv->txvopring;
6244 head = priv->txvopringhead;
6245 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
6246 nicbegin = priv->txvopringdma;
6247 break;
6248
6249 case HI_PRIORITY:
6250 tail = priv->txhpringtail;
6251 begin = priv->txhpring;
6252 head = priv->txhpringhead;
6253 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
6254 nicbegin = priv->txhpringdma;
6255 break;
6256
6257 default:
6258 spin_unlock_irqrestore(&priv->tx_lock,flag);
6259 return ;
6260 }
6261/* DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
6262 *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
6263 (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
6264priv->txnpring)/8);
6265*/
6266 //nicv = (u32*) ((nic - nicbegin) + (int)begin);
6267 nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
6268 if((head <= tail && (nicv > tail || nicv < head)) ||
6269 (head > tail && (nicv > tail && nicv < head))){
6270
6271 DMESGW("nic has lost pointer");
6272#ifdef DEBUG_TX_DESC
6273 //check_tx_ring(dev,NORM_PRIORITY);
6274 check_tx_ring(dev,pri);
6275#endif
6276 spin_unlock_irqrestore(&priv->tx_lock,flag);
6277 rtl8180_restart(dev);
6278 return;
6279 }
6280
6281 /* we check all the descriptors between the head and the nic,
6282 * but not the currenly pointed by the nic (the next to be txed)
6283 * and the previous of the pointed (might be in process ??)
6284 */
6285 //if (head == nic) return;
6286 //DMESG("%x %x",head,nic);
6287 offs = (nic - nicbegin);
6288 //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
6289
6290 offs = offs / 8 /4;
6291
6292 hd = (head - begin) /8;
6293
6294 if(offs >= hd)
6295 j = offs - hd;
6296 else
6297 j = offs + (priv->txringcount -1 -hd);
6298 // j= priv->txringcount -1- (hd - offs);
6299
6300 j-=2;
6301 if(j<0) j=0;
6302
6303
6304 for(i=0;i<j;i++)
6305 {
6306// printk("+++++++++++++check status desc\n");
6307 if((*head) & (1<<31))
6308 break;
6309 if(((*head)&(0x10000000)) != 0){
6310// printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
6311 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
6312#if 1
6313 if(!error)
6314 {
6315 priv->NumTxOkTotal++;
6316// printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
6317 }
6318#endif
6319 // printk("in function %s:curr_retry_count is %d\n",__FUNCTION__,((*head) & (0x000000ff)));
6320 }
6321 if(!error){
6322 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
6323 }
6324// printk("in function %s:curr_txokbyte_count is %d\n",__FUNCTION__,(*(head+3)) & (0x00000fff));
6325 *head = *head &~ (1<<31);
6326
6327 if((head - begin)/8 == priv->txringcount-1)
6328 head=begin;
6329
6330 else
6331 head+=8;
6332 }
6333#if 0
6334 if(nicv == begin)
6335 txdv = begin + (priv->txringcount -1)*8;
6336 else
6337 txdv = nicv - 8;
6338
6339 txed = !(txdv[0] &(1<<31));
6340
6341 if(txed){
6342 if(!(txdv[0] & (1<<15))) error = 1;
6343 //if(!(txdv[0] & (1<<30))) error = 1;
6344 if(error)DMESG("%x",txdv[0]);
6345 }
6346#endif
6347 //DMESG("%x",txdv[0]);
6348 /* the head has been moved to the last certainly TXed
6349 * (or at least processed by the nic) packet.
6350 * The driver take forcefully owning of all these packets
6351 * If the packet previous of the nic pointer has been
6352 * processed this doesn't matter: it will be checked
6353 * here at the next round. Anyway if no more packet are
6354 * TXed no memory leak occour at all.
6355 */
6356
6357 switch(pri) {
6358 case MANAGE_PRIORITY:
6359 priv->txmapringhead = head;
6360 //printk("1==========================================> priority check!\n");
6361 if(priv->ack_tx_to_ieee){
6362 // try to implement power-save mode 2008.1.22
6363 // printk("2==========================================> priority check!\n");
6364#if 1
6365 if(rtl8180_is_tx_queue_empty(dev)){
6366 // printk("tx queue empty, after send null sleep packet, try to sleep !\n");
6367 priv->ack_tx_to_ieee = 0;
6368 ieee80211_ps_tx_ack(priv->ieee80211,!error);
6369 }
6370#endif
6371 }
6372 break;
6373
6374 case BK_PRIORITY:
6375 priv->txbkpringhead = head;
6376 break;
6377
6378 case BE_PRIORITY:
6379 priv->txbepringhead = head;
6380 break;
6381
6382 case VI_PRIORITY:
6383 priv->txvipringhead = head;
6384 break;
6385
6386 case VO_PRIORITY:
6387 priv->txvopringhead = head;
6388 break;
6389
6390 case HI_PRIORITY:
6391 priv->txhpringhead = head;
6392 break;
6393 }
6394
6395 /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
6396 (priv->txnpringtail - priv->txnpring) /8,
6397 offs );
6398 */
6399
6400 spin_unlock_irqrestore(&priv->tx_lock,flag);
6401
6402}
6403
6404#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6405void rtl8180_tx_irq_wq(struct work_struct *work)
6406{
6407 //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
6408 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
6409 struct ieee80211_device * ieee = (struct ieee80211_device*)
6410 container_of(dwork, struct ieee80211_device, watch_dog_wq);
6411 struct net_device *dev = ieee->dev;
6412#else
6413void rtl8180_tx_irq_wq(struct net_device *dev)
6414{
6415 //struct r8180_priv *priv = ieee80211_priv(dev);
6416#endif
6417 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6418}
6419irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
6420{
6421 struct net_device *dev = (struct net_device *) netdev;
6422 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6423 unsigned long flags;
6424 u32 inta;
6425
6426 /* We should return IRQ_NONE, but for now let me keep this */
6427 if(priv->irq_enabled == 0) return IRQ_HANDLED;
6428
6429 spin_lock_irqsave(&priv->irq_th_lock,flags);
6430
6431#ifdef CONFIG_RTL8185B
6432 //ISR: 4bytes
6433 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6434 write_nic_dword(dev,ISR,inta); // reset int situation
6435#else
6436 inta = read_nic_word(dev,INTA) & priv->irq_mask;
6437 write_nic_word(dev,INTA,inta); // reset int situation
6438#endif
6439
6440 priv->stats.shints++;
6441
6442 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6443
6444 if(!inta){
6445 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6446 return IRQ_HANDLED;
6447 /*
6448 most probably we can safely return IRQ_NONE,
6449 but for now is better to avoid problems
6450 */
6451 }
6452
6453 if(inta == 0xffff){
6454 /* HW disappared */
6455 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6456 return IRQ_HANDLED;
6457 }
6458
6459 priv->stats.ints++;
6460#ifdef DEBUG_IRQ
6461 DMESG("NIC irq %x",inta);
6462#endif
6463 //priv->irqpending = inta;
6464
6465
6466 if(!netif_running(dev)) {
6467 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6468 return IRQ_HANDLED;
6469 }
6470
6471 if(inta & ISR_TimeOut){
6472 write_nic_dword(dev, TimerInt, 0);
6473 //DMESG("=================>waking up");
6474// rtl8180_hw_wakeup(dev);
6475 }
6476
6477 if(inta & ISR_TBDOK){
6478 priv->stats.txbeacon++;
6479 }
6480
6481 if(inta & ISR_TBDER){
6482 priv->stats.txbeaconerr++;
6483 }
6484
6485 if(inta & IMR_TMGDOK ) {
6486// priv->NumTxOkTotal++;
6487 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6488// schedule_work(&priv->tx_irq_wq);
6489
6490 }
6491
6492 if(inta & ISR_THPDER){
6493#ifdef DEBUG_TX
6494 DMESG ("TX high priority ERR");
6495#endif
6496 priv->stats.txhperr++;
6497 rtl8180_tx_isr(dev,HI_PRIORITY,1);
6498 priv->ieee80211->stats.tx_errors++;
6499 }
6500
6501 if(inta & ISR_THPDOK){ //High priority tx ok
6502#ifdef DEBUG_TX
6503 DMESG ("TX high priority OK");
6504#endif
6505// priv->NumTxOkTotal++;
6506 //priv->NumTxOkInPeriod++; //YJ,del,080828
6507 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6508 priv->stats.txhpokint++;
6509 rtl8180_tx_isr(dev,HI_PRIORITY,0);
6510 }
6511
6512 if(inta & ISR_RER) {
6513 priv->stats.rxerr++;
6514#ifdef DEBUG_RX
6515 DMESGW("RX error int");
6516#endif
6517 }
6518#ifdef CONFIG_RTL8185B
6519 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
6520 priv->stats.txbkperr++;
6521 priv->ieee80211->stats.tx_errors++;
6522#ifdef DEBUG_TX
6523 DMESGW("TX bkp error int");
6524#endif
6525 //tasklet_schedule(&priv->irq_tx_tasklet);
6526 rtl8180_tx_isr(dev,BK_PRIORITY,1);
6527 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6528 }
6529
6530 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
6531 priv->stats.txbeperr++;
6532 priv->ieee80211->stats.tx_errors++;
6533#ifdef DEBUG_TX
6534 DMESGW("TX bep error int");
6535#endif
6536 rtl8180_tx_isr(dev,BE_PRIORITY,1);
6537 //tasklet_schedule(&priv->irq_tx_tasklet);
6538 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6539 }
6540#endif
6541 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
6542 priv->stats.txnperr++;
6543 priv->ieee80211->stats.tx_errors++;
6544#ifdef DEBUG_TX
6545 DMESGW("TX np error int");
6546#endif
6547 //tasklet_schedule(&priv->irq_tx_tasklet);
6548 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
6549#ifdef CONFIG_RTL8185B
6550 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
6551#endif
6552 }
6553
6554 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
6555 priv->stats.txlperr++;
6556 priv->ieee80211->stats.tx_errors++;
6557#ifdef DEBUG_TX
6558 DMESGW("TX lp error int");
6559#endif
6560 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
6561 //tasklet_schedule(&priv->irq_tx_tasklet);
6562 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6563 }
6564
6565 if(inta & ISR_ROK){
6566#ifdef DEBUG_RX
6567 DMESG("Frame arrived !");
6568#endif
6569 //priv->NumRxOkInPeriod++; //YJ,del,080828
6570 priv->stats.rxint++;
6571 tasklet_schedule(&priv->irq_rx_tasklet);
6572 }
6573
6574 if(inta & ISR_RQoSOK ){
6575#ifdef DEBUG_RX
6576 DMESG("QoS Frame arrived !");
6577#endif
6578 //priv->NumRxOkInPeriod++; //YJ,del,080828
6579 priv->stats.rxint++;
6580 tasklet_schedule(&priv->irq_rx_tasklet);
6581 }
6582 if(inta & ISR_BcnInt) {
6583 //DMESG("Preparing Beacons");
6584 rtl8180_prepare_beacon(dev);
6585 }
6586
6587 if(inta & ISR_RDU){
6588//#ifdef DEBUG_RX
6589 DMESGW("No RX descriptor available");
6590 priv->stats.rxrdu++;
6591//#endif
6592 tasklet_schedule(&priv->irq_rx_tasklet);
6593 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6594
6595 }
6596 if(inta & ISR_RXFOVW){
6597#ifdef DEBUG_RX
6598 DMESGW("RX fifo overflow");
6599#endif
6600 priv->stats.rxoverflow++;
6601 tasklet_schedule(&priv->irq_rx_tasklet);
6602 //queue_work(priv->workqueue ,&priv->restart_work);
6603 }
6604
6605 if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6606
6607 if(inta & ISR_TNPDOK){ //Normal priority tx ok
6608#ifdef DEBUG_TX
6609 DMESG ("TX normal priority OK");
6610#endif
6611// priv->NumTxOkTotal++;
6612 //priv->NumTxOkInPeriod++; //YJ,del,080828
6613 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6614 // priv->ieee80211->stats.tx_packets++;
6615 priv->stats.txnpokint++;
6616 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6617 }
6618
6619 if(inta & ISR_TLPDOK){ //Low priority tx ok
6620#ifdef DEBUG_TX
6621 DMESG ("TX low priority OK");
6622#endif
6623// priv->NumTxOkTotal++;
6624 //priv->NumTxOkInPeriod++; //YJ,del,080828
6625 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6626 // priv->ieee80211->stats.tx_packets++;
6627 priv->stats.txlpokint++;
6628 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6629 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6630 }
6631
6632#ifdef CONFIG_RTL8185B
6633 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6634 priv->stats.txbkpokint++;
6635#ifdef DEBUG_TX
6636 DMESGW("TX bk priority ok");
6637#endif
6638// priv->NumTxOkTotal++;
6639 //priv->NumTxOkInPeriod++; //YJ,del,080828
6640 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6641 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6642 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6643 }
6644
6645 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6646 priv->stats.txbeperr++;
6647#ifdef DEBUG_TX
6648 DMESGW("TX be priority ok");
6649#endif
6650// priv->NumTxOkTotal++;
6651 //priv->NumTxOkInPeriod++; //YJ,del,080828
6652 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6653 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6654 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6655 }
6656#endif
6657 force_pci_posting(dev);
6658 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6659
6660 return IRQ_HANDLED;
6661}
6662
6663
6664void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6665{
6666// unsigned long flags;
6667
6668/* spin_lock_irqsave(&priv->irq_lock, flags);
6669 priv->irq_mask &=~IMR_ROK;
6670 priv->irq_mask &=~IMR_RDU;
6671
6672 rtl8180_irq_enable(priv->dev);
6673 spin_unlock_irqrestore(&priv->irq_lock, flags);
6674*/
6675 rtl8180_rx(priv->dev);
6676
6677/* spin_lock_irqsave(&priv->irq_lock, flags);
6678 priv->irq_mask |= IMR_ROK;
6679 priv->irq_mask |= IMR_RDU;
6680 rtl8180_irq_enable(priv->dev);
6681 spin_unlock_irqrestore(&priv->irq_lock, flags);
6682*/
6683}
6684
6685/****************************************************************************
6686lizhaoming--------------------------- RF power on/power off -----------------
6687*****************************************************************************/
6688
6689#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6690void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6691{
6692 //struct delayed_work *dwork = container_of(work, struct delayed_work, work);
6693 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6694 struct net_device *dev = ieee->dev;
6695 struct r8180_priv *priv = ieee80211_priv(dev);
6696#else
6697void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
6698{
6699 struct net_device *dev = ieee->dev;
6700 struct r8180_priv *priv = ieee80211_priv(dev);
6701#endif
6702
6703 //u16 tmp2byte;
6704 u8 btPSR;
6705 u8 btConfig0;
6706 RT_RF_POWER_STATE eRfPowerStateToSet;
6707 bool bActuallySet=false;
6708
6709 char *argv[3];
6710 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6711 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6712 static int readf_count = 0;
6713 //printk("============>%s in \n", __func__);
6714
6715#ifdef ENABLE_LPS
6716 if(readf_count % 10 == 0)
6717 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6718
6719 readf_count = (readf_count+1)%0xffff;
6720#endif
6721#if 0
6722 if(priv->up == 0)//driver stopped
6723 {
6724 printk("\nDo nothing...");
6725 goto out;
6726 }
6727 else
6728#endif
6729 {
6730 // We should turn off LED before polling FF51[4].
6731
6732 //Turn off LED.
6733 btPSR = read_nic_byte(dev, PSR);
6734 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6735
6736 //It need to delay 4us suggested by Jong, 2008-01-16
6737 udelay(4);
6738
6739 //HW radio On/Off according to the value of FF51[4](config0)
6740 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6741
6742 //Turn on LED.
6743 write_nic_byte(dev, PSR, btPSR| BIT3);
6744
6745 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
6746
6747 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6748 {
6749 priv->ieee80211->bHwRadioOff = false;
6750 bActuallySet = true;
6751 }
6752 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6753 {
6754 priv->ieee80211->bHwRadioOff = true;
6755 bActuallySet = true;
6756 }
6757
6758 if(bActuallySet)
6759 {
6760 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6761
6762 /* To update the UI status for Power status changed */
6763 if(priv->ieee80211->bHwRadioOff == true)
6764 argv[1] = "RFOFF";
6765 else{
6766 //if(!priv->RfOffReason)
6767 argv[1] = "RFON";
6768 //else
6769 // argv[1] = "RFOFF";
6770 }
6771 argv[0] = RadioPowerPath;
6772 argv[2] = NULL;
6773
6774 call_usermodehelper(RadioPowerPath,argv,envp,1);
6775 }
6776
6777 }
6778
6779}
6780
6781static u8 read_acadapter_file(char *filename)
6782{
6783//#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
6784#if 0
6785 int fd;
6786 char buf[1];
6787 char ret[50];
6788 int i = 0;
6789 int n = 0;
6790 mm_segment_t old_fs = get_fs();
6791 set_fs(KERNEL_DS);
6792
6793 fd = sys_open(filename, O_RDONLY, 0);
6794 if (fd >= 0) {
6795 while (sys_read(fd, buf, 1) == 1)
6796 {
6797 i++;
6798 if(i>10)
6799 {
6800 if(buf[0]!=' ')
6801 {
6802 ret[n]=buf[0];
6803 n++;
6804 }
6805 }
6806 }
6807 sys_close(fd);
6808 }
6809 ret[n]='\0';
6810// printk("%s \n", ret);
6811 set_fs(old_fs);
6812
6813 if(strncmp(ret, "off-line",8) == 0)
6814 {
6815 return 1;
6816 }
6817#endif
6818 return 0;
6819}
6820
6821/***************************************************************************
6822 ------------------- module init / exit stubs ----------------
6823****************************************************************************/
6824module_init(rtl8180_pci_module_init);
6825module_exit(rtl8180_pci_module_exit);
6826
kernel source for telekom puls (alcatel/mediatek)