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1 | /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * Redistribution and use in source and binary forms, with or without | |
4 | * modification, are permitted provided that the following conditions are met: | |
5 | * * Redistributions of source code must retain the above copyright | |
6 | * notice, this list of conditions and the following disclaimer. | |
7 | * * Redistributions in binary form must reproduce the above copyright | |
8 | * notice, this list of conditions and the following disclaimer in the | |
9 | * documentation and/or other materials provided with the distribution. | |
10 | * * Neither the name of Code Aurora nor | |
11 | * the names of its contributors may be used to endorse or promote | |
12 | * products derived from this software without specific prior written | |
13 | * permission. | |
14 | * | |
15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
16 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
17 | * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
18 | * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | |
19 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | |
20 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | |
21 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | |
22 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
23 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
24 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
25 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
26 | * | |
27 | */ | |
28 | ||
29 | #ifndef MDDIHOST_H | |
30 | #define MDDIHOST_H | |
31 | ||
32 | #include <linux/kernel.h> | |
33 | #include <linux/sched.h> | |
34 | #include <linux/time.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include "linux/proc_fs.h" | |
38 | #include <linux/types.h> | |
39 | #include <linux/dma-mapping.h> | |
40 | #include <linux/clk.h> | |
41 | ||
42 | #include <mach/hardware.h> | |
43 | #include <linux/io.h> | |
44 | ||
45 | #include <asm/system.h> | |
46 | #include <asm/mach-types.h> | |
47 | #include <linux/types.h> | |
48 | #include <linux/dma-mapping.h> | |
49 | ||
50 | #include "msm_fb_panel.h" | |
51 | ||
52 | #undef FEATURE_MDDI_MC4 | |
53 | #undef FEATURE_MDDI_S6D0142 | |
54 | #undef FEATURE_MDDI_HITACHI | |
55 | #define FEATURE_MDDI_SHARP | |
56 | #define FEATURE_MDDI_TOSHIBA | |
57 | #undef FEATURE_MDDI_E751 | |
58 | #define FEATURE_MDDI_CORONA | |
59 | #define FEATURE_MDDI_PRISM | |
60 | ||
61 | #define T_MSM7500 | |
62 | ||
63 | typedef enum { | |
64 | format_16bpp, | |
65 | format_18bpp, | |
66 | format_24bpp | |
67 | } mddi_video_format; | |
68 | ||
69 | typedef enum { | |
70 | MDDI_LCD_NONE = 0, | |
71 | MDDI_LCD_MC4, | |
72 | MDDI_LCD_S6D0142, | |
73 | MDDI_LCD_SHARP, | |
74 | MDDI_LCD_E751, | |
75 | MDDI_LCD_CORONA, | |
76 | MDDI_LCD_HITACHI, | |
77 | MDDI_LCD_TOSHIBA, | |
78 | MDDI_LCD_PRISM, | |
79 | MDDI_LCD_TP2, | |
80 | MDDI_NUM_LCD_TYPES, | |
81 | MDDI_LCD_DEFAULT = MDDI_LCD_TOSHIBA | |
82 | } mddi_lcd_type; | |
83 | ||
84 | typedef enum { | |
85 | MDDI_HOST_PRIM = 0, | |
86 | MDDI_HOST_EXT, | |
87 | MDDI_NUM_HOST_CORES | |
88 | } mddi_host_type; | |
89 | ||
90 | typedef enum { | |
91 | MDDI_DRIVER_RESET, /* host core registers have not been written. */ | |
92 | MDDI_DRIVER_DISABLED, /* registers written, interrupts disabled. */ | |
93 | MDDI_DRIVER_ENABLED /* registers written, interrupts enabled. */ | |
94 | } mddi_host_driver_state_type; | |
95 | ||
96 | typedef enum { | |
97 | MDDI_GPIO_INT_0 = 0, | |
98 | MDDI_GPIO_INT_1, | |
99 | MDDI_GPIO_INT_2, | |
100 | MDDI_GPIO_INT_3, | |
101 | MDDI_GPIO_INT_4, | |
102 | MDDI_GPIO_INT_5, | |
103 | MDDI_GPIO_INT_6, | |
104 | MDDI_GPIO_INT_7, | |
105 | MDDI_GPIO_INT_8, | |
106 | MDDI_GPIO_INT_9, | |
107 | MDDI_GPIO_INT_10, | |
108 | MDDI_GPIO_INT_11, | |
109 | MDDI_GPIO_INT_12, | |
110 | MDDI_GPIO_INT_13, | |
111 | MDDI_GPIO_INT_14, | |
112 | MDDI_GPIO_INT_15, | |
113 | MDDI_GPIO_NUM_INTS | |
114 | } mddi_gpio_int_type; | |
115 | ||
116 | enum mddi_data_packet_size_type { | |
117 | MDDI_DATA_PACKET_4_BYTES = 4, | |
118 | MDDI_DATA_PACKET_8_BYTES = 8, | |
119 | MDDI_DATA_PACKET_12_BYTES = 12, | |
120 | MDDI_DATA_PACKET_16_BYTES = 16, | |
121 | MDDI_DATA_PACKET_24_BYTES = 24 | |
122 | }; | |
123 | ||
124 | typedef struct { | |
125 | uint32 addr; | |
126 | uint32 value; | |
127 | } mddi_reg_write_type; | |
128 | ||
129 | boolean mddi_vsync_set_handler(msm_fb_vsync_handler_type handler, void *arg); | |
130 | ||
131 | typedef void (*mddi_llist_done_cb_type) (void); | |
132 | ||
133 | typedef void (*mddi_rev_handler_type) (void *); | |
134 | ||
135 | boolean mddi_set_rev_handler(mddi_rev_handler_type handler, uint16 pkt_type); | |
136 | ||
137 | #define MDDI_DEFAULT_PRIM_PIX_ATTR 0xC3 | |
138 | #define MDDI_DEFAULT_SECD_PIX_ATTR 0xC0 | |
139 | ||
140 | typedef int gpio_int_polarity_type; | |
141 | typedef int gpio_int_handler_type; | |
142 | ||
143 | typedef struct { | |
144 | void (*vsync_detected) (boolean); | |
145 | } mddi_lcd_func_type; | |
146 | ||
147 | extern mddi_lcd_func_type mddi_lcd; | |
148 | void mddi_init(void); | |
149 | ||
150 | void mddi_powerdown(void); | |
151 | ||
152 | void mddi_host_start_ext_display(void); | |
153 | void mddi_host_stop_ext_display(void); | |
154 | ||
155 | extern spinlock_t mddi_host_spin_lock; | |
156 | #ifdef T_MSM7500 | |
157 | void mddi_reset(void); | |
158 | #ifdef FEATURE_DUAL_PROC_MODEM_DISPLAY | |
159 | void mddi_host_switch_proc_control(boolean on); | |
160 | #endif | |
161 | #endif | |
162 | void mddi_host_exit_power_collapse(void); | |
163 | ||
164 | void mddi_queue_splash_screen | |
165 | (void *buf_ptr, | |
166 | boolean clear_area, | |
167 | int16 src_width, | |
168 | int16 src_starting_row, | |
169 | int16 src_starting_column, | |
170 | int16 num_of_rows, | |
171 | int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column); | |
172 | ||
173 | void mddi_queue_image | |
174 | (void *buf_ptr, | |
175 | uint8 stereo_video, | |
176 | boolean clear_area, | |
177 | int16 src_width, | |
178 | int16 src_starting_row, | |
179 | int16 src_starting_column, | |
180 | int16 num_of_rows, | |
181 | int16 num_of_columns, int16 dst_starting_row, int16 dst_starting_column); | |
182 | ||
183 | int mddi_host_register_read | |
184 | (uint32 reg_addr, | |
185 | uint32 *reg_value_ptr, boolean wait, mddi_host_type host_idx); | |
186 | int mddi_host_register_write | |
187 | (uint32 reg_addr, uint32 reg_val, | |
188 | enum mddi_data_packet_size_type packet_size, | |
189 | boolean wait, mddi_llist_done_cb_type done_cb, mddi_host_type host); | |
190 | boolean mddi_host_register_write_int | |
191 | (uint32 reg_addr, | |
192 | uint32 reg_val, mddi_llist_done_cb_type done_cb, mddi_host_type host); | |
193 | boolean mddi_host_register_read_int | |
194 | (uint32 reg_addr, uint32 *reg_value_ptr, mddi_host_type host_idx); | |
195 | void mddi_queue_register_write_static | |
196 | (uint32 reg_addr, | |
197 | uint32 reg_val, boolean wait, mddi_llist_done_cb_type done_cb); | |
198 | void mddi_queue_static_window_adjust | |
199 | (const mddi_reg_write_type *reg_write, | |
200 | uint16 num_writes, mddi_llist_done_cb_type done_cb); | |
201 | ||
202 | #define mddi_queue_register_read(reg, val_ptr, wait, sig) \ | |
203 | mddi_host_register_read(reg, val_ptr, wait, MDDI_HOST_PRIM) | |
204 | #define mddi_queue_register_write(reg, val, wait, sig) \ | |
205 | mddi_host_register_write(reg, val, MDDI_DATA_PACKET_4_BYTES,\ | |
206 | wait, NULL, MDDI_HOST_PRIM) | |
207 | #define mddi_queue_register_write_extn(reg, val, pkt_size, wait, sig) \ | |
208 | mddi_host_register_write(reg, val, pkt_size, \ | |
209 | wait, NULL, MDDI_HOST_PRIM) | |
210 | #define mddi_queue_register_write_int(reg, val) \ | |
211 | mddi_host_register_write_int(reg, val, NULL, MDDI_HOST_PRIM) | |
212 | #define mddi_queue_register_read_int(reg, val_ptr) \ | |
213 | mddi_host_register_read_int(reg, val_ptr, MDDI_HOST_PRIM) | |
214 | #define mddi_queue_register_writes(reg_ptr, val, wait, sig) \ | |
215 | mddi_host_register_writes(reg_ptr, val, wait, sig, MDDI_HOST_PRIM) | |
216 | ||
217 | void mddi_wait(uint16 time_ms); | |
218 | void mddi_assign_max_pkt_dimensions(uint16 image_cols, | |
219 | uint16 image_rows, | |
220 | uint16 bpp, | |
221 | uint16 *max_cols, uint16 * max_rows); | |
222 | uint16 mddi_assign_pkt_height(uint16 pkt_width, uint16 pkt_height, uint16 bpp); | |
223 | void mddi_queue_reverse_encapsulation(boolean wait); | |
224 | void mddi_disable(int lock); | |
225 | #endif /* MDDIHOST_H */ |