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1a9fc855 MCC |
1 | /* |
2 | * Driver for the Conexant CX25821 PCIe bridge | |
3 | * | |
4 | * Copyright (C) 2009 Conexant Systems Inc. | |
5 | * Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
02b20b0b | 22 | |
1a9fc855 | 23 | #include "cx25821.h" |
02b20b0b MCC |
24 | |
25 | /********************* GPIO stuffs *********************/ | |
1a9fc855 MCC |
26 | void cx25821_set_gpiopin_direction(struct cx25821_dev *dev, |
27 | int pin_number, int pin_logic_value) | |
02b20b0b | 28 | { |
1a9fc855 MCC |
29 | int bit = pin_number; |
30 | u32 gpio_oe_reg = GPIO_LO_OE; | |
02b20b0b | 31 | u32 gpio_register = 0; |
1a9fc855 | 32 | u32 value = 0; |
02b20b0b | 33 | |
1c614239 | 34 | /* Check for valid pinNumber */ |
1a9fc855 MCC |
35 | if (pin_number >= 47) |
36 | return; | |
02b20b0b | 37 | |
1a9fc855 MCC |
38 | if (pin_number > 31) { |
39 | bit = pin_number - 31; | |
40 | gpio_oe_reg = GPIO_HI_OE; | |
02b20b0b | 41 | } |
1c614239 OP |
42 | /* Here we will make sure that the GPIOs 0 and 1 are output. keep the |
43 | * rest as is */ | |
1a9fc855 | 44 | gpio_register = cx_read(gpio_oe_reg); |
02b20b0b | 45 | |
1c614239 | 46 | if (pin_logic_value == 1) |
1a9fc855 | 47 | value = gpio_register | Set_GPIO_Bit(bit); |
1c614239 | 48 | else |
1a9fc855 | 49 | value = gpio_register & Clear_GPIO_Bit(bit); |
02b20b0b | 50 | |
1a9fc855 | 51 | cx_write(gpio_oe_reg, value); |
02b20b0b MCC |
52 | } |
53 | ||
1a9fc855 MCC |
54 | static void cx25821_set_gpiopin_logicvalue(struct cx25821_dev *dev, |
55 | int pin_number, int pin_logic_value) | |
bb4c9a74 | 56 | { |
1a9fc855 MCC |
57 | int bit = pin_number; |
58 | u32 gpio_reg = GPIO_LO; | |
59 | u32 value = 0; | |
bb4c9a74 | 60 | |
1c614239 | 61 | /* Check for valid pinNumber */ |
1a9fc855 MCC |
62 | if (pin_number >= 47) |
63 | return; | |
02b20b0b | 64 | |
1c614239 OP |
65 | /* change to output direction */ |
66 | cx25821_set_gpiopin_direction(dev, pin_number, 0); | |
02b20b0b | 67 | |
1a9fc855 MCC |
68 | if (pin_number > 31) { |
69 | bit = pin_number - 31; | |
70 | gpio_reg = GPIO_HI; | |
02b20b0b MCC |
71 | } |
72 | ||
1a9fc855 | 73 | value = cx_read(gpio_reg); |
bb4c9a74 | 74 | |
1c614239 | 75 | if (pin_logic_value == 0) |
1a9fc855 | 76 | value &= Clear_GPIO_Bit(bit); |
1c614239 | 77 | else |
1a9fc855 | 78 | value |= Set_GPIO_Bit(bit); |
bb4c9a74 | 79 | |
1a9fc855 | 80 | cx_write(gpio_reg, value); |
02b20b0b MCC |
81 | } |
82 | ||
83 | void cx25821_gpio_init(struct cx25821_dev *dev) | |
84 | { | |
1c614239 | 85 | if (dev == NULL) |
1a9fc855 | 86 | return; |
bb4c9a74 | 87 | |
1a9fc855 MCC |
88 | switch (dev->board) { |
89 | case CX25821_BOARD_CONEXANT_ATHENA10: | |
90 | default: | |
1c614239 | 91 | /* set GPIO 5 to select the path for Medusa/Athena */ |
1a9fc855 MCC |
92 | cx25821_set_gpiopin_logicvalue(dev, 5, 1); |
93 | mdelay(20); | |
94 | break; | |
02b20b0b | 95 | } |
bb4c9a74 | 96 | |
02b20b0b | 97 | } |