Commit | Line | Data |
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cb7859a9 FMH |
1 | /* |
2 | comedi/drivers/ni_tiocmd.c | |
3 | Command support for NI general purpose counters | |
4 | ||
5 | Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net> | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | /* | |
23 | Driver: ni_tiocmd | |
24 | Description: National Instruments general purpose counters command support | |
25 | Devices: | |
26 | Author: J.P. Mellor <jpmellor@rose-hulman.edu>, | |
27 | Herman.Bruyninckx@mech.kuleuven.ac.be, | |
28 | Wim.Meeussen@mech.kuleuven.ac.be, | |
29 | Klaas.Gadeyne@mech.kuleuven.ac.be, | |
30 | Frank Mori Hess <fmhess@users.sourceforge.net> | |
31 | Updated: Fri, 11 Apr 2008 12:32:35 +0100 | |
32 | Status: works | |
33 | ||
34 | This module is not used directly by end-users. Rather, it | |
35 | is used by other drivers (for example ni_660x and ni_pcimio) | |
36 | to provide command support for NI's general purpose counters. | |
37 | It was originally split out of ni_tio.c to stop the 'ni_tio' | |
38 | module depending on the 'mite' module. | |
39 | ||
40 | References: | |
41 | DAQ 660x Register-Level Programmer Manual (NI 370505A-01) | |
42 | DAQ 6601/6602 User Manual (NI 322137B-01) | |
43 | 340934b.pdf DAQ-STC reference manual | |
44 | ||
45 | */ | |
46 | /* | |
47 | TODO: | |
48 | Support use of both banks X and Y | |
49 | */ | |
50 | ||
51 | #include "ni_tio_internal.h" | |
52 | #include "mite.h" | |
53 | ||
54 | MODULE_AUTHOR("Comedi <comedi@comedi.org>"); | |
55 | MODULE_DESCRIPTION("Comedi command support for NI general-purpose counters"); | |
56 | MODULE_LICENSE("GPL"); | |
57 | ||
58 | static void ni_tio_configure_dma(struct ni_gpct *counter, short enable, | |
0a85b6f0 | 59 | short read_not_write) |
cb7859a9 FMH |
60 | { |
61 | struct ni_gpct_device *counter_dev = counter->counter_dev; | |
62 | unsigned input_select_bits = 0; | |
63 | ||
64 | if (enable) { | |
65 | if (read_not_write) { | |
66 | input_select_bits |= Gi_Read_Acknowledges_Irq; | |
67 | } else { | |
68 | input_select_bits |= Gi_Write_Acknowledges_Irq; | |
69 | } | |
70 | } | |
71 | ni_tio_set_bits(counter, | |
0a85b6f0 MT |
72 | NITIO_Gi_Input_Select_Reg(counter->counter_index), |
73 | Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq, | |
74 | input_select_bits); | |
cb7859a9 FMH |
75 | switch (counter_dev->variant) { |
76 | case ni_gpct_variant_e_series: | |
77 | break; | |
78 | case ni_gpct_variant_m_series: | |
79 | case ni_gpct_variant_660x: | |
80 | { | |
81 | unsigned gi_dma_config_bits = 0; | |
82 | ||
83 | if (enable) { | |
84 | gi_dma_config_bits |= Gi_DMA_Enable_Bit; | |
85 | gi_dma_config_bits |= Gi_DMA_Int_Bit; | |
86 | } | |
87 | if (read_not_write == 0) { | |
88 | gi_dma_config_bits |= Gi_DMA_Write_Bit; | |
89 | } | |
90 | ni_tio_set_bits(counter, | |
0a85b6f0 MT |
91 | NITIO_Gi_DMA_Config_Reg(counter-> |
92 | counter_index), | |
93 | Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit | | |
94 | Gi_DMA_Write_Bit, gi_dma_config_bits); | |
cb7859a9 FMH |
95 | } |
96 | break; | |
97 | } | |
98 | } | |
99 | ||
0a85b6f0 MT |
100 | static int ni_tio_input_inttrig(struct comedi_device *dev, |
101 | struct comedi_subdevice *s, | |
102 | unsigned int trignum) | |
cb7859a9 FMH |
103 | { |
104 | unsigned long flags; | |
105 | int retval = 0; | |
106 | struct ni_gpct *counter = s->private; | |
107 | ||
108 | BUG_ON(counter == NULL); | |
109 | if (trignum != 0) | |
110 | return -EINVAL; | |
111 | ||
5f74ea14 | 112 | spin_lock_irqsave(&counter->lock, flags); |
cb7859a9 FMH |
113 | if (counter->mite_chan) |
114 | mite_dma_arm(counter->mite_chan); | |
115 | else | |
116 | retval = -EIO; | |
5f74ea14 | 117 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
118 | if (retval < 0) |
119 | return retval; | |
120 | retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE); | |
121 | s->async->inttrig = NULL; | |
122 | ||
123 | return retval; | |
124 | } | |
125 | ||
d163679c | 126 | static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async) |
cb7859a9 FMH |
127 | { |
128 | struct ni_gpct_device *counter_dev = counter->counter_dev; | |
ea6d0d4c | 129 | struct comedi_cmd *cmd = &async->cmd; |
cb7859a9 FMH |
130 | int retval = 0; |
131 | ||
132 | /* write alloc the entire buffer */ | |
133 | comedi_buf_write_alloc(async, async->prealloc_bufsz); | |
134 | counter->mite_chan->dir = COMEDI_INPUT; | |
135 | switch (counter_dev->variant) { | |
136 | case ni_gpct_variant_m_series: | |
137 | case ni_gpct_variant_660x: | |
138 | mite_prep_dma(counter->mite_chan, 32, 32); | |
139 | break; | |
140 | case ni_gpct_variant_e_series: | |
141 | mite_prep_dma(counter->mite_chan, 16, 32); | |
142 | break; | |
143 | default: | |
144 | BUG(); | |
145 | break; | |
146 | } | |
147 | ni_tio_set_bits(counter, NITIO_Gi_Command_Reg(counter->counter_index), | |
0a85b6f0 | 148 | Gi_Save_Trace_Bit, 0); |
cb7859a9 FMH |
149 | ni_tio_configure_dma(counter, 1, 1); |
150 | switch (cmd->start_src) { | |
151 | case TRIG_NOW: | |
152 | async->inttrig = NULL; | |
153 | mite_dma_arm(counter->mite_chan); | |
154 | retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE); | |
155 | break; | |
156 | case TRIG_INT: | |
157 | async->inttrig = &ni_tio_input_inttrig; | |
158 | break; | |
159 | case TRIG_EXT: | |
160 | async->inttrig = NULL; | |
161 | mite_dma_arm(counter->mite_chan); | |
162 | retval = ni_tio_arm(counter, 1, cmd->start_arg); | |
163 | case TRIG_OTHER: | |
164 | async->inttrig = NULL; | |
165 | mite_dma_arm(counter->mite_chan); | |
166 | break; | |
167 | default: | |
168 | BUG(); | |
169 | break; | |
170 | } | |
171 | return retval; | |
172 | } | |
173 | ||
0a85b6f0 MT |
174 | static int ni_tio_output_cmd(struct ni_gpct *counter, |
175 | struct comedi_async *async) | |
cb7859a9 | 176 | { |
5f74ea14 | 177 | printk("ni_tio: output commands not yet implemented.\n"); |
cb7859a9 FMH |
178 | return -ENOTSUPP; |
179 | ||
180 | counter->mite_chan->dir = COMEDI_OUTPUT; | |
181 | mite_prep_dma(counter->mite_chan, 32, 32); | |
182 | ni_tio_configure_dma(counter, 1, 0); | |
183 | mite_dma_arm(counter->mite_chan); | |
184 | return ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE); | |
185 | } | |
186 | ||
d163679c | 187 | static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async) |
cb7859a9 | 188 | { |
ea6d0d4c | 189 | struct comedi_cmd *cmd = &async->cmd; |
cb7859a9 FMH |
190 | int set_gate_source = 0; |
191 | unsigned gate_source; | |
192 | int retval = 0; | |
193 | ||
194 | if (cmd->scan_begin_src == TRIG_EXT) { | |
195 | set_gate_source = 1; | |
196 | gate_source = cmd->scan_begin_arg; | |
197 | } else if (cmd->convert_src == TRIG_EXT) { | |
198 | set_gate_source = 1; | |
199 | gate_source = cmd->convert_arg; | |
200 | } | |
201 | if (set_gate_source) { | |
202 | retval = ni_tio_set_gate_src(counter, 0, gate_source); | |
203 | } | |
204 | if (cmd->flags & TRIG_WAKE_EOS) { | |
205 | ni_tio_set_bits(counter, | |
0a85b6f0 MT |
206 | NITIO_Gi_Interrupt_Enable_Reg(counter-> |
207 | counter_index), | |
208 | Gi_Gate_Interrupt_Enable_Bit(counter-> | |
209 | counter_index), | |
210 | Gi_Gate_Interrupt_Enable_Bit(counter-> | |
211 | counter_index)); | |
cb7859a9 FMH |
212 | } |
213 | return retval; | |
214 | } | |
215 | ||
d163679c | 216 | int ni_tio_cmd(struct ni_gpct *counter, struct comedi_async *async) |
cb7859a9 | 217 | { |
ea6d0d4c | 218 | struct comedi_cmd *cmd = &async->cmd; |
cb7859a9 FMH |
219 | int retval = 0; |
220 | unsigned long flags; | |
221 | ||
5f74ea14 | 222 | spin_lock_irqsave(&counter->lock, flags); |
cb7859a9 | 223 | if (counter->mite_chan == NULL) { |
5f74ea14 | 224 | printk |
0a85b6f0 | 225 | ("ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n"); |
cb7859a9 FMH |
226 | retval = -EIO; |
227 | } else { | |
228 | retval = ni_tio_cmd_setup(counter, async); | |
229 | if (retval == 0) { | |
230 | if (cmd->flags & CMDF_WRITE) { | |
231 | retval = ni_tio_output_cmd(counter, async); | |
232 | } else { | |
233 | retval = ni_tio_input_cmd(counter, async); | |
234 | } | |
235 | } | |
236 | } | |
5f74ea14 | 237 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
238 | return retval; |
239 | } | |
240 | ||
0a85b6f0 | 241 | int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd) |
cb7859a9 FMH |
242 | { |
243 | int err = 0; | |
244 | int tmp; | |
245 | int sources; | |
246 | ||
247 | /* step 1: make sure trigger sources are trivially valid */ | |
248 | ||
249 | tmp = cmd->start_src; | |
250 | sources = TRIG_NOW | TRIG_INT | TRIG_OTHER; | |
251 | if (ni_tio_counting_mode_registers_present(counter->counter_dev)) | |
252 | sources |= TRIG_EXT; | |
253 | cmd->start_src &= sources; | |
254 | if (!cmd->start_src || tmp != cmd->start_src) | |
255 | err++; | |
256 | ||
257 | tmp = cmd->scan_begin_src; | |
258 | cmd->scan_begin_src &= TRIG_FOLLOW | TRIG_EXT | TRIG_OTHER; | |
259 | if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) | |
260 | err++; | |
261 | ||
262 | tmp = cmd->convert_src; | |
263 | sources = TRIG_NOW | TRIG_EXT | TRIG_OTHER; | |
264 | cmd->convert_src &= sources; | |
265 | if (!cmd->convert_src || tmp != cmd->convert_src) | |
266 | err++; | |
267 | ||
268 | tmp = cmd->scan_end_src; | |
269 | cmd->scan_end_src &= TRIG_COUNT; | |
270 | if (!cmd->scan_end_src || tmp != cmd->scan_end_src) | |
271 | err++; | |
272 | ||
273 | tmp = cmd->stop_src; | |
274 | cmd->stop_src &= TRIG_NONE; | |
275 | if (!cmd->stop_src || tmp != cmd->stop_src) | |
276 | err++; | |
277 | ||
278 | if (err) | |
279 | return 1; | |
280 | ||
281 | /* step 2: make sure trigger sources are unique... */ | |
282 | ||
283 | if (cmd->start_src != TRIG_NOW && | |
0a85b6f0 MT |
284 | cmd->start_src != TRIG_INT && |
285 | cmd->start_src != TRIG_EXT && cmd->start_src != TRIG_OTHER) | |
cb7859a9 FMH |
286 | err++; |
287 | if (cmd->scan_begin_src != TRIG_FOLLOW && | |
0a85b6f0 MT |
288 | cmd->scan_begin_src != TRIG_EXT && |
289 | cmd->scan_begin_src != TRIG_OTHER) | |
cb7859a9 FMH |
290 | err++; |
291 | if (cmd->convert_src != TRIG_OTHER && | |
0a85b6f0 | 292 | cmd->convert_src != TRIG_EXT && cmd->convert_src != TRIG_NOW) |
cb7859a9 FMH |
293 | err++; |
294 | if (cmd->stop_src != TRIG_NONE) | |
295 | err++; | |
296 | /* ... and mutually compatible */ | |
297 | if (cmd->convert_src != TRIG_NOW && cmd->scan_begin_src != TRIG_FOLLOW) | |
298 | err++; | |
299 | ||
300 | if (err) | |
301 | return 2; | |
302 | ||
303 | /* step 3: make sure arguments are trivially compatible */ | |
304 | if (cmd->start_src != TRIG_EXT) { | |
305 | if (cmd->start_arg != 0) { | |
306 | cmd->start_arg = 0; | |
307 | err++; | |
308 | } | |
309 | } | |
310 | if (cmd->scan_begin_src != TRIG_EXT) { | |
311 | if (cmd->scan_begin_arg) { | |
312 | cmd->scan_begin_arg = 0; | |
313 | err++; | |
314 | } | |
315 | } | |
316 | if (cmd->convert_src != TRIG_EXT) { | |
317 | if (cmd->convert_arg) { | |
318 | cmd->convert_arg = 0; | |
319 | err++; | |
320 | } | |
321 | } | |
322 | ||
323 | if (cmd->scan_end_arg != cmd->chanlist_len) { | |
324 | cmd->scan_end_arg = cmd->chanlist_len; | |
325 | err++; | |
326 | } | |
327 | ||
328 | if (cmd->stop_src == TRIG_NONE) { | |
329 | if (cmd->stop_arg != 0) { | |
330 | cmd->stop_arg = 0; | |
331 | err++; | |
332 | } | |
333 | } | |
334 | ||
335 | if (err) | |
336 | return 3; | |
337 | ||
338 | /* step 4: fix up any arguments */ | |
339 | ||
340 | if (err) | |
341 | return 4; | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | int ni_tio_cancel(struct ni_gpct *counter) | |
347 | { | |
348 | unsigned long flags; | |
349 | ||
350 | ni_tio_arm(counter, 0, 0); | |
5f74ea14 | 351 | spin_lock_irqsave(&counter->lock, flags); |
cb7859a9 FMH |
352 | if (counter->mite_chan) { |
353 | mite_dma_disarm(counter->mite_chan); | |
354 | } | |
5f74ea14 | 355 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
356 | ni_tio_configure_dma(counter, 0, 0); |
357 | ||
358 | ni_tio_set_bits(counter, | |
0a85b6f0 MT |
359 | NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index), |
360 | Gi_Gate_Interrupt_Enable_Bit(counter->counter_index), | |
361 | 0x0); | |
cb7859a9 FMH |
362 | return 0; |
363 | } | |
364 | ||
365 | /* During buffered input counter operation for e-series, the gate interrupt is acked | |
366 | automatically by the dma controller, due to the Gi_Read/Write_Acknowledges_IRQ bits | |
367 | in the input select register. */ | |
368 | static int should_ack_gate(struct ni_gpct *counter) | |
369 | { | |
370 | unsigned long flags; | |
371 | int retval = 0; | |
372 | ||
373 | switch (counter->counter_dev->variant) { | |
374 | case ni_gpct_variant_m_series: | |
2696fb57 | 375 | case ni_gpct_variant_660x: /* not sure if 660x really supports gate interrupts (the bits are not listed in register-level manual) */ |
cb7859a9 FMH |
376 | return 1; |
377 | break; | |
378 | case ni_gpct_variant_e_series: | |
5f74ea14 | 379 | spin_lock_irqsave(&counter->lock, flags); |
cb7859a9 FMH |
380 | { |
381 | if (counter->mite_chan == NULL || | |
0a85b6f0 MT |
382 | counter->mite_chan->dir != COMEDI_INPUT || |
383 | (mite_done(counter->mite_chan))) { | |
cb7859a9 FMH |
384 | retval = 1; |
385 | } | |
386 | } | |
5f74ea14 | 387 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
388 | break; |
389 | } | |
390 | return retval; | |
391 | } | |
392 | ||
393 | void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error, | |
0a85b6f0 MT |
394 | int *tc_error, int *perm_stale_data, |
395 | int *stale_data) | |
cb7859a9 FMH |
396 | { |
397 | const unsigned short gxx_status = read_register(counter, | |
0a85b6f0 MT |
398 | NITIO_Gxx_Status_Reg |
399 | (counter-> | |
400 | counter_index)); | |
cb7859a9 | 401 | const unsigned short gi_status = read_register(counter, |
0a85b6f0 MT |
402 | NITIO_Gi_Status_Reg |
403 | (counter-> | |
404 | counter_index)); | |
cb7859a9 FMH |
405 | unsigned ack = 0; |
406 | ||
407 | if (gate_error) | |
408 | *gate_error = 0; | |
409 | if (tc_error) | |
410 | *tc_error = 0; | |
411 | if (perm_stale_data) | |
412 | *perm_stale_data = 0; | |
413 | if (stale_data) | |
414 | *stale_data = 0; | |
415 | ||
416 | if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) { | |
417 | ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index); | |
418 | if (gate_error) { | |
419 | /*660x don't support automatic acknowledgement of gate interrupt via dma read/write | |
420 | and report bogus gate errors */ | |
421 | if (counter->counter_dev->variant != | |
0a85b6f0 | 422 | ni_gpct_variant_660x) { |
cb7859a9 FMH |
423 | *gate_error = 1; |
424 | } | |
425 | } | |
426 | } | |
427 | if (gxx_status & Gi_TC_Error_Bit(counter->counter_index)) { | |
428 | ack |= Gi_TC_Error_Confirm_Bit(counter->counter_index); | |
429 | if (tc_error) | |
430 | *tc_error = 1; | |
431 | } | |
432 | if (gi_status & Gi_TC_Bit) { | |
433 | ack |= Gi_TC_Interrupt_Ack_Bit; | |
434 | } | |
435 | if (gi_status & Gi_Gate_Interrupt_Bit) { | |
436 | if (should_ack_gate(counter)) | |
437 | ack |= Gi_Gate_Interrupt_Ack_Bit; | |
438 | } | |
439 | if (ack) | |
440 | write_register(counter, ack, | |
0a85b6f0 MT |
441 | NITIO_Gi_Interrupt_Acknowledge_Reg |
442 | (counter->counter_index)); | |
443 | if (ni_tio_get_soft_copy | |
444 | (counter, | |
445 | NITIO_Gi_Mode_Reg(counter->counter_index)) & | |
446 | Gi_Loading_On_Gate_Bit) { | |
cb7859a9 FMH |
447 | if (gxx_status & Gi_Stale_Data_Bit(counter->counter_index)) { |
448 | if (stale_data) | |
449 | *stale_data = 1; | |
450 | } | |
451 | if (read_register(counter, | |
0a85b6f0 MT |
452 | NITIO_Gxx_Joint_Status2_Reg |
453 | (counter->counter_index)) & | |
454 | Gi_Permanent_Stale_Bit(counter->counter_index)) { | |
5f74ea14 | 455 | printk("%s: Gi_Permanent_Stale_Data detected.\n", |
0a85b6f0 | 456 | __FUNCTION__); |
cb7859a9 FMH |
457 | if (perm_stale_data) |
458 | *perm_stale_data = 1; | |
459 | } | |
460 | } | |
461 | } | |
462 | ||
0a85b6f0 MT |
463 | void ni_tio_handle_interrupt(struct ni_gpct *counter, |
464 | struct comedi_subdevice *s) | |
cb7859a9 FMH |
465 | { |
466 | unsigned gpct_mite_status; | |
467 | unsigned long flags; | |
468 | int gate_error; | |
469 | int tc_error; | |
470 | int perm_stale_data; | |
471 | ||
472 | ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error, | |
0a85b6f0 | 473 | &perm_stale_data, NULL); |
cb7859a9 | 474 | if (gate_error) { |
5f74ea14 | 475 | printk("%s: Gi_Gate_Error detected.\n", __FUNCTION__); |
cb7859a9 FMH |
476 | s->async->events |= COMEDI_CB_OVERFLOW; |
477 | } | |
478 | if (perm_stale_data) { | |
479 | s->async->events |= COMEDI_CB_ERROR; | |
480 | } | |
481 | switch (counter->counter_dev->variant) { | |
482 | case ni_gpct_variant_m_series: | |
483 | case ni_gpct_variant_660x: | |
484 | if (read_register(counter, | |
0a85b6f0 MT |
485 | NITIO_Gi_DMA_Status_Reg |
486 | (counter->counter_index)) & Gi_DRQ_Error_Bit) | |
487 | { | |
5f74ea14 | 488 | printk("%s: Gi_DRQ_Error detected.\n", __FUNCTION__); |
cb7859a9 FMH |
489 | s->async->events |= COMEDI_CB_OVERFLOW; |
490 | } | |
491 | break; | |
492 | case ni_gpct_variant_e_series: | |
493 | break; | |
494 | } | |
5f74ea14 | 495 | spin_lock_irqsave(&counter->lock, flags); |
cb7859a9 | 496 | if (counter->mite_chan == NULL) { |
5f74ea14 | 497 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
498 | return; |
499 | } | |
500 | gpct_mite_status = mite_get_status(counter->mite_chan); | |
501 | if (gpct_mite_status & CHSR_LINKC) { | |
502 | writel(CHOR_CLRLC, | |
0a85b6f0 MT |
503 | counter->mite_chan->mite->mite_io_addr + |
504 | MITE_CHOR(counter->mite_chan->channel)); | |
cb7859a9 FMH |
505 | } |
506 | mite_sync_input_dma(counter->mite_chan, s->async); | |
5f74ea14 | 507 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
508 | } |
509 | ||
510 | void ni_tio_set_mite_channel(struct ni_gpct *counter, | |
0a85b6f0 | 511 | struct mite_channel *mite_chan) |
cb7859a9 FMH |
512 | { |
513 | unsigned long flags; | |
514 | ||
5f74ea14 | 515 | spin_lock_irqsave(&counter->lock, flags); |
cb7859a9 | 516 | counter->mite_chan = mite_chan; |
5f74ea14 | 517 | spin_unlock_irqrestore(&counter->lock, flags); |
cb7859a9 FMH |
518 | } |
519 | ||
520 | static int __init ni_tiocmd_init_module(void) | |
521 | { | |
522 | return 0; | |
523 | } | |
524 | ||
525 | module_init(ni_tiocmd_init_module); | |
526 | ||
527 | static void __exit ni_tiocmd_cleanup_module(void) | |
528 | { | |
529 | } | |
530 | ||
531 | module_exit(ni_tiocmd_cleanup_module); | |
532 | ||
533 | EXPORT_SYMBOL_GPL(ni_tio_cmd); | |
534 | EXPORT_SYMBOL_GPL(ni_tio_cmdtest); | |
535 | EXPORT_SYMBOL_GPL(ni_tio_cancel); | |
536 | EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt); | |
537 | EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel); | |
538 | EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm); |