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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / comedi / drivers / jr3_pci.c
CommitLineData
07b509e6
AB		 1/*
2 comedi/drivers/jr3_pci.c
3 hardware driver for JR3/PCI force sensor board
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2007 Anders Blomdell <anders.blomdell@control.lth.se>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23/*
24Driver: jr3_pci
25Description: JR3/PCI force sensor board
26Author: Anders Blomdell <anders.blomdell@control.lth.se>
27Status: works
28Devices: [JR3] PCI force sensor board (jr3_pci)
29
30 The DSP on the board requires initialization code, which can
31 be loaded by placing it in /lib/firmware/comedi.
32 The initialization code should be somewhere on the media you got
33 with your card. One version is available from http://www.comedi.org
34 in the comedi_nonfree_firmware tarball.
35
36 Configuration options:
37 [0] - PCI bus number - if bus number and slot number are 0,
38 then driver search for first unused card
39 [1] - PCI slot number
40
41*/
42
43#include "../comedidev.h"
44
45#include <linux/delay.h>
46#include <linux/ctype.h>
47#include <linux/firmware.h>
9b5de0a0 48#include <linux/jiffies.h>
5a0e3ad6 49#include <linux/slab.h>
9b5de0a0 50#include <linux/timer.h>
07b509e6
AB		 51#include "comedi_pci.h"
52#include "jr3_pci.h"
53
07b509e6
AB		 54#define PCI_VENDOR_ID_JR3 0x1762
55#define PCI_DEVICE_ID_JR3_1_CHANNEL 0x3111
56#define PCI_DEVICE_ID_JR3_2_CHANNEL 0x3112
57#define PCI_DEVICE_ID_JR3_3_CHANNEL 0x3113
58#define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114
59
0a85b6f0
MT		 60static int jr3_pci_attach(struct comedi_device *dev,
61 struct comedi_devconfig *it);
da91b269 62static int jr3_pci_detach(struct comedi_device *dev);
07b509e6 63
139dfbdf 64static struct comedi_driver driver_jr3_pci = {
68c3dbff
BP		 65 .driver_name = "jr3_pci",
66 .module = THIS_MODULE,
67 .attach = jr3_pci_attach,
68 .detach = jr3_pci_detach,
07b509e6
AB		 69};
70
71static DEFINE_PCI_DEVICE_TABLE(jr3_pci_pci_table) = {
0a85b6f0
MT		 72 {
73 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL,
74 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
75 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL,
76 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
77 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL,
78 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
79 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_4_CHANNEL,
80 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
81 0}
07b509e6
AB		 82};
83
84MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
85
217fbbbc
BP		 86struct jr3_pci_dev_private {
87
07b509e6
AB		 88 struct pci_dev *pci_dev;
89 int pci_enabled;
b2e1b3c2 90 volatile struct jr3_t *iobase;
07b509e6
AB		 91 int n_channels;
92 struct timer_list timer;
217fbbbc
BP		 93};
94
83101a17
BP		 95struct poll_delay_t {
96
07b509e6
AB		 97 int min;
98 int max;
83101a17
BP		 99};
100
c6a3b7b6 101struct jr3_pci_subdev_private {
67080790 102 volatile struct jr3_channel *channel;
07b509e6
AB		 103 unsigned long next_time_min;
104 unsigned long next_time_max;
105 enum { state_jr3_poll,
106 state_jr3_init_wait_for_offset,
107 state_jr3_init_transform_complete,
108 state_jr3_init_set_full_scale_complete,
109 state_jr3_init_use_offset_complete,
110 state_jr3_done
111 } state;
112 int channel_no;
113 int serial_no;
114 int model_no;
115 struct {
116 int length;
1f6325d6 117 struct comedi_krange range;
07b509e6 118 } range[9];
9ced1de6 119 const struct comedi_lrange *range_table_list[8 * 7 + 2];
790c5541 120 unsigned int maxdata_list[8 * 7 + 2];
07b509e6
AB		 121 u16 errors;
122 int retries;
c6a3b7b6 123};
07b509e6 124
c5331be1
FMH		 125/* Hotplug firmware loading stuff */
126
127typedef int comedi_firmware_callback(struct comedi_device *dev,
0a85b6f0 128 const u8 * data, size_t size);
c5331be1
FMH		 129
130static int comedi_load_firmware(struct comedi_device *dev, char *name,
131 comedi_firmware_callback cb)
132{
133 int result = 0;
134 const struct firmware *fw;
135 char *firmware_path;
136 static const char *prefix = "comedi/";
137 struct jr3_pci_dev_private *devpriv = dev->private;
138
139 firmware_path = kmalloc(strlen(prefix) + strlen(name) + 1, GFP_KERNEL);
140 if (!firmware_path) {
141 result = -ENOMEM;
142 } else {
143 firmware_path[0] = '\0';
144 strcat(firmware_path, prefix);
145 strcat(firmware_path, name);
146 result = request_firmware(&fw, firmware_path,
0a85b6f0 147 &devpriv->pci_dev->dev);
c5331be1
FMH		 148 if (result == 0) {
149 if (!cb)
150 result = -EINVAL;
151 else
152 result = cb(dev, fw->data, fw->size);
153 release_firmware(fw);
154 }
155 kfree(firmware_path);
156 }
157 return result;
158}
159
83101a17 160static struct poll_delay_t poll_delay_min_max(int min, int max)
07b509e6 161{
83101a17 162 struct poll_delay_t result;
07b509e6
AB		 163
164 result.min = min;
165 result.max = max;
166 return result;
167}
168
67080790 169static int is_complete(volatile struct jr3_channel *channel)
07b509e6
AB		 170{
171 return get_s16(&channel->command_word0) == 0;
172}
173
6ae9488b 174struct transform_t {
07b509e6
AB		 175 struct {
176 u16 link_type;
177 s16 link_amount;
178 } link[8];
6ae9488b 179};
07b509e6 180
67080790 181static void set_transforms(volatile struct jr3_channel *channel,
0a85b6f0 182 struct transform_t transf, short num)
07b509e6
AB		 183{
184 int i;
185
2696fb57 186 num &= 0x000f; /* Make sure that 0 <= num <= 15 */
07b509e6
AB		 187 for (i = 0; i < 8; i++) {
188
189 set_u16(&channel->transforms[num].link[i].link_type,
190 transf.link[i].link_type);
5f74ea14 191 udelay(1);
07b509e6
AB		 192 set_s16(&channel->transforms[num].link[i].link_amount,
193 transf.link[i].link_amount);
5f74ea14 194 udelay(1);
07b509e6
AB		 195 if (transf.link[i].link_type == end_x_form) {
196 break;
197 }
198 }
199}
200
0a85b6f0
MT		 201static void use_transform(volatile struct jr3_channel *channel,
202 short transf_num)
07b509e6
AB		 203{
204 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
205}
206
67080790 207static void use_offset(volatile struct jr3_channel *channel, short offset_num)
07b509e6
AB		 208{
209 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
210}
211
67080790 212static void set_offset(volatile struct jr3_channel *channel)
07b509e6
AB		 213{
214 set_s16(&channel->command_word0, 0x0700);
215}
216
050509fa 217struct six_axis_t {
07b509e6
AB		 218 s16 fx;
219 s16 fy;
220 s16 fz;
221 s16 mx;
222 s16 my;
223 s16 mz;
050509fa 224};
07b509e6 225
67080790 226static void set_full_scales(volatile struct jr3_channel *channel,
0a85b6f0 227 struct six_axis_t full_scale)
07b509e6
AB		 228{
229 printk("%d %d %d %d %d %d\n",
0a85b6f0
MT		 230 full_scale.fx,
231 full_scale.fy,
232 full_scale.fz, full_scale.mx, full_scale.my, full_scale.mz);
07b509e6
AB		 233 set_s16(&channel->full_scale.fx, full_scale.fx);
234 set_s16(&channel->full_scale.fy, full_scale.fy);
235 set_s16(&channel->full_scale.fz, full_scale.fz);
236 set_s16(&channel->full_scale.mx, full_scale.mx);
237 set_s16(&channel->full_scale.my, full_scale.my);
238 set_s16(&channel->full_scale.mz, full_scale.mz);
239 set_s16(&channel->command_word0, 0x0a00);
240}
241
0a85b6f0
MT		 242static struct six_axis_t get_min_full_scales(volatile struct jr3_channel
243 *channel)
07b509e6 244{
050509fa 245 struct six_axis_t result;
07b509e6
AB		 246 result.fx = get_s16(&channel->min_full_scale.fx);
247 result.fy = get_s16(&channel->min_full_scale.fy);
248 result.fz = get_s16(&channel->min_full_scale.fz);
249 result.mx = get_s16(&channel->min_full_scale.mx);
250 result.my = get_s16(&channel->min_full_scale.my);
251 result.mz = get_s16(&channel->min_full_scale.mz);
252 return result;
253}
254
0a85b6f0
MT		 255static struct six_axis_t get_max_full_scales(volatile struct jr3_channel
256 *channel)
07b509e6 257{
050509fa 258 struct six_axis_t result;
07b509e6
AB		 259 result.fx = get_s16(&channel->max_full_scale.fx);
260 result.fy = get_s16(&channel->max_full_scale.fy);
261 result.fz = get_s16(&channel->max_full_scale.fz);
262 result.mx = get_s16(&channel->max_full_scale.mx);
263 result.my = get_s16(&channel->max_full_scale.my);
264 result.mz = get_s16(&channel->max_full_scale.mz);
265 return result;
266}
267
0a85b6f0
MT		 268static int jr3_pci_ai_insn_read(struct comedi_device *dev,
269 struct comedi_subdevice *s,
270 struct comedi_insn *insn, unsigned int *data)
07b509e6
AB		 271{
272 int result;
c6a3b7b6 273 struct jr3_pci_subdev_private *p;
07b509e6
AB		 274 int channel;
275
276 p = s->private;
277 channel = CR_CHAN(insn->chanspec);
278 if (p == NULL || channel > 57) {
279 result = -EINVAL;
280 } else {
281 int i;
282
283 result = insn->n;
284 if (p->state != state_jr3_done ||
0a85b6f0
MT		 285 (get_u16(&p->channel->errors) & (watch_dog | watch_dog2 |
286 sensor_change))) {
07b509e6
AB		 287 /* No sensor or sensor changed */
288 if (p->state == state_jr3_done) {
289 /* Restart polling */
290 p->state = state_jr3_poll;
291 }
292 result = -EAGAIN;
293 }
294 for (i = 0; i < insn->n; i++) {
295 if (channel < 56) {
296 int axis, filter;
297
298 axis = channel % 8;
299 filter = channel / 8;
300 if (p->state != state_jr3_done) {
301 data[i] = 0;
302 } else {
303 int F = 0;
304 switch (axis) {
305 case 0:{
0a85b6f0
MT		 306 F = get_s16
307 (&p->channel->filter
308 [filter].fx);
07b509e6
AB		 309 }
310 break;
311 case 1:{
0a85b6f0
MT		 312 F = get_s16
313 (&p->channel->filter
314 [filter].fy);
07b509e6
AB		 315 }
316 break;
317 case 2:{
0a85b6f0
MT		 318 F = get_s16
319 (&p->channel->filter
320 [filter].fz);
07b509e6
AB		 321 }
322 break;
323 case 3:{
0a85b6f0
MT		 324 F = get_s16
325 (&p->channel->filter
326 [filter].mx);
07b509e6
AB		 327 }
328 break;
329 case 4:{
0a85b6f0
MT		 330 F = get_s16
331 (&p->channel->filter
332 [filter].my);
07b509e6
AB		 333 }
334 break;
335 case 5:{
0a85b6f0
MT		 336 F = get_s16
337 (&p->channel->filter
338 [filter].mz);
07b509e6
AB		 339 }
340 break;
341 case 6:{
0a85b6f0
MT		 342 F = get_s16
343 (&p->channel->filter
344 [filter].v1);
07b509e6
AB		 345 }
346 break;
347 case 7:{
0a85b6f0
MT		 348 F = get_s16
349 (&p->channel->filter
350 [filter].v2);
07b509e6
AB		 351 }
352 break;
353 }
354 data[i] = F + 0x4000;
355 }
356 } else if (channel == 56) {
357 if (p->state != state_jr3_done) {
358 data[i] = 0;
359 } else {
360 data[i] =
0a85b6f0 361 get_u16(&p->channel->model_no);
07b509e6
AB		 362 }
363 } else if (channel == 57) {
364 if (p->state != state_jr3_done) {
365 data[i] = 0;
366 } else {
367 data[i] =
0a85b6f0 368 get_u16(&p->channel->serial_no);
07b509e6
AB		 369 }
370 }
371 }
372 }
373 return result;
374}
375
da91b269 376static void jr3_pci_open(struct comedi_device *dev)
07b509e6
AB		 377{
378 int i;
217fbbbc 379 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB		 380
381 printk("jr3_pci_open\n");
382 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 383 struct jr3_pci_subdev_private *p;
07b509e6
AB		 384
385 p = dev->subdevices[i].private;
386 if (p) {
387 printk("serial: %p %d (%d)\n", p, p->serial_no,
0a85b6f0 388 p->channel_no);
07b509e6
AB		 389 }
390 }
391}
392
0a85b6f0 393int read_idm_word(const u8 * data, size_t size, int *pos, unsigned int *val)
07b509e6
AB		 394{
395 int result = 0;
396 if (pos != 0 && val != 0) {
2696fb57 397 /* Skip over non hex */
07b509e6
AB		 398 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++) {
399 }
2696fb57 400 /* Collect value */
07b509e6
AB		 401 *val = 0;
402 for (; *pos < size && isxdigit(data[*pos]); (*pos)++) {
403 char ch = tolower(data[*pos]);
404 result = 1;
405 if ('0' <= ch && ch <= '9') {
406 *val = (*val << 4) + (ch - '0');
407 } else if ('a' <= ch && ch <= 'f') {
408 *val = (*val << 4) + (ch - 'a' + 10);
409 }
410 }
411 }
412 return result;
413}
414
0a85b6f0
MT		 415static int jr3_download_firmware(struct comedi_device *dev, const u8 * data,
416 size_t size)
07b509e6
AB		 417{
418 /*
419 * IDM file format is:
420 * { count, address, data <count> } *
421 * ffff
422 */
423 int result, more, pos, OK;
424
425 result = 0;
426 more = 1;
427 pos = 0;
428 OK = 0;
429 while (more) {
430 unsigned int count, addr;
431
432 more = more && read_idm_word(data, size, &pos, &count);
433 if (more && count == 0xffff) {
434 OK = 1;
435 break;
436 }
437 more = more && read_idm_word(data, size, &pos, &addr);
438 while (more && count > 0) {
439 unsigned int dummy;
440 more = more && read_idm_word(data, size, &pos, &dummy);
441 count--;
442 }
443 }
444
445 if (!OK) {
446 result = -ENODATA;
447 } else {
448 int i;
217fbbbc 449 struct jr3_pci_dev_private *p = dev->private;
07b509e6
AB		 450
451 for (i = 0; i < p->n_channels; i++) {
c6a3b7b6 452 struct jr3_pci_subdev_private *sp;
07b509e6
AB		 453
454 sp = dev->subdevices[i].private;
455 more = 1;
456 pos = 0;
457 while (more) {
458 unsigned int count, addr;
459 more = more
0a85b6f0 460 && read_idm_word(data, size, &pos, &count);
07b509e6
AB		 461 if (more && count == 0xffff) {
462 break;
463 }
464 more = more
0a85b6f0 465 && read_idm_word(data, size, &pos, &addr);
07b509e6 466 printk("Loading#%d %4.4x bytes at %4.4x\n", i,
0a85b6f0 467 count, addr);
07b509e6
AB		 468 while (more && count > 0) {
469 if (addr & 0x4000) {
2696fb57 470 /* 16 bit data, never seen in real life!! */
07b509e6
AB		 471 unsigned int data1;
472
473 more = more
0a85b6f0
MT		 474 && read_idm_word(data,
475 size, &pos,
476 &data1);
07b509e6 477 count--;
2696fb57
BP		 478 /* printk("jr3_data, not tested\n"); */
479 /* jr3[addr + 0x20000 * pnum] = data1; */
07b509e6 480 } else {
2696fb57 481 /* Download 24 bit program */
07b509e6
AB		 482 unsigned int data1, data2;
483
484 more = more
0a85b6f0
MT		 485 && read_idm_word(data,
486 size, &pos,
487 &data1);
07b509e6 488 more = more
0a85b6f0
MT		 489 && read_idm_word(data, size,
490 &pos,
491 &data2);
07b509e6
AB		 492 count -= 2;
493 if (more) {
0a85b6f0
MT		 494 set_u16(&p->
495 iobase->channel
496 [i].program_low
07b509e6 497 [addr], data1);
5f74ea14 498 udelay(1);
0a85b6f0
MT		 499 set_u16(&p->
500 iobase->channel
501 [i].program_high
07b509e6 502 [addr], data2);
5f74ea14 503 udelay(1);
07b509e6
AB		 504
505 }
506 }
507 addr++;
508 }
509 }
510 }
511 }
512 return result;
513}
514
da91b269 515static struct poll_delay_t jr3_pci_poll_subdevice(struct comedi_subdevice *s)
07b509e6 516{
83101a17 517 struct poll_delay_t result = poll_delay_min_max(1000, 2000);
c6a3b7b6 518 struct jr3_pci_subdev_private *p = s->private;
b1f68dc1 519 int i;
07b509e6
AB		 520
521 if (p) {
67080790 522 volatile struct jr3_channel *channel = p->channel;
07b509e6
AB		 523 int errors = get_u16(&channel->errors);
524
525 if (errors != p->errors) {
526 printk("Errors: %x -> %x\n", p->errors, errors);
527 p->errors = errors;
528 }
529 if (errors & (watch_dog | watch_dog2 | sensor_change)) {
2696fb57 530 /* Sensor communication lost, force poll mode */
07b509e6
AB		 531 p->state = state_jr3_poll;
532
533 }
534 switch (p->state) {
535 case state_jr3_poll:{
536 u16 model_no = get_u16(&channel->model_no);
537 u16 serial_no = get_u16(&channel->serial_no);
538 if ((errors & (watch_dog | watch_dog2)) ||
0a85b6f0 539 model_no == 0 || serial_no == 0) {
2696fb57
BP		 540/*
541 * Still no sensor, keep on polling. Since it takes up to 10 seconds
542 * for offsets to stabilize, polling each second should suffice.
543 */
07b509e6
AB		 544 result = poll_delay_min_max(1000, 2000);
545 } else {
546 p->retries = 0;
547 p->state =
0a85b6f0 548 state_jr3_init_wait_for_offset;
07b509e6
AB		 549 result = poll_delay_min_max(1000, 2000);
550 }
551 }
552 break;
553 case state_jr3_init_wait_for_offset:{
554 p->retries++;
555 if (p->retries < 10) {
2696fb57 556 /* Wait for offeset to stabilize (< 10 s according to manual) */
07b509e6
AB		 557 result = poll_delay_min_max(1000, 2000);
558 } else {
6ae9488b 559 struct transform_t transf;
07b509e6
AB		 560
561 p->model_no =
0a85b6f0 562 get_u16(&channel->model_no);
07b509e6 563 p->serial_no =
0a85b6f0 564 get_u16(&channel->serial_no);
07b509e6 565
0a85b6f0
MT		 566 printk
567 ("Setting transform for channel %d\n",
568 p->channel_no);
07b509e6 569 printk("Sensor Model = %i\n",
0a85b6f0 570 p->model_no);
07b509e6 571 printk("Sensor Serial = %i\n",
0a85b6f0 572 p->serial_no);
07b509e6 573
2696fb57 574 /* Transformation all zeros */
b1f68dc1
IA		 575 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
576 transf.link[i].link_type =
577 (enum link_types)0;
578 transf.link[i].link_amount = 0;
579 }
07b509e6
AB		 580
581 set_transforms(channel, transf, 0);
582 use_transform(channel, 0);
583 p->state =
0a85b6f0 584 state_jr3_init_transform_complete;
2696fb57 585 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
07b509e6
AB		 586 }
587 } break;
588 case state_jr3_init_transform_complete:{
589 if (!is_complete(channel)) {
0a85b6f0
MT		 590 printk
591 ("state_jr3_init_transform_complete complete = %d\n",
592 is_complete(channel));
07b509e6
AB		 593 result = poll_delay_min_max(20, 100);
594 } else {
2696fb57 595 /* Set full scale */
050509fa
BP		 596 struct six_axis_t min_full_scale;
597 struct six_axis_t max_full_scale;
07b509e6
AB		 598
599 min_full_scale =
0a85b6f0 600 get_min_full_scales(channel);
07b509e6
AB		 601 printk("Obtained Min. Full Scales:\n");
602 printk("%i ", (min_full_scale).fx);
603 printk("%i ", (min_full_scale).fy);
604 printk("%i ", (min_full_scale).fz);
605 printk("%i ", (min_full_scale).mx);
606 printk("%i ", (min_full_scale).my);
607 printk("%i ", (min_full_scale).mz);
608 printk("\n");
609
610 max_full_scale =
0a85b6f0 611 get_max_full_scales(channel);
07b509e6
AB		 612 printk("Obtained Max. Full Scales:\n");
613 printk("%i ", (max_full_scale).fx);
614 printk("%i ", (max_full_scale).fy);
615 printk("%i ", (max_full_scale).fz);
616 printk("%i ", (max_full_scale).mx);
617 printk("%i ", (max_full_scale).my);
618 printk("%i ", (max_full_scale).mz);
619 printk("\n");
620
621 set_full_scales(channel,
0a85b6f0 622 max_full_scale);
07b509e6
AB		 623
624 p->state =
0a85b6f0 625 state_jr3_init_set_full_scale_complete;
2696fb57 626 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
07b509e6
AB		 627 }
628 }
629 break;
630 case state_jr3_init_set_full_scale_complete:{
631 if (!is_complete(channel)) {
0a85b6f0
MT		 632 printk
633 ("state_jr3_init_set_full_scale_complete complete = %d\n",
634 is_complete(channel));
07b509e6
AB		 635 result = poll_delay_min_max(20, 100);
636 } else {
cdc14cd0 637 volatile struct force_array *full_scale;
07b509e6 638
2696fb57 639 /* Use ranges in kN or we will overflow arount 2000N! */
07b509e6
AB		 640 full_scale = &channel->full_scale;
641 p->range[0].range.min =
0a85b6f0 642 -get_s16(&full_scale->fx) * 1000;
07b509e6 643 p->range[0].range.max =
0a85b6f0 644 get_s16(&full_scale->fx) * 1000;
07b509e6 645 p->range[1].range.min =
0a85b6f0 646 -get_s16(&full_scale->fy) * 1000;
07b509e6 647 p->range[1].range.max =
0a85b6f0 648 get_s16(&full_scale->fy) * 1000;
07b509e6 649 p->range[2].range.min =
0a85b6f0 650 -get_s16(&full_scale->fz) * 1000;
07b509e6 651 p->range[2].range.max =
0a85b6f0 652 get_s16(&full_scale->fz) * 1000;
07b509e6 653 p->range[3].range.min =
0a85b6f0 654 -get_s16(&full_scale->mx) * 100;
07b509e6 655 p->range[3].range.max =
0a85b6f0 656 get_s16(&full_scale->mx) * 100;
07b509e6 657 p->range[4].range.min =
0a85b6f0 658 -get_s16(&full_scale->my) * 100;
07b509e6 659 p->range[4].range.max =
0a85b6f0 660 get_s16(&full_scale->my) * 100;
07b509e6 661 p->range[5].range.min =
0a85b6f0 662 -get_s16(&full_scale->mz) * 100;
07b509e6 663 p->range[5].range.max =
0a85b6f0 664 get_s16(&full_scale->mz) * 100;
2696fb57
BP		 665 p->range[6].range.min = -get_s16(&full_scale->v1) * 100; /* ?? */
666 p->range[6].range.max = get_s16(&full_scale->v1) * 100; /* ?? */
667 p->range[7].range.min = -get_s16(&full_scale->v2) * 100; /* ?? */
668 p->range[7].range.max = get_s16(&full_scale->v2) * 100; /* ?? */
07b509e6
AB		 669 p->range[8].range.min = 0;
670 p->range[8].range.max = 65535;
671
672 {
673 int i;
674 for (i = 0; i < 9; i++) {
675 printk("%d %d - %d\n",
0a85b6f0
MT		 676 i,
677 p->
678 range[i].range.
679 min,
680 p->
681 range[i].range.
682 max);
07b509e6
AB		 683 }
684 }
685
686 use_offset(channel, 0);
687 p->state =
0a85b6f0 688 state_jr3_init_use_offset_complete;
2696fb57 689 result = poll_delay_min_max(40, 100); /* Allow 40 ms for completion */
07b509e6
AB		 690 }
691 }
692 break;
693 case state_jr3_init_use_offset_complete:{
694 if (!is_complete(channel)) {
0a85b6f0
MT		 695 printk
696 ("state_jr3_init_use_offset_complete complete = %d\n",
697 is_complete(channel));
07b509e6
AB		 698 result = poll_delay_min_max(20, 100);
699 } else {
0a85b6f0
MT		 700 printk
701 ("Default offsets %d %d %d %d %d %d\n",
702 get_s16(&channel->offsets.fx),
703 get_s16(&channel->offsets.fy),
704 get_s16(&channel->offsets.fz),
705 get_s16(&channel->offsets.mx),
706 get_s16(&channel->offsets.my),
707 get_s16(&channel->offsets.mz));
07b509e6
AB		 708
709 set_s16(&channel->offsets.fx, 0);
710 set_s16(&channel->offsets.fy, 0);
711 set_s16(&channel->offsets.fz, 0);
712 set_s16(&channel->offsets.mx, 0);
713 set_s16(&channel->offsets.my, 0);
714 set_s16(&channel->offsets.mz, 0);
715
716 set_offset(channel);
717
718 p->state = state_jr3_done;
719 }
720 }
721 break;
722 case state_jr3_done:{
723 poll_delay_min_max(10000, 20000);
724 }
725 break;
726 default:{
727 poll_delay_min_max(1000, 2000);
728 }
729 break;
730 }
731 }
732 return result;
733}
734
735static void jr3_pci_poll_dev(unsigned long data)
736{
737 unsigned long flags;
0a85b6f0 738 struct comedi_device *dev = (struct comedi_device *)data;
217fbbbc 739 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB		 740 unsigned long now;
741 int delay;
742 int i;
743
5f74ea14 744 spin_lock_irqsave(&dev->spinlock, flags);
07b509e6
AB		 745 delay = 1000;
746 now = jiffies;
2696fb57 747 /* Poll all channels that are ready to be polled */
07b509e6 748 for (i = 0; i < devpriv->n_channels; i++) {
0a85b6f0
MT		 749 struct jr3_pci_subdev_private *subdevpriv =
750 dev->subdevices[i].private;
07b509e6 751 if (now > subdevpriv->next_time_min) {
83101a17 752 struct poll_delay_t sub_delay;
07b509e6
AB		 753
754 sub_delay = jr3_pci_poll_subdevice(&dev->subdevices[i]);
755 subdevpriv->next_time_min =
0a85b6f0 756 jiffies + msecs_to_jiffies(sub_delay.min);
07b509e6 757 subdevpriv->next_time_max =
0a85b6f0 758 jiffies + msecs_to_jiffies(sub_delay.max);
07b509e6 759 if (sub_delay.max && sub_delay.max < delay) {
2696fb57
BP		 760/*
761* Wake up as late as possible -> poll as many channels as possible
762* at once
763*/
07b509e6
AB		 764 delay = sub_delay.max;
765 }
766 }
767 }
5f74ea14 768 spin_unlock_irqrestore(&dev->spinlock, flags);
07b509e6
AB		 769
770 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
771 add_timer(&devpriv->timer);
772}
773
0a85b6f0
MT		 774static int jr3_pci_attach(struct comedi_device *dev,
775 struct comedi_devconfig *it)
07b509e6
AB		 776{
777 int result = 0;
778 struct pci_dev *card = NULL;
779 int opt_bus, opt_slot, i;
217fbbbc 780 struct jr3_pci_dev_private *devpriv;
07b509e6
AB		 781
782 printk("comedi%d: jr3_pci\n", dev->minor);
783
784 opt_bus = it->options[0];
785 opt_slot = it->options[1];
786
67080790
BP		 787 if (sizeof(struct jr3_channel) != 0xc00) {
788 printk("sizeof(struct jr3_channel) = %x [expected %x]\n",
0a85b6f0 789 (unsigned)sizeof(struct jr3_channel), 0xc00);
07b509e6
AB		 790 return -EINVAL;
791 }
792
217fbbbc 793 result = alloc_private(dev, sizeof(struct jr3_pci_dev_private));
07b509e6
AB		 794 if (result < 0) {
795 return -ENOMEM;
796 }
797 card = NULL;
798 devpriv = dev->private;
799 init_timer(&devpriv->timer);
800 while (1) {
801 card = pci_get_device(PCI_VENDOR_ID_JR3, PCI_ANY_ID, card);
802 if (card == NULL) {
803 /* No card found */
804 break;
805 } else {
806 switch (card->device) {
807 case PCI_DEVICE_ID_JR3_1_CHANNEL:{
808 devpriv->n_channels = 1;
809 }
810 break;
811 case PCI_DEVICE_ID_JR3_2_CHANNEL:{
812 devpriv->n_channels = 2;
813 }
814 break;
815 case PCI_DEVICE_ID_JR3_3_CHANNEL:{
816 devpriv->n_channels = 3;
817 }
818 break;
819 case PCI_DEVICE_ID_JR3_4_CHANNEL:{
820 devpriv->n_channels = 4;
821 }
822 break;
823 default:{
824 devpriv->n_channels = 0;
825 }
826 }
827 if (devpriv->n_channels >= 1) {
828 if (opt_bus == 0 && opt_slot == 0) {
829 /* Take first available card */
830 break;
831 } else if (opt_bus == card->bus->number &&
0a85b6f0 832 opt_slot == PCI_SLOT(card->devfn)) {
07b509e6
AB		 833 /* Take requested card */
834 break;
835 }
836 }
837 }
838 }
839 if (!card) {
840 printk(" no jr3_pci found\n");
841 return -EIO;
842 } else {
843 devpriv->pci_dev = card;
844 dev->board_name = "jr3_pci";
845 }
c3744138
BP		 846
847 result = comedi_pci_enable(card, "jr3_pci");
848 if (result < 0) {
07b509e6
AB		 849 return -EIO;
850 }
c3744138 851
07b509e6 852 devpriv->pci_enabled = 1;
fa5c5f4c
IA		 853 devpriv->iobase = ioremap(pci_resource_start(card, 0),
854 offsetof(struct jr3_t, channel[devpriv->n_channels]));
855 if (!devpriv->iobase)
856 return -ENOMEM;
857
07b509e6
AB		 858 result = alloc_subdevices(dev, devpriv->n_channels);
859 if (result < 0)
860 goto out;
861
862 dev->open = jr3_pci_open;
863 for (i = 0; i < devpriv->n_channels; i++) {
864 dev->subdevices[i].type = COMEDI_SUBD_AI;
865 dev->subdevices[i].subdev_flags = SDF_READABLE | SDF_GROUND;
866 dev->subdevices[i].n_chan = 8 * 7 + 2;
867 dev->subdevices[i].insn_read = jr3_pci_ai_insn_read;
868 dev->subdevices[i].private =
0a85b6f0 869 kzalloc(sizeof(struct jr3_pci_subdev_private), GFP_KERNEL);
07b509e6 870 if (dev->subdevices[i].private) {
c6a3b7b6 871 struct jr3_pci_subdev_private *p;
07b509e6
AB		 872 int j;
873
874 p = dev->subdevices[i].private;
875 p->channel = &devpriv->iobase->channel[i].data;
876 printk("p->channel %p %p (%tx)\n",
0a85b6f0
MT		 877 p->channel, devpriv->iobase,
878 ((char *)(p->channel) -
879 (char *)(devpriv->iobase)));
07b509e6
AB		 880 p->channel_no = i;
881 for (j = 0; j < 8; j++) {
882 int k;
883
884 p->range[j].length = 1;
885 p->range[j].range.min = -1000000;
886 p->range[j].range.max = 1000000;
887 for (k = 0; k < 7; k++) {
888 p->range_table_list[j + k * 8] =
0a85b6f0
MT		 889 (struct comedi_lrange *)&p->
890 range[j];
07b509e6
AB		 891 p->maxdata_list[j + k * 8] = 0x7fff;
892 }
893 }
894 p->range[8].length = 1;
895 p->range[8].range.min = 0;
896 p->range[8].range.max = 65536;
897
898 p->range_table_list[56] =
0a85b6f0 899 (struct comedi_lrange *)&p->range[8];
07b509e6 900 p->range_table_list[57] =
0a85b6f0 901 (struct comedi_lrange *)&p->range[8];
07b509e6
AB		 902 p->maxdata_list[56] = 0xffff;
903 p->maxdata_list[57] = 0xffff;
2696fb57 904 /* Channel specific range and maxdata */
07b509e6
AB		 905 dev->subdevices[i].range_table = 0;
906 dev->subdevices[i].range_table_list =
0a85b6f0 907 p->range_table_list;
07b509e6
AB		 908 dev->subdevices[i].maxdata = 0;
909 dev->subdevices[i].maxdata_list = p->maxdata_list;
910 }
911 }
912
2696fb57 913 /* Reset DSP card */
07b509e6
AB		 914 devpriv->iobase->channel[0].reset = 0;
915
916 result = comedi_load_firmware(dev, "jr3pci.idm", jr3_download_firmware);
917 printk("Firmare load %d\n", result);
918
919 if (result < 0) {
920 goto out;
921 }
2696fb57
BP		 922/*
923 * TODO: use firmware to load preferred offset tables. Suggested
924 * format:
925 * model serial Fx Fy Fz Mx My Mz\n
926 *
927 * comedi_load_firmware(dev, "jr3_offsets_table", jr3_download_firmware);
928 */
07b509e6 929
2696fb57
BP		 930/*
931 * It takes a few milliseconds for software to settle as much as we
932 * can read firmware version
933 */
07b509e6
AB		 934 msleep_interruptible(25);
935 for (i = 0; i < 0x18; i++) {
936 printk("%c",
0a85b6f0
MT		 937 get_u16(&devpriv->iobase->channel[0].
938 data.copyright[i]) >> 8);
07b509e6
AB		 939 }
940
2696fb57 941 /* Start card timer */
07b509e6 942 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 943 struct jr3_pci_subdev_private *p = dev->subdevices[i].private;
07b509e6
AB		 944
945 p->next_time_min = jiffies + msecs_to_jiffies(500);
946 p->next_time_max = jiffies + msecs_to_jiffies(2000);
947 }
948
949 devpriv->timer.data = (unsigned long)dev;
950 devpriv->timer.function = jr3_pci_poll_dev;
951 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
952 add_timer(&devpriv->timer);
953
0a85b6f0 954out:
07b509e6
AB		 955 return result;
956}
957
5d929a71
BH		 958MODULE_FIRMWARE("comedi/jr3pci.idm");
959
da91b269 960static int jr3_pci_detach(struct comedi_device *dev)
07b509e6
AB		 961{
962 int i;
217fbbbc 963 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB		 964
965 printk("comedi%d: jr3_pci: remove\n", dev->minor);
966 if (devpriv) {
967 del_timer_sync(&devpriv->timer);
968
969 if (dev->subdevices) {
970 for (i = 0; i < devpriv->n_channels; i++) {
971 kfree(dev->subdevices[i].private);
972 }
973 }
974
975 if (devpriv->iobase) {
976 iounmap((void *)devpriv->iobase);
977 }
978 if (devpriv->pci_enabled) {
979 comedi_pci_disable(devpriv->pci_dev);
980 }
981
982 if (devpriv->pci_dev) {
983 pci_dev_put(devpriv->pci_dev);
984 }
985 }
986 return 0;
987}
988
989COMEDI_PCI_INITCLEANUP(driver_jr3_pci, jr3_pci_pci_table);
kernel source for telekom puls (alcatel/mediatek)