projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Fix common misspellings
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / comedi / drivers / dmm32at.c
CommitLineData
3c501880
PP		 1/*
2 comedi/drivers/dmm32at.c
3 Diamond Systems mm32at code for a Comedi driver
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23/*
24Driver: dmm32at
25Description: Diamond Systems mm32at driver.
26Devices:
27Author: Perry J. Piplani <perry.j.piplani@nasa.gov>
28Updated: Fri Jun 4 09:13:24 CDT 2004
29Status: experimental
30
31This driver is for the Diamond Systems MM-32-AT board
32http://www.diamondsystems.com/products/diamondmm32at It is being used
33on serveral projects inside NASA, without problems so far. For analog
34input commands, TRIG_EXT is not yet supported at all..
35
36Configuration Options:
37 comedi_config /dev/comedi0 dmm32at baseaddr,irq
38*/
39
25436dc9 40#include <linux/interrupt.h>
3c501880
PP		 41#include "../comedidev.h"
42#include <linux/ioport.h>
43
44/* Board register addresses */
45
46#define DMM32AT_MEMSIZE 0x10
47
48#define DMM32AT_CONV 0x00
49#define DMM32AT_AILSB 0x00
50#define DMM32AT_AUXDOUT 0x01
51#define DMM32AT_AIMSB 0x01
52#define DMM32AT_AILOW 0x02
53#define DMM32AT_AIHIGH 0x03
54
55#define DMM32AT_DACLSB 0x04
56#define DMM32AT_DACSTAT 0x04
57#define DMM32AT_DACMSB 0x05
58
59#define DMM32AT_FIFOCNTRL 0x07
60#define DMM32AT_FIFOSTAT 0x07
61
62#define DMM32AT_CNTRL 0x08
63#define DMM32AT_AISTAT 0x08
64
65#define DMM32AT_INTCLOCK 0x09
66
67#define DMM32AT_CNTRDIO 0x0a
68
69#define DMM32AT_AICONF 0x0b
70#define DMM32AT_AIRBACK 0x0b
71
72#define DMM32AT_CLK1 0x0d
73#define DMM32AT_CLK2 0x0e
74#define DMM32AT_CLKCT 0x0f
75
76#define DMM32AT_DIOA 0x0c
77#define DMM32AT_DIOB 0x0d
78#define DMM32AT_DIOC 0x0e
79#define DMM32AT_DIOCONF 0x0f
80
f7cbd7aa
BP		 81#define dmm_inb(cdev, reg) inb((cdev->iobase)+reg)
82#define dmm_outb(cdev, reg, valu) outb(valu, (cdev->iobase)+reg)
3c501880
PP		 83
84/* Board register values. */
85
86/* DMM32AT_DACSTAT 0x04 */
87#define DMM32AT_DACBUSY 0x80
88
89/* DMM32AT_FIFOCNTRL 0x07 */
90#define DMM32AT_FIFORESET 0x02
91#define DMM32AT_SCANENABLE 0x04
92
93/* DMM32AT_CNTRL 0x08 */
94#define DMM32AT_RESET 0x20
95#define DMM32AT_INTRESET 0x08
96#define DMM32AT_CLKACC 0x00
97#define DMM32AT_DIOACC 0x01
98
99/* DMM32AT_AISTAT 0x08 */
100#define DMM32AT_STATUS 0x80
101
102/* DMM32AT_INTCLOCK 0x09 */
103#define DMM32AT_ADINT 0x80
104#define DMM32AT_CLKSEL 0x03
105
106/* DMM32AT_CNTRDIO 0x0a */
107#define DMM32AT_FREQ12 0x80
108
109/* DMM32AT_AICONF 0x0b */
110#define DMM32AT_RANGE_U10 0x0c
111#define DMM32AT_RANGE_U5 0x0d
112#define DMM32AT_RANGE_B10 0x08
113#define DMM32AT_RANGE_B5 0x00
114#define DMM32AT_SCINT_20 0x00
115#define DMM32AT_SCINT_15 0x10
116#define DMM32AT_SCINT_10 0x20
117#define DMM32AT_SCINT_5 0x30
118
119/* DMM32AT_CLKCT 0x0f */
120#define DMM32AT_CLKCT1 0x56 /* mode3 counter 1 - write low byte only */
121#define DMM32AT_CLKCT2 0xb6 /* mode3 counter 2 - write high and low byte */
122
123/* DMM32AT_DIOCONF 0x0f */
124#define DMM32AT_DIENABLE 0x80
125#define DMM32AT_DIRA 0x10
126#define DMM32AT_DIRB 0x02
127#define DMM32AT_DIRCL 0x01
128#define DMM32AT_DIRCH 0x08
129
130/* board AI ranges in comedi structure */
9ced1de6 131static const struct comedi_lrange dmm32at_airanges = {
3c501880
PP		 132 4,
133 {
0a85b6f0
MT		 134 UNI_RANGE(10),
135 UNI_RANGE(5),
136 BIP_RANGE(10),
137 BIP_RANGE(5),
138 }
3c501880
PP		 139};
140
141/* register values for above ranges */
142static const unsigned char dmm32at_rangebits[] = {
143 DMM32AT_RANGE_U10,
144 DMM32AT_RANGE_U5,
145 DMM32AT_RANGE_B10,
146 DMM32AT_RANGE_B5,
147};
148
149/* only one of these ranges is valid, as set by a jumper on the
150 * board. The application should only use the range set by the jumper
151 */
9ced1de6 152static const struct comedi_lrange dmm32at_aoranges = {
3c501880
PP		 153 4,
154 {
0a85b6f0
MT		 155 UNI_RANGE(10),
156 UNI_RANGE(5),
157 BIP_RANGE(10),
158 BIP_RANGE(5),
159 }
3c501880
PP		 160};
161
162/*
163 * Board descriptions for two imaginary boards. Describing the
164 * boards in this way is optional, and completely driver-dependent.
165 * Some drivers use arrays such as this, other do not.
166 */
38baea3a 167struct dmm32at_board {
3c501880
PP		 168 const char *name;
169 int ai_chans;
170 int ai_bits;
9ced1de6 171 const struct comedi_lrange *ai_ranges;
3c501880
PP		 172 int ao_chans;
173 int ao_bits;
9ced1de6 174 const struct comedi_lrange *ao_ranges;
3c501880
PP		 175 int have_dio;
176 int dio_chans;
38baea3a
BP		 177};
178static const struct dmm32at_board dmm32at_boards[] = {
3c501880 179 {
0a85b6f0
MT		 180 .name = "dmm32at",
181 .ai_chans = 32,
182 .ai_bits = 16,
183 .ai_ranges = &dmm32at_airanges,
184 .ao_chans = 4,
185 .ao_bits = 12,
186 .ao_ranges = &dmm32at_aoranges,
187 .have_dio = 1,
188 .dio_chans = 24,
189 },
3c501880
PP		 190};
191
192/*
193 * Useful for shorthand access to the particular board structure
194 */
38baea3a 195#define thisboard ((const struct dmm32at_board *)dev->board_ptr)
3c501880
PP		 196
197/* this structure is for data unique to this hardware driver. If
198 * several hardware drivers keep similar information in this structure,
71b5f4f1 199 * feel free to suggest moving the variable to the struct comedi_device struct.
3c501880 200 */
39d31e09 201struct dmm32at_private {
3c501880
PP		 202
203 int data;
204 int ai_inuse;
205 unsigned int ai_scans_left;
206
207 /* Used for AO readback */
790c5541 208 unsigned int ao_readback[4];
3c501880
PP		 209 unsigned char dio_config;
210
39d31e09 211};
3c501880
PP		 212
213/*
214 * most drivers define the following macro to make it easy to
215 * access the private structure.
216 */
39d31e09 217#define devpriv ((struct dmm32at_private *)dev->private)
3c501880
PP		 218
219/*
139dfbdf 220 * The struct comedi_driver structure tells the Comedi core module
3c501880
PP		 221 * which functions to call to configure/deconfigure (attach/detach)
222 * the board, and also about the kernel module that contains
223 * the device code.
224 */
0a85b6f0
MT		 225static int dmm32at_attach(struct comedi_device *dev,
226 struct comedi_devconfig *it);
da91b269 227static int dmm32at_detach(struct comedi_device *dev);
139dfbdf 228static struct comedi_driver driver_dmm32at = {
68c3dbff
BP		 229 .driver_name = "dmm32at",
230 .module = THIS_MODULE,
231 .attach = dmm32at_attach,
232 .detach = dmm32at_detach,
3c501880
PP		 233/* It is not necessary to implement the following members if you are
234 * writing a driver for a ISA PnP or PCI card */
235/* Most drivers will support multiple types of boards by
236 * having an array of board structures. These were defined
237 * in dmm32at_boards[] above. Note that the element 'name'
238 * was first in the structure -- Comedi uses this fact to
239 * extract the name of the board without knowing any details
240 * about the structure except for its length.
241 * When a device is attached (by comedi_config), the name
242 * of the device is given to Comedi, and Comedi tries to
243 * match it by going through the list of board names. If
244 * there is a match, the address of the pointer is put
245 * into dev->board_ptr and driver->attach() is called.
246 *
247 * Note that these are not necessary if you can determine
248 * the type of board in software. ISA PnP, PCI, and PCMCIA
249 * devices are such boards.
250 */
68c3dbff
BP		 251 .board_name = &dmm32at_boards[0].name,
252 .offset = sizeof(struct dmm32at_board),
8629efa4 253 .num_names = ARRAY_SIZE(dmm32at_boards),
3c501880
PP		 254};
255
256/* prototypes for driver functions below */
0a85b6f0
MT		 257static int dmm32at_ai_rinsn(struct comedi_device *dev,
258 struct comedi_subdevice *s,
259 struct comedi_insn *insn, unsigned int *data);
260static int dmm32at_ao_winsn(struct comedi_device *dev,
261 struct comedi_subdevice *s,
262 struct comedi_insn *insn, unsigned int *data);
263static int dmm32at_ao_rinsn(struct comedi_device *dev,
264 struct comedi_subdevice *s,
265 struct comedi_insn *insn, unsigned int *data);
266static int dmm32at_dio_insn_bits(struct comedi_device *dev,
267 struct comedi_subdevice *s,
268 struct comedi_insn *insn, unsigned int *data);
269static int dmm32at_dio_insn_config(struct comedi_device *dev,
270 struct comedi_subdevice *s,
271 struct comedi_insn *insn,
272 unsigned int *data);
273static int dmm32at_ai_cmdtest(struct comedi_device *dev,
274 struct comedi_subdevice *s,
275 struct comedi_cmd *cmd);
276static int dmm32at_ai_cmd(struct comedi_device *dev,
277 struct comedi_subdevice *s);
278static int dmm32at_ai_cancel(struct comedi_device *dev,
279 struct comedi_subdevice *s);
3c501880 280static int dmm32at_ns_to_timer(unsigned int *ns, int round);
70265d24 281static irqreturn_t dmm32at_isr(int irq, void *d);
814900c9 282void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec);
3c501880
PP		 283
284/*
285 * Attach is called by the Comedi core to configure the driver
286 * for a particular board. If you specified a board_name array
287 * in the driver structure, dev->board_ptr contains that
288 * address.
289 */
0a85b6f0
MT		 290static int dmm32at_attach(struct comedi_device *dev,
291 struct comedi_devconfig *it)
3c501880
PP		 292{
293 int ret;
34c43922 294 struct comedi_subdevice *s;
3c501880
PP		 295 unsigned char aihi, ailo, fifostat, aistat, intstat, airback;
296 unsigned long iobase;
297 unsigned int irq;
298
299 iobase = it->options[0];
300 irq = it->options[1];
301
27bf0bc9
M		 302 printk(KERN_INFO "comedi%d: dmm32at: attaching\n", dev->minor);
303 printk(KERN_DEBUG "dmm32at: probing at address 0x%04lx, irq %u\n",
304 iobase, irq);
3c501880
PP		 305
306 /* register address space */
307 if (!request_region(iobase, DMM32AT_MEMSIZE, thisboard->name)) {
27bf0bc9
M		 308 printk(KERN_ERR "comedi%d: dmm32at: I/O port conflict\n",
309 dev->minor);
3c501880
PP		 310 return -EIO;
311 }
312 dev->iobase = iobase;
313
314 /* the following just makes sure the board is there and gets
315 it to a known state */
316
317 /* reset the board */
318 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_RESET);
319
320 /* allow a millisecond to reset */
321 udelay(1000);
322
323 /* zero scan and fifo control */
324 dmm_outb(dev, DMM32AT_FIFOCNTRL, 0x0);
325
326 /* zero interrupt and clock control */
327 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
328
329 /* write a test channel range, the high 3 bits should drop */
330 dmm_outb(dev, DMM32AT_AILOW, 0x80);
331 dmm_outb(dev, DMM32AT_AIHIGH, 0xff);
332
333 /* set the range at 10v unipolar */
334 dmm_outb(dev, DMM32AT_AICONF, DMM32AT_RANGE_U10);
335
336 /* should take 10 us to settle, here's a hundred */
337 udelay(100);
338
339 /* read back the values */
340 ailo = dmm_inb(dev, DMM32AT_AILOW);
341 aihi = dmm_inb(dev, DMM32AT_AIHIGH);
342 fifostat = dmm_inb(dev, DMM32AT_FIFOSTAT);
343 aistat = dmm_inb(dev, DMM32AT_AISTAT);
344 intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
345 airback = dmm_inb(dev, DMM32AT_AIRBACK);
346
27bf0bc9 347 printk(KERN_DEBUG "dmm32at: lo=0x%02x hi=0x%02x fifostat=0x%02x\n",
0a85b6f0 348 ailo, aihi, fifostat);
27bf0bc9
M		 349 printk(KERN_DEBUG
350 "dmm32at: aistat=0x%02x intstat=0x%02x airback=0x%02x\n",
0a85b6f0 351 aistat, intstat, airback);
3c501880
PP		 352
353 if ((ailo != 0x00) || (aihi != 0x1f) || (fifostat != 0x80) ||
0a85b6f0 354 (aistat != 0x60 || (intstat != 0x00) || airback != 0x0c)) {
27bf0bc9 355 printk(KERN_ERR "dmmat32: board detection failed\n");
3c501880
PP		 356 return -EIO;
357 }
358
359 /* board is there, register interrupt */
360 if (irq) {
5f74ea14 361 ret = request_irq(irq, dmm32at_isr, 0, thisboard->name, dev);
3c501880 362 if (ret < 0) {
27bf0bc9 363 printk(KERN_ERR "dmm32at: irq conflict\n");
3c501880
PP		 364 return ret;
365 }
366 dev->irq = irq;
367 }
368
369/*
370 * If you can probe the device to determine what device in a series
371 * it is, this is the place to do it. Otherwise, dev->board_ptr
372 * should already be initialized.
373 */
2696fb57 374 /* dev->board_ptr = dmm32at_probe(dev); */
3c501880
PP		 375
376/*
377 * Initialize dev->board_name. Note that we can use the "thisboard"
378 * macro now, since we just initialized it in the last line.
379 */
380 dev->board_name = thisboard->name;
381
382/*
383 * Allocate the private structure area. alloc_private() is a
384 * convenient macro defined in comedidev.h.
385 */
39d31e09 386 if (alloc_private(dev, sizeof(struct dmm32at_private)) < 0)
3c501880
PP		 387 return -ENOMEM;
388
389/*
390 * Allocate the subdevice structures. alloc_subdevice() is a
391 * convenient macro defined in comedidev.h.
392 */
393 if (alloc_subdevices(dev, 3) < 0)
394 return -ENOMEM;
395
396 s = dev->subdevices + 0;
397 dev->read_subdev = s;
398 /* analog input subdevice */
399 s->type = COMEDI_SUBD_AI;
400 /* we support single-ended (ground) and differential */
401 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
402 s->n_chan = thisboard->ai_chans;
403 s->maxdata = (1 << thisboard->ai_bits) - 1;
404 s->range_table = thisboard->ai_ranges;
405 s->len_chanlist = 32; /* This is the maximum chanlist length that
406 the board can handle */
407 s->insn_read = dmm32at_ai_rinsn;
408 s->do_cmd = dmm32at_ai_cmd;
409 s->do_cmdtest = dmm32at_ai_cmdtest;
410 s->cancel = dmm32at_ai_cancel;
411
412 s = dev->subdevices + 1;
413 /* analog output subdevice */
414 s->type = COMEDI_SUBD_AO;
415 s->subdev_flags = SDF_WRITABLE;
416 s->n_chan = thisboard->ao_chans;
417 s->maxdata = (1 << thisboard->ao_bits) - 1;
418 s->range_table = thisboard->ao_ranges;
419 s->insn_write = dmm32at_ao_winsn;
420 s->insn_read = dmm32at_ao_rinsn;
421
422 s = dev->subdevices + 2;
423 /* digital i/o subdevice */
424 if (thisboard->have_dio) {
425
426 /* get access to the DIO regs */
427 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
428 /* set the DIO's to the defualt input setting */
429 devpriv->dio_config = DMM32AT_DIRA | DMM32AT_DIRB |
0a85b6f0 430 DMM32AT_DIRCL | DMM32AT_DIRCH | DMM32AT_DIENABLE;
3c501880
PP		 431 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
432
433 /* set up the subdevice */
434 s->type = COMEDI_SUBD_DIO;
435 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
436 s->n_chan = thisboard->dio_chans;
437 s->maxdata = 1;
438 s->state = 0;
439 s->range_table = &range_digital;
440 s->insn_bits = dmm32at_dio_insn_bits;
441 s->insn_config = dmm32at_dio_insn_config;
442 } else {
443 s->type = COMEDI_SUBD_UNUSED;
444 }
445
446 /* success */
27bf0bc9 447 printk(KERN_INFO "comedi%d: dmm32at: attached\n", dev->minor);
3c501880
PP		 448
449 return 1;
450
451}
452
453/*
454 * _detach is called to deconfigure a device. It should deallocate
455 * resources.
456 * This function is also called when _attach() fails, so it should be
457 * careful not to release resources that were not necessarily
458 * allocated by _attach(). dev->private and dev->subdevices are
459 * deallocated automatically by the core.
460 */
da91b269 461static int dmm32at_detach(struct comedi_device *dev)
3c501880 462{
27bf0bc9 463 printk(KERN_INFO "comedi%d: dmm32at: remove\n", dev->minor);
3c501880 464 if (dev->irq)
5f74ea14 465 free_irq(dev->irq, dev);
3c501880
PP		 466 if (dev->iobase)
467 release_region(dev->iobase, DMM32AT_MEMSIZE);
468
469 return 0;
470}
471
472/*
473 * "instructions" read/write data in "one-shot" or "software-triggered"
474 * mode.
475 */
476
0a85b6f0
MT		 477static int dmm32at_ai_rinsn(struct comedi_device *dev,
478 struct comedi_subdevice *s,
479 struct comedi_insn *insn, unsigned int *data)
3c501880
PP		 480{
481 int n, i;
482 unsigned int d;
483 unsigned char status;
484 unsigned short msb, lsb;
485 unsigned char chan;
486 int range;
487
488 /* get the channel and range number */
489
490 chan = CR_CHAN(insn->chanspec) & (s->n_chan - 1);
491 range = CR_RANGE(insn->chanspec);
492
2696fb57 493 /* printk("channel=0x%02x, range=%d\n",chan,range); */
3c501880
PP		 494
495 /* zero scan and fifo control and reset fifo */
496 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
497
498 /* write the ai channel range regs */
499 dmm_outb(dev, DMM32AT_AILOW, chan);
500 dmm_outb(dev, DMM32AT_AIHIGH, chan);
501 /* set the range bits */
502 dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
503
504 /* wait for circuit to settle */
505 for (i = 0; i < 40000; i++) {
506 status = dmm_inb(dev, DMM32AT_AIRBACK);
507 if ((status & DMM32AT_STATUS) == 0)
508 break;
509 }
510 if (i == 40000) {
27bf0bc9 511 printk(KERN_WARNING "dmm32at: timeout\n");
3c501880
PP		 512 return -ETIMEDOUT;
513 }
514
515 /* convert n samples */
516 for (n = 0; n < insn->n; n++) {
517 /* trigger conversion */
518 dmm_outb(dev, DMM32AT_CONV, 0xff);
519 /* wait for conversion to end */
520 for (i = 0; i < 40000; i++) {
521 status = dmm_inb(dev, DMM32AT_AISTAT);
522 if ((status & DMM32AT_STATUS) == 0)
523 break;
524 }
525 if (i == 40000) {
27bf0bc9 526 printk(KERN_WARNING "dmm32at: timeout\n");
3c501880
PP		 527 return -ETIMEDOUT;
528 }
529
530 /* read data */
531 lsb = dmm_inb(dev, DMM32AT_AILSB);
532 msb = dmm_inb(dev, DMM32AT_AIMSB);
533
534 /* invert sign bit to make range unsigned, this is an
25985edc 535 idiosyncrasy of the diamond board, it return
3c501880
PP		 536 conversions as a signed value, i.e. -32768 to
537 32767, flipping the bit and interpreting it as
538 signed gives you a range of 0 to 65535 which is
539 used by comedi */
540 d = ((msb ^ 0x0080) << 8) + lsb;
541
542 data[n] = d;
543 }
544
545 /* return the number of samples read/written */
546 return n;
547}
548
0a85b6f0
MT		 549static int dmm32at_ai_cmdtest(struct comedi_device *dev,
550 struct comedi_subdevice *s,
551 struct comedi_cmd *cmd)
3c501880
PP		 552{
553 int err = 0;
554 int tmp;
555 int start_chan, gain, i;
556
2696fb57 557 /* printk("dmmat32 in command test\n"); */
3c501880
PP		 558
559 /* cmdtest tests a particular command to see if it is valid.
560 * Using the cmdtest ioctl, a user can create a valid cmd
561 * and then have it executes by the cmd ioctl.
562 *
563 * cmdtest returns 1,2,3,4 or 0, depending on which tests
564 * the command passes. */
565
566 /* step 1: make sure trigger sources are trivially valid */
567
568 tmp = cmd->start_src;
569 cmd->start_src &= TRIG_NOW;
570 if (!cmd->start_src || tmp != cmd->start_src)
571 err++;
572
573 tmp = cmd->scan_begin_src;
574 cmd->scan_begin_src &= TRIG_TIMER /*| TRIG_EXT */ ;
575 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
576 err++;
577
578 tmp = cmd->convert_src;
579 cmd->convert_src &= TRIG_TIMER /*| TRIG_EXT */ ;
580 if (!cmd->convert_src || tmp != cmd->convert_src)
581 err++;
582
583 tmp = cmd->scan_end_src;
584 cmd->scan_end_src &= TRIG_COUNT;
585 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
586 err++;
587
588 tmp = cmd->stop_src;
589 cmd->stop_src &= TRIG_COUNT | TRIG_NONE;
590 if (!cmd->stop_src || tmp != cmd->stop_src)
591 err++;
592
593 if (err)
594 return 1;
595
27bf0bc9
M		 596 /* step 2: make sure trigger sources are unique and mutually
597 * compatible */
3c501880 598
828684f9 599 /* note that mutual compatibility is not an issue here */
3c501880 600 if (cmd->scan_begin_src != TRIG_TIMER &&
0a85b6f0 601 cmd->scan_begin_src != TRIG_EXT)
3c501880
PP		 602 err++;
603 if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
604 err++;
605 if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
606 err++;
607
608 if (err)
609 return 2;
610
611 /* step 3: make sure arguments are trivially compatible */
612
613 if (cmd->start_arg != 0) {
614 cmd->start_arg = 0;
615 err++;
616 }
617#define MAX_SCAN_SPEED 1000000 /* in nanoseconds */
618#define MIN_SCAN_SPEED 1000000000 /* in nanoseconds */
619
620 if (cmd->scan_begin_src == TRIG_TIMER) {
621 if (cmd->scan_begin_arg < MAX_SCAN_SPEED) {
622 cmd->scan_begin_arg = MAX_SCAN_SPEED;
623 err++;
624 }
625 if (cmd->scan_begin_arg > MIN_SCAN_SPEED) {
626 cmd->scan_begin_arg = MIN_SCAN_SPEED;
627 err++;
628 }
629 } else {
630 /* external trigger */
631 /* should be level/edge, hi/lo specification here */
632 /* should specify multiple external triggers */
633 if (cmd->scan_begin_arg > 9) {
634 cmd->scan_begin_arg = 9;
635 err++;
636 }
637 }
638 if (cmd->convert_src == TRIG_TIMER) {
639 if (cmd->convert_arg >= 17500)
640 cmd->convert_arg = 20000;
641 else if (cmd->convert_arg >= 12500)
642 cmd->convert_arg = 15000;
643 else if (cmd->convert_arg >= 7500)
644 cmd->convert_arg = 10000;
645 else
646 cmd->convert_arg = 5000;
647
648 } else {
649 /* external trigger */
650 /* see above */
651 if (cmd->convert_arg > 9) {
652 cmd->convert_arg = 9;
653 err++;
654 }
655 }
656
657 if (cmd->scan_end_arg != cmd->chanlist_len) {
658 cmd->scan_end_arg = cmd->chanlist_len;
659 err++;
660 }
661 if (cmd->stop_src == TRIG_COUNT) {
662 if (cmd->stop_arg > 0xfffffff0) {
663 cmd->stop_arg = 0xfffffff0;
664 err++;
665 }
666 if (cmd->stop_arg == 0) {
667 cmd->stop_arg = 1;
668 err++;
669 }
670 } else {
671 /* TRIG_NONE */
672 if (cmd->stop_arg != 0) {
673 cmd->stop_arg = 0;
674 err++;
675 }
676 }
677
678 if (err)
679 return 3;
680
681 /* step 4: fix up any arguments */
682
683 if (cmd->scan_begin_src == TRIG_TIMER) {
684 tmp = cmd->scan_begin_arg;
685 dmm32at_ns_to_timer(&cmd->scan_begin_arg,
0a85b6f0 686 cmd->flags & TRIG_ROUND_MASK);
3c501880
PP		 687 if (tmp != cmd->scan_begin_arg)
688 err++;
689 }
690 if (cmd->convert_src == TRIG_TIMER) {
691 tmp = cmd->convert_arg;
692 dmm32at_ns_to_timer(&cmd->convert_arg,
0a85b6f0 693 cmd->flags & TRIG_ROUND_MASK);
3c501880
PP		 694 if (tmp != cmd->convert_arg)
695 err++;
696 if (cmd->scan_begin_src == TRIG_TIMER &&
0a85b6f0
MT		 697 cmd->scan_begin_arg <
698 cmd->convert_arg * cmd->scan_end_arg) {
3c501880 699 cmd->scan_begin_arg =
0a85b6f0 700 cmd->convert_arg * cmd->scan_end_arg;
3c501880
PP		 701 err++;
702 }
703 }
704
705 if (err)
706 return 4;
707
708 /* step 5 check the channel list, the channel list for this
709 board must be consecutive and gains must be the same */
710
711 if (cmd->chanlist) {
712 gain = CR_RANGE(cmd->chanlist[0]);
713 start_chan = CR_CHAN(cmd->chanlist[0]);
714 for (i = 1; i < cmd->chanlist_len; i++) {
715 if (CR_CHAN(cmd->chanlist[i]) !=
0a85b6f0 716 (start_chan + i) % s->n_chan) {
3c501880 717 comedi_error(dev,
0a85b6f0 718 "entries in chanlist must be consecutive channels, counting upwards\n");
3c501880
PP		 719 err++;
720 }
721 if (CR_RANGE(cmd->chanlist[i]) != gain) {
722 comedi_error(dev,
0a85b6f0 723 "entries in chanlist must all have the same gain\n");
3c501880
PP		 724 err++;
725 }
726 }
727 }
728
729 if (err)
730 return 5;
731
732 return 0;
733}
734
da91b269 735static int dmm32at_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
3c501880 736{
ea6d0d4c 737 struct comedi_cmd *cmd = &s->async->cmd;
3c501880
PP		 738 int i, range;
739 unsigned char chanlo, chanhi, status;
740
741 if (!cmd->chanlist)
742 return -EINVAL;
743
744 /* get the channel list and range */
745 chanlo = CR_CHAN(cmd->chanlist[0]) & (s->n_chan - 1);
746 chanhi = chanlo + cmd->chanlist_len - 1;
747 if (chanhi >= s->n_chan)
748 return -EINVAL;
749 range = CR_RANGE(cmd->chanlist[0]);
750
751 /* reset fifo */
752 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_FIFORESET);
753
754 /* set scan enable */
755 dmm_outb(dev, DMM32AT_FIFOCNTRL, DMM32AT_SCANENABLE);
756
757 /* write the ai channel range regs */
758 dmm_outb(dev, DMM32AT_AILOW, chanlo);
759 dmm_outb(dev, DMM32AT_AIHIGH, chanhi);
760
761 /* set the range bits */
762 dmm_outb(dev, DMM32AT_AICONF, dmm32at_rangebits[range]);
763
764 /* reset the interrupt just in case */
765 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
766
767 if (cmd->stop_src == TRIG_COUNT)
768 devpriv->ai_scans_left = cmd->stop_arg;
769 else { /* TRIG_NONE */
27bf0bc9
M		 770 devpriv->ai_scans_left = 0xffffffff; /* indicates TRIG_NONE to
771 * isr */
3c501880
PP		 772 }
773
774 /* wait for circuit to settle */
775 for (i = 0; i < 40000; i++) {
776 status = dmm_inb(dev, DMM32AT_AIRBACK);
777 if ((status & DMM32AT_STATUS) == 0)
778 break;
779 }
780 if (i == 40000) {
27bf0bc9 781 printk(KERN_WARNING "dmm32at: timeout\n");
3c501880
PP		 782 return -ETIMEDOUT;
783 }
784
785 if (devpriv->ai_scans_left > 1) {
786 /* start the clock and enable the interrupts */
787 dmm32at_setaitimer(dev, cmd->scan_begin_arg);
788 } else {
789 /* start the interrups and initiate a single scan */
790 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT);
791 dmm_outb(dev, DMM32AT_CONV, 0xff);
792 }
793
27bf0bc9 794/* printk("dmmat32 in command\n"); */
3c501880 795
27bf0bc9
M		 796/* for(i=0;i<cmd->chanlist_len;i++) */
797/* comedi_buf_put(s->async,i*100); */
3c501880 798
27bf0bc9
M		 799/* s->async->events |= COMEDI_CB_EOA; */
800/* comedi_event(dev, s); */
3c501880
PP		 801
802 return 0;
803
804}
805
0a85b6f0
MT		 806static int dmm32at_ai_cancel(struct comedi_device *dev,
807 struct comedi_subdevice *s)
3c501880
PP		 808{
809 devpriv->ai_scans_left = 1;
810 return 0;
811}
812
70265d24 813static irqreturn_t dmm32at_isr(int irq, void *d)
3c501880
PP		 814{
815 unsigned char intstat;
816 unsigned int samp;
817 unsigned short msb, lsb;
818 int i;
71b5f4f1 819 struct comedi_device *dev = d;
3c501880
PP		 820
821 if (!dev->attached) {
822 comedi_error(dev, "spurious interrupt");
823 return IRQ_HANDLED;
824 }
825
826 intstat = dmm_inb(dev, DMM32AT_INTCLOCK);
827
828 if (intstat & DMM32AT_ADINT) {
34c43922 829 struct comedi_subdevice *s = dev->read_subdev;
ea6d0d4c 830 struct comedi_cmd *cmd = &s->async->cmd;
3c501880
PP		 831
832 for (i = 0; i < cmd->chanlist_len; i++) {
833 /* read data */
834 lsb = dmm_inb(dev, DMM32AT_AILSB);
835 msb = dmm_inb(dev, DMM32AT_AIMSB);
836
837 /* invert sign bit to make range unsigned */
838 samp = ((msb ^ 0x0080) << 8) + lsb;
839 comedi_buf_put(s->async, samp);
840 }
841
842 if (devpriv->ai_scans_left != 0xffffffff) { /* TRIG_COUNT */
843 devpriv->ai_scans_left--;
844 if (devpriv->ai_scans_left == 0) {
845 /* disable further interrupts and clocks */
846 dmm_outb(dev, DMM32AT_INTCLOCK, 0x0);
847 /* set the buffer to be flushed with an EOF */
848 s->async->events |= COMEDI_CB_EOA;
849 }
850
851 }
852 /* flush the buffer */
853 comedi_event(dev, s);
854 }
855
856 /* reset the interrupt */
857 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_INTRESET);
858 return IRQ_HANDLED;
859}
860
861/* This function doesn't require a particular form, this is just
862 * what happens to be used in some of the drivers. It should
863 * convert ns nanoseconds to a counter value suitable for programming
864 * the device. Also, it should adjust ns so that it cooresponds to
865 * the actual time that the device will use. */
866static int dmm32at_ns_to_timer(unsigned int *ns, int round)
867{
868 /* trivial timer */
869 /* if your timing is done through two cascaded timers, the
870 * i8253_cascade_ns_to_timer() function in 8253.h can be
871 * very helpful. There are also i8254_load() and i8254_mm_load()
872 * which can be used to load values into the ubiquitous 8254 counters
873 */
874
875 return *ns;
876}
877
0a85b6f0
MT		 878static int dmm32at_ao_winsn(struct comedi_device *dev,
879 struct comedi_subdevice *s,
880 struct comedi_insn *insn, unsigned int *data)
3c501880
PP		 881{
882 int i;
883 int chan = CR_CHAN(insn->chanspec);
884 unsigned char hi, lo, status;
885
886 /* Writing a list of values to an AO channel is probably not
887 * very useful, but that's how the interface is defined. */
888 for (i = 0; i < insn->n; i++) {
889
890 devpriv->ao_readback[chan] = data[i];
891
892 /* get the low byte */
893 lo = data[i] & 0x00ff;
894 /* high byte also contains channel number */
895 hi = (data[i] >> 8) + chan * (1 << 6);
2696fb57 896 /* printk("writing 0x%02x 0x%02x\n",hi,lo); */
3c501880
PP		 897 /* write the low and high values to the board */
898 dmm_outb(dev, DMM32AT_DACLSB, lo);
899 dmm_outb(dev, DMM32AT_DACMSB, hi);
900
901 /* wait for circuit to settle */
902 for (i = 0; i < 40000; i++) {
903 status = dmm_inb(dev, DMM32AT_DACSTAT);
904 if ((status & DMM32AT_DACBUSY) == 0)
905 break;
906 }
907 if (i == 40000) {
27bf0bc9 908 printk(KERN_WARNING "dmm32at: timeout\n");
3c501880
PP		 909 return -ETIMEDOUT;
910 }
911 /* dummy read to update trigger the output */
912 status = dmm_inb(dev, DMM32AT_DACMSB);
913
914 }
915
916 /* return the number of samples read/written */
917 return i;
918}
919
920/* AO subdevices should have a read insn as well as a write insn.
921 * Usually this means copying a value stored in devpriv. */
0a85b6f0
MT		 922static int dmm32at_ao_rinsn(struct comedi_device *dev,
923 struct comedi_subdevice *s,
924 struct comedi_insn *insn, unsigned int *data)
3c501880
PP		 925{
926 int i;
927 int chan = CR_CHAN(insn->chanspec);
928
929 for (i = 0; i < insn->n; i++)
930 data[i] = devpriv->ao_readback[chan];
931
932 return i;
933}
934
935/* DIO devices are slightly special. Although it is possible to
936 * implement the insn_read/insn_write interface, it is much more
937 * useful to applications if you implement the insn_bits interface.
938 * This allows packed reading/writing of the DIO channels. The
939 * comedi core can convert between insn_bits and insn_read/write */
0a85b6f0
MT		 940static int dmm32at_dio_insn_bits(struct comedi_device *dev,
941 struct comedi_subdevice *s,
942 struct comedi_insn *insn, unsigned int *data)
3c501880
PP		 943{
944 unsigned char diobits;
945
946 if (insn->n != 2)
947 return -EINVAL;
948
949 /* The insn data is a mask in data[0] and the new data
950 * in data[1], each channel cooresponding to a bit. */
951 if (data[0]) {
952 s->state &= ~data[0];
953 s->state |= data[0] & data[1];
954 /* Write out the new digital output lines */
2696fb57 955 /* outw(s->state,dev->iobase + DMM32AT_DIO); */
3c501880
PP		 956 }
957
958 /* get access to the DIO regs */
959 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
960
961 /* if either part of dio is set for output */
962 if (((devpriv->dio_config & DMM32AT_DIRCL) == 0) ||
0a85b6f0 963 ((devpriv->dio_config & DMM32AT_DIRCH) == 0)) {
3c501880
PP		 964 diobits = (s->state & 0x00ff0000) >> 16;
965 dmm_outb(dev, DMM32AT_DIOC, diobits);
966 }
967 if ((devpriv->dio_config & DMM32AT_DIRB) == 0) {
968 diobits = (s->state & 0x0000ff00) >> 8;
969 dmm_outb(dev, DMM32AT_DIOB, diobits);
970 }
971 if ((devpriv->dio_config & DMM32AT_DIRA) == 0) {
972 diobits = (s->state & 0x000000ff);
973 dmm_outb(dev, DMM32AT_DIOA, diobits);
974 }
975
976 /* now read the state back in */
977 s->state = dmm_inb(dev, DMM32AT_DIOC);
978 s->state <<= 8;
979 s->state |= dmm_inb(dev, DMM32AT_DIOB);
980 s->state <<= 8;
981 s->state |= dmm_inb(dev, DMM32AT_DIOA);
982 data[1] = s->state;
983
984 /* on return, data[1] contains the value of the digital
985 * input and output lines. */
2696fb57 986 /* data[1]=inw(dev->iobase + DMM32AT_DIO); */
3c501880
PP		 987 /* or we could just return the software copy of the output values if
988 * it was a purely digital output subdevice */
2696fb57 989 /* data[1]=s->state; */
3c501880
PP		 990
991 return 2;
992}
993
0a85b6f0
MT		 994static int dmm32at_dio_insn_config(struct comedi_device *dev,
995 struct comedi_subdevice *s,
996 struct comedi_insn *insn, unsigned int *data)
3c501880
PP		 997{
998 unsigned char chanbit;
999 int chan = CR_CHAN(insn->chanspec);
1000
1001 if (insn->n != 1)
1002 return -EINVAL;
1003
1004 if (chan < 8)
1005 chanbit = DMM32AT_DIRA;
1006 else if (chan < 16)
1007 chanbit = DMM32AT_DIRB;
1008 else if (chan < 20)
1009 chanbit = DMM32AT_DIRCL;
1010 else
1011 chanbit = DMM32AT_DIRCH;
1012
1013 /* The input or output configuration of each digital line is
1014 * configured by a special insn_config instruction. chanspec
1015 * contains the channel to be changed, and data[0] contains the
1016 * value COMEDI_INPUT or COMEDI_OUTPUT. */
1017
1018 /* if output clear the bit, otherwise set it */
20962c10 1019 if (data[0] == COMEDI_OUTPUT)
3c501880 1020 devpriv->dio_config &= ~chanbit;
20962c10 1021 else
3c501880 1022 devpriv->dio_config |= chanbit;
3c501880
PP		 1023 /* get access to the DIO regs */
1024 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_DIOACC);
1025 /* set the DIO's to the new configuration setting */
1026 dmm_outb(dev, DMM32AT_DIOCONF, devpriv->dio_config);
1027
1028 return 1;
1029}
1030
da91b269 1031void dmm32at_setaitimer(struct comedi_device *dev, unsigned int nansec)
3c501880
PP		 1032{
1033 unsigned char lo1, lo2, hi2;
1034 unsigned short both2;
1035
1036 /* based on 10mhz clock */
1037 lo1 = 200;
1038 both2 = nansec / 20000;
1039 hi2 = (both2 & 0xff00) >> 8;
1040 lo2 = both2 & 0x00ff;
1041
1042 /* set the counter frequency to 10mhz */
1043 dmm_outb(dev, DMM32AT_CNTRDIO, 0);
1044
1045 /* get access to the clock regs */
1046 dmm_outb(dev, DMM32AT_CNTRL, DMM32AT_CLKACC);
1047
1048 /* write the counter 1 control word and low byte to counter */
1049 dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT1);
1050 dmm_outb(dev, DMM32AT_CLK1, lo1);
1051
1052 /* write the counter 2 control word and low byte then to counter */
1053 dmm_outb(dev, DMM32AT_CLKCT, DMM32AT_CLKCT2);
1054 dmm_outb(dev, DMM32AT_CLK2, lo2);
1055 dmm_outb(dev, DMM32AT_CLK2, hi2);
1056
1057 /* enable the ai conversion interrupt and the clock to start scans */
1058 dmm_outb(dev, DMM32AT_INTCLOCK, DMM32AT_ADINT | DMM32AT_CLKSEL);
1059
1060}
1061
1062/*
1063 * A convenient macro that defines init_module() and cleanup_module(),
1064 * as necessary.
1065 */
7114a280
AT		 1066static int __init driver_dmm32at_init_module(void)
1067{
1068 return comedi_driver_register(&driver_dmm32at);
1069}
1070
1071static void __exit driver_dmm32at_cleanup_module(void)
1072{
1073 comedi_driver_unregister(&driver_dmm32at);
1074}
1075
1076module_init(driver_dmm32at_init_module);
1077module_exit(driver_dmm32at_cleanup_module);
90f703d3
AT		 1078
1079MODULE_AUTHOR("Comedi http://www.comedi.org");
1080MODULE_DESCRIPTION("Comedi low-level driver");
1081MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)