projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 15d8826a GKH |
1 | /* |
| 2 | * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module. | |
| 3 | * | |
| 4 | * ADDI-DATA GmbH | |
| 5 | * Dieselstrasse 3 | |
| 6 | * D-77833 Ottersweier | |
| 7 | * Tel: +19(0)7223/9493-0 | |
| 8 | * Fax: +49(0)7223/9493-92 | |
| 9 | * http://www.addi-data-com | |
| 10 | * info@addi-data.com | |
| 11 | * | |
| 12 | * This program is free software; you can redistribute it and/or modify it | |
| 13 | * under the terms of the GNU General Public License as published by the Free | |
| 14 | * Software Foundation; either version 2 of the License, or (at your option) | |
| 15 | * any later version. | |
| 16 | */ | |
| c995fe94 | 17 | |
| c995fe94 ADG |
18 | /********* Definitions for APCI-2032 card *****/ |
| 19 | ||
| 20 | // Card Specific information | |
| 21 | #define APCI2032_BOARD_VENDOR_ID 0x15B8 | |
| 22 | #define APCI2032_ADDRESS_RANGE 63 | |
| 23 | ||
| 24 | //DIGITAL INPUT-OUTPUT DEFINE | |
| 25 | ||
| 26 | #define APCI2032_DIGITAL_OP 0 | |
| 27 | #define APCI2032_DIGITAL_OP_RW 0 | |
| 28 | #define APCI2032_DIGITAL_OP_INTERRUPT 4 | |
| 29 | #define APCI2032_DIGITAL_OP_IRQ 12 | |
| 30 | ||
| 31 | //Digital Output Interrupt Status | |
| 32 | #define APCI2032_DIGITAL_OP_INTERRUPT_STATUS 8 | |
| 33 | ||
| 34 | //Digital Output Interrupt Enable Disable. | |
| 35 | #define APCI2032_DIGITAL_OP_VCC_INTERRUPT_ENABLE 0x1 | |
| 36 | #define APCI2032_DIGITAL_OP_VCC_INTERRUPT_DISABLE 0xFFFFFFFE | |
| 37 | #define APCI2032_DIGITAL_OP_CC_INTERRUPT_ENABLE 0x2 | |
| 38 | #define APCI2032_DIGITAL_OP_CC_INTERRUPT_DISABLE 0xFFFFFFFD | |
| 39 | ||
| 40 | //ADDIDATA Enable Disable | |
| 41 | ||
| 42 | #define ADDIDATA_ENABLE 1 | |
| 43 | #define ADDIDATA_DISABLE 0 | |
| 44 | ||
| 45 | // TIMER COUNTER WATCHDOG DEFINES | |
| 46 | ||
| 47 | #define ADDIDATA_WATCHDOG 2 | |
| 48 | #define APCI2032_DIGITAL_OP_WATCHDOG 16 | |
| 49 | #define APCI2032_TCW_RELOAD_VALUE 4 | |
| 50 | #define APCI2032_TCW_TIMEBASE 8 | |
| 51 | #define APCI2032_TCW_PROG 12 | |
| 52 | #define APCI2032_TCW_TRIG_STATUS 16 | |
| 53 | #define APCI2032_TCW_IRQ 20 | |
| 54 | ||
| 55 | // Hardware Layer functions for Apci2032 | |
| 56 | ||
| 57 | //DO | |
| 15d8826a | 58 | int i_APCI2032_ConfigDigitalOutput(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 59 | comedi_insn *insn, unsigned int *data); |
| 15d8826a | 60 | INT i_APCI2032_WriteDigitalOutput(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 61 | comedi_insn *insn, unsigned int *data); |
| 15d8826a | 62 | INT i_APCI2032_ReadDigitalOutput(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 63 | comedi_insn *insn, unsigned int *data); |
| 15d8826a | 64 | int i_APCI2032_ReadInterruptStatus(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 65 | comedi_insn *insn, unsigned int *data); |
| c995fe94 ADG |
66 | |
| 67 | // TIMER | |
| 68 | // timer value is passed as u seconds | |
| 15d8826a | 69 | INT i_APCI2032_ConfigWatchdog(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 70 | comedi_insn *insn, unsigned int *data); |
| 15d8826a | 71 | int i_APCI2032_StartStopWriteWatchdog(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 72 | comedi_insn *insn, unsigned int *data); |
| 15d8826a | 73 | int i_APCI2032_ReadWatchdog(comedi_device *dev, comedi_subdevice *s, |
| 790c5541 | 74 | comedi_insn *insn, unsigned int *data); |
| c995fe94 ADG |
75 | |
| 76 | // Interrupt functions..... | |
| 77 | ||
| 78 | void v_APCI2032_Interrupt(int irq, void *d); | |
| 79 | ||
| 80 | //Reset functions | |
| 15d8826a | 81 | int i_APCI2032_Reset(comedi_device *dev); |