[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / comedi / drivers / addi-data / addi_common.h

/*
 *  Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
 *
 *	ADDI-DATA GmbH
 *	Dieselstrasse 3
 *	D-77833 Ottersweier
 *	Tel: +19(0)7223/9493-0
 *	Fax: +49(0)7223/9493-92
 *	http://www.addi-data.com
 *	info@addi-data.com
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 2 of the License, or (at your option)
 * any later version.
 */

#include <linux/sched.h>
#include <linux/interrupt.h>

#define LOBYTE(W)	(unsigned char)((W) & 0xFF)
#define HIBYTE(W)	(unsigned char)(((W) >> 8) & 0xFF)
#define MAKEWORD(H, L)	(unsigned short)((L) | ((H) << 8))
#define LOWORD(W)	(unsigned short)((W) & 0xFFFF)
#define HIWORD(W)	(unsigned short)(((W) >> 16) & 0xFFFF)
#define MAKEDWORD(H, L)	(unsigned int)((L) | ((H) << 16))

#define ADDI_ENABLE		1
#define ADDI_DISABLE		0
#define APCI1710_SAVE_INTERRUPT	1

#define ADDIDATA_EEPROM		1
#define ADDIDATA_NO_EEPROM	0
#define ADDIDATA_93C76		"93C76"
#define ADDIDATA_S5920		"S5920"
#define ADDIDATA_S5933		"S5933"
#define ADDIDATA_9054		"9054"

/* ADDIDATA Enable Disable */
#define ADDIDATA_ENABLE		1
#define ADDIDATA_DISABLE	0

/* Structures */

/* structure for the boardtype */
struct addi_board {
	const char *pc_DriverName;	/*  driver name */
	int i_IorangeBase1;
	int i_PCIEeprom;	/*  eeprom present or not */
	char *pc_EepromChip;	/*  type of chip */
	int i_NbrAiChannel;	/*  num of A/D chans */
	int i_NbrAiChannelDiff;	/*  num of A/D chans in diff mode */
	int i_AiChannelList;	/*  len of chanlist */
	int i_NbrAoChannel;	/*  num of D/A chans */
	int i_AiMaxdata;	/*  resolution of A/D */
	int i_AoMaxdata;	/*  resolution of D/A */
	const struct comedi_lrange *pr_AiRangelist;	/* rangelist for A/D */
	const struct comedi_lrange *pr_AoRangelist;	/* rangelist for D/A */

	int i_NbrDiChannel;	/*  Number of DI channels */
	int i_NbrDoChannel;	/*  Number of DO channels */
	int i_DoMaxdata;	/*  data to set all channels high */

	int i_NbrTTLChannel;	/*  Number of TTL channels */

	int i_Dma;		/*  dma present or not */
	int i_Timer;		/*    timer subdevice present or not */
	unsigned char b_AvailableConvertUnit;
	unsigned int ui_MinAcquisitiontimeNs;	/*  Minimum Acquisition in Nano secs */
	unsigned int ui_MinDelaytimeNs;	/*  Minimum Delay in Nano secs */

	/* interrupt and reset */
	void (*interrupt)(int irq, void *d);
	int (*reset)(struct comedi_device *);

	/* Subdevice functions */

	/* ANALOG INPUT */
	int (*ai_config)(struct comedi_device *, struct comedi_subdevice *,
			 struct comedi_insn *, unsigned int *);
	int (*ai_read)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);
	int (*ai_write)(struct comedi_device *, struct comedi_subdevice *,
			struct comedi_insn *, unsigned int *);
	int (*ai_bits)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);
	int (*ai_cmdtest)(struct comedi_device *, struct comedi_subdevice *,
			  struct comedi_cmd *);
	int (*ai_cmd)(struct comedi_device *, struct comedi_subdevice *);
	int (*ai_cancel)(struct comedi_device *, struct comedi_subdevice *);

	/* Analog Output */
	int (*ao_config)(struct comedi_device *, struct comedi_subdevice *,
			 struct comedi_insn *, unsigned int *);
	int (*ao_write)(struct comedi_device *, struct comedi_subdevice *,
			struct comedi_insn *, unsigned int *);
	int (*ao_bits)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);

	/* Digital Input */
	int (*di_config)(struct comedi_device *, struct comedi_subdevice *,
			 struct comedi_insn *, unsigned int *);
	int (*di_read)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);
	int (*di_write)(struct comedi_device *, struct comedi_subdevice *,
			struct comedi_insn *, unsigned int *);
	int (*di_bits)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);

	/* Digital Output */
	int (*do_config)(struct comedi_device *, struct comedi_subdevice *,
			 struct comedi_insn *, unsigned int *);
	int (*do_write)(struct comedi_device *, struct comedi_subdevice *,
			struct comedi_insn *, unsigned int *);
	int (*do_bits)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);
	int (*do_read)(struct comedi_device *, struct comedi_subdevice *,
		       struct comedi_insn *, unsigned int *);

	/* TIMER */
	int (*timer_config)(struct comedi_device *, struct comedi_subdevice *,
			    struct comedi_insn *, unsigned int *);
	int (*timer_write)(struct comedi_device *, struct comedi_subdevice *,
			   struct comedi_insn *, unsigned int *);
	int (*timer_read)(struct comedi_device *, struct comedi_subdevice *,
			  struct comedi_insn *, unsigned int *);
	int (*timer_bits)(struct comedi_device *, struct comedi_subdevice *,
			  struct comedi_insn *, unsigned int *);

	/* TTL IO */
	int (*ttl_config)(struct comedi_device *, struct comedi_subdevice *,
			  struct comedi_insn *, unsigned int *);
	int (*ttl_bits)(struct comedi_device *, struct comedi_subdevice *,
			struct comedi_insn *, unsigned int *);
	int (*ttl_read)(struct comedi_device *, struct comedi_subdevice *,
			struct comedi_insn *, unsigned int *);
	int (*ttl_write)(struct comedi_device *, struct comedi_subdevice *,
			 struct comedi_insn *, unsigned int *);
};

/* MODULE INFO STRUCTURE */

union str_ModuleInfo {
	/* Incremental counter infos */
	struct {
		union {
			struct {
				unsigned char b_ModeRegister1;
				unsigned char b_ModeRegister2;
				unsigned char b_ModeRegister3;
				unsigned char b_ModeRegister4;
			} s_ByteModeRegister;
			unsigned int dw_ModeRegister1_2_3_4;
		} s_ModeRegister;

		struct {
			unsigned int b_IndexInit:1;
			unsigned int b_CounterInit:1;
			unsigned int b_ReferenceInit:1;
			unsigned int b_IndexInterruptOccur:1;
			unsigned int b_CompareLogicInit:1;
			unsigned int b_FrequencyMeasurementInit:1;
			unsigned int b_FrequencyMeasurementEnable:1;
		} s_InitFlag;

	} s_SiemensCounterInfo;

	/* SSI infos */
	struct {
		unsigned char b_SSIProfile;
		unsigned char b_PositionTurnLength;
		unsigned char b_TurnCptLength;
		unsigned char b_SSIInit;
	} s_SSICounterInfo;

	/* TTL I/O infos */
	struct {
		unsigned char b_TTLInit;
		unsigned char b_PortConfiguration[4];
	} s_TTLIOInfo;

	/* Digital I/O infos */
	struct {
		unsigned char b_DigitalInit;
		unsigned char b_ChannelAMode;
		unsigned char b_ChannelBMode;
		unsigned char b_OutputMemoryEnabled;
		unsigned int dw_OutputMemory;
	} s_DigitalIOInfo;

      /*********************/
	/* 82X54 timer infos */
      /*********************/

	struct {
		struct {
			unsigned char b_82X54Init;
			unsigned char b_InputClockSelection;
			unsigned char b_InputClockLevel;
			unsigned char b_OutputLevel;
			unsigned char b_HardwareGateLevel;
			unsigned int dw_ConfigurationWord;
		} s_82X54TimerInfo[3];
		unsigned char b_InterruptMask;
	} s_82X54ModuleInfo;

      /*********************/
	/* Chronometer infos */
      /*********************/

	struct {
		unsigned char b_ChronoInit;
		unsigned char b_InterruptMask;
		unsigned char b_PCIInputClock;
		unsigned char b_TimingUnit;
		unsigned char b_CycleMode;
		double d_TimingInterval;
		unsigned int dw_ConfigReg;
	} s_ChronoModuleInfo;

      /***********************/
	/* Pulse encoder infos */
      /***********************/

	struct {
		struct {
			unsigned char b_PulseEncoderInit;
		} s_PulseEncoderInfo[4];
		unsigned int dw_SetRegister;
		unsigned int dw_ControlRegister;
		unsigned int dw_StatusRegister;
	} s_PulseEncoderModuleInfo;

	/* Tor conter infos */
	struct {
		struct {
			unsigned char b_TorCounterInit;
			unsigned char b_TimingUnit;
			unsigned char b_InterruptEnable;
			double d_TimingInterval;
			unsigned int ul_RealTimingInterval;
		} s_TorCounterInfo[2];
		unsigned char b_PCIInputClock;
	} s_TorCounterModuleInfo;

	/* PWM infos */
	struct {
		struct {
			unsigned char b_PWMInit;
			unsigned char b_TimingUnit;
			unsigned char b_InterruptEnable;
			double d_LowTiming;
			double d_HighTiming;
			unsigned int ul_RealLowTiming;
			unsigned int ul_RealHighTiming;
		} s_PWMInfo[2];
		unsigned char b_ClockSelection;
	} s_PWMModuleInfo;

	/* ETM infos */
	struct {
		struct {
			unsigned char b_ETMEnable;
			unsigned char b_ETMInterrupt;
		} s_ETMInfo[2];
		unsigned char b_ETMInit;
		unsigned char b_TimingUnit;
		unsigned char b_ClockSelection;
		double d_TimingInterval;
		unsigned int ul_Timing;
	} s_ETMModuleInfo;

	/* CDA infos */
	struct {
		unsigned char b_CDAEnable;
		unsigned char b_CDAInterrupt;
		unsigned char b_CDAInit;
		unsigned char b_FctSelection;
		unsigned char b_CDAReadFIFOOverflow;
	} s_CDAModuleInfo;

};

/* Private structure for the addi_apci3120 driver */
struct addi_private {

	int iobase;
	int i_IobaseAmcc;	/*  base+size for AMCC chip */
	int i_IobaseAddon;	/* addon base address */
	int i_IobaseReserved;
	void __iomem *dw_AiBase;
	unsigned char b_AiContinuous;	/*  we do unlimited AI */
	unsigned char b_AiInitialisation;
	unsigned int ui_AiActualScan;	/* how many scans we finished */
	unsigned int ui_AiBufferPtr;	/*  data buffer ptr in samples */
	unsigned int ui_AiNbrofChannels;	/*  how many channels is measured */
	unsigned int ui_AiScanLength;	/*  Length of actual scanlist */
	unsigned int ui_AiActualScanPosition;	/*  position in actual scan */
	unsigned int *pui_AiChannelList;	/*  actual chanlist */
	unsigned int ui_AiChannelList[32];	/*  actual chanlist */
	unsigned char b_AiChannelConfiguration[32];	/*  actual chanlist */
	unsigned int ui_AiReadData[32];
	unsigned int dw_AiInitialised;
	unsigned int ui_AiTimer0;	/* Timer Constant for Timer0 */
	unsigned int ui_AiTimer1;	/* Timer constant for Timer1 */
	unsigned int ui_AiFlags;
	unsigned int ui_AiDataLength;
	short *AiData;	/*  Pointer to sample data */
	unsigned int ui_AiNbrofScans;	/*  number of scans to do */
	unsigned short us_UseDma;	/*  To use Dma or not */
	unsigned char b_DmaDoubleBuffer;	/*  we can use double buffering */
	unsigned int ui_DmaActualBuffer;	/*  which buffer is used now */
	/* UPDATE-0.7.57->0.7.68 */
	/* unsigned int               ul_DmaBufferVirtual[2]; pointers to begin of DMA buffer */
	short *ul_DmaBufferVirtual[2];	/*  pointers to begin of DMA buffer */
	unsigned int ul_DmaBufferHw[2];	/*  hw address of DMA buff */
	unsigned int ui_DmaBufferSize[2];	/*  size of dma buffer in bytes */
	unsigned int ui_DmaBufferUsesize[2];	/*  which size we may now used for transfer */
	unsigned int ui_DmaBufferSamples[2];	/*  size in samples */
	unsigned int ui_DmaBufferPages[2];	/*  number of pages in buffer */
	unsigned char b_DigitalOutputRegister;	/*  Digital Output Register */
	unsigned char b_OutputMemoryStatus;
	unsigned char b_AnalogInputChannelNbr;	/*  Analog input channel Nbr */
	unsigned char b_AnalogOutputChannelNbr;	/*  Analog input Output  Nbr */
	unsigned char b_TimerSelectMode;	/*  Contain data written at iobase + 0C */
	unsigned char b_ModeSelectRegister;	/*  Contain data written at iobase + 0E */
	unsigned short us_OutputRegister;	/*  Contain data written at iobase + 0 */
	unsigned char b_InterruptState;
	unsigned char b_TimerInit;	/*  Specify if InitTimerWatchdog was load */
	unsigned char b_TimerStarted;	/*  Specify if timer 2 is running or not */
	unsigned char b_Timer2Mode;	/*  Specify the timer 2 mode */
	unsigned char b_Timer2Interrupt;	/* Timer2  interrupt enable or disable */
	unsigned char b_AiCyclicAcquisition;	/*  indicate cyclic acquisition */
	unsigned char b_InterruptMode;	/*  eoc eos or dma */
	unsigned char b_EocEosInterrupt;	/*  Enable disable eoc eos interrupt */
	unsigned int ui_EocEosConversionTime;
	unsigned char b_EocEosConversionTimeBase;
	unsigned char b_SingelDiff;
	unsigned char b_ExttrigEnable;	/* To enable or disable external trigger */

	/* Pointer to the current process */
	struct task_struct *tsk_Current;

	/* Hardware board infos for 1710 */
	struct {
		unsigned int ui_Address;	/* Board address */
		unsigned int ui_FlashAddress;
		unsigned char b_InterruptNbr;	/* Board interrupt number */
		unsigned char b_SlotNumber;	/* PCI slot number */
		unsigned char b_BoardVersion;
		unsigned int dw_MolduleConfiguration[4];	/* Module config */
	} s_BoardInfos;

	/* Interrupt infos */
	struct {
		unsigned int ul_InterruptOccur;	/* 0   : No interrupt occur */
						/* > 0 : Interrupt occur */
		unsigned int ui_Read;	/* Read FIFO */
		unsigned int ui_Write;	/* Write FIFO */
		struct {
			unsigned char b_OldModuleMask;
			unsigned int ul_OldInterruptMask;	/* Interrupt mask */
			unsigned int ul_OldCounterLatchValue;	/* Interrupt counter value */
		} s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT];
	} s_InterruptParameters;

	union str_ModuleInfo s_ModuleInfo[4];
	unsigned int ul_TTLPortConfiguration[10];

	/* Parameters read from EEPROM overriding static board info */
	struct {
		int i_NbrAiChannel;	/*  num of A/D chans */
		int i_NbrAoChannel;	/*  num of D/A chans */
		int i_AiMaxdata;	/*  resolution of A/D */
		int i_AoMaxdata;	/*  resolution of D/A */
		int i_NbrDiChannel;	/*  Number of DI channels */
		int i_NbrDoChannel;	/*  Number of DO channels */
		int i_DoMaxdata;	/*  data to set all channels high */
		int i_Dma;		/*  dma present or not */
		int i_Timer;		/*  timer subdevice present or not */
		unsigned int ui_MinAcquisitiontimeNs;
					/*  Minimum Acquisition in Nano secs */
		unsigned int ui_MinDelaytimeNs;
					/*  Minimum Delay in Nano secs */
	} s_EeParameters;
};
Commit	Line	Data
c995fe94	1	/*
15d8826a GKH	2	* Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
	3	*
	4	* ADDI-DATA GmbH
	5	* Dieselstrasse 3
	6	* D-77833 Ottersweier
	7	* Tel: +19(0)7223/9493-0
	8	* Fax: +49(0)7223/9493-92
25417922	9	* http://www.addi-data.com
15d8826a GKH	10	* info@addi-data.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify it
	13	* under the terms of the GNU General Public License as published by the Free
	14	* Software Foundation; either version 2 of the License, or (at your option)
	15	* any later version.
	16	*/
c995fe94	17
c995fe94	18	#include <linux/sched.h>
c995fe94	19	#include <linux/interrupt.h>
c995fe94	20
1783fbfe BP	21	#define LOBYTE(W) (unsigned char)((W) & 0xFF)
1783fbfe BP	22	#define HIBYTE(W) (unsigned char)(((W) >> 8) & 0xFF)
a9fce7c9 BP	23	#define MAKEWORD(H, L) (unsigned short)((L) \| ((H) << 8))
	24	#define LOWORD(W) (unsigned short)((W) & 0xFFFF)
	25	#define HIWORD(W) (unsigned short)(((W) >> 16) & 0xFFFF)
117102b0	26	#define MAKEDWORD(H, L) (unsigned int)((L) \| ((H) << 16))
15d8826a GKH	27
	28	#define ADDI_ENABLE 1
	29	#define ADDI_DISABLE 0
	30	#define APCI1710_SAVE_INTERRUPT 1
	31
	32	#define ADDIDATA_EEPROM 1
	33	#define ADDIDATA_NO_EEPROM 0
	34	#define ADDIDATA_93C76 "93C76"
	35	#define ADDIDATA_S5920 "S5920"
	36	#define ADDIDATA_S5933 "S5933"
	37	#define ADDIDATA_9054 "9054"
	38
	39	/* ADDIDATA Enable Disable */
	40	#define ADDIDATA_ENABLE 1
	41	#define ADDIDATA_DISABLE 0
	42
	43	/* Structures */
	44
	45	/* structure for the boardtype */
6a770eca	46	struct addi_board {
2696fb57	47	const char pc_DriverName; / driver name */
74b894e5	48	int i_IorangeBase1;
2696fb57 BP	49	int i_PCIEeprom; /* eeprom present or not */
	50	char pc_EepromChip; / type of chip */
	51	int i_NbrAiChannel; /* num of A/D chans */
	52	int i_NbrAiChannelDiff; /* num of A/D chans in diff mode */
	53	int i_AiChannelList; /* len of chanlist */
	54	int i_NbrAoChannel; /* num of D/A chans */
	55	int i_AiMaxdata; /* resolution of A/D */
	56	int i_AoMaxdata; /* resolution of D/A */
a9ecb5bb AG	57	const struct comedi_lrange pr_AiRangelist; / rangelist for A/D */
a9ecb5bb AG	58	const struct comedi_lrange pr_AoRangelist; / rangelist for D/A */
c995fe94	59
2696fb57 BP	60	int i_NbrDiChannel; /* Number of DI channels */
2696fb57 BP	61	int i_NbrDoChannel; /* Number of DO channels */
bbc9a991	62	int i_DoMaxdata; /* data to set all channels high */
c995fe94	63
2696fb57	64	int i_NbrTTLChannel; /* Number of TTL channels */
c995fe94	65
2696fb57 BP	66	int i_Dma; /* dma present or not */
2696fb57 BP	67	int i_Timer; /* timer subdevice present or not */
1783fbfe	68	unsigned char b_AvailableConvertUnit;
2696fb57 BP	69	unsigned int ui_MinAcquisitiontimeNs; /* Minimum Acquisition in Nano secs */
2696fb57 BP	70	unsigned int ui_MinDelaytimeNs; /* Minimum Delay in Nano secs */
c995fe94	71
15d8826a	72	/* interrupt and reset */
a19fb006 HS	73	void (interrupt)(int irq, void d);
a19fb006 HS	74	int (reset)(struct comedi_device );
15d8826a GKH	75
	76	/* Subdevice functions */
	77
	78	/* ANALOG INPUT */
a19fb006 HS	79	int (ai_config)(struct comedi_device , struct comedi_subdevice *,
	80	struct comedi_insn , unsigned int );
	81	int (ai_read)(struct comedi_device , struct comedi_subdevice *,
	82	struct comedi_insn , unsigned int );
	83	int (ai_write)(struct comedi_device , struct comedi_subdevice *,
	84	struct comedi_insn , unsigned int );
	85	int (ai_bits)(struct comedi_device , struct comedi_subdevice *,
	86	struct comedi_insn , unsigned int );
	87	int (ai_cmdtest)(struct comedi_device , struct comedi_subdevice *,
	88	struct comedi_cmd *);
	89	int (ai_cmd)(struct comedi_device , struct comedi_subdevice *);
	90	int (ai_cancel)(struct comedi_device , struct comedi_subdevice *);
15d8826a GKH	91
15d8826a GKH	92	/* Analog Output */
a19fb006 HS	93	int (ao_config)(struct comedi_device , struct comedi_subdevice *,
	94	struct comedi_insn , unsigned int );
	95	int (ao_write)(struct comedi_device , struct comedi_subdevice *,
	96	struct comedi_insn , unsigned int );
	97	int (ao_bits)(struct comedi_device , struct comedi_subdevice *,
	98	struct comedi_insn , unsigned int );
15d8826a GKH	99
15d8826a GKH	100	/* Digital Input */
a19fb006 HS	101	int (di_config)(struct comedi_device , struct comedi_subdevice *,
	102	struct comedi_insn , unsigned int );
	103	int (di_read)(struct comedi_device , struct comedi_subdevice *,
	104	struct comedi_insn , unsigned int );
	105	int (di_write)(struct comedi_device , struct comedi_subdevice *,
	106	struct comedi_insn , unsigned int );
	107	int (di_bits)(struct comedi_device , struct comedi_subdevice *,
	108	struct comedi_insn , unsigned int );
15d8826a GKH	109
15d8826a GKH	110	/* Digital Output */
a19fb006 HS	111	int (do_config)(struct comedi_device , struct comedi_subdevice *,
	112	struct comedi_insn , unsigned int );
	113	int (do_write)(struct comedi_device , struct comedi_subdevice *,
	114	struct comedi_insn , unsigned int );
	115	int (do_bits)(struct comedi_device , struct comedi_subdevice *,
	116	struct comedi_insn , unsigned int );
	117	int (do_read)(struct comedi_device , struct comedi_subdevice *,
	118	struct comedi_insn , unsigned int );
15d8826a GKH	119
15d8826a GKH	120	/* TIMER */
a19fb006 HS	121	int (timer_config)(struct comedi_device , struct comedi_subdevice *,
	122	struct comedi_insn , unsigned int );
	123	int (timer_write)(struct comedi_device , struct comedi_subdevice *,
	124	struct comedi_insn , unsigned int );
	125	int (timer_read)(struct comedi_device , struct comedi_subdevice *,
	126	struct comedi_insn , unsigned int );
	127	int (timer_bits)(struct comedi_device , struct comedi_subdevice *,
	128	struct comedi_insn , unsigned int );
15d8826a GKH	129
15d8826a GKH	130	/* TTL IO */
a19fb006 HS	131	int (ttl_config)(struct comedi_device , struct comedi_subdevice *,
	132	struct comedi_insn , unsigned int );
	133	int (ttl_bits)(struct comedi_device , struct comedi_subdevice *,
	134	struct comedi_insn , unsigned int );
	135	int (ttl_read)(struct comedi_device , struct comedi_subdevice *,
	136	struct comedi_insn , unsigned int );
	137	int (ttl_write)(struct comedi_device , struct comedi_subdevice *,
	138	struct comedi_insn , unsigned int );
6a770eca	139	};
c995fe94	140
b4ce4f16	141	/* MODULE INFO STRUCTURE */
c995fe94	142
b4ce4f16	143	union str_ModuleInfo {
c995fe94	144	/* Incremental counter infos */
c995fe94 ADG	145	struct {
	146	union {
	147	struct {
1783fbfe BP	148	unsigned char b_ModeRegister1;
	149	unsigned char b_ModeRegister2;
	150	unsigned char b_ModeRegister3;
	151	unsigned char b_ModeRegister4;
c995fe94	152	} s_ByteModeRegister;
756e9d7c	153	unsigned int dw_ModeRegister1_2_3_4;
c995fe94 ADG	154	} s_ModeRegister;
	155
	156	struct {
	157	unsigned int b_IndexInit:1;
	158	unsigned int b_CounterInit:1;
	159	unsigned int b_ReferenceInit:1;
	160	unsigned int b_IndexInterruptOccur:1;
	161	unsigned int b_CompareLogicInit:1;
	162	unsigned int b_FrequencyMeasurementInit:1;
	163	unsigned int b_FrequencyMeasurementEnable:1;
	164	} s_InitFlag;
	165
	166	} s_SiemensCounterInfo;
	167
c995fe94	168	/* SSI infos */
c995fe94	169	struct {
1783fbfe BP	170	unsigned char b_SSIProfile;
	171	unsigned char b_PositionTurnLength;
	172	unsigned char b_TurnCptLength;
	173	unsigned char b_SSIInit;
c995fe94 ADG	174	} s_SSICounterInfo;
c995fe94 ADG	175
c995fe94	176	/* TTL I/O infos */
c995fe94	177	struct {
1783fbfe BP	178	unsigned char b_TTLInit;
1783fbfe BP	179	unsigned char b_PortConfiguration[4];
c995fe94 ADG	180	} s_TTLIOInfo;
c995fe94 ADG	181
c995fe94	182	/* Digital I/O infos */
c995fe94	183	struct {
1783fbfe BP	184	unsigned char b_DigitalInit;
	185	unsigned char b_ChannelAMode;
	186	unsigned char b_ChannelBMode;
	187	unsigned char b_OutputMemoryEnabled;
756e9d7c	188	unsigned int dw_OutputMemory;
c995fe94 ADG	189	} s_DigitalIOInfo;
	190
	191	/*********************/
	192	/* 82X54 timer infos */
	193	/*********************/
	194
	195	struct {
	196	struct {
1783fbfe BP	197	unsigned char b_82X54Init;
	198	unsigned char b_InputClockSelection;
	199	unsigned char b_InputClockLevel;
	200	unsigned char b_OutputLevel;
	201	unsigned char b_HardwareGateLevel;
756e9d7c	202	unsigned int dw_ConfigurationWord;
c995fe94	203	} s_82X54TimerInfo[3];
1783fbfe	204	unsigned char b_InterruptMask;
c995fe94 ADG	205	} s_82X54ModuleInfo;
	206
	207	/*********************/
	208	/* Chronometer infos */
	209	/*********************/
	210
	211	struct {
1783fbfe BP	212	unsigned char b_ChronoInit;
	213	unsigned char b_InterruptMask;
	214	unsigned char b_PCIInputClock;
	215	unsigned char b_TimingUnit;
	216	unsigned char b_CycleMode;
c995fe94	217	double d_TimingInterval;
756e9d7c	218	unsigned int dw_ConfigReg;
c995fe94 ADG	219	} s_ChronoModuleInfo;
	220
	221	/***********************/
	222	/* Pulse encoder infos */
	223	/***********************/
	224
	225	struct {
	226	struct {
1783fbfe	227	unsigned char b_PulseEncoderInit;
c995fe94	228	} s_PulseEncoderInfo[4];
756e9d7c BP	229	unsigned int dw_SetRegister;
	230	unsigned int dw_ControlRegister;
	231	unsigned int dw_StatusRegister;
c995fe94 ADG	232	} s_PulseEncoderModuleInfo;
c995fe94 ADG	233
c995fe94	234	/* Tor conter infos */
c995fe94 ADG	235	struct {
c995fe94 ADG	236	struct {
1783fbfe BP	237	unsigned char b_TorCounterInit;
	238	unsigned char b_TimingUnit;
	239	unsigned char b_InterruptEnable;
c995fe94	240	double d_TimingInterval;
82a6e2e7	241	unsigned int ul_RealTimingInterval;
c995fe94	242	} s_TorCounterInfo[2];
1783fbfe	243	unsigned char b_PCIInputClock;
c995fe94 ADG	244	} s_TorCounterModuleInfo;
c995fe94 ADG	245
c995fe94	246	/* PWM infos */
c995fe94 ADG	247	struct {
c995fe94 ADG	248	struct {
1783fbfe BP	249	unsigned char b_PWMInit;
	250	unsigned char b_TimingUnit;
	251	unsigned char b_InterruptEnable;
c995fe94 ADG	252	double d_LowTiming;
c995fe94 ADG	253	double d_HighTiming;
82a6e2e7 BP	254	unsigned int ul_RealLowTiming;
82a6e2e7 BP	255	unsigned int ul_RealHighTiming;
c995fe94	256	} s_PWMInfo[2];
1783fbfe	257	unsigned char b_ClockSelection;
c995fe94 ADG	258	} s_PWMModuleInfo;
c995fe94 ADG	259
c995fe94	260	/* ETM infos */
c995fe94 ADG	261	struct {
c995fe94 ADG	262	struct {
1783fbfe BP	263	unsigned char b_ETMEnable;
1783fbfe BP	264	unsigned char b_ETMInterrupt;
c995fe94	265	} s_ETMInfo[2];
1783fbfe BP	266	unsigned char b_ETMInit;
	267	unsigned char b_TimingUnit;
	268	unsigned char b_ClockSelection;
c995fe94	269	double d_TimingInterval;
82a6e2e7	270	unsigned int ul_Timing;
c995fe94 ADG	271	} s_ETMModuleInfo;
c995fe94 ADG	272
c995fe94	273	/* CDA infos */
c995fe94	274	struct {
1783fbfe BP	275	unsigned char b_CDAEnable;
	276	unsigned char b_CDAInterrupt;
	277	unsigned char b_CDAInit;
	278	unsigned char b_FctSelection;
	279	unsigned char b_CDAReadFIFOOverflow;
c995fe94 ADG	280	} s_CDAModuleInfo;
c995fe94 ADG	281
b4ce4f16	282	};
c995fe94	283
15d8826a	284	/* Private structure for the addi_apci3120 driver */
e320671e	285	struct addi_private {
c995fe94	286
74b894e5	287	int iobase;
2696fb57 BP	288	int i_IobaseAmcc; /* base+size for AMCC chip */
2696fb57 BP	289	int i_IobaseAddon; /* addon base address */
74b894e5	290	int i_IobaseReserved;
6dd22814	291	void __iomem *dw_AiBase;
2696fb57	292	unsigned char b_AiContinuous; /* we do unlimited AI */
1783fbfe	293	unsigned char b_AiInitialisation;
2696fb57 BP	294	unsigned int ui_AiActualScan; /* how many scans we finished */
	295	unsigned int ui_AiBufferPtr; /* data buffer ptr in samples */
	296	unsigned int ui_AiNbrofChannels; /* how many channels is measured */
	297	unsigned int ui_AiScanLength; /* Length of actual scanlist */
	298	unsigned int ui_AiActualScanPosition; /* position in actual scan */
da91b269	299	unsigned int pui_AiChannelList; / actual chanlist */
2696fb57 BP	300	unsigned int ui_AiChannelList[32]; /* actual chanlist */
2696fb57 BP	301	unsigned char b_AiChannelConfiguration[32]; /* actual chanlist */
117102b0	302	unsigned int ui_AiReadData[32];
756e9d7c	303	unsigned int dw_AiInitialised;
2696fb57 BP	304	unsigned int ui_AiTimer0; /* Timer Constant for Timer0 */
2696fb57 BP	305	unsigned int ui_AiTimer1; /* Timer constant for Timer1 */
117102b0 BP	306	unsigned int ui_AiFlags;
117102b0 BP	307	unsigned int ui_AiDataLength;
2696fb57 BP	308	short AiData; / Pointer to sample data */
	309	unsigned int ui_AiNbrofScans; /* number of scans to do */
	310	unsigned short us_UseDma; /* To use Dma or not */
	311	unsigned char b_DmaDoubleBuffer; /* we can use double buffering */
	312	unsigned int ui_DmaActualBuffer; /* which buffer is used now */
82a6e2e7 BP	313	/* UPDATE-0.7.57->0.7.68 */
82a6e2e7 BP	314	/* unsigned int ul_DmaBufferVirtual[2]; pointers to begin of DMA buffer */
2696fb57 BP	315	short ul_DmaBufferVirtual[2]; / pointers to begin of DMA buffer */
	316	unsigned int ul_DmaBufferHw[2]; /* hw address of DMA buff */
	317	unsigned int ui_DmaBufferSize[2]; /* size of dma buffer in bytes */
	318	unsigned int ui_DmaBufferUsesize[2]; /* which size we may now used for transfer */
	319	unsigned int ui_DmaBufferSamples[2]; /* size in samples */
	320	unsigned int ui_DmaBufferPages[2]; /* number of pages in buffer */
	321	unsigned char b_DigitalOutputRegister; /* Digital Output Register */
1783fbfe	322	unsigned char b_OutputMemoryStatus;
2696fb57 BP	323	unsigned char b_AnalogInputChannelNbr; /* Analog input channel Nbr */
	324	unsigned char b_AnalogOutputChannelNbr; /* Analog input Output Nbr */
	325	unsigned char b_TimerSelectMode; /* Contain data written at iobase + 0C */
	326	unsigned char b_ModeSelectRegister; /* Contain data written at iobase + 0E */
	327	unsigned short us_OutputRegister; /* Contain data written at iobase + 0 */
1783fbfe	328	unsigned char b_InterruptState;
2696fb57 BP	329	unsigned char b_TimerInit; /* Specify if InitTimerWatchdog was load */
	330	unsigned char b_TimerStarted; /* Specify if timer 2 is running or not */
	331	unsigned char b_Timer2Mode; /* Specify the timer 2 mode */
	332	unsigned char b_Timer2Interrupt; /* Timer2 interrupt enable or disable */
	333	unsigned char b_AiCyclicAcquisition; /* indicate cyclic acquisition */
	334	unsigned char b_InterruptMode; /* eoc eos or dma */
	335	unsigned char b_EocEosInterrupt; /* Enable disable eoc eos interrupt */
117102b0	336	unsigned int ui_EocEosConversionTime;
1783fbfe BP	337	unsigned char b_EocEosConversionTimeBase;
	338	unsigned char b_SingelDiff;
	339	unsigned char b_ExttrigEnable; /* To enable or disable external trigger */
c995fe94	340
15d8826a GKH	341	/* Pointer to the current process */
15d8826a GKH	342	struct task_struct *tsk_Current;
c995fe94	343
15d8826a	344	/* Hardware board infos for 1710 */
c995fe94	345	struct {
117102b0 BP	346	unsigned int ui_Address; /* Board address */
117102b0 BP	347	unsigned int ui_FlashAddress;
1783fbfe BP	348	unsigned char b_InterruptNbr; /* Board interrupt number */
	349	unsigned char b_SlotNumber; /* PCI slot number */
	350	unsigned char b_BoardVersion;
756e9d7c	351	unsigned int dw_MolduleConfiguration[4]; /* Module config */
c995fe94 ADG	352	} s_BoardInfos;
c995fe94 ADG	353
c995fe94	354	/* Interrupt infos */
c995fe94	355	struct {
82a6e2e7	356	unsigned int ul_InterruptOccur; /* 0 : No interrupt occur */
15d8826a	357	/* > 0 : Interrupt occur */
117102b0 BP	358	unsigned int ui_Read; /* Read FIFO */
117102b0 BP	359	unsigned int ui_Write; /* Write FIFO */
c995fe94	360	struct {
1783fbfe	361	unsigned char b_OldModuleMask;
82a6e2e7 BP	362	unsigned int ul_OldInterruptMask; /* Interrupt mask */
82a6e2e7 BP	363	unsigned int ul_OldCounterLatchValue; /* Interrupt counter value */
c995fe94 ADG	364	} s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT];
	365	} s_InterruptParameters;
	366
b4ce4f16	367	union str_ModuleInfo s_ModuleInfo[4];
82a6e2e7	368	unsigned int ul_TTLPortConfiguration[10];
c995fe94	369
57517878 IA	370	/* Parameters read from EEPROM overriding static board info */
	371	struct {
	372	int i_NbrAiChannel; /* num of A/D chans */
	373	int i_NbrAoChannel; /* num of D/A chans */
	374	int i_AiMaxdata; /* resolution of A/D */
	375	int i_AoMaxdata; /* resolution of D/A */
	376	int i_NbrDiChannel; /* Number of DI channels */
	377	int i_NbrDoChannel; /* Number of DO channels */
	378	int i_DoMaxdata; /* data to set all channels high */
	379	int i_Dma; /* dma present or not */
	380	int i_Timer; /* timer subdevice present or not */
	381	unsigned int ui_MinAcquisitiontimeNs;
	382	/* Minimum Acquisition in Nano secs */
	383	unsigned int ui_MinDelaytimeNs;
	384	/* Minimum Delay in Nano secs */
	385	} s_EeParameters;
e320671e	386	};