[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / comedi / drivers / addi-data / addi_common.h

/*
 *  Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
 *
 *	ADDI-DATA GmbH
 *	Dieselstrasse 3
 *	D-77833 Ottersweier
 *	Tel: +19(0)7223/9493-0
 *	Fax: +49(0)7223/9493-92
 *	http://www.addi-data-com
 *	info@addi-data.com
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 2 of the License, or (at your option)
 * any later version.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/timex.h>
#include <linux/timer.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/kmod.h>
#include <linux/uaccess.h>
#include "../../comedidev.h"
#include "addi_amcc_s5933.h"

#define ERROR	-1
#define SUCCESS	1

/* variable type definition */
typedef unsigned char BYTE, *PBYTE;
typedef short SHORT, *PSHORT;
typedef unsigned short USHORT, *PUSHORT;
typedef unsigned short WORD, *PWORD;
typedef int INT, *PINT;;
typedef unsigned int UINT, *PUINT;
typedef int LONG, *PLONG;		/* 32-bit */
typedef unsigned int ULONG, *PULONG;	/* 32-bit */
typedef unsigned int DWORD, *PDWORD;	/* 32-bit */
typedef unsigned long ULONG_PTR;

typedef const struct comedi_lrange *PCRANGE;

#define LOBYTE(W)	(BYTE)((W) & 0xFF)
#define HIBYTE(W)	(BYTE)(((W) >> 8) & 0xFF)
#define MAKEWORD(H, L)	(USHORT)((L) | ((H) << 8))
#define LOWORD(W)	(USHORT)((W) & 0xFFFF)
#define HIWORD(W)	(USHORT)(((W) >> 16) & 0xFFFF)
#define MAKEDWORD(H, L)	(UINT)((L) | ((H) << 16))

#define ADDI_ENABLE		1
#define ADDI_DISABLE		0
#define APCI1710_SAVE_INTERRUPT	1

#define ADDIDATA_EEPROM		1
#define ADDIDATA_NO_EEPROM	0
#define ADDIDATA_93C76		"93C76"
#define ADDIDATA_S5920		"S5920"
#define ADDIDATA_S5933		"S5933"
#define ADDIDATA_9054		"9054"

/* ADDIDATA Enable Disable */
#define ADDIDATA_ENABLE		1
#define ADDIDATA_DISABLE	0

/* Structures */

/* structure for the boardtype */
typedef struct {
	const char *pc_DriverName;	// driver name
	INT i_VendorId;		//PCI vendor a device ID of card
	INT i_DeviceId;
	INT i_IorangeBase0;
	INT i_IorangeBase1;
	INT i_IorangeBase2;	//  base 2 range
	INT i_IorangeBase3;	//  base 3 range
	INT i_PCIEeprom;	// eeprom present or not
	char *pc_EepromChip;	// type of chip
	INT i_NbrAiChannel;	// num of A/D chans
	INT i_NbrAiChannelDiff;	// num of A/D chans in diff mode
	INT i_AiChannelList;	// len of chanlist
	INT i_NbrAoChannel;	// num of D/A chans
	INT i_AiMaxdata;	// resolution of A/D
	INT i_AoMaxdata;	// resolution of D/A
	PCRANGE pr_AiRangelist;	// rangelist for A/D
	PCRANGE pr_AoRangelist;	// rangelist for D/A

	INT i_NbrDiChannel;	// Number of DI channels
	INT i_NbrDoChannel;	// Number of DO channels
	INT i_DoMaxdata;	// data to set all chanels high

	INT i_NbrTTLChannel;	// Number of TTL channels
	PCRANGE pr_TTLRangelist;	// rangelist for TTL

	INT i_Dma;		// dma present or not
	INT i_Timer;		//   timer subdevice present or not
	BYTE b_AvailableConvertUnit;
	UINT ui_MinAcquisitiontimeNs;	// Minimum Acquisition in Nano secs
	UINT ui_MinDelaytimeNs;	// Minimum Delay in Nano secs

	/* interrupt and reset */
	void (*v_hwdrv_Interrupt)(int irq, void *d);
	int (*i_hwdrv_Reset)(struct comedi_device *dev);

	/* Subdevice functions */

	/* ANALOG INPUT */
	int (*i_hwdrv_InsnConfigAnalogInput)(struct comedi_device *dev,
					     struct comedi_subdevice *s,
					     struct comedi_insn *insn,
					     unsigned int *data);
	int (*i_hwdrv_InsnReadAnalogInput)(struct comedi_device *dev,
					    struct comedi_subdevice *s,
					    struct comedi_insn *insn,
					    unsigned int *data);
	int (*i_hwdrv_InsnWriteAnalogInput)(struct comedi_device *dev,
					    struct comedi_subdevice *s,
					    struct comedi_insn *insn,
					    unsigned int *data);
	int (*i_hwdrv_InsnBitsAnalogInput)(struct comedi_device *dev,
					   struct comedi_subdevice *s,
					   struct comedi_insn *insn,
					   unsigned int *data);
	int (*i_hwdrv_CommandTestAnalogInput)(struct comedi_device *dev,
					      struct comedi_subdevice *s,
					      struct comedi_cmd *cmd);
	int (*i_hwdrv_CommandAnalogInput)(struct comedi_device *dev,
					  struct comedi_subdevice *s);
	int (*i_hwdrv_CancelAnalogInput)(struct comedi_device *dev,
					 struct comedi_subdevice *s);

	/* Analog Output */
	int (*i_hwdrv_InsnConfigAnalogOutput)(struct comedi_device *dev,
					      struct comedi_subdevice *s,
					      struct comedi_insn *insn,
					      unsigned int *data);
	int (*i_hwdrv_InsnWriteAnalogOutput)(struct comedi_device *dev,
					     struct comedi_subdevice *s,
					     struct comedi_insn *insn,
					     unsigned int *data);
	int (*i_hwdrv_InsnBitsAnalogOutput)(struct comedi_device *dev,
					    struct comedi_subdevice *s,
					    struct comedi_insn *insn,
					    unsigned int *data);

	/* Digital Input */
	int (*i_hwdrv_InsnConfigDigitalInput) (struct comedi_device *dev,
					       struct comedi_subdevice *s,
					       struct comedi_insn *insn,
					       unsigned int *data);
	int (*i_hwdrv_InsnReadDigitalInput) (struct comedi_device *dev,
					     struct comedi_subdevice *s,
					     struct comedi_insn *insn,
					     unsigned int *data);
	int (*i_hwdrv_InsnWriteDigitalInput) (struct comedi_device *dev,
					      struct comedi_subdevice *s,
					      struct comedi_insn *insn,
					      unsigned int *data);
	int (*i_hwdrv_InsnBitsDigitalInput) (struct comedi_device *dev,
					     struct comedi_subdevice *s,
					     struct comedi_insn *insn,
					     unsigned int *data);

	/* Digital Output */
	int (*i_hwdrv_InsnConfigDigitalOutput)(struct comedi_device *dev,
					       struct comedi_subdevice *s,
					       struct comedi_insn *insn,
					       unsigned int *data);
	int (*i_hwdrv_InsnWriteDigitalOutput)(struct comedi_device *dev,
					      struct comedi_subdevice *s,
					      struct comedi_insn *insn,
					      unsigned int *data);
	int (*i_hwdrv_InsnBitsDigitalOutput)(struct comedi_device *dev,
					     struct comedi_subdevice *s,
					     struct comedi_insn *insn,
					     unsigned int *data);
	int (*i_hwdrv_InsnReadDigitalOutput)(struct comedi_device *dev,
					     struct comedi_subdevice *s,
					     struct comedi_insn *insn,
					     unsigned int *data);

	/* TIMER */
	int (*i_hwdrv_InsnConfigTimer)(struct comedi_device *dev,
				       struct comedi_subdevice *s,
				       struct comedi_insn *insn, unsigned int *data);
	int (*i_hwdrv_InsnWriteTimer)(struct comedi_device *dev,
				      struct comedi_subdevice *s, struct comedi_insn *insn,
				      unsigned int *data);
	int (*i_hwdrv_InsnReadTimer)(struct comedi_device *dev, struct comedi_subdevice *s,
				     struct comedi_insn *insn, unsigned int *data);
	int (*i_hwdrv_InsnBitsTimer)(struct comedi_device *dev, struct comedi_subdevice *s,
				     struct comedi_insn *insn, unsigned int *data);

	/* TTL IO */
	int (*i_hwdr_ConfigInitTTLIO)(struct comedi_device *dev,
				      struct comedi_subdevice *s, struct comedi_insn *insn,
				      unsigned int *data);
	int (*i_hwdr_ReadTTLIOBits)(struct comedi_device *dev, struct comedi_subdevice *s,
				    struct comedi_insn *insn, unsigned int *data);
	int (*i_hwdr_ReadTTLIOAllPortValue)(struct comedi_device *dev,
					    struct comedi_subdevice *s,
					    struct comedi_insn *insn,
					    unsigned int *data);
	int (*i_hwdr_WriteTTLIOChlOnOff)(struct comedi_device *dev,
					 struct comedi_subdevice *s,
					 struct comedi_insn *insn, unsigned int *data);
} boardtype;

//MODULE INFO STRUCTURE

typedef union {
	/* Incremental counter infos */
	struct {
		union {
			struct {
				BYTE b_ModeRegister1;
				BYTE b_ModeRegister2;
				BYTE b_ModeRegister3;
				BYTE b_ModeRegister4;
			} s_ByteModeRegister;
			DWORD dw_ModeRegister1_2_3_4;
		} s_ModeRegister;

		struct {
			unsigned int b_IndexInit:1;
			unsigned int b_CounterInit:1;
			unsigned int b_ReferenceInit:1;
			unsigned int b_IndexInterruptOccur:1;
			unsigned int b_CompareLogicInit:1;
			unsigned int b_FrequencyMeasurementInit:1;
			unsigned int b_FrequencyMeasurementEnable:1;
		} s_InitFlag;

	} s_SiemensCounterInfo;

	/* SSI infos */
	struct {
		BYTE b_SSIProfile;
		BYTE b_PositionTurnLength;
		BYTE b_TurnCptLength;
		BYTE b_SSIInit;
	} s_SSICounterInfo;

	/* TTL I/O infos */
	struct {
		BYTE b_TTLInit;
		BYTE b_PortConfiguration[4];
	} s_TTLIOInfo;

	/* Digital I/O infos */
	struct {
		BYTE b_DigitalInit;
		BYTE b_ChannelAMode;
		BYTE b_ChannelBMode;
		BYTE b_OutputMemoryEnabled;
		DWORD dw_OutputMemory;
	} s_DigitalIOInfo;

      /*********************/
	/* 82X54 timer infos */
      /*********************/

	struct {
		struct {
			BYTE b_82X54Init;
			BYTE b_InputClockSelection;
			BYTE b_InputClockLevel;
			BYTE b_OutputLevel;
			BYTE b_HardwareGateLevel;
			DWORD dw_ConfigurationWord;
		} s_82X54TimerInfo[3];
		BYTE b_InterruptMask;
	} s_82X54ModuleInfo;

      /*********************/
	/* Chronometer infos */
      /*********************/

	struct {
		BYTE b_ChronoInit;
		BYTE b_InterruptMask;
		BYTE b_PCIInputClock;
		BYTE b_TimingUnit;
		BYTE b_CycleMode;
		double d_TimingInterval;
		DWORD dw_ConfigReg;
	} s_ChronoModuleInfo;

      /***********************/
	/* Pulse encoder infos */
      /***********************/

	struct {
		struct {
			BYTE b_PulseEncoderInit;
		} s_PulseEncoderInfo[4];
		DWORD dw_SetRegister;
		DWORD dw_ControlRegister;
		DWORD dw_StatusRegister;
	} s_PulseEncoderModuleInfo;

	/* Tor conter infos */
	struct {
		struct {
			BYTE b_TorCounterInit;
			BYTE b_TimingUnit;
			BYTE b_InterruptEnable;
			double d_TimingInterval;
			ULONG ul_RealTimingInterval;
		} s_TorCounterInfo[2];
		BYTE b_PCIInputClock;
	} s_TorCounterModuleInfo;

	/* PWM infos */
	struct {
		struct {
			BYTE b_PWMInit;
			BYTE b_TimingUnit;
			BYTE b_InterruptEnable;
			double d_LowTiming;
			double d_HighTiming;
			ULONG ul_RealLowTiming;
			ULONG ul_RealHighTiming;
		} s_PWMInfo[2];
		BYTE b_ClockSelection;
	} s_PWMModuleInfo;

	/* ETM infos */
	struct {
		struct {
			BYTE b_ETMEnable;
			BYTE b_ETMInterrupt;
		} s_ETMInfo[2];
		BYTE b_ETMInit;
		BYTE b_TimingUnit;
		BYTE b_ClockSelection;
		double d_TimingInterval;
		ULONG ul_Timing;
	} s_ETMModuleInfo;

	/* CDA infos */
	struct {
		BYTE b_CDAEnable;
		BYTE b_CDAInterrupt;
		BYTE b_CDAInit;
		BYTE b_FctSelection;
		BYTE b_CDAReadFIFOOverflow;
	} s_CDAModuleInfo;

} str_ModuleInfo;

/* Private structure for the addi_apci3120 driver */
typedef struct {

	INT iobase;
	INT i_IobaseAmcc;	// base+size for AMCC chip
	INT i_IobaseAddon;	//addon base address
	INT i_IobaseReserved;
	ULONG_PTR dw_AiBase;
	struct pcilst_struct *amcc;	// ptr too AMCC data
	BYTE allocated;		// we have blocked card
	BYTE b_ValidDriver;	// driver is ok
	BYTE b_AiContinuous;	// we do unlimited AI
	BYTE b_AiInitialisation;
	UINT ui_AiActualScan;	//how many scans we finished
	UINT ui_AiBufferPtr;	// data buffer ptr in samples
	UINT ui_AiNbrofChannels;	// how many channels is measured
	UINT ui_AiScanLength;	// Length of actual scanlist
	UINT ui_AiActualScanPosition;	// position in actual scan
	PUINT pui_AiChannelList;	// actual chanlist
	UINT ui_AiChannelList[32];	// actual chanlist
	BYTE b_AiChannelConfiguration[32];	// actual chanlist
	UINT ui_AiReadData[32];
	DWORD dw_AiInitialised;
	UINT ui_AiTimer0;	//Timer Constant for Timer0
	UINT ui_AiTimer1;	//Timer constant for Timer1
	UINT ui_AiFlags;
	UINT ui_AiDataLength;
	short *AiData;	// Pointer to sample data
	UINT ui_AiNbrofScans;	// number of scans to do
	USHORT us_UseDma;	// To use Dma or not
	BYTE b_DmaDoubleBuffer;	// we can use double buffering
	UINT ui_DmaActualBuffer;	// which buffer is used now
	//*UPDATE-0.7.57->0.7.68
	//ULONG               ul_DmaBufferVirtual[2];// pointers to begin of DMA buffer
	short *ul_DmaBufferVirtual[2];	// pointers to begin of DMA buffer
	ULONG ul_DmaBufferHw[2];	// hw address of DMA buff
	UINT ui_DmaBufferSize[2];	// size of dma buffer in bytes
	UINT ui_DmaBufferUsesize[2];	// which size we may now used for transfer
	UINT ui_DmaBufferSamples[2];	// size in samples
	UINT ui_DmaBufferPages[2];	// number of pages in buffer
	BYTE b_DigitalOutputRegister;	// Digital Output Register
	BYTE b_OutputMemoryStatus;
	BYTE b_AnalogInputChannelNbr;	// Analog input channel Nbr
	BYTE b_AnalogOutputChannelNbr;	// Analog input Output  Nbr
	BYTE b_TimerSelectMode;	// Contain data written at iobase + 0C
	BYTE b_ModeSelectRegister;	// Contain data written at iobase + 0E
	USHORT us_OutputRegister;	// Contain data written at iobase + 0
	BYTE b_InterruptState;
	BYTE b_TimerInit;	// Specify if InitTimerWatchdog was load
	BYTE b_TimerStarted;	// Specify if timer 2 is running or not
	BYTE b_Timer2Mode;	// Specify the timer 2 mode
	BYTE b_Timer2Interrupt;	//Timer2  interrupt enable or disable
	BYTE b_AiCyclicAcquisition;	// indicate cyclic acquisition
	BYTE b_InterruptMode;	// eoc eos or dma
	BYTE b_EocEosInterrupt;	// Enable disable eoc eos interrupt
	UINT ui_EocEosConversionTime;
	BYTE b_EocEosConversionTimeBase;
	BYTE b_SingelDiff;
	BYTE b_ExttrigEnable;	/* To enable or disable external trigger */

	/* Pointer to the current process */
	struct task_struct *tsk_Current;
	boardtype *ps_BoardInfo;

	/* Hardware board infos for 1710 */
	struct {
		UINT ui_Address;	/* Board address */
		UINT ui_FlashAddress;
		BYTE b_InterruptNbr;	/* Board interrupt number */
		BYTE b_SlotNumber;	/* PCI slot number */
		BYTE b_BoardVersion;
		DWORD dw_MolduleConfiguration[4];	/* Module config */
	} s_BoardInfos;

	/* Interrupt infos */
	struct {
		ULONG ul_InterruptOccur;	/* 0   : No interrupt occur */
						/* > 0 : Interrupt occur */
		UINT ui_Read;	/* Read FIFO */
		UINT ui_Write;	/* Write FIFO */
		struct {
			BYTE b_OldModuleMask;
			ULONG ul_OldInterruptMask;	/* Interrupt mask */
			ULONG ul_OldCounterLatchValue;	/* Interrupt counter value */
		} s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT];
	} s_InterruptParameters;

	str_ModuleInfo s_ModuleInfo[4];
	ULONG ul_TTLPortConfiguration[10];

} addi_private;

static unsigned short pci_list_builded;	/* set to 1 when list of card is known */

/* Function declarations */
static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it);
static int i_ADDI_Detach(struct comedi_device *dev);
static int i_ADDI_Reset(struct comedi_device *dev);

static irqreturn_t v_ADDI_Interrupt(int irq, void *d PT_REGS_ARG);
static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev, struct comedi_subdevice *s,
				     struct comedi_insn *insn, unsigned int *data);
Commit	Line	Data
c995fe94	1	/*
15d8826a GKH	2	* Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
	3	*
	4	* ADDI-DATA GmbH
	5	* Dieselstrasse 3
	6	* D-77833 Ottersweier
	7	* Tel: +19(0)7223/9493-0
	8	* Fax: +49(0)7223/9493-92
	9	* http://www.addi-data-com
	10	* info@addi-data.com
	11	*
	12	* This program is free software; you can redistribute it and/or modify it
	13	* under the terms of the GNU General Public License as published by the Free
	14	* Software Foundation; either version 2 of the License, or (at your option)
	15	* any later version.
	16	*/
c995fe94 ADG	17
	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/sched.h>
	21	#include <linux/mm.h>
c995fe94 ADG	22	#include <linux/slab.h>
	23	#include <linux/errno.h>
	24	#include <linux/ioport.h>
	25	#include <linux/delay.h>
	26	#include <linux/interrupt.h>
	27	#include <linux/timex.h>
	28	#include <linux/timer.h>
	29	#include <linux/pci.h>
15d8826a GKH	30	#include <linux/io.h>
	31	#include <linux/kmod.h>
	32	#include <linux/uaccess.h>
c995fe94 ADG	33	#include "../../comedidev.h"
c995fe94 ADG	34	#include "addi_amcc_s5933.h"
c995fe94	35
15d8826a GKH	36	#define ERROR -1
15d8826a GKH	37	#define SUCCESS 1
c995fe94	38
15d8826a	39	/* variable type definition */
c995fe94 ADG	40	typedef unsigned char BYTE, *PBYTE;
	41	typedef short SHORT, *PSHORT;
	42	typedef unsigned short USHORT, *PUSHORT;
	43	typedef unsigned short WORD, *PWORD;
	44	typedef int INT, *PINT;;
	45	typedef unsigned int UINT, *PUINT;
15d8826a	46	typedef int LONG, PLONG; / 32-bit */
c995fe94 ADG	47	typedef unsigned int ULONG, PULONG; / 32-bit */
	48	typedef unsigned int DWORD, PDWORD; / 32-bit */
	49	typedef unsigned long ULONG_PTR;
	50
9ced1de6	51	typedef const struct comedi_lrange *PCRANGE;
c995fe94	52
15d8826a GKH	53	#define LOBYTE(W) (BYTE)((W) & 0xFF)
	54	#define HIBYTE(W) (BYTE)(((W) >> 8) & 0xFF)
	55	#define MAKEWORD(H, L) (USHORT)((L) \| ((H) << 8))
	56	#define LOWORD(W) (USHORT)((W) & 0xFFFF)
	57	#define HIWORD(W) (USHORT)(((W) >> 16) & 0xFFFF)
	58	#define MAKEDWORD(H, L) (UINT)((L) \| ((H) << 16))
	59
	60	#define ADDI_ENABLE 1
	61	#define ADDI_DISABLE 0
	62	#define APCI1710_SAVE_INTERRUPT 1
	63
	64	#define ADDIDATA_EEPROM 1
	65	#define ADDIDATA_NO_EEPROM 0
	66	#define ADDIDATA_93C76 "93C76"
	67	#define ADDIDATA_S5920 "S5920"
	68	#define ADDIDATA_S5933 "S5933"
	69	#define ADDIDATA_9054 "9054"
	70
	71	/* ADDIDATA Enable Disable */
	72	#define ADDIDATA_ENABLE 1
	73	#define ADDIDATA_DISABLE 0
	74
	75	/* Structures */
	76
	77	/* structure for the boardtype */
	78	typedef struct {
18002713	79	const char *pc_DriverName; // driver name
c995fe94 ADG	80	INT i_VendorId; //PCI vendor a device ID of card
	81	INT i_DeviceId;
	82	INT i_IorangeBase0;
	83	INT i_IorangeBase1;
	84	INT i_IorangeBase2; // base 2 range
	85	INT i_IorangeBase3; // base 3 range
	86	INT i_PCIEeprom; // eeprom present or not
18002713	87	char *pc_EepromChip; // type of chip
c995fe94 ADG	88	INT i_NbrAiChannel; // num of A/D chans
	89	INT i_NbrAiChannelDiff; // num of A/D chans in diff mode
	90	INT i_AiChannelList; // len of chanlist
	91	INT i_NbrAoChannel; // num of D/A chans
	92	INT i_AiMaxdata; // resolution of A/D
	93	INT i_AoMaxdata; // resolution of D/A
	94	PCRANGE pr_AiRangelist; // rangelist for A/D
	95	PCRANGE pr_AoRangelist; // rangelist for D/A
	96
	97	INT i_NbrDiChannel; // Number of DI channels
	98	INT i_NbrDoChannel; // Number of DO channels
	99	INT i_DoMaxdata; // data to set all chanels high
	100
	101	INT i_NbrTTLChannel; // Number of TTL channels
	102	PCRANGE pr_TTLRangelist; // rangelist for TTL
	103
	104	INT i_Dma; // dma present or not
	105	INT i_Timer; // timer subdevice present or not
	106	BYTE b_AvailableConvertUnit;
	107	UINT ui_MinAcquisitiontimeNs; // Minimum Acquisition in Nano secs
	108	UINT ui_MinDelaytimeNs; // Minimum Delay in Nano secs
	109
15d8826a GKH	110	/* interrupt and reset */
15d8826a GKH	111	void (v_hwdrv_Interrupt)(int irq, void d);
71b5f4f1	112	int (i_hwdrv_Reset)(struct comedi_device dev);
15d8826a GKH	113
	114	/* Subdevice functions */
	115
	116	/* ANALOG INPUT */
71b5f4f1	117	int (i_hwdrv_InsnConfigAnalogInput)(struct comedi_device dev,
34c43922	118	struct comedi_subdevice *s,
90035c08	119	struct comedi_insn *insn,
790c5541	120	unsigned int *data);
71b5f4f1	121	int (i_hwdrv_InsnReadAnalogInput)(struct comedi_device dev,
34c43922	122	struct comedi_subdevice *s,
90035c08	123	struct comedi_insn *insn,
790c5541	124	unsigned int *data);
71b5f4f1	125	int (i_hwdrv_InsnWriteAnalogInput)(struct comedi_device dev,
34c43922	126	struct comedi_subdevice *s,
90035c08	127	struct comedi_insn *insn,
790c5541	128	unsigned int *data);
71b5f4f1	129	int (i_hwdrv_InsnBitsAnalogInput)(struct comedi_device dev,
34c43922	130	struct comedi_subdevice *s,
90035c08	131	struct comedi_insn *insn,
790c5541	132	unsigned int *data);
71b5f4f1	133	int (i_hwdrv_CommandTestAnalogInput)(struct comedi_device dev,
34c43922	134	struct comedi_subdevice *s,
ea6d0d4c	135	struct comedi_cmd *cmd);
71b5f4f1	136	int (i_hwdrv_CommandAnalogInput)(struct comedi_device dev,
34c43922	137	struct comedi_subdevice *s);
71b5f4f1	138	int (i_hwdrv_CancelAnalogInput)(struct comedi_device dev,
34c43922	139	struct comedi_subdevice *s);
15d8826a GKH	140
15d8826a GKH	141	/* Analog Output */
71b5f4f1	142	int (i_hwdrv_InsnConfigAnalogOutput)(struct comedi_device dev,
34c43922	143	struct comedi_subdevice *s,
90035c08	144	struct comedi_insn *insn,
790c5541	145	unsigned int *data);
71b5f4f1	146	int (i_hwdrv_InsnWriteAnalogOutput)(struct comedi_device dev,
34c43922	147	struct comedi_subdevice *s,
90035c08	148	struct comedi_insn *insn,
790c5541	149	unsigned int *data);
71b5f4f1	150	int (i_hwdrv_InsnBitsAnalogOutput)(struct comedi_device dev,
34c43922	151	struct comedi_subdevice *s,
90035c08	152	struct comedi_insn *insn,
790c5541	153	unsigned int *data);
15d8826a GKH	154
15d8826a GKH	155	/* Digital Input */
71b5f4f1	156	int (i_hwdrv_InsnConfigDigitalInput) (struct comedi_device dev,
34c43922	157	struct comedi_subdevice *s,
90035c08	158	struct comedi_insn *insn,
790c5541	159	unsigned int *data);
71b5f4f1	160	int (i_hwdrv_InsnReadDigitalInput) (struct comedi_device dev,
34c43922	161	struct comedi_subdevice *s,
90035c08	162	struct comedi_insn *insn,
790c5541	163	unsigned int *data);
71b5f4f1	164	int (i_hwdrv_InsnWriteDigitalInput) (struct comedi_device dev,
34c43922	165	struct comedi_subdevice *s,
90035c08	166	struct comedi_insn *insn,
790c5541	167	unsigned int *data);
71b5f4f1	168	int (i_hwdrv_InsnBitsDigitalInput) (struct comedi_device dev,
34c43922	169	struct comedi_subdevice *s,
90035c08	170	struct comedi_insn *insn,
790c5541	171	unsigned int *data);
15d8826a GKH	172
15d8826a GKH	173	/* Digital Output */
71b5f4f1	174	int (i_hwdrv_InsnConfigDigitalOutput)(struct comedi_device dev,
34c43922	175	struct comedi_subdevice *s,
90035c08	176	struct comedi_insn *insn,
790c5541	177	unsigned int *data);
71b5f4f1	178	int (i_hwdrv_InsnWriteDigitalOutput)(struct comedi_device dev,
34c43922	179	struct comedi_subdevice *s,
90035c08	180	struct comedi_insn *insn,
790c5541	181	unsigned int *data);
71b5f4f1	182	int (i_hwdrv_InsnBitsDigitalOutput)(struct comedi_device dev,
34c43922	183	struct comedi_subdevice *s,
90035c08	184	struct comedi_insn *insn,
790c5541	185	unsigned int *data);
71b5f4f1	186	int (i_hwdrv_InsnReadDigitalOutput)(struct comedi_device dev,
34c43922	187	struct comedi_subdevice *s,
90035c08	188	struct comedi_insn *insn,
790c5541	189	unsigned int *data);
15d8826a GKH	190
15d8826a GKH	191	/* TIMER */
71b5f4f1	192	int (i_hwdrv_InsnConfigTimer)(struct comedi_device dev,
34c43922	193	struct comedi_subdevice *s,
90035c08	194	struct comedi_insn insn, unsigned int data);
71b5f4f1	195	int (i_hwdrv_InsnWriteTimer)(struct comedi_device dev,
90035c08	196	struct comedi_subdevice s, struct comedi_insn insn,
790c5541	197	unsigned int *data);
34c43922	198	int (i_hwdrv_InsnReadTimer)(struct comedi_device dev, struct comedi_subdevice *s,
90035c08	199	struct comedi_insn insn, unsigned int data);
34c43922	200	int (i_hwdrv_InsnBitsTimer)(struct comedi_device dev, struct comedi_subdevice *s,
90035c08	201	struct comedi_insn insn, unsigned int data);
15d8826a GKH	202
15d8826a GKH	203	/* TTL IO */
71b5f4f1	204	int (i_hwdr_ConfigInitTTLIO)(struct comedi_device dev,
90035c08	205	struct comedi_subdevice s, struct comedi_insn insn,
790c5541	206	unsigned int *data);
34c43922	207	int (i_hwdr_ReadTTLIOBits)(struct comedi_device dev, struct comedi_subdevice *s,
90035c08	208	struct comedi_insn insn, unsigned int data);
71b5f4f1	209	int (i_hwdr_ReadTTLIOAllPortValue)(struct comedi_device dev,
34c43922	210	struct comedi_subdevice *s,
90035c08	211	struct comedi_insn *insn,
790c5541	212	unsigned int *data);
71b5f4f1	213	int (i_hwdr_WriteTTLIOChlOnOff)(struct comedi_device dev,
34c43922	214	struct comedi_subdevice *s,
90035c08	215	struct comedi_insn insn, unsigned int data);
c995fe94 ADG	216	} boardtype;
	217
	218	//MODULE INFO STRUCTURE
	219
	220	typedef union {
c995fe94	221	/* Incremental counter infos */
c995fe94 ADG	222	struct {
	223	union {
	224	struct {
	225	BYTE b_ModeRegister1;
	226	BYTE b_ModeRegister2;
	227	BYTE b_ModeRegister3;
	228	BYTE b_ModeRegister4;
	229	} s_ByteModeRegister;
	230	DWORD dw_ModeRegister1_2_3_4;
	231	} s_ModeRegister;
	232
	233	struct {
	234	unsigned int b_IndexInit:1;
	235	unsigned int b_CounterInit:1;
	236	unsigned int b_ReferenceInit:1;
	237	unsigned int b_IndexInterruptOccur:1;
	238	unsigned int b_CompareLogicInit:1;
	239	unsigned int b_FrequencyMeasurementInit:1;
	240	unsigned int b_FrequencyMeasurementEnable:1;
	241	} s_InitFlag;
	242
	243	} s_SiemensCounterInfo;
	244
c995fe94	245	/* SSI infos */
c995fe94 ADG	246	struct {
	247	BYTE b_SSIProfile;
	248	BYTE b_PositionTurnLength;
	249	BYTE b_TurnCptLength;
	250	BYTE b_SSIInit;
	251	} s_SSICounterInfo;
	252
c995fe94	253	/* TTL I/O infos */
c995fe94 ADG	254	struct {
	255	BYTE b_TTLInit;
	256	BYTE b_PortConfiguration[4];
	257	} s_TTLIOInfo;
	258
c995fe94	259	/* Digital I/O infos */
c995fe94 ADG	260	struct {
	261	BYTE b_DigitalInit;
	262	BYTE b_ChannelAMode;
	263	BYTE b_ChannelBMode;
	264	BYTE b_OutputMemoryEnabled;
	265	DWORD dw_OutputMemory;
	266	} s_DigitalIOInfo;
	267
	268	/*********************/
	269	/* 82X54 timer infos */
	270	/*********************/
	271
	272	struct {
	273	struct {
	274	BYTE b_82X54Init;
	275	BYTE b_InputClockSelection;
	276	BYTE b_InputClockLevel;
	277	BYTE b_OutputLevel;
	278	BYTE b_HardwareGateLevel;
	279	DWORD dw_ConfigurationWord;
	280	} s_82X54TimerInfo[3];
	281	BYTE b_InterruptMask;
	282	} s_82X54ModuleInfo;
	283
	284	/*********************/
	285	/* Chronometer infos */
	286	/*********************/
	287
	288	struct {
	289	BYTE b_ChronoInit;
	290	BYTE b_InterruptMask;
	291	BYTE b_PCIInputClock;
	292	BYTE b_TimingUnit;
	293	BYTE b_CycleMode;
	294	double d_TimingInterval;
	295	DWORD dw_ConfigReg;
	296	} s_ChronoModuleInfo;
	297
	298	/***********************/
	299	/* Pulse encoder infos */
	300	/***********************/
	301
	302	struct {
	303	struct {
	304	BYTE b_PulseEncoderInit;
	305	} s_PulseEncoderInfo[4];
	306	DWORD dw_SetRegister;
	307	DWORD dw_ControlRegister;
	308	DWORD dw_StatusRegister;
	309	} s_PulseEncoderModuleInfo;
	310
c995fe94	311	/* Tor conter infos */
c995fe94 ADG	312	struct {
	313	struct {
	314	BYTE b_TorCounterInit;
	315	BYTE b_TimingUnit;
	316	BYTE b_InterruptEnable;
	317	double d_TimingInterval;
	318	ULONG ul_RealTimingInterval;
	319	} s_TorCounterInfo[2];
	320	BYTE b_PCIInputClock;
	321	} s_TorCounterModuleInfo;
	322
c995fe94	323	/* PWM infos */
c995fe94 ADG	324	struct {
	325	struct {
	326	BYTE b_PWMInit;
	327	BYTE b_TimingUnit;
	328	BYTE b_InterruptEnable;
	329	double d_LowTiming;
	330	double d_HighTiming;
	331	ULONG ul_RealLowTiming;
	332	ULONG ul_RealHighTiming;
	333	} s_PWMInfo[2];
	334	BYTE b_ClockSelection;
	335	} s_PWMModuleInfo;
	336
c995fe94	337	/* ETM infos */
c995fe94 ADG	338	struct {
	339	struct {
	340	BYTE b_ETMEnable;
	341	BYTE b_ETMInterrupt;
	342	} s_ETMInfo[2];
	343	BYTE b_ETMInit;
	344	BYTE b_TimingUnit;
	345	BYTE b_ClockSelection;
	346	double d_TimingInterval;
	347	ULONG ul_Timing;
	348	} s_ETMModuleInfo;
	349
c995fe94	350	/* CDA infos */
c995fe94 ADG	351	struct {
	352	BYTE b_CDAEnable;
	353	BYTE b_CDAInterrupt;
	354	BYTE b_CDAInit;
	355	BYTE b_FctSelection;
	356	BYTE b_CDAReadFIFOOverflow;
	357	} s_CDAModuleInfo;
	358
	359	} str_ModuleInfo;
c995fe94	360
15d8826a	361	/* Private structure for the addi_apci3120 driver */
c995fe94 ADG	362	typedef struct {
	363
	364	INT iobase;
	365	INT i_IobaseAmcc; // base+size for AMCC chip
	366	INT i_IobaseAddon; //addon base address
	367	INT i_IobaseReserved;
	368	ULONG_PTR dw_AiBase;
	369	struct pcilst_struct *amcc; // ptr too AMCC data
	370	BYTE allocated; // we have blocked card
	371	BYTE b_ValidDriver; // driver is ok
	372	BYTE b_AiContinuous; // we do unlimited AI
	373	BYTE b_AiInitialisation;
	374	UINT ui_AiActualScan; //how many scans we finished
	375	UINT ui_AiBufferPtr; // data buffer ptr in samples
	376	UINT ui_AiNbrofChannels; // how many channels is measured
	377	UINT ui_AiScanLength; // Length of actual scanlist
	378	UINT ui_AiActualScanPosition; // position in actual scan
	379	PUINT pui_AiChannelList; // actual chanlist
	380	UINT ui_AiChannelList[32]; // actual chanlist
	381	BYTE b_AiChannelConfiguration[32]; // actual chanlist
	382	UINT ui_AiReadData[32];
	383	DWORD dw_AiInitialised;
	384	UINT ui_AiTimer0; //Timer Constant for Timer0
	385	UINT ui_AiTimer1; //Timer constant for Timer1
	386	UINT ui_AiFlags;
	387	UINT ui_AiDataLength;
790c5541	388	short *AiData; // Pointer to sample data
c995fe94 ADG	389	UINT ui_AiNbrofScans; // number of scans to do
	390	USHORT us_UseDma; // To use Dma or not
	391	BYTE b_DmaDoubleBuffer; // we can use double buffering
	392	UINT ui_DmaActualBuffer; // which buffer is used now
	393	//*UPDATE-0.7.57->0.7.68
	394	//ULONG ul_DmaBufferVirtual[2];// pointers to begin of DMA buffer
790c5541	395	short *ul_DmaBufferVirtual[2]; // pointers to begin of DMA buffer
c995fe94 ADG	396	ULONG ul_DmaBufferHw[2]; // hw address of DMA buff
	397	UINT ui_DmaBufferSize[2]; // size of dma buffer in bytes
	398	UINT ui_DmaBufferUsesize[2]; // which size we may now used for transfer
	399	UINT ui_DmaBufferSamples[2]; // size in samples
	400	UINT ui_DmaBufferPages[2]; // number of pages in buffer
	401	BYTE b_DigitalOutputRegister; // Digital Output Register
	402	BYTE b_OutputMemoryStatus;
	403	BYTE b_AnalogInputChannelNbr; // Analog input channel Nbr
	404	BYTE b_AnalogOutputChannelNbr; // Analog input Output Nbr
	405	BYTE b_TimerSelectMode; // Contain data written at iobase + 0C
	406	BYTE b_ModeSelectRegister; // Contain data written at iobase + 0E
	407	USHORT us_OutputRegister; // Contain data written at iobase + 0
	408	BYTE b_InterruptState;
	409	BYTE b_TimerInit; // Specify if InitTimerWatchdog was load
	410	BYTE b_TimerStarted; // Specify if timer 2 is running or not
	411	BYTE b_Timer2Mode; // Specify the timer 2 mode
	412	BYTE b_Timer2Interrupt; //Timer2 interrupt enable or disable
	413	BYTE b_AiCyclicAcquisition; // indicate cyclic acquisition
	414	BYTE b_InterruptMode; // eoc eos or dma
	415	BYTE b_EocEosInterrupt; // Enable disable eoc eos interrupt
	416	UINT ui_EocEosConversionTime;
	417	BYTE b_EocEosConversionTimeBase;
	418	BYTE b_SingelDiff;
15d8826a	419	BYTE b_ExttrigEnable; /* To enable or disable external trigger */
c995fe94	420
15d8826a GKH	421	/* Pointer to the current process */
15d8826a GKH	422	struct task_struct *tsk_Current;
c995fe94 ADG	423	boardtype *ps_BoardInfo;
c995fe94 ADG	424
15d8826a	425	/* Hardware board infos for 1710 */
c995fe94	426	struct {
15d8826a	427	UINT ui_Address; /* Board address */
c995fe94	428	UINT ui_FlashAddress;
15d8826a GKH	429	BYTE b_InterruptNbr; /* Board interrupt number */
15d8826a GKH	430	BYTE b_SlotNumber; /* PCI slot number */
c995fe94	431	BYTE b_BoardVersion;
15d8826a	432	DWORD dw_MolduleConfiguration[4]; /* Module config */
c995fe94 ADG	433	} s_BoardInfos;
c995fe94 ADG	434
c995fe94	435	/* Interrupt infos */
c995fe94	436	struct {
15d8826a GKH	437	ULONG ul_InterruptOccur; /* 0 : No interrupt occur */
	438	/* > 0 : Interrupt occur */
	439	UINT ui_Read; /* Read FIFO */
	440	UINT ui_Write; /* Write FIFO */
c995fe94 ADG	441	struct {
c995fe94 ADG	442	BYTE b_OldModuleMask;
15d8826a	443	ULONG ul_OldInterruptMask; /* Interrupt mask */
c995fe94 ADG	444	ULONG ul_OldCounterLatchValue; /* Interrupt counter value */
	445	} s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT];
	446	} s_InterruptParameters;
	447
	448	str_ModuleInfo s_ModuleInfo[4];
	449	ULONG ul_TTLPortConfiguration[10];
	450
	451	} addi_private;
	452
15d8826a	453	static unsigned short pci_list_builded; /* set to 1 when list of card is known */
c995fe94	454
15d8826a	455	/* Function declarations */
0707bb04	456	static int i_ADDI_Attach(struct comedi_device dev, struct comedi_devconfig it);
71b5f4f1 BP	457	static int i_ADDI_Detach(struct comedi_device *dev);
71b5f4f1 BP	458	static int i_ADDI_Reset(struct comedi_device *dev);
c995fe94 ADG	459
c995fe94 ADG	460	static irqreturn_t v_ADDI_Interrupt(int irq, void *d PT_REGS_ARG);
34c43922	461	static int i_ADDIDATA_InsnReadEeprom(struct comedi_device dev, struct comedi_subdevice s,
90035c08	462	struct comedi_insn insn, unsigned int data);