Staging: comedi: Remove PCRANGE typedef in addi-data
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / comedi / drivers / addi-data / addi_common.h
CommitLineData
c995fe94 1/*
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2 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3 *
4 * ADDI-DATA GmbH
5 * Dieselstrasse 3
6 * D-77833 Ottersweier
7 * Tel: +19(0)7223/9493-0
8 * Fax: +49(0)7223/9493-92
9 * http://www.addi-data-com
10 * info@addi-data.com
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the Free
14 * Software Foundation; either version 2 of the License, or (at your option)
15 * any later version.
16 */
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17
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/sched.h>
21#include <linux/mm.h>
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22#include <linux/slab.h>
23#include <linux/errno.h>
24#include <linux/ioport.h>
25#include <linux/delay.h>
26#include <linux/interrupt.h>
27#include <linux/timex.h>
28#include <linux/timer.h>
29#include <linux/pci.h>
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30#include <linux/io.h>
31#include <linux/kmod.h>
32#include <linux/uaccess.h>
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33#include "../../comedidev.h"
34#include "addi_amcc_s5933.h"
c995fe94 35
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36#define ERROR -1
37#define SUCCESS 1
c995fe94 38
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39#define LOBYTE(W) (unsigned char)((W) & 0xFF)
40#define HIBYTE(W) (unsigned char)(((W) >> 8) & 0xFF)
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41#define MAKEWORD(H, L) (unsigned short)((L) | ((H) << 8))
42#define LOWORD(W) (unsigned short)((W) & 0xFFFF)
43#define HIWORD(W) (unsigned short)(((W) >> 16) & 0xFFFF)
117102b0 44#define MAKEDWORD(H, L) (unsigned int)((L) | ((H) << 16))
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45
46#define ADDI_ENABLE 1
47#define ADDI_DISABLE 0
48#define APCI1710_SAVE_INTERRUPT 1
49
50#define ADDIDATA_EEPROM 1
51#define ADDIDATA_NO_EEPROM 0
52#define ADDIDATA_93C76 "93C76"
53#define ADDIDATA_S5920 "S5920"
54#define ADDIDATA_S5933 "S5933"
55#define ADDIDATA_9054 "9054"
56
57/* ADDIDATA Enable Disable */
58#define ADDIDATA_ENABLE 1
59#define ADDIDATA_DISABLE 0
60
61/* Structures */
62
63/* structure for the boardtype */
64typedef struct {
18002713 65 const char *pc_DriverName; // driver name
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66 int i_VendorId; //PCI vendor a device ID of card
67 int i_DeviceId;
68 int i_IorangeBase0;
69 int i_IorangeBase1;
70 int i_IorangeBase2; // base 2 range
71 int i_IorangeBase3; // base 3 range
72 int i_PCIEeprom; // eeprom present or not
18002713 73 char *pc_EepromChip; // type of chip
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74 int i_NbrAiChannel; // num of A/D chans
75 int i_NbrAiChannelDiff; // num of A/D chans in diff mode
76 int i_AiChannelList; // len of chanlist
77 int i_NbrAoChannel; // num of D/A chans
78 int i_AiMaxdata; // resolution of A/D
79 int i_AoMaxdata; // resolution of D/A
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80 const struct comedi_lrange *pr_AiRangelist; /* rangelist for A/D */
81 const struct comedi_lrange *pr_AoRangelist; /* rangelist for D/A */
c995fe94 82
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83 int i_NbrDiChannel; // Number of DI channels
84 int i_NbrDoChannel; // Number of DO channels
85 int i_DoMaxdata; // data to set all chanels high
c995fe94 86
74b894e5 87 int i_NbrTTLChannel; // Number of TTL channels
1c09a82c 88 const struct comedi_lrange *pr_TTLRangelist; /* rangelist for TTL */
c995fe94 89
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90 int i_Dma; // dma present or not
91 int i_Timer; // timer subdevice present or not
1783fbfe 92 unsigned char b_AvailableConvertUnit;
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93 unsigned int ui_MinAcquisitiontimeNs; // Minimum Acquisition in Nano secs
94 unsigned int ui_MinDelaytimeNs; // Minimum Delay in Nano secs
c995fe94 95
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96 /* interrupt and reset */
97 void (*v_hwdrv_Interrupt)(int irq, void *d);
71b5f4f1 98 int (*i_hwdrv_Reset)(struct comedi_device *dev);
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99
100 /* Subdevice functions */
101
102 /* ANALOG INPUT */
71b5f4f1 103 int (*i_hwdrv_InsnConfigAnalogInput)(struct comedi_device *dev,
34c43922 104 struct comedi_subdevice *s,
90035c08 105 struct comedi_insn *insn,
790c5541 106 unsigned int *data);
71b5f4f1 107 int (*i_hwdrv_InsnReadAnalogInput)(struct comedi_device *dev,
34c43922 108 struct comedi_subdevice *s,
90035c08 109 struct comedi_insn *insn,
790c5541 110 unsigned int *data);
71b5f4f1 111 int (*i_hwdrv_InsnWriteAnalogInput)(struct comedi_device *dev,
34c43922 112 struct comedi_subdevice *s,
90035c08 113 struct comedi_insn *insn,
790c5541 114 unsigned int *data);
71b5f4f1 115 int (*i_hwdrv_InsnBitsAnalogInput)(struct comedi_device *dev,
34c43922 116 struct comedi_subdevice *s,
90035c08 117 struct comedi_insn *insn,
790c5541 118 unsigned int *data);
71b5f4f1 119 int (*i_hwdrv_CommandTestAnalogInput)(struct comedi_device *dev,
34c43922 120 struct comedi_subdevice *s,
ea6d0d4c 121 struct comedi_cmd *cmd);
71b5f4f1 122 int (*i_hwdrv_CommandAnalogInput)(struct comedi_device *dev,
34c43922 123 struct comedi_subdevice *s);
71b5f4f1 124 int (*i_hwdrv_CancelAnalogInput)(struct comedi_device *dev,
34c43922 125 struct comedi_subdevice *s);
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126
127 /* Analog Output */
71b5f4f1 128 int (*i_hwdrv_InsnConfigAnalogOutput)(struct comedi_device *dev,
34c43922 129 struct comedi_subdevice *s,
90035c08 130 struct comedi_insn *insn,
790c5541 131 unsigned int *data);
71b5f4f1 132 int (*i_hwdrv_InsnWriteAnalogOutput)(struct comedi_device *dev,
34c43922 133 struct comedi_subdevice *s,
90035c08 134 struct comedi_insn *insn,
790c5541 135 unsigned int *data);
71b5f4f1 136 int (*i_hwdrv_InsnBitsAnalogOutput)(struct comedi_device *dev,
34c43922 137 struct comedi_subdevice *s,
90035c08 138 struct comedi_insn *insn,
790c5541 139 unsigned int *data);
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140
141 /* Digital Input */
71b5f4f1 142 int (*i_hwdrv_InsnConfigDigitalInput) (struct comedi_device *dev,
34c43922 143 struct comedi_subdevice *s,
90035c08 144 struct comedi_insn *insn,
790c5541 145 unsigned int *data);
71b5f4f1 146 int (*i_hwdrv_InsnReadDigitalInput) (struct comedi_device *dev,
34c43922 147 struct comedi_subdevice *s,
90035c08 148 struct comedi_insn *insn,
790c5541 149 unsigned int *data);
71b5f4f1 150 int (*i_hwdrv_InsnWriteDigitalInput) (struct comedi_device *dev,
34c43922 151 struct comedi_subdevice *s,
90035c08 152 struct comedi_insn *insn,
790c5541 153 unsigned int *data);
71b5f4f1 154 int (*i_hwdrv_InsnBitsDigitalInput) (struct comedi_device *dev,
34c43922 155 struct comedi_subdevice *s,
90035c08 156 struct comedi_insn *insn,
790c5541 157 unsigned int *data);
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158
159 /* Digital Output */
71b5f4f1 160 int (*i_hwdrv_InsnConfigDigitalOutput)(struct comedi_device *dev,
34c43922 161 struct comedi_subdevice *s,
90035c08 162 struct comedi_insn *insn,
790c5541 163 unsigned int *data);
71b5f4f1 164 int (*i_hwdrv_InsnWriteDigitalOutput)(struct comedi_device *dev,
34c43922 165 struct comedi_subdevice *s,
90035c08 166 struct comedi_insn *insn,
790c5541 167 unsigned int *data);
71b5f4f1 168 int (*i_hwdrv_InsnBitsDigitalOutput)(struct comedi_device *dev,
34c43922 169 struct comedi_subdevice *s,
90035c08 170 struct comedi_insn *insn,
790c5541 171 unsigned int *data);
71b5f4f1 172 int (*i_hwdrv_InsnReadDigitalOutput)(struct comedi_device *dev,
34c43922 173 struct comedi_subdevice *s,
90035c08 174 struct comedi_insn *insn,
790c5541 175 unsigned int *data);
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176
177 /* TIMER */
71b5f4f1 178 int (*i_hwdrv_InsnConfigTimer)(struct comedi_device *dev,
34c43922 179 struct comedi_subdevice *s,
90035c08 180 struct comedi_insn *insn, unsigned int *data);
71b5f4f1 181 int (*i_hwdrv_InsnWriteTimer)(struct comedi_device *dev,
90035c08 182 struct comedi_subdevice *s, struct comedi_insn *insn,
790c5541 183 unsigned int *data);
34c43922 184 int (*i_hwdrv_InsnReadTimer)(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 185 struct comedi_insn *insn, unsigned int *data);
34c43922 186 int (*i_hwdrv_InsnBitsTimer)(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 187 struct comedi_insn *insn, unsigned int *data);
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188
189 /* TTL IO */
71b5f4f1 190 int (*i_hwdr_ConfigInitTTLIO)(struct comedi_device *dev,
90035c08 191 struct comedi_subdevice *s, struct comedi_insn *insn,
790c5541 192 unsigned int *data);
34c43922 193 int (*i_hwdr_ReadTTLIOBits)(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 194 struct comedi_insn *insn, unsigned int *data);
71b5f4f1 195 int (*i_hwdr_ReadTTLIOAllPortValue)(struct comedi_device *dev,
34c43922 196 struct comedi_subdevice *s,
90035c08 197 struct comedi_insn *insn,
790c5541 198 unsigned int *data);
71b5f4f1 199 int (*i_hwdr_WriteTTLIOChlOnOff)(struct comedi_device *dev,
34c43922 200 struct comedi_subdevice *s,
90035c08 201 struct comedi_insn *insn, unsigned int *data);
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202} boardtype;
203
204//MODULE INFO STRUCTURE
205
206typedef union {
c995fe94 207 /* Incremental counter infos */
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208 struct {
209 union {
210 struct {
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211 unsigned char b_ModeRegister1;
212 unsigned char b_ModeRegister2;
213 unsigned char b_ModeRegister3;
214 unsigned char b_ModeRegister4;
c995fe94 215 } s_ByteModeRegister;
756e9d7c 216 unsigned int dw_ModeRegister1_2_3_4;
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217 } s_ModeRegister;
218
219 struct {
220 unsigned int b_IndexInit:1;
221 unsigned int b_CounterInit:1;
222 unsigned int b_ReferenceInit:1;
223 unsigned int b_IndexInterruptOccur:1;
224 unsigned int b_CompareLogicInit:1;
225 unsigned int b_FrequencyMeasurementInit:1;
226 unsigned int b_FrequencyMeasurementEnable:1;
227 } s_InitFlag;
228
229 } s_SiemensCounterInfo;
230
c995fe94 231 /* SSI infos */
c995fe94 232 struct {
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233 unsigned char b_SSIProfile;
234 unsigned char b_PositionTurnLength;
235 unsigned char b_TurnCptLength;
236 unsigned char b_SSIInit;
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237 } s_SSICounterInfo;
238
c995fe94 239 /* TTL I/O infos */
c995fe94 240 struct {
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241 unsigned char b_TTLInit;
242 unsigned char b_PortConfiguration[4];
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243 } s_TTLIOInfo;
244
c995fe94 245 /* Digital I/O infos */
c995fe94 246 struct {
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247 unsigned char b_DigitalInit;
248 unsigned char b_ChannelAMode;
249 unsigned char b_ChannelBMode;
250 unsigned char b_OutputMemoryEnabled;
756e9d7c 251 unsigned int dw_OutputMemory;
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252 } s_DigitalIOInfo;
253
254 /*********************/
255 /* 82X54 timer infos */
256 /*********************/
257
258 struct {
259 struct {
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260 unsigned char b_82X54Init;
261 unsigned char b_InputClockSelection;
262 unsigned char b_InputClockLevel;
263 unsigned char b_OutputLevel;
264 unsigned char b_HardwareGateLevel;
756e9d7c 265 unsigned int dw_ConfigurationWord;
c995fe94 266 } s_82X54TimerInfo[3];
1783fbfe 267 unsigned char b_InterruptMask;
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268 } s_82X54ModuleInfo;
269
270 /*********************/
271 /* Chronometer infos */
272 /*********************/
273
274 struct {
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275 unsigned char b_ChronoInit;
276 unsigned char b_InterruptMask;
277 unsigned char b_PCIInputClock;
278 unsigned char b_TimingUnit;
279 unsigned char b_CycleMode;
c995fe94 280 double d_TimingInterval;
756e9d7c 281 unsigned int dw_ConfigReg;
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282 } s_ChronoModuleInfo;
283
284 /***********************/
285 /* Pulse encoder infos */
286 /***********************/
287
288 struct {
289 struct {
1783fbfe 290 unsigned char b_PulseEncoderInit;
c995fe94 291 } s_PulseEncoderInfo[4];
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292 unsigned int dw_SetRegister;
293 unsigned int dw_ControlRegister;
294 unsigned int dw_StatusRegister;
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295 } s_PulseEncoderModuleInfo;
296
c995fe94 297 /* Tor conter infos */
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298 struct {
299 struct {
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300 unsigned char b_TorCounterInit;
301 unsigned char b_TimingUnit;
302 unsigned char b_InterruptEnable;
c995fe94 303 double d_TimingInterval;
82a6e2e7 304 unsigned int ul_RealTimingInterval;
c995fe94 305 } s_TorCounterInfo[2];
1783fbfe 306 unsigned char b_PCIInputClock;
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307 } s_TorCounterModuleInfo;
308
c995fe94 309 /* PWM infos */
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310 struct {
311 struct {
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312 unsigned char b_PWMInit;
313 unsigned char b_TimingUnit;
314 unsigned char b_InterruptEnable;
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315 double d_LowTiming;
316 double d_HighTiming;
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317 unsigned int ul_RealLowTiming;
318 unsigned int ul_RealHighTiming;
c995fe94 319 } s_PWMInfo[2];
1783fbfe 320 unsigned char b_ClockSelection;
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321 } s_PWMModuleInfo;
322
c995fe94 323 /* ETM infos */
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324 struct {
325 struct {
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326 unsigned char b_ETMEnable;
327 unsigned char b_ETMInterrupt;
c995fe94 328 } s_ETMInfo[2];
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329 unsigned char b_ETMInit;
330 unsigned char b_TimingUnit;
331 unsigned char b_ClockSelection;
c995fe94 332 double d_TimingInterval;
82a6e2e7 333 unsigned int ul_Timing;
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334 } s_ETMModuleInfo;
335
c995fe94 336 /* CDA infos */
c995fe94 337 struct {
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338 unsigned char b_CDAEnable;
339 unsigned char b_CDAInterrupt;
340 unsigned char b_CDAInit;
341 unsigned char b_FctSelection;
342 unsigned char b_CDAReadFIFOOverflow;
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343 } s_CDAModuleInfo;
344
345} str_ModuleInfo;
c995fe94 346
15d8826a 347/* Private structure for the addi_apci3120 driver */
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348typedef struct {
349
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350 int iobase;
351 int i_IobaseAmcc; // base+size for AMCC chip
352 int i_IobaseAddon; //addon base address
353 int i_IobaseReserved;
a3435c92 354 unsigned long dw_AiBase;
c995fe94 355 struct pcilst_struct *amcc; // ptr too AMCC data
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356 unsigned char allocated; // we have blocked card
357 unsigned char b_ValidDriver; // driver is ok
358 unsigned char b_AiContinuous; // we do unlimited AI
359 unsigned char b_AiInitialisation;
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360 unsigned int ui_AiActualScan; //how many scans we finished
361 unsigned int ui_AiBufferPtr; // data buffer ptr in samples
362 unsigned int ui_AiNbrofChannels; // how many channels is measured
363 unsigned int ui_AiScanLength; // Length of actual scanlist
364 unsigned int ui_AiActualScanPosition; // position in actual scan
365 unsigned int * pui_AiChannelList; // actual chanlist
366 unsigned int ui_AiChannelList[32]; // actual chanlist
1783fbfe 367 unsigned char b_AiChannelConfiguration[32]; // actual chanlist
117102b0 368 unsigned int ui_AiReadData[32];
756e9d7c 369 unsigned int dw_AiInitialised;
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370 unsigned int ui_AiTimer0; //Timer Constant for Timer0
371 unsigned int ui_AiTimer1; //Timer constant for Timer1
372 unsigned int ui_AiFlags;
373 unsigned int ui_AiDataLength;
790c5541 374 short *AiData; // Pointer to sample data
117102b0 375 unsigned int ui_AiNbrofScans; // number of scans to do
a9fce7c9 376 unsigned short us_UseDma; // To use Dma or not
1783fbfe 377 unsigned char b_DmaDoubleBuffer; // we can use double buffering
117102b0 378 unsigned int ui_DmaActualBuffer; // which buffer is used now
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379 /* UPDATE-0.7.57->0.7.68 */
380 /* unsigned int ul_DmaBufferVirtual[2]; pointers to begin of DMA buffer */
790c5541 381 short *ul_DmaBufferVirtual[2]; // pointers to begin of DMA buffer
82a6e2e7 382 unsigned int ul_DmaBufferHw[2]; // hw address of DMA buff
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383 unsigned int ui_DmaBufferSize[2]; // size of dma buffer in bytes
384 unsigned int ui_DmaBufferUsesize[2]; // which size we may now used for transfer
385 unsigned int ui_DmaBufferSamples[2]; // size in samples
386 unsigned int ui_DmaBufferPages[2]; // number of pages in buffer
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387 unsigned char b_DigitalOutputRegister; // Digital Output Register
388 unsigned char b_OutputMemoryStatus;
389 unsigned char b_AnalogInputChannelNbr; // Analog input channel Nbr
390 unsigned char b_AnalogOutputChannelNbr; // Analog input Output Nbr
391 unsigned char b_TimerSelectMode; // Contain data written at iobase + 0C
392 unsigned char b_ModeSelectRegister; // Contain data written at iobase + 0E
a9fce7c9 393 unsigned short us_OutputRegister; // Contain data written at iobase + 0
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394 unsigned char b_InterruptState;
395 unsigned char b_TimerInit; // Specify if InitTimerWatchdog was load
396 unsigned char b_TimerStarted; // Specify if timer 2 is running or not
397 unsigned char b_Timer2Mode; // Specify the timer 2 mode
398 unsigned char b_Timer2Interrupt; //Timer2 interrupt enable or disable
399 unsigned char b_AiCyclicAcquisition; // indicate cyclic acquisition
400 unsigned char b_InterruptMode; // eoc eos or dma
401 unsigned char b_EocEosInterrupt; // Enable disable eoc eos interrupt
117102b0 402 unsigned int ui_EocEosConversionTime;
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403 unsigned char b_EocEosConversionTimeBase;
404 unsigned char b_SingelDiff;
405 unsigned char b_ExttrigEnable; /* To enable or disable external trigger */
c995fe94 406
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407 /* Pointer to the current process */
408 struct task_struct *tsk_Current;
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409 boardtype *ps_BoardInfo;
410
15d8826a 411 /* Hardware board infos for 1710 */
c995fe94 412 struct {
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413 unsigned int ui_Address; /* Board address */
414 unsigned int ui_FlashAddress;
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415 unsigned char b_InterruptNbr; /* Board interrupt number */
416 unsigned char b_SlotNumber; /* PCI slot number */
417 unsigned char b_BoardVersion;
756e9d7c 418 unsigned int dw_MolduleConfiguration[4]; /* Module config */
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419 } s_BoardInfos;
420
c995fe94 421 /* Interrupt infos */
c995fe94 422 struct {
82a6e2e7 423 unsigned int ul_InterruptOccur; /* 0 : No interrupt occur */
15d8826a 424 /* > 0 : Interrupt occur */
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425 unsigned int ui_Read; /* Read FIFO */
426 unsigned int ui_Write; /* Write FIFO */
c995fe94 427 struct {
1783fbfe 428 unsigned char b_OldModuleMask;
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429 unsigned int ul_OldInterruptMask; /* Interrupt mask */
430 unsigned int ul_OldCounterLatchValue; /* Interrupt counter value */
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431 } s_FIFOInterruptParameters[APCI1710_SAVE_INTERRUPT];
432 } s_InterruptParameters;
433
434 str_ModuleInfo s_ModuleInfo[4];
82a6e2e7 435 unsigned int ul_TTLPortConfiguration[10];
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436
437} addi_private;
438
15d8826a 439static unsigned short pci_list_builded; /* set to 1 when list of card is known */
c995fe94 440
15d8826a 441/* Function declarations */
0707bb04 442static int i_ADDI_Attach(struct comedi_device *dev, struct comedi_devconfig *it);
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443static int i_ADDI_Detach(struct comedi_device *dev);
444static int i_ADDI_Reset(struct comedi_device *dev);
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445
446static irqreturn_t v_ADDI_Interrupt(int irq, void *d PT_REGS_ARG);
34c43922 447static int i_ADDIDATA_InsnReadEeprom(struct comedi_device *dev, struct comedi_subdevice *s,
90035c08 448 struct comedi_insn *insn, unsigned int *data);