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c995fe94 ADG |
1 | /** |
2 | @verbatim | |
3 | ||
4 | Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module. | |
5 | ||
6 | ADDI-DATA GmbH | |
7 | Dieselstrasse 3 | |
8 | D-77833 Ottersweier | |
9 | Tel: +19(0)7223/9493-0 | |
10 | Fax: +49(0)7223/9493-92 | |
11 | http://www.addi-data-com | |
12 | info@addi-data.com | |
13 | ||
14 | This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | ||
20 | You shoud also find the complete GPL in the COPYING file accompanying this source code. | |
21 | ||
22 | @endverbatim | |
23 | */ | |
24 | /* | |
25 | ||
26 | +-----------------------------------------------------------------------+ | |
27 | | (C) ADDI-DATA GmbH Dieselstraße 3 D-77833 Ottersweier | | |
28 | +-----------------------------------------------------------------------+ | |
29 | | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com | | |
30 | | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com | | |
31 | +-----------------------------------------------------------------------+ | |
32 | | Project : API APCI1710 | Compiler : gcc | | |
33 | | Module name : TOR.C | Version : 2.96 | | |
34 | +-------------------------------+---------------------------------------+ | |
35 | | Project manager: Eric Stolz | Date : 02/12/2002 | | |
36 | +-----------------------------------------------------------------------+ | |
37 | | Description : APCI-1710 tor counter module | | |
38 | | | | |
39 | | | | |
40 | +-----------------------------------------------------------------------+ | |
41 | | UPDATES | | |
42 | +-----------------------------------------------------------------------+ | |
43 | | Date | Author | Description of updates | | |
44 | +----------+-----------+------------------------------------------------+ | |
45 | | 27/01/99 | S. Weber | 40 MHz implementation | | |
46 | +-----------------------------------------------------------------------+ | |
47 | | 28/04/00 | S. Weber | Simple,double and quadruple mode implementation| | |
48 | | | | Extern clock implementation | | |
49 | +-----------------------------------------------------------------------+ | |
50 | | 08/05/00 | Guinot C | - 0400/0228 All Function in RING 0 | | |
51 | | | | available | | |
52 | +-----------------------------------------------------------------------+ | |
53 | */ | |
54 | ||
55 | /* | |
56 | +----------------------------------------------------------------------------+ | |
57 | | Included files | | |
58 | +----------------------------------------------------------------------------+ | |
59 | */ | |
60 | ||
61 | #include "APCI1710_Tor.h" | |
62 | ||
63 | /* | |
64 | +----------------------------------------------------------------------------+ | |
65 | | Function Name : _INT_ i_APCI1710_InitTorCounter | | |
66 | | (BYTE_ b_BoardHandle, | | |
67 | | BYTE_ b_ModulNbr, | | |
68 | | BYTE_ b_TorCounter, | | |
69 | | BYTE_ b_PCIInputClock, | | |
70 | | BYTE_ b_TimingUnit, | | |
71 | | ULONG_ ul_TimingInterval, | | |
72 | | PULONG_ pul_RealTimingInterval) | | |
73 | +----------------------------------------------------------------------------+ | |
74 | | Task : Configure the selected tor counter (b_TorCounter) | | |
75 | | from selected module (b_ModulNbr). | | |
76 | | The ul_TimingInterval and ul_TimingUnit determine the | | |
77 | | timing base for the measurement. | | |
78 | | The pul_RealTimingInterval return the real timing | | |
79 | | value. You must calling this function be for you call | | |
80 | | any other function witch access of the tor counter. | | |
81 | | | | |
82 | +----------------------------------------------------------------------------+ | |
83 | | Input Parameters : | | |
84 | | | |
85 | CR_AREF BYTE_ b_ModulNbr : Module number to configure | | |
86 | | (0 to 3) | | |
87 | | data[0] BYTE_ b_TorCounter : Tor counter selection | | |
88 | | (0 or 1). | | |
89 | | data[1] BYTE_ b_PCIInputClock : Selection from PCI bus clock| | |
90 | | - APCI1710_30MHZ : | | |
91 | | The PC have a PCI bus | | |
92 | | clock from 30 MHz | | |
93 | | - APCI1710_33MHZ : | | |
94 | | The PC have a PCI bus | | |
95 | | clock from 33 MHz | | |
96 | | - APCI1710_40MHZ | | |
97 | | The APCI-1710 have a | | |
98 | | integrated 40Mhz | | |
99 | | quartz. | | |
100 | | - APCI1710_GATE_INPUT | | |
101 | | Used the gate input for | | |
102 | | the base clock. If you | | |
103 | | have selected this option,| | |
104 | | than it is not possibl to | | |
105 | | used the gate input for | | |
106 | | enabled the acquisition | | |
107 | | data[2] BYTE_ b_TimingUnit : Base timing unit (0 to 4) | | |
108 | | 0 : ns | | |
109 | | 1 : µs | | |
110 | | 2 : ms | | |
111 | | 3 : s | | |
112 | | 4 : mn | | |
113 | | data[3] ULONG_ ul_TimingInterval : Base timing value. | | |
114 | +----------------------------------------------------------------------------+ | |
115 | | Output Parameters : PULONG_ pul_RealTimingInterval : Real base timing | | |
116 | | data[0] value. | | |
117 | +----------------------------------------------------------------------------+ | |
118 | | Return Value : 0: No error | | |
119 | | -1: The handle parameter of the board is wrong | | |
120 | | -2: Module selection wrong | | |
121 | | -3: The module is not a tor counter module | | |
122 | | -4: Tor counter selection is wrong | | |
123 | | -5: The selected PCI input clock is wrong | | |
124 | | -6: Timing unit selection is wrong | | |
125 | | -7: Base timing selection is wrong | | |
126 | | -8: You can not used the 40MHz clock selection wich | | |
127 | | this board | | |
128 | | -9: You can not used the 40MHz clock selection wich | | |
129 | | this TOR version | | |
130 | +----------------------------------------------------------------------------+ | |
131 | */ | |
132 | ||
133 | INT i_APCI1710_InsnConfigInitTorCounter(comedi_device * dev, | |
790c5541 | 134 | comedi_subdevice * s, comedi_insn * insn, unsigned int * data) |
c995fe94 ADG |
135 | { |
136 | INT i_ReturnValue = 0; | |
137 | ULONG ul_TimerValue = 0; | |
138 | DWORD dw_Command; | |
139 | double d_RealTimingInterval = 0; | |
140 | BYTE b_ModulNbr; | |
141 | BYTE b_TorCounter; | |
142 | BYTE b_PCIInputClock; | |
143 | BYTE b_TimingUnit; | |
144 | ULONG ul_TimingInterval; | |
145 | ULONG ul_RealTimingInterval = 0; | |
146 | ||
147 | i_ReturnValue = insn->n; | |
148 | b_ModulNbr = (BYTE) CR_AREF(insn->chanspec); | |
149 | ||
150 | b_TorCounter = (BYTE) data[0]; | |
151 | b_PCIInputClock = (BYTE) data[1]; | |
152 | b_TimingUnit = (BYTE) data[2]; | |
153 | ul_TimingInterval = (ULONG) data[3]; | |
154 | printk("INPUT clock %d\n", b_PCIInputClock); | |
155 | ||
156 | /**************************/ | |
157 | /* Test the module number */ | |
158 | /**************************/ | |
159 | ||
160 | if (b_ModulNbr < 4) { | |
161 | /***********************/ | |
162 | /* Test if tor counter */ | |
163 | /***********************/ | |
164 | ||
165 | if ((devpriv->s_BoardInfos. | |
166 | dw_MolduleConfiguration[b_ModulNbr] & | |
167 | 0xFFFF0000UL) == APCI1710_TOR_COUNTER) { | |
168 | /**********************************/ | |
169 | /* Test the tor counter selection */ | |
170 | /**********************************/ | |
171 | ||
172 | if (b_TorCounter <= 1) { | |
173 | /**************************/ | |
174 | /* Test the PCI bus clock */ | |
175 | /**************************/ | |
176 | ||
177 | if ((b_PCIInputClock == APCI1710_30MHZ) || | |
178 | (b_PCIInputClock == APCI1710_33MHZ) || | |
179 | (b_PCIInputClock == APCI1710_40MHZ) || | |
180 | (b_PCIInputClock == | |
181 | APCI1710_GATE_INPUT)) { | |
182 | /************************/ | |
183 | /* Test the timing unit */ | |
184 | /************************/ | |
185 | ||
186 | if ((b_TimingUnit <= 4) | |
187 | || (b_PCIInputClock == | |
188 | APCI1710_GATE_INPUT)) { | |
189 | /**********************************/ | |
190 | /* Test the base timing selection */ | |
191 | /**********************************/ | |
192 | ||
193 | if (((b_PCIInputClock == APCI1710_30MHZ) && (b_TimingUnit == 0) && (ul_TimingInterval >= 133) && (ul_TimingInterval <= 0xFFFFFFFFUL)) || ((b_PCIInputClock == APCI1710_30MHZ) && (b_TimingUnit == 1) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 571230650UL)) || ((b_PCIInputClock == APCI1710_30MHZ) && (b_TimingUnit == 2) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 571230UL)) || ((b_PCIInputClock == APCI1710_30MHZ) && (b_TimingUnit == 3) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 571UL)) || ((b_PCIInputClock == APCI1710_30MHZ) && (b_TimingUnit == 4) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 9UL)) || ((b_PCIInputClock == APCI1710_33MHZ) && (b_TimingUnit == 0) && (ul_TimingInterval >= 121) && (ul_TimingInterval <= 0xFFFFFFFFUL)) || ((b_PCIInputClock == APCI1710_33MHZ) && (b_TimingUnit == 1) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 519691043UL)) || ((b_PCIInputClock == APCI1710_33MHZ) && (b_TimingUnit == 2) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 519691UL)) || ((b_PCIInputClock == APCI1710_33MHZ) && (b_TimingUnit == 3) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 520UL)) || ((b_PCIInputClock == APCI1710_33MHZ) && (b_TimingUnit == 4) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 8UL)) || ((b_PCIInputClock == APCI1710_40MHZ) && (b_TimingUnit == 0) && (ul_TimingInterval >= 100) && (ul_TimingInterval <= 0xFFFFFFFFUL)) || ((b_PCIInputClock == APCI1710_40MHZ) && (b_TimingUnit == 1) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 429496729UL)) || ((b_PCIInputClock == APCI1710_40MHZ) && (b_TimingUnit == 2) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 429496UL)) || ((b_PCIInputClock == APCI1710_40MHZ) && (b_TimingUnit == 3) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 429UL)) || ((b_PCIInputClock == APCI1710_40MHZ) && (b_TimingUnit == 4) && (ul_TimingInterval >= 1) && (ul_TimingInterval <= 7UL)) || ((b_PCIInputClock == APCI1710_GATE_INPUT) && (ul_TimingInterval >= 2))) { | |
194 | /**************************/ | |
195 | /* Test the board version */ | |
196 | /**************************/ | |
197 | ||
198 | if (((b_PCIInputClock == APCI1710_40MHZ) && (devpriv->s_BoardInfos.b_BoardVersion > 0)) || (b_PCIInputClock != APCI1710_40MHZ)) { | |
199 | /************************/ | |
200 | /* Test the TOR version */ | |
201 | /************************/ | |
202 | ||
203 | if (((b_PCIInputClock == APCI1710_40MHZ) && ((devpriv->s_BoardInfos.dw_MolduleConfiguration[b_ModulNbr] & 0xFFFF) >= 0x3131)) || ((b_PCIInputClock == APCI1710_GATE_INPUT) && ((devpriv->s_BoardInfos.dw_MolduleConfiguration[b_ModulNbr] & 0xFFFF) >= 0x3132)) || (b_PCIInputClock == APCI1710_30MHZ) || (b_PCIInputClock == APCI1710_33MHZ)) { | |
204 | /*********************************/ | |
205 | /* Test if not extern clock used */ | |
206 | /*********************************/ | |
207 | ||
208 | if (b_PCIInputClock != APCI1710_GATE_INPUT) { | |
209 | fpu_begin | |
210 | (); | |
211 | /****************************************/ | |
212 | /* Calculate the timer 0 division fator */ | |
213 | /****************************************/ | |
214 | ||
215 | switch (b_TimingUnit) { | |
216 | /******/ | |
217 | /* ns */ | |
218 | /******/ | |
219 | ||
220 | case 0: | |
221 | ||
222 | /******************/ | |
223 | /* Timer 0 factor */ | |
224 | /******************/ | |
225 | ||
226 | ul_TimerValue | |
227 | = | |
228 | (ULONG) | |
229 | (ul_TimingInterval | |
230 | * | |
231 | (0.00025 * b_PCIInputClock)); | |
232 | ||
233 | /*******************/ | |
234 | /* Round the value */ | |
235 | /*******************/ | |
236 | ||
237 | if ((double)((double)ul_TimingInterval * (0.00025 * (double)b_PCIInputClock)) >= ((double)((double)ul_TimerValue + 0.5))) { | |
238 | ul_TimerValue | |
239 | = | |
240 | ul_TimerValue | |
241 | + | |
242 | 1; | |
243 | } | |
244 | ||
245 | /*****************************/ | |
246 | /* Calculate the real timing */ | |
247 | /*****************************/ | |
248 | ||
249 | ul_RealTimingInterval | |
250 | = | |
251 | (ULONG) | |
252 | (ul_TimerValue | |
253 | / | |
254 | (0.00025 * (double)b_PCIInputClock)); | |
255 | d_RealTimingInterval | |
256 | = | |
257 | (double) | |
258 | ul_TimerValue | |
259 | / | |
260 | (0.00025 | |
261 | * | |
262 | (double) | |
263 | b_PCIInputClock); | |
264 | ||
265 | if ((double)((double)ul_TimerValue / (0.00025 * (double)b_PCIInputClock)) >= (double)((double)ul_RealTimingInterval + 0.5)) { | |
266 | ul_RealTimingInterval | |
267 | = | |
268 | ul_RealTimingInterval | |
269 | + | |
270 | 1; | |
271 | } | |
272 | ||
273 | ul_TimingInterval | |
274 | = | |
275 | ul_TimingInterval | |
276 | - | |
277 | 1; | |
278 | ul_TimerValue | |
279 | = | |
280 | ul_TimerValue | |
281 | - | |
282 | 2; | |
283 | ||
284 | if (b_PCIInputClock != APCI1710_40MHZ) { | |
285 | ul_TimerValue | |
286 | = | |
287 | (ULONG) | |
288 | ( | |
289 | (double) | |
290 | (ul_TimerValue) | |
291 | * | |
292 | 1.007752288); | |
293 | } | |
294 | ||
295 | break; | |
296 | ||
297 | /******/ | |
298 | /* æs */ | |
299 | /******/ | |
300 | ||
301 | case 1: | |
302 | ||
303 | /******************/ | |
304 | /* Timer 0 factor */ | |
305 | /******************/ | |
306 | ||
307 | ul_TimerValue | |
308 | = | |
309 | (ULONG) | |
310 | (ul_TimingInterval | |
311 | * | |
312 | (0.25 * b_PCIInputClock)); | |
313 | ||
314 | /*******************/ | |
315 | /* Round the value */ | |
316 | /*******************/ | |
317 | ||
318 | if ((double)((double)ul_TimingInterval * (0.25 * (double)b_PCIInputClock)) >= ((double)((double)ul_TimerValue + 0.5))) { | |
319 | ul_TimerValue | |
320 | = | |
321 | ul_TimerValue | |
322 | + | |
323 | 1; | |
324 | } | |
325 | ||
326 | /*****************************/ | |
327 | /* Calculate the real timing */ | |
328 | /*****************************/ | |
329 | ||
330 | ul_RealTimingInterval | |
331 | = | |
332 | (ULONG) | |
333 | (ul_TimerValue | |
334 | / | |
335 | (0.25 * (double)b_PCIInputClock)); | |
336 | d_RealTimingInterval | |
337 | = | |
338 | (double) | |
339 | ul_TimerValue | |
340 | / | |
341 | ( | |
342 | (double) | |
343 | 0.25 | |
344 | * | |
345 | (double) | |
346 | b_PCIInputClock); | |
347 | ||
348 | if ((double)((double)ul_TimerValue / (0.25 * (double)b_PCIInputClock)) >= (double)((double)ul_RealTimingInterval + 0.5)) { | |
349 | ul_RealTimingInterval | |
350 | = | |
351 | ul_RealTimingInterval | |
352 | + | |
353 | 1; | |
354 | } | |
355 | ||
356 | ul_TimingInterval | |
357 | = | |
358 | ul_TimingInterval | |
359 | - | |
360 | 1; | |
361 | ul_TimerValue | |
362 | = | |
363 | ul_TimerValue | |
364 | - | |
365 | 2; | |
366 | ||
367 | if (b_PCIInputClock != APCI1710_40MHZ) { | |
368 | ul_TimerValue | |
369 | = | |
370 | (ULONG) | |
371 | ( | |
372 | (double) | |
373 | (ul_TimerValue) | |
374 | * | |
375 | 1.007752288); | |
376 | } | |
377 | ||
378 | break; | |
379 | ||
380 | /******/ | |
381 | /* ms */ | |
382 | /******/ | |
383 | ||
384 | case 2: | |
385 | ||
386 | /******************/ | |
387 | /* Timer 0 factor */ | |
388 | /******************/ | |
389 | ||
390 | ul_TimerValue | |
391 | = | |
392 | ul_TimingInterval | |
393 | * | |
394 | (250.0 | |
395 | * | |
396 | b_PCIInputClock); | |
397 | ||
398 | /*******************/ | |
399 | /* Round the value */ | |
400 | /*******************/ | |
401 | ||
402 | if ((double)((double)ul_TimingInterval * (250.0 * (double)b_PCIInputClock)) >= ((double)((double)ul_TimerValue + 0.5))) { | |
403 | ul_TimerValue | |
404 | = | |
405 | ul_TimerValue | |
406 | + | |
407 | 1; | |
408 | } | |
409 | ||
410 | /*****************************/ | |
411 | /* Calculate the real timing */ | |
412 | /*****************************/ | |
413 | ||
414 | ul_RealTimingInterval | |
415 | = | |
416 | (ULONG) | |
417 | (ul_TimerValue | |
418 | / | |
419 | (250.0 * (double)b_PCIInputClock)); | |
420 | d_RealTimingInterval | |
421 | = | |
422 | (double) | |
423 | ul_TimerValue | |
424 | / | |
425 | (250.0 | |
426 | * | |
427 | (double) | |
428 | b_PCIInputClock); | |
429 | ||
430 | if ((double)((double)ul_TimerValue / (250.0 * (double)b_PCIInputClock)) >= (double)((double)ul_RealTimingInterval + 0.5)) { | |
431 | ul_RealTimingInterval | |
432 | = | |
433 | ul_RealTimingInterval | |
434 | + | |
435 | 1; | |
436 | } | |
437 | ||
438 | ul_TimingInterval | |
439 | = | |
440 | ul_TimingInterval | |
441 | - | |
442 | 1; | |
443 | ul_TimerValue | |
444 | = | |
445 | ul_TimerValue | |
446 | - | |
447 | 2; | |
448 | ||
449 | if (b_PCIInputClock != APCI1710_40MHZ) { | |
450 | ul_TimerValue | |
451 | = | |
452 | (ULONG) | |
453 | ( | |
454 | (double) | |
455 | (ul_TimerValue) | |
456 | * | |
457 | 1.007752288); | |
458 | } | |
459 | ||
460 | break; | |
461 | ||
462 | /*****/ | |
463 | /* s */ | |
464 | /*****/ | |
465 | ||
466 | case 3: | |
467 | ||
468 | /******************/ | |
469 | /* Timer 0 factor */ | |
470 | /******************/ | |
471 | ||
472 | ul_TimerValue | |
473 | = | |
474 | (ULONG) | |
475 | (ul_TimingInterval | |
476 | * | |
477 | (250000.0 | |
478 | * | |
479 | b_PCIInputClock)); | |
480 | ||
481 | /*******************/ | |
482 | /* Round the value */ | |
483 | /*******************/ | |
484 | ||
485 | if ((double)((double)ul_TimingInterval * (250000.0 * (double)b_PCIInputClock)) >= ((double)((double)ul_TimerValue + 0.5))) { | |
486 | ul_TimerValue | |
487 | = | |
488 | ul_TimerValue | |
489 | + | |
490 | 1; | |
491 | } | |
492 | ||
493 | /*****************************/ | |
494 | /* Calculate the real timing */ | |
495 | /*****************************/ | |
496 | ||
497 | ul_RealTimingInterval | |
498 | = | |
499 | (ULONG) | |
500 | (ul_TimerValue | |
501 | / | |
502 | (250000.0 | |
503 | * | |
504 | (double) | |
505 | b_PCIInputClock)); | |
506 | d_RealTimingInterval | |
507 | = | |
508 | (double) | |
509 | ul_TimerValue | |
510 | / | |
511 | (250000.0 | |
512 | * | |
513 | (double) | |
514 | b_PCIInputClock); | |
515 | ||
516 | if ((double)((double)ul_TimerValue / (250000.0 * (double)b_PCIInputClock)) >= (double)((double)ul_RealTimingInterval + 0.5)) { | |
517 | ul_RealTimingInterval | |
518 | = | |
519 | ul_RealTimingInterval | |
520 | + | |
521 | 1; | |
522 | } | |
523 | ||
524 | ul_TimingInterval | |
525 | = | |
526 | ul_TimingInterval | |
527 | - | |
528 | 1; | |
529 | ul_TimerValue | |
530 | = | |
531 | ul_TimerValue | |
532 | - | |
533 | 2; | |
534 | ||
535 | if (b_PCIInputClock != APCI1710_40MHZ) { | |
536 | ul_TimerValue | |
537 | = | |
538 | (ULONG) | |
539 | ( | |
540 | (double) | |
541 | (ul_TimerValue) | |
542 | * | |
543 | 1.007752288); | |
544 | } | |
545 | ||
546 | break; | |
547 | ||
548 | /******/ | |
549 | /* mn */ | |
550 | /******/ | |
551 | ||
552 | case 4: | |
553 | ||
554 | /******************/ | |
555 | /* Timer 0 factor */ | |
556 | /******************/ | |
557 | ||
558 | ul_TimerValue | |
559 | = | |
560 | (ULONG) | |
561 | ( | |
562 | (ul_TimingInterval | |
563 | * | |
564 | 60) | |
565 | * | |
566 | (250000.0 | |
567 | * | |
568 | b_PCIInputClock)); | |
569 | ||
570 | /*******************/ | |
571 | /* Round the value */ | |
572 | /*******************/ | |
573 | ||
574 | if ((double)((double)(ul_TimingInterval * 60.0) * (250000.0 * (double)b_PCIInputClock)) >= ((double)((double)ul_TimerValue + 0.5))) { | |
575 | ul_TimerValue | |
576 | = | |
577 | ul_TimerValue | |
578 | + | |
579 | 1; | |
580 | } | |
581 | ||
582 | /*****************************/ | |
583 | /* Calculate the real timing */ | |
584 | /*****************************/ | |
585 | ||
586 | ul_RealTimingInterval | |
587 | = | |
588 | (ULONG) | |
589 | (ul_TimerValue | |
590 | / | |
591 | (250000.0 | |
592 | * | |
593 | (double) | |
594 | b_PCIInputClock)) | |
595 | / | |
596 | 60; | |
597 | d_RealTimingInterval | |
598 | = | |
599 | ( | |
600 | (double) | |
601 | ul_TimerValue | |
602 | / | |
603 | (250000.0 | |
604 | * | |
605 | (double) | |
606 | b_PCIInputClock)) | |
607 | / | |
608 | 60.0; | |
609 | ||
610 | if ((double)(((double)ul_TimerValue / (250000.0 * (double)b_PCIInputClock)) / 60.0) >= (double)((double)ul_RealTimingInterval + 0.5)) { | |
611 | ul_RealTimingInterval | |
612 | = | |
613 | ul_RealTimingInterval | |
614 | + | |
615 | 1; | |
616 | } | |
617 | ||
618 | ul_TimingInterval | |
619 | = | |
620 | ul_TimingInterval | |
621 | - | |
622 | 1; | |
623 | ul_TimerValue | |
624 | = | |
625 | ul_TimerValue | |
626 | - | |
627 | 2; | |
628 | ||
629 | if (b_PCIInputClock != APCI1710_40MHZ) { | |
630 | ul_TimerValue | |
631 | = | |
632 | (ULONG) | |
633 | ( | |
634 | (double) | |
635 | (ul_TimerValue) | |
636 | * | |
637 | 1.007752288); | |
638 | } | |
639 | ||
640 | break; | |
641 | } | |
642 | ||
643 | fpu_end(); | |
644 | } // if (b_PCIInputClock != APCI1710_GATE_INPUT) | |
645 | else { | |
646 | /*************************************************************/ | |
647 | /* 2 Clock used for the overflow and the reload from counter */ | |
648 | /*************************************************************/ | |
649 | ||
650 | ul_TimerValue | |
651 | = | |
652 | ul_TimingInterval | |
653 | - | |
654 | 2; | |
655 | } // if (b_PCIInputClock != APCI1710_GATE_INPUT) | |
656 | ||
657 | /****************************/ | |
658 | /* Save the PCI input clock */ | |
659 | /****************************/ | |
660 | devpriv-> | |
661 | s_ModuleInfo | |
662 | [b_ModulNbr]. | |
663 | s_TorCounterModuleInfo. | |
664 | b_PCIInputClock | |
665 | = | |
666 | b_PCIInputClock; | |
667 | ||
668 | /************************/ | |
669 | /* Save the timing unit */ | |
670 | /************************/ | |
671 | ||
672 | devpriv-> | |
673 | s_ModuleInfo | |
674 | [b_ModulNbr]. | |
675 | s_TorCounterModuleInfo. | |
676 | s_TorCounterInfo | |
677 | [b_TorCounter]. | |
678 | b_TimingUnit | |
679 | = | |
680 | b_TimingUnit; | |
681 | ||
682 | /************************/ | |
683 | /* Save the base timing */ | |
684 | /************************/ | |
685 | devpriv-> | |
686 | s_ModuleInfo | |
687 | [b_ModulNbr]. | |
688 | s_TorCounterModuleInfo. | |
689 | s_TorCounterInfo | |
690 | [b_TorCounter]. | |
691 | d_TimingInterval | |
692 | = | |
693 | d_RealTimingInterval; | |
694 | ||
695 | devpriv-> | |
696 | s_ModuleInfo | |
697 | [b_ModulNbr]. | |
698 | s_TorCounterModuleInfo. | |
699 | s_TorCounterInfo | |
700 | [b_TorCounter]. | |
701 | ul_RealTimingInterval | |
702 | = | |
703 | ul_RealTimingInterval; | |
704 | ||
705 | /*******************/ | |
706 | /* Get the command */ | |
707 | /*******************/ | |
708 | ||
709 | dw_Command | |
710 | = | |
711 | inl | |
712 | (devpriv-> | |
713 | s_BoardInfos. | |
714 | ui_Address | |
715 | + | |
716 | 4 | |
717 | + | |
718 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
719 | ||
720 | dw_Command | |
721 | = | |
722 | (dw_Command | |
723 | >> | |
724 | 4) | |
725 | & | |
726 | 0xF; | |
727 | ||
728 | /******************/ | |
729 | /* Test if 40 MHz */ | |
730 | /******************/ | |
731 | ||
732 | if (b_PCIInputClock == APCI1710_40MHZ) { | |
733 | /****************************/ | |
734 | /* Set the 40 MHz selection */ | |
735 | /****************************/ | |
736 | ||
737 | dw_Command | |
738 | = | |
739 | dw_Command | |
740 | | | |
741 | 0x10; | |
742 | } | |
743 | ||
744 | /*****************************/ | |
745 | /* Test if extern clock used */ | |
746 | /*****************************/ | |
747 | ||
748 | if (b_PCIInputClock == APCI1710_GATE_INPUT) { | |
749 | /****************************/ | |
750 | /* Set the 40 MHz selection */ | |
751 | /****************************/ | |
752 | ||
753 | dw_Command | |
754 | = | |
755 | dw_Command | |
756 | | | |
757 | 0x20; | |
758 | } | |
759 | ||
760 | /*************************/ | |
761 | /* Write the new command */ | |
762 | /*************************/ | |
763 | ||
764 | outl(dw_Command, devpriv->s_BoardInfos.ui_Address + 4 + (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
765 | ||
766 | /*******************/ | |
767 | /* Disable the tor */ | |
768 | /*******************/ | |
769 | ||
770 | outl(0, devpriv->s_BoardInfos.ui_Address + 8 + (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
771 | /*************************/ | |
772 | /* Set the timer 1 value */ | |
773 | /*************************/ | |
774 | ||
775 | outl(ul_TimerValue, devpriv->s_BoardInfos.ui_Address + 0 + (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
776 | ||
777 | /*********************/ | |
778 | /* Tor counter init. */ | |
779 | /*********************/ | |
780 | ||
781 | devpriv-> | |
782 | s_ModuleInfo | |
783 | [b_ModulNbr]. | |
784 | s_TorCounterModuleInfo. | |
785 | s_TorCounterInfo | |
786 | [b_TorCounter]. | |
787 | b_TorCounterInit | |
788 | = | |
789 | 1; | |
790 | } else { | |
791 | /***********************************************/ | |
792 | /* TOR version error for 40MHz clock selection */ | |
793 | /***********************************************/ | |
794 | ||
795 | DPRINTK("TOR version error for 40MHz clock selection\n"); | |
796 | i_ReturnValue | |
797 | = | |
798 | -9; | |
799 | } | |
800 | } else { | |
801 | /**************************************************************/ | |
802 | /* You can not used the 40MHz clock selection wich this board */ | |
803 | /**************************************************************/ | |
804 | ||
805 | DPRINTK("You can not used the 40MHz clock selection wich this board\n"); | |
806 | i_ReturnValue = | |
807 | -8; | |
808 | } | |
809 | } else { | |
810 | /**********************************/ | |
811 | /* Base timing selection is wrong */ | |
812 | /**********************************/ | |
813 | ||
814 | DPRINTK("Base timing selection is wrong\n"); | |
815 | i_ReturnValue = -7; | |
816 | } | |
817 | } // if ((b_TimingUnit >= 0) && (b_TimingUnit <= 4)) | |
818 | else { | |
819 | /**********************************/ | |
820 | /* Timing unit selection is wrong */ | |
821 | /**********************************/ | |
822 | ||
823 | DPRINTK("Timing unit selection is wrong\n"); | |
824 | i_ReturnValue = -6; | |
825 | } // if ((b_TimingUnit >= 0) && (b_TimingUnit <= 4)) | |
826 | } // if ((b_PCIInputClock == APCI1710_30MHZ) || (b_PCIInputClock == APCI1710_33MHZ)) | |
827 | else { | |
828 | /*****************************************/ | |
829 | /* The selected PCI input clock is wrong */ | |
830 | /*****************************************/ | |
831 | ||
832 | DPRINTK("The selected PCI input clock is wrong\n"); | |
833 | i_ReturnValue = -5; | |
834 | } // if ((b_PCIInputClock == APCI1710_30MHZ) || (b_PCIInputClock == APCI1710_33MHZ)) | |
835 | } // if (b_TorCounterMode >= 0 && b_TorCounterMode <= 7) | |
836 | else { | |
837 | /**********************************/ | |
838 | /* Tor Counter selection is wrong */ | |
839 | /**********************************/ | |
840 | ||
841 | DPRINTK("Tor Counter selection is wrong\n"); | |
842 | i_ReturnValue = -4; | |
843 | } // if (b_TorCounterMode >= 0 && b_TorCounterMode <= 7) | |
844 | } else { | |
845 | /******************************************/ | |
846 | /* The module is not a tor counter module */ | |
847 | /******************************************/ | |
848 | ||
849 | DPRINTK("The module is not a tor counter module\n"); | |
850 | i_ReturnValue = -3; | |
851 | } | |
852 | } else { | |
853 | /***********************/ | |
854 | /* Module number error */ | |
855 | /***********************/ | |
856 | ||
857 | DPRINTK("Module number error\n"); | |
858 | i_ReturnValue = -2; | |
859 | } | |
860 | data[0] = (UINT) ul_RealTimingInterval; | |
861 | return (i_ReturnValue); | |
862 | } | |
863 | ||
864 | /* | |
865 | +----------------------------------------------------------------------------+ | |
866 | | Function Name : _INT_ i_APCI1710_EnableTorCounter | | |
867 | | (BYTE_ b_BoardHandle, | | |
868 | | BYTE_ b_ModulNbr, | | |
869 | | BYTE_ b_TorCounter, | | |
870 | | BYTE_ b_InputMode, | | |
871 | | BYTE_ b_ExternGate, | | |
872 | | BYTE_ b_CycleMode, | | |
873 | | BYTE_ b_InterruptEnable) | | |
874 | +----------------------------------------------------------------------------+ | |
875 | | Task : Enable the tor counter (b_TorCounter) from selected | | |
876 | | module (b_ModulNbr). You must calling the | | |
877 | | "i_APCI1710_InitTorCounter" function be for you call | | |
878 | | this function. | | |
879 | | If you enable the tor counter interrupt, the | | |
880 | | tor counter generate a interrupt after the timing cycle| | |
881 | | See function "i_APCI1710_SetBoardIntRoutineX" and the | | |
882 | | Interrupt mask description chapter from this manual. | | |
883 | | The b_CycleMode parameter determine if you will | | |
884 | | measured a single or more cycle. | | |
885 | +----------------------------------------------------------------------------+ | |
886 | | Input Parameters : BYTE_ b_BoardHandle : Handle of board APCI-1710 | | |
887 | | BYTE_ b_ModulNbr : Selected module number (0 to 3) | | |
888 | | BYTE_ b_TorCounter : Tor counter selection (0 or 1). | | |
889 | | BYTE_ b_InputMode : Input signal level selection | | |
890 | | 0 : Tor count each low level | | |
891 | | 1 : Tor count each high level| | |
892 | | BYTE_ b_ExternGate : Extern gate action selection | | |
893 | | 0 : Extern gate signal not | | |
894 | | used | | |
895 | | 1 : Extern gate signal used. | | |
896 | | If you selected the | | |
897 | | single mode, each high | | |
898 | | level signal start the | | |
899 | | counter. | | |
900 | | If you selected the | | |
901 | | continuous mode, the | | |
902 | | first high level signal | | |
903 | | start the tor counter | | |
904 | | | | |
905 | | APCI1710_TOR_QUADRUPLE _MODE : | | |
906 | | In the quadruple mode, the edge| | |
907 | | analysis circuit generates a | | |
908 | | counting pulse from each edge | | |
909 | | of 2 signals which are phase | | |
910 | | shifted in relation to each | | |
911 | | other. | | |
912 | | The gate input is used for the | | |
913 | | signal B | | |
914 | | | | |
915 | | APCI1710_TOR_DOUBLE_MODE: | | |
916 | | Functions in the same way as | | |
917 | | the quadruple mode, except that| | |
918 | | only two of the four edges are | | |
919 | | analysed per period. | | |
920 | | The gate input is used for the | | |
921 | | signal B | | |
922 | | | | |
923 | | APCI1710_TOR_SIMPLE_MODE: | | |
924 | | Functions in the same way as | | |
925 | | the quadruple mode, except that| | |
926 | | only one of the four edges is | | |
927 | | analysed per period. | | |
928 | | The gate input is used for the | | |
929 | | signal B | | |
930 | | | | |
931 | | BYTE_ b_CycleMode : Selected the tor counter | | |
932 | | acquisition mode | | |
933 | | BYTE_ b_InterruptEnable : Enable or disable the | | |
934 | | tor counter interrupt. | | |
935 | | APCI1710_ENABLE: | | |
936 | | Enable the tor counter | | |
937 | | interrupt | | |
938 | | APCI1710_DISABLE: | | |
939 | | Disable the tor counter | | |
940 | | interrupt | | |
941 | +----------------------------------------------------------------------------+ | |
942 | | Output Parameters : - | | |
943 | +----------------------------------------------------------------------------+ | |
944 | | Return Value : 0: No error | | |
945 | | -1: The handle parameter of the board is wrong | | |
946 | | -2: Module selection wrong | | |
947 | | -3: The module is not a tor counter module | | |
948 | | -4: Tor counter selection is wrong | | |
949 | | -5: Tor counter not initialised see function | | |
950 | | "i_APCI1710_InitTorCounter" | | |
951 | | -6: Tor input signal selection is wrong | | |
952 | | -7: Extern gate signal mode is wrong | | |
953 | | -8: Tor counter acquisition mode cycle is wrong | | |
954 | | -9: Interrupt parameter is wrong | | |
955 | | -10:Interrupt function not initialised. | | |
956 | | See function "i_APCI1710_SetBoardIntRoutineX" | | |
957 | +----------------------------------------------------------------------------+ | |
958 | */ | |
959 | /* | |
960 | +----------------------------------------------------------------------------+ | |
961 | | Function Name : _INT_ i_APCI1710_DisableTorCounter | | |
962 | | (BYTE_ b_BoardHandle, | | |
963 | | BYTE_ b_ModulNbr, | | |
964 | | BYTE_ b_TorCounter) | | |
965 | +----------------------------------------------------------------------------+ | |
966 | | Task : Disable the tor counter (b_TorCounter) from selected | | |
967 | | module (b_ModulNbr). If you disable the tor counter | | |
968 | | after a start cycle occur and you restart the tor | | |
969 | | counter witch the " i_APCI1710_EnableTorCounter" | | |
970 | | function, the status register is cleared | | |
971 | +----------------------------------------------------------------------------+ | |
972 | | Input Parameters : BYTE_ b_BoardHandle : Handle of board APCI-1710 | | |
973 | | BYTE_ b_ModulNbr : Selected module number (0 to 3) | | |
974 | | BYTE_ b_TorCounter : Tor counter selection (0 or 1). | | |
975 | +----------------------------------------------------------------------------+ | |
976 | | Output Parameters : - | | |
977 | +----------------------------------------------------------------------------+ | |
978 | | Return Value : 0: No error | | |
979 | | -1: The handle parameter of the board is wrong | | |
980 | | -2: Module selection wrong | | |
981 | | -3: The module is not a tor counter module | | |
982 | | -4: Tor counter selection is wrong | | |
983 | | -5: Tor counter not initialised see function | | |
984 | | "i_APCI1710_InitTorCounter" | | |
985 | | -6: Tor counter not enabled see function | | |
986 | | "i_APCI1710_EnableTorCounter" | | |
987 | +----------------------------------------------------------------------------+ | |
988 | */ | |
989 | ||
990 | INT i_APCI1710_InsnWriteEnableDisableTorCounter(comedi_device * dev, | |
790c5541 | 991 | comedi_subdevice * s, comedi_insn * insn, unsigned int * data) |
c995fe94 ADG |
992 | { |
993 | INT i_ReturnValue = 0; | |
994 | DWORD dw_Status; | |
995 | DWORD dw_DummyRead; | |
996 | DWORD dw_ConfigReg; | |
997 | BYTE b_ModulNbr, b_Action; | |
998 | BYTE b_TorCounter; | |
999 | BYTE b_InputMode; | |
1000 | BYTE b_ExternGate; | |
1001 | BYTE b_CycleMode; | |
1002 | BYTE b_InterruptEnable; | |
1003 | ||
1004 | b_ModulNbr = (BYTE) CR_AREF(insn->chanspec); | |
1005 | b_Action = (BYTE) data[0]; // enable or disable | |
1006 | b_TorCounter = (BYTE) data[1]; | |
1007 | b_InputMode = (BYTE) data[2]; | |
1008 | b_ExternGate = (BYTE) data[3]; | |
1009 | b_CycleMode = (BYTE) data[4]; | |
1010 | b_InterruptEnable = (BYTE) data[5]; | |
1011 | i_ReturnValue = insn->n;; | |
1012 | devpriv->tsk_Current = current; // Save the current process task structure | |
1013 | /**************************/ | |
1014 | /* Test the module number */ | |
1015 | /**************************/ | |
1016 | ||
1017 | if (b_ModulNbr < 4) { | |
1018 | /***********************/ | |
1019 | /* Test if tor counter */ | |
1020 | /***********************/ | |
1021 | ||
1022 | if ((devpriv->s_BoardInfos. | |
1023 | dw_MolduleConfiguration[b_ModulNbr] & | |
1024 | 0xFFFF0000UL) == APCI1710_TOR_COUNTER) { | |
1025 | /**********************************/ | |
1026 | /* Test the tor counter selection */ | |
1027 | /**********************************/ | |
1028 | ||
1029 | if (b_TorCounter <= 1) { | |
1030 | switch (b_Action) // Enable or Disable | |
1031 | { | |
1032 | case APCI1710_ENABLE: | |
1033 | /***********************************/ | |
1034 | /* Test if tor counter initialised */ | |
1035 | /***********************************/ | |
1036 | ||
1037 | dw_Status = | |
1038 | inl(devpriv->s_BoardInfos. | |
1039 | ui_Address + 8 + | |
1040 | (16 * b_TorCounter) + | |
1041 | (64 * b_ModulNbr)); | |
1042 | ||
1043 | if (dw_Status & 0x10) { | |
1044 | /******************************/ | |
1045 | /* Test the input signal mode */ | |
1046 | /******************************/ | |
1047 | ||
1048 | if (b_InputMode == 0 || | |
1049 | b_InputMode == 1 || | |
1050 | b_InputMode == | |
1051 | APCI1710_TOR_SIMPLE_MODE | |
1052 | || b_InputMode == | |
1053 | APCI1710_TOR_DOUBLE_MODE | |
1054 | || b_InputMode == | |
1055 | APCI1710_TOR_QUADRUPLE_MODE) | |
1056 | { | |
1057 | /************************************/ | |
1058 | /* Test the extern gate signal mode */ | |
1059 | /************************************/ | |
1060 | ||
1061 | if (b_ExternGate == 0 | |
1062 | || b_ExternGate | |
1063 | == 1 | |
1064 | || b_InputMode > | |
1065 | 1) { | |
1066 | /*********************************/ | |
1067 | /* Test the cycle mode parameter */ | |
1068 | /*********************************/ | |
1069 | ||
1070 | if ((b_CycleMode == APCI1710_SINGLE) || (b_CycleMode == APCI1710_CONTINUOUS)) { | |
1071 | /***************************/ | |
1072 | /* Test the interrupt flag */ | |
1073 | /***************************/ | |
1074 | ||
1075 | if ((b_InterruptEnable == APCI1710_ENABLE) || (b_InterruptEnable == APCI1710_DISABLE)) { | |
1076 | ||
1077 | /***************************/ | |
1078 | /* Save the interrupt mode */ | |
1079 | /***************************/ | |
1080 | ||
1081 | devpriv-> | |
1082 | s_ModuleInfo | |
1083 | [b_ModulNbr]. | |
1084 | s_TorCounterModuleInfo. | |
1085 | s_TorCounterInfo | |
1086 | [b_TorCounter]. | |
1087 | b_InterruptEnable | |
1088 | = | |
1089 | b_InterruptEnable; | |
1090 | ||
1091 | /*******************/ | |
1092 | /* Get the command */ | |
1093 | /*******************/ | |
1094 | ||
1095 | dw_ConfigReg | |
1096 | = | |
1097 | inl | |
1098 | (devpriv-> | |
1099 | s_BoardInfos. | |
1100 | ui_Address | |
1101 | + | |
1102 | 4 | |
1103 | + | |
1104 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1105 | ||
1106 | dw_ConfigReg | |
1107 | = | |
1108 | (dw_ConfigReg | |
1109 | >> | |
1110 | 4) | |
1111 | & | |
1112 | 0x30; | |
1113 | ||
1114 | /********************************/ | |
1115 | /* Test if not direct mode used */ | |
1116 | /********************************/ | |
1117 | ||
1118 | if (b_InputMode > 1) { | |
1119 | /*******************************/ | |
1120 | /* Extern gate can not be used */ | |
1121 | /*******************************/ | |
1122 | ||
1123 | b_ExternGate | |
1124 | = | |
1125 | 0; | |
1126 | ||
1127 | /*******************************************/ | |
1128 | /* Enable the extern gate for the Signal B */ | |
1129 | /*******************************************/ | |
1130 | ||
1131 | dw_ConfigReg | |
1132 | = | |
1133 | dw_ConfigReg | |
1134 | | | |
1135 | 0x40; | |
1136 | ||
1137 | /***********************/ | |
1138 | /* Test if simple mode */ | |
1139 | /***********************/ | |
1140 | ||
1141 | if (b_InputMode == APCI1710_TOR_SIMPLE_MODE) { | |
1142 | /**************************/ | |
1143 | /* Enable the sinple mode */ | |
1144 | /**************************/ | |
1145 | ||
1146 | dw_ConfigReg | |
1147 | = | |
1148 | dw_ConfigReg | |
1149 | | | |
1150 | 0x780; | |
1151 | ||
1152 | } // if (b_InputMode == APCI1710_TOR_SIMPLE_MODE) | |
1153 | ||
1154 | /***********************/ | |
1155 | /* Test if double mode */ | |
1156 | /***********************/ | |
1157 | ||
1158 | if (b_InputMode == APCI1710_TOR_DOUBLE_MODE) { | |
1159 | /**************************/ | |
1160 | /* Enable the double mode */ | |
1161 | /**************************/ | |
1162 | ||
1163 | dw_ConfigReg | |
1164 | = | |
1165 | dw_ConfigReg | |
1166 | | | |
1167 | 0x180; | |
1168 | ||
1169 | } // if (b_InputMode == APCI1710_TOR_DOUBLE_MODE) | |
1170 | ||
1171 | b_InputMode | |
1172 | = | |
1173 | 0; | |
1174 | } // if (b_InputMode > 1) | |
1175 | ||
1176 | /*******************/ | |
1177 | /* Set the command */ | |
1178 | /*******************/ | |
1179 | ||
1180 | dw_ConfigReg | |
1181 | = | |
1182 | dw_ConfigReg | |
1183 | | | |
1184 | b_CycleMode | |
1185 | | | |
1186 | (b_InterruptEnable | |
1187 | * | |
1188 | 2) | |
1189 | | | |
1190 | (b_InputMode | |
1191 | * | |
1192 | 4) | |
1193 | | | |
1194 | (b_ExternGate | |
1195 | * | |
1196 | 8); | |
1197 | ||
1198 | /*****************************/ | |
1199 | /* Clear the status register */ | |
1200 | /*****************************/ | |
1201 | ||
1202 | dw_DummyRead | |
1203 | = | |
1204 | inl | |
1205 | (devpriv-> | |
1206 | s_BoardInfos. | |
1207 | ui_Address | |
1208 | + | |
1209 | 0 | |
1210 | + | |
1211 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1212 | ||
1213 | /***************************************/ | |
1214 | /* Clear the interrupt status register */ | |
1215 | /***************************************/ | |
1216 | ||
1217 | dw_DummyRead | |
1218 | = | |
1219 | inl | |
1220 | (devpriv-> | |
1221 | s_BoardInfos. | |
1222 | ui_Address | |
1223 | + | |
1224 | 12 | |
1225 | + | |
1226 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1227 | ||
1228 | /********************/ | |
1229 | /* Set the commando */ | |
1230 | /********************/ | |
1231 | ||
1232 | outl(dw_ConfigReg, devpriv->s_BoardInfos.ui_Address + 4 + (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1233 | ||
1234 | /****************/ | |
1235 | /* Set the gate */ | |
1236 | /****************/ | |
1237 | ||
1238 | outl(1, devpriv->s_BoardInfos.ui_Address + 8 + (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1239 | ||
1240 | } // if ((b_InterruptEnable == APCI1710_ENABLE) || (b_InterruptEnable == APCI1710_DISABLE)) | |
1241 | else { | |
1242 | /********************************/ | |
1243 | /* Interrupt parameter is wrong */ | |
1244 | /********************************/ | |
1245 | ||
1246 | DPRINTK("Interrupt parameter is wrong\n"); | |
1247 | i_ReturnValue | |
1248 | = | |
1249 | -9; | |
1250 | } // if ((b_InterruptEnable == APCI1710_ENABLE) || (b_InterruptEnable == APCI1710_DISABLE)) | |
1251 | } // if ((b_CycleMode == APCI1710_SINGLE) || (b_CycleMode == APCI1710_CONTINUOUS)) | |
1252 | else { | |
1253 | /***********************************************/ | |
1254 | /* Tor counter acquisition mode cycle is wrong */ | |
1255 | /***********************************************/ | |
1256 | ||
1257 | DPRINTK("Tor counter acquisition mode cycle is wrong\n"); | |
1258 | i_ReturnValue | |
1259 | = | |
1260 | -8; | |
1261 | } // if ((b_CycleMode == APCI1710_SINGLE) || (b_CycleMode == APCI1710_CONTINUOUS)) | |
1262 | } // if (b_ExternGate >= 0 && b_ExternGate <= 1) | |
1263 | else { | |
1264 | /***********************************/ | |
1265 | /* Extern gate input mode is wrong */ | |
1266 | /***********************************/ | |
1267 | ||
1268 | DPRINTK("Extern gate input mode is wrong\n"); | |
1269 | i_ReturnValue = | |
1270 | -7; | |
1271 | } // if (b_ExternGate >= 0 && b_ExternGate <= 1) | |
1272 | } // if (b_InputMode >= 0 && b_InputMode <= 1) | |
1273 | else { | |
1274 | /***************************************/ | |
1275 | /* Tor input signal selection is wrong */ | |
1276 | /***************************************/ | |
1277 | ||
1278 | DPRINTK("Tor input signal selection is wrong\n"); | |
1279 | i_ReturnValue = -6; | |
1280 | } | |
1281 | } else { | |
1282 | /*******************************/ | |
1283 | /* Tor counter not initialised */ | |
1284 | /*******************************/ | |
1285 | ||
1286 | DPRINTK("Tor counter not initialised\n"); | |
1287 | i_ReturnValue = -5; | |
1288 | } | |
1289 | break; | |
1290 | ||
1291 | case APCI1710_DISABLE: | |
1292 | /***********************************/ | |
1293 | /* Test if tor counter initialised */ | |
1294 | /***********************************/ | |
1295 | ||
1296 | dw_Status = inl(devpriv->s_BoardInfos. | |
1297 | ui_Address + 8 + | |
1298 | (16 * b_TorCounter) + | |
1299 | (64 * b_ModulNbr)); | |
1300 | ||
1301 | /*******************************/ | |
1302 | /* Test if counter initialised */ | |
1303 | /*******************************/ | |
1304 | ||
1305 | if (dw_Status & 0x10) { | |
1306 | /***************************/ | |
1307 | /* Test if counter enabled */ | |
1308 | /***************************/ | |
1309 | ||
1310 | if (dw_Status & 0x1) { | |
1311 | /****************************/ | |
1312 | /* Clear the interrupt mode */ | |
1313 | /****************************/ | |
1314 | devpriv-> | |
1315 | s_ModuleInfo | |
1316 | [b_ModulNbr]. | |
1317 | s_TorCounterModuleInfo. | |
1318 | s_TorCounterInfo | |
1319 | [b_TorCounter]. | |
1320 | b_InterruptEnable | |
1321 | = | |
1322 | APCI1710_DISABLE; | |
1323 | ||
1324 | /******************/ | |
1325 | /* Clear the gate */ | |
1326 | /******************/ | |
1327 | ||
1328 | outl(0, devpriv-> | |
1329 | s_BoardInfos. | |
1330 | ui_Address + 8 + | |
1331 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1332 | } // if (dw_Status & 0x1) | |
1333 | else { | |
1334 | /***************************/ | |
1335 | /* Tor counter not enabled */ | |
1336 | /***************************/ | |
1337 | ||
1338 | DPRINTK("Tor counter not enabled \n"); | |
1339 | i_ReturnValue = -6; | |
1340 | } // if (dw_Status & 0x1) | |
1341 | } // if (dw_Status & 0x10) | |
1342 | else { | |
1343 | /*******************************/ | |
1344 | /* Tor counter not initialised */ | |
1345 | /*******************************/ | |
1346 | ||
1347 | DPRINTK("Tor counter not initialised\n"); | |
1348 | i_ReturnValue = -5; | |
1349 | } // // if (dw_Status & 0x10) | |
1350 | ||
1351 | } // switch | |
1352 | } // if (b_TorCounter <= 1) | |
1353 | else { | |
1354 | /**********************************/ | |
1355 | /* Tor counter selection is wrong */ | |
1356 | /**********************************/ | |
1357 | ||
1358 | DPRINTK("Tor counter selection is wrong\n"); | |
1359 | i_ReturnValue = -4; | |
1360 | } // if (b_TorCounter <= 1) | |
1361 | } else { | |
1362 | /******************************************/ | |
1363 | /* The module is not a tor counter module */ | |
1364 | /******************************************/ | |
1365 | ||
1366 | DPRINTK("The module is not a tor counter module \n"); | |
1367 | i_ReturnValue = -3; | |
1368 | } | |
1369 | } else { | |
1370 | /***********************/ | |
1371 | /* Module number error */ | |
1372 | /***********************/ | |
1373 | ||
1374 | DPRINTK("Module number error \n"); | |
1375 | i_ReturnValue = -2; | |
1376 | } | |
1377 | ||
1378 | return (i_ReturnValue); | |
1379 | } | |
1380 | ||
1381 | /* | |
1382 | +----------------------------------------------------------------------------+ | |
1383 | | Function Name : _INT_ i_APCI1710_GetTorCounterInitialisation | | |
1384 | | (BYTE_ b_BoardHandle, | | |
1385 | | BYTE_ b_ModulNbr, | | |
1386 | | BYTE_ b_TorCounter, | | |
1387 | | PBYTE_ pb_TimingUnit, | | |
1388 | | PULONG_ pul_TimingInterval, | | |
1389 | | PBYTE_ pb_InputMode, | | |
1390 | | PBYTE_ pb_ExternGate, | | |
1391 | | PBYTE_ pb_CycleMode, | | |
1392 | | PBYTE_ pb_Enable, | | |
1393 | | PBYTE_ pb_InterruptEnable)| | |
1394 | +----------------------------------------------------------------------------+ | |
1395 | | Task : Enable the tor counter (b_TorCounter) from selected | | |
1396 | | module (b_ModulNbr). You must calling the | | |
1397 | | "i_APCI1710_InitTorCounter" function be for you call | | |
1398 | | this function. | | |
1399 | | If you enable the tor counter interrupt, the | | |
1400 | | tor counter generate a interrupt after the timing cycle| | |
1401 | | See function "i_APCI1710_SetBoardIntRoutineX" and the | | |
1402 | | Interrupt mask description chapter from this manual. | | |
1403 | | The b_CycleMode parameter determine if you will | | |
1404 | | measured a single or more cycle. | | |
1405 | +----------------------------------------------------------------------------+ | |
1406 | | Input Parameters : BYTE_ b_BoardHandle : Handle of board APCI-1710 | | |
1407 | | BYTE_ b_ModulNbr : Selected module number (0 to 3) | | |
1408 | | BYTE_ b_TorCounter : Tor counter selection (0 or 1) | |
1409 | ||
1410 | b_ModulNbr = CR_AREF(insn->chanspec); | |
1411 | b_TorCounter = CR_CHAN(insn->chanspec); | |
1412 | . | | |
1413 | +----------------------------------------------------------------------------+ | |
1414 | | Output Parameters : PBYTE_ pb_TimingUnit : Base timing unit (0 to 4) | | |
1415 | | 0 : ns | | |
1416 | | 1 : µs | | |
1417 | | 2 : ms | | |
1418 | | 3 : s | | |
1419 | | 4 : mn | | |
1420 | | PULONG_ pul_TimingInterval : Base timing value. | | |
1421 | | PBYTE_ pb_InputMode : Input signal level | | |
1422 | | selection | | |
1423 | | 0 : Tor count each low level | | |
1424 | | 1 : Tor count each high level| | |
1425 | | PBYTE_ pb_ExternGate : Extern gate action | | |
1426 | | selection | | |
1427 | | 0 : Extern gate signal not | | |
1428 | | used | | |
1429 | | 1 : Extern gate signal used| | |
1430 | | PBYTE_ pb_CycleMode : Tor counter acquisition | | |
1431 | | mode | | |
1432 | | PBYTE_ pb_Enable : Indicate if the tor counter| | |
1433 | | is enabled or no | | |
1434 | | 0 : Tor counter disabled | | |
1435 | | 1 : Tor counter enabled | | |
1436 | | PBYTE_ pb_InterruptEnable : Enable or disable the | | |
1437 | | tor counter interrupt. | | |
1438 | | APCI1710_ENABLE: | | |
1439 | | Enable the tor counter | | |
1440 | | interrupt | | |
1441 | | APCI1710_DISABLE: | | |
1442 | | Disable the tor counter | | |
1443 | | interrupt | |
1444 | pb_TimingUnit = (PBYTE) &data[0]; | |
1445 | pul_TimingInterval = (PULONG) &data[1]; | |
1446 | pb_InputMode = (PBYTE) &data[2]; | |
1447 | pb_ExternGate = (PBYTE) &data[3]; | |
1448 | pb_CycleMode = (PBYTE) &data[4]; | |
1449 | pb_Enable = (PBYTE) &data[5]; | |
1450 | pb_InterruptEnable = (PBYTE) &data[6]; | |
1451 | | | |
1452 | +----------------------------------------------------------------------------+ | |
1453 | | Return Value : 0: No error | | |
1454 | | -1: The handle parameter of the board is wrong | | |
1455 | | -2: Module selection wrong | | |
1456 | | -3: The module is not a tor counter module | | |
1457 | | -4: Tor counter selection is wrong | | |
1458 | | -5: Tor counter not initialised see function | | |
1459 | | "i_APCI1710_InitTorCounter" | | |
1460 | +----------------------------------------------------------------------------+ | |
1461 | */ | |
1462 | ||
1463 | INT i_APCI1710_InsnReadGetTorCounterInitialisation(comedi_device * dev, | |
790c5541 | 1464 | comedi_subdevice * s, comedi_insn * insn, unsigned int * data) |
c995fe94 ADG |
1465 | { |
1466 | INT i_ReturnValue = 0; | |
1467 | DWORD dw_Status; | |
1468 | BYTE b_ModulNbr; | |
1469 | BYTE b_TorCounter; | |
1470 | PBYTE pb_TimingUnit; | |
1471 | PULONG pul_TimingInterval; | |
1472 | PBYTE pb_InputMode; | |
1473 | PBYTE pb_ExternGate; | |
1474 | PBYTE pb_CycleMode; | |
1475 | PBYTE pb_Enable; | |
1476 | PBYTE pb_InterruptEnable; | |
1477 | ||
1478 | i_ReturnValue = insn->n; | |
1479 | b_ModulNbr = CR_AREF(insn->chanspec); | |
1480 | b_TorCounter = CR_CHAN(insn->chanspec); | |
1481 | ||
1482 | pb_TimingUnit = (PBYTE) & data[0]; | |
1483 | pul_TimingInterval = (PULONG) & data[1]; | |
1484 | pb_InputMode = (PBYTE) & data[2]; | |
1485 | pb_ExternGate = (PBYTE) & data[3]; | |
1486 | pb_CycleMode = (PBYTE) & data[4]; | |
1487 | pb_Enable = (PBYTE) & data[5]; | |
1488 | pb_InterruptEnable = (PBYTE) & data[6]; | |
1489 | ||
1490 | /**************************/ | |
1491 | /* Test the module number */ | |
1492 | /**************************/ | |
1493 | ||
1494 | if (b_ModulNbr < 4) { | |
1495 | /***********************/ | |
1496 | /* Test if tor counter */ | |
1497 | /***********************/ | |
1498 | ||
1499 | if ((devpriv->s_BoardInfos. | |
1500 | dw_MolduleConfiguration[b_ModulNbr] & | |
1501 | 0xFFFF0000UL) == APCI1710_TOR_COUNTER) { | |
1502 | /**********************************/ | |
1503 | /* Test the tor counter selection */ | |
1504 | /**********************************/ | |
1505 | ||
1506 | if (b_TorCounter <= 1) { | |
1507 | ||
1508 | /***********************************/ | |
1509 | /* Test if tor counter initialised */ | |
1510 | /***********************************/ | |
1511 | ||
1512 | dw_Status = inl(devpriv->s_BoardInfos. | |
1513 | ui_Address + 8 + (16 * b_TorCounter) + | |
1514 | (64 * b_ModulNbr)); | |
1515 | ||
1516 | if (dw_Status & 0x10) { | |
1517 | *pb_Enable = dw_Status & 1; | |
1518 | ||
1519 | /********************/ | |
1520 | /* Get the commando */ | |
1521 | /********************/ | |
1522 | ||
1523 | dw_Status = inl(devpriv->s_BoardInfos. | |
1524 | ui_Address + 4 + | |
1525 | (16 * b_TorCounter) + | |
1526 | (64 * b_ModulNbr)); | |
1527 | ||
1528 | *pb_CycleMode = | |
1529 | (BYTE) ((dw_Status >> 4) & 1); | |
1530 | *pb_InterruptEnable = | |
1531 | (BYTE) ((dw_Status >> 5) & 1); | |
1532 | ||
1533 | /******************************************************/ | |
1534 | /* Test if extern gate used for clock or for signal B */ | |
1535 | /******************************************************/ | |
1536 | ||
1537 | if (dw_Status & 0x600) { | |
1538 | /*****************************************/ | |
1539 | /* Test if extern gate used for signal B */ | |
1540 | /*****************************************/ | |
1541 | ||
1542 | if (dw_Status & 0x400) { | |
1543 | /***********************/ | |
1544 | /* Test if simple mode */ | |
1545 | /***********************/ | |
1546 | ||
1547 | if ((dw_Status & 0x7800) | |
1548 | == 0x7800) { | |
1549 | *pb_InputMode = | |
1550 | APCI1710_TOR_SIMPLE_MODE; | |
1551 | } | |
1552 | ||
1553 | /***********************/ | |
1554 | /* Test if double mode */ | |
1555 | /***********************/ | |
1556 | ||
1557 | if ((dw_Status & 0x7800) | |
1558 | == 0x1800) { | |
1559 | *pb_InputMode = | |
1560 | APCI1710_TOR_DOUBLE_MODE; | |
1561 | } | |
1562 | ||
1563 | /**************************/ | |
1564 | /* Test if quadruple mode */ | |
1565 | /**************************/ | |
1566 | ||
1567 | if ((dw_Status & 0x7800) | |
1568 | == 0x0000) { | |
1569 | *pb_InputMode = | |
1570 | APCI1710_TOR_QUADRUPLE_MODE; | |
1571 | } | |
1572 | } // if (dw_Status & 0x400) | |
1573 | else { | |
1574 | *pb_InputMode = 1; | |
1575 | } // // if (dw_Status & 0x400) | |
1576 | ||
1577 | /************************/ | |
1578 | /* Extern gate not used */ | |
1579 | /************************/ | |
1580 | ||
1581 | *pb_ExternGate = 0; | |
1582 | } // if (dw_Status & 0x600) | |
1583 | else { | |
1584 | *pb_InputMode = | |
1585 | (BYTE) ((dw_Status >> 6) | |
1586 | & 1); | |
1587 | *pb_ExternGate = | |
1588 | (BYTE) ((dw_Status >> 7) | |
1589 | & 1); | |
1590 | } // if (dw_Status & 0x600) | |
1591 | ||
1592 | *pb_TimingUnit = | |
1593 | devpriv-> | |
1594 | s_ModuleInfo[b_ModulNbr]. | |
1595 | s_TorCounterModuleInfo. | |
1596 | s_TorCounterInfo[b_TorCounter]. | |
1597 | b_TimingUnit; | |
1598 | ||
1599 | *pul_TimingInterval = | |
1600 | devpriv-> | |
1601 | s_ModuleInfo[b_ModulNbr]. | |
1602 | s_TorCounterModuleInfo. | |
1603 | s_TorCounterInfo[b_TorCounter]. | |
1604 | ul_RealTimingInterval; | |
1605 | } else { | |
1606 | /*******************************/ | |
1607 | /* Tor counter not initialised */ | |
1608 | /*******************************/ | |
1609 | ||
1610 | DPRINTK("Tor counter not initialised\n"); | |
1611 | i_ReturnValue = -5; | |
1612 | } | |
1613 | ||
1614 | } // if (b_TorCounter <= 1) | |
1615 | else { | |
1616 | /**********************************/ | |
1617 | /* Tor counter selection is wrong */ | |
1618 | /**********************************/ | |
1619 | ||
1620 | DPRINTK("Tor counter selection is wrong \n"); | |
1621 | i_ReturnValue = -4; | |
1622 | } // if (b_TorCounter <= 1) | |
1623 | } else { | |
1624 | /******************************************/ | |
1625 | /* The module is not a tor counter module */ | |
1626 | /******************************************/ | |
1627 | ||
1628 | DPRINTK("The module is not a tor counter module\n"); | |
1629 | i_ReturnValue = -3; | |
1630 | } | |
1631 | } else { | |
1632 | /***********************/ | |
1633 | /* Module number error */ | |
1634 | /***********************/ | |
1635 | ||
1636 | DPRINTK("Module number error\n"); | |
1637 | i_ReturnValue = -2; | |
1638 | } | |
1639 | ||
1640 | return (i_ReturnValue); | |
1641 | } | |
1642 | ||
1643 | /* | |
1644 | +----------------------------------------------------------------------------+ | |
1645 | | Function Name : _INT_ i_APCI1710_ReadTorCounterValue | | |
1646 | | (BYTE_ b_BoardHandle, | | |
1647 | | BYTE_ b_ModulNbr, | | |
1648 | | BYTE_ b_TorCounter, | | |
1649 | | UINT_ ui_TimeOut, | | |
1650 | | PBYTE_ pb_TorCounterStatus, | | |
1651 | | PULONG_ pul_TorCounterValue) | | |
1652 | +----------------------------------------------------------------------------+ | |
1653 | | Task case APCI1710_TOR_GETPROGRESSSTATUS: Return the tor counter | |
1654 | (b_TorCounter) status (pb_TorCounterStatus) from selected tor counter | | |
1655 | | module (b_ModulNbr). | |
1656 | ||
1657 | case APCI1710_TOR_GETCOUNTERVALUE : | |
1658 | Return the tor counter (b_TorCounter) status | | |
1659 | | (pb_TorCounterStatus) and the timing value | | |
1660 | | (pul_TorCounterValue) after a conting cycle stop | | |
1661 | | from selected tor counter module (b_ModulNbr). | | |
1662 | +----------------------------------------------------------------------------+ | |
1663 | | Input Parameters : BYTE_ b_BoardHandle : Handle of board APCI-1710 | | |
1664 | | BYTE_ b_ModulNbr : Selected module number (0 to 3) | | |
1665 | | BYTE_ b_TorCounter : Tor counter selection (0 or 1). | |
1666 | b_ModulNbr = CR_AREF(insn->chanspec); | |
1667 | b_ReadType = (BYTE) data[0]; | |
1668 | b_TorCounter = (BYTE) data[1]; | |
1669 | ui_TimeOut = (UINT) data[2]; | | |
1670 | +----------------------------------------------------------------------------+ | |
1671 | | Output Parameters : PBYTE_ pb_TorCounterStatus : Return the tor counter | | |
1672 | | status. | | |
1673 | | 0 : Conting cycle not started| | |
1674 | | Software gate not set. | | |
1675 | | 1 : Conting cycle started. | | |
1676 | | Software gate set. | | |
1677 | | 2 : Conting cycle stopped. | | |
1678 | | The conting cycle is | | |
1679 | | terminate. | | |
1680 | | 3 : A overflow occur. You | | |
1681 | | must change the base | | |
1682 | | timing witch the | | |
1683 | | function | | |
1684 | | "i_APCI1710_InitTorCounter"| | |
1685 | | 4 : Timeeout occur | | |
1686 | | PULONG pul_TorCounterValue : Tor counter value. | |
1687 | pb_TorCounterStatus=(PBYTE) &data[0]; | |
1688 | pul_TorCounterValue=(PULONG) &data[1]; | | |
1689 | +----------------------------------------------------------------------------+ | |
1690 | | Return Value : 0: No error | | |
1691 | | -1: The handle parameter of the board is wrong | | |
1692 | | -2: Module selection wrong | | |
1693 | | -3: The module is not a tor counter module | | |
1694 | | -4: Tor counter selection is wrong | | |
1695 | | -5: Tor counter not initialised see function | | |
1696 | | "i_APCI1710_InitTorCounter" | | |
1697 | | -6: Tor counter not enabled see function | | |
1698 | | "i_APCI1710_EnableTorCounter" | | |
1699 | | -7: Timeout parameter is wrong (0 to 65535) | | |
1700 | +----------------------------------------------------------------------------+ | |
1701 | */ | |
1702 | ||
1703 | INT i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue(comedi_device * dev, | |
790c5541 | 1704 | comedi_subdevice * s, comedi_insn * insn, unsigned int * data) |
c995fe94 ADG |
1705 | { |
1706 | INT i_ReturnValue = 0; | |
1707 | DWORD dw_Status; | |
1708 | DWORD dw_TimeOut = 0; | |
1709 | ||
1710 | BYTE b_ModulNbr; | |
1711 | BYTE b_TorCounter; | |
1712 | BYTE b_ReadType; | |
1713 | UINT ui_TimeOut; | |
1714 | PBYTE pb_TorCounterStatus; | |
1715 | PULONG pul_TorCounterValue; | |
1716 | ||
1717 | i_ReturnValue = insn->n; | |
1718 | b_ModulNbr = CR_AREF(insn->chanspec); | |
1719 | b_ReadType = (BYTE) data[0]; | |
1720 | b_TorCounter = (BYTE) data[1]; | |
1721 | ui_TimeOut = (UINT) data[2]; | |
1722 | pb_TorCounterStatus = (PBYTE) & data[0]; | |
1723 | pul_TorCounterValue = (PULONG) & data[1]; | |
1724 | ||
1725 | /**************************/ | |
1726 | /* Test the module number */ | |
1727 | /**************************/ | |
1728 | ||
1729 | if (b_ReadType == APCI1710_TOR_READINTERRUPT) { | |
1730 | ||
1731 | data[0] = devpriv->s_InterruptParameters. | |
1732 | s_FIFOInterruptParameters[devpriv-> | |
1733 | s_InterruptParameters.ui_Read].b_OldModuleMask; | |
1734 | data[1] = devpriv->s_InterruptParameters. | |
1735 | s_FIFOInterruptParameters[devpriv-> | |
1736 | s_InterruptParameters.ui_Read].ul_OldInterruptMask; | |
1737 | data[2] = devpriv->s_InterruptParameters. | |
1738 | s_FIFOInterruptParameters[devpriv-> | |
1739 | s_InterruptParameters.ui_Read].ul_OldCounterLatchValue; | |
1740 | ||
1741 | /**************************/ | |
1742 | /* Increment the read FIFO */ | |
1743 | /***************************/ | |
1744 | ||
1745 | devpriv-> | |
1746 | s_InterruptParameters. | |
1747 | ui_Read = (devpriv-> | |
1748 | s_InterruptParameters. | |
1749 | ui_Read + 1) % APCI1710_SAVE_INTERRUPT; | |
1750 | ||
1751 | return insn->n; | |
1752 | } | |
1753 | ||
1754 | if (b_ModulNbr < 4) { | |
1755 | /***********************/ | |
1756 | /* Test if tor counter */ | |
1757 | /***********************/ | |
1758 | ||
1759 | if ((devpriv->s_BoardInfos. | |
1760 | dw_MolduleConfiguration[b_ModulNbr] & | |
1761 | 0xFFFF0000UL) == APCI1710_TOR_COUNTER) { | |
1762 | /**********************************/ | |
1763 | /* Test the tor counter selection */ | |
1764 | /**********************************/ | |
1765 | ||
1766 | if (b_TorCounter <= 1) { | |
1767 | /***********************************/ | |
1768 | /* Test if tor counter initialised */ | |
1769 | /***********************************/ | |
1770 | ||
1771 | dw_Status = inl(devpriv->s_BoardInfos. | |
1772 | ui_Address + 8 + (16 * b_TorCounter) + | |
1773 | (64 * b_ModulNbr)); | |
1774 | ||
1775 | /*******************************/ | |
1776 | /* Test if counter initialised */ | |
1777 | /*******************************/ | |
1778 | ||
1779 | if (dw_Status & 0x10) { | |
1780 | /***************************/ | |
1781 | /* Test if counter enabled */ | |
1782 | /***************************/ | |
1783 | ||
1784 | if (dw_Status & 0x1) { | |
1785 | ||
1786 | switch (b_ReadType) { | |
1787 | ||
1788 | case APCI1710_TOR_GETPROGRESSSTATUS: | |
1789 | /*******************/ | |
1790 | /* Read the status */ | |
1791 | /*******************/ | |
1792 | ||
1793 | dw_Status = | |
1794 | inl(devpriv-> | |
1795 | s_BoardInfos. | |
1796 | ui_Address + 4 + | |
1797 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1798 | ||
1799 | dw_Status = | |
1800 | dw_Status & 0xF; | |
1801 | ||
1802 | /*****************/ | |
1803 | /* Test if start */ | |
1804 | /*****************/ | |
1805 | ||
1806 | if (dw_Status & 1) { | |
1807 | if (dw_Status & | |
1808 | 2) { | |
1809 | if (dw_Status & 4) { | |
1810 | /************************/ | |
1811 | /* Tor counter owerflow */ | |
1812 | /************************/ | |
1813 | ||
1814 | *pb_TorCounterStatus | |
1815 | = | |
1816 | 3; | |
1817 | } else { | |
1818 | /***********************/ | |
1819 | /* Tor counter started */ | |
1820 | /***********************/ | |
1821 | ||
1822 | *pb_TorCounterStatus | |
1823 | = | |
1824 | 2; | |
1825 | } | |
1826 | } else { | |
1827 | /***********************/ | |
1828 | /* Tor counter started */ | |
1829 | /***********************/ | |
1830 | ||
1831 | *pb_TorCounterStatus | |
1832 | = | |
1833 | 1; | |
1834 | } | |
1835 | } else { | |
1836 | /***************************/ | |
1837 | /* Tor counter not started */ | |
1838 | /***************************/ | |
1839 | ||
1840 | *pb_TorCounterStatus | |
1841 | = 0; | |
1842 | } | |
1843 | break; | |
1844 | ||
1845 | case APCI1710_TOR_GETCOUNTERVALUE: | |
1846 | ||
1847 | /*****************************/ | |
1848 | /* Test the timout parameter */ | |
1849 | /*****************************/ | |
1850 | ||
1851 | if ((ui_TimeOut >= 0) | |
1852 | && (ui_TimeOut | |
1853 | <= | |
1854 | 65535UL)) | |
1855 | { | |
1856 | for (;;) { | |
1857 | /*******************/ | |
1858 | /* Read the status */ | |
1859 | /*******************/ | |
1860 | ||
1861 | dw_Status | |
1862 | = | |
1863 | inl | |
1864 | (devpriv-> | |
1865 | s_BoardInfos. | |
1866 | ui_Address | |
1867 | + | |
1868 | 4 | |
1869 | + | |
1870 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1871 | /********************/ | |
1872 | /* Test if overflow */ | |
1873 | /********************/ | |
1874 | ||
1875 | if ((dw_Status & 4) == 4) { | |
1876 | /******************/ | |
1877 | /* Overflow occur */ | |
1878 | /******************/ | |
1879 | ||
1880 | *pb_TorCounterStatus | |
1881 | = | |
1882 | 3; | |
1883 | ||
1884 | /******************/ | |
1885 | /* Read the value */ | |
1886 | /******************/ | |
1887 | ||
1888 | *pul_TorCounterValue | |
1889 | = | |
1890 | inl | |
1891 | (devpriv-> | |
1892 | s_BoardInfos. | |
1893 | ui_Address | |
1894 | + | |
1895 | 0 | |
1896 | + | |
1897 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1898 | break; | |
1899 | } // if ((dw_Status & 4) == 4) | |
1900 | else { | |
1901 | /*******************************/ | |
1902 | /* Test if measurement stopped */ | |
1903 | /*******************************/ | |
1904 | ||
1905 | if ((dw_Status & 2) == 2) { | |
1906 | /***********************/ | |
1907 | /* A stop signal occur */ | |
1908 | /***********************/ | |
1909 | ||
1910 | *pb_TorCounterStatus | |
1911 | = | |
1912 | 2; | |
1913 | ||
1914 | /******************/ | |
1915 | /* Read the value */ | |
1916 | /******************/ | |
1917 | ||
1918 | *pul_TorCounterValue | |
1919 | = | |
1920 | inl | |
1921 | (devpriv-> | |
1922 | s_BoardInfos. | |
1923 | ui_Address | |
1924 | + | |
1925 | 0 | |
1926 | + | |
1927 | (16 * b_TorCounter) + (64 * b_ModulNbr)); | |
1928 | ||
1929 | break; | |
1930 | } // if ((dw_Status & 2) == 2) | |
1931 | else { | |
1932 | /*******************************/ | |
1933 | /* Test if measurement started */ | |
1934 | /*******************************/ | |
1935 | ||
1936 | if ((dw_Status & 1) == 1) { | |
1937 | /************************/ | |
1938 | /* A start signal occur */ | |
1939 | /************************/ | |
1940 | ||
1941 | *pb_TorCounterStatus | |
1942 | = | |
1943 | 1; | |
1944 | } // if ((dw_Status & 1) == 1) | |
1945 | else { | |
1946 | /***************************/ | |
1947 | /* Measurement not started */ | |
1948 | /***************************/ | |
1949 | ||
1950 | *pb_TorCounterStatus | |
1951 | = | |
1952 | 0; | |
1953 | } // if ((dw_Status & 1) == 1) | |
1954 | } // if ((dw_Status & 2) == 2) | |
1955 | } // if ((dw_Status & 8) == 8) | |
1956 | ||
1957 | if (dw_TimeOut == ui_TimeOut) { | |
1958 | /*****************/ | |
1959 | /* Timeout occur */ | |
1960 | /*****************/ | |
1961 | ||
1962 | break; | |
1963 | } else { | |
1964 | /*************************/ | |
1965 | /* Increment the timeout */ | |
1966 | /*************************/ | |
1967 | ||
1968 | dw_TimeOut | |
1969 | = | |
1970 | dw_TimeOut | |
1971 | + | |
1972 | 1; | |
1973 | ||
1974 | mdelay(1000); | |
1975 | } | |
1976 | } // for (;;) | |
1977 | ||
1978 | /*************************/ | |
1979 | /* Test if timeout occur */ | |
1980 | /*************************/ | |
1981 | ||
1982 | if ((*pb_TorCounterStatus != 3) && (dw_TimeOut == ui_TimeOut) && (ui_TimeOut != 0)) { | |
1983 | /*****************/ | |
1984 | /* Timeout occur */ | |
1985 | /*****************/ | |
1986 | ||
1987 | *pb_TorCounterStatus | |
1988 | = | |
1989 | 4; | |
1990 | } | |
1991 | } else { | |
1992 | /******************************/ | |
1993 | /* Timeout parameter is wrong */ | |
1994 | /******************************/ | |
1995 | ||
1996 | DPRINTK("Timeout parameter is wrong\n"); | |
1997 | i_ReturnValue = | |
1998 | -7; | |
1999 | } | |
2000 | break; | |
2001 | ||
2002 | default: | |
2003 | printk("Inputs wrong\n"); | |
2004 | } // switch end | |
2005 | } // if (dw_Status & 0x1) | |
2006 | else { | |
2007 | /***************************/ | |
2008 | /* Tor counter not enabled */ | |
2009 | /***************************/ | |
2010 | ||
2011 | DPRINTK("Tor counter not enabled\n"); | |
2012 | i_ReturnValue = -6; | |
2013 | } // if (dw_Status & 0x1) | |
2014 | } else { | |
2015 | /*******************************/ | |
2016 | /* Tor counter not initialised */ | |
2017 | /*******************************/ | |
2018 | ||
2019 | DPRINTK("Tor counter not initialised\n"); | |
2020 | i_ReturnValue = -5; | |
2021 | } | |
2022 | } // if (b_TorCounter <= 1) | |
2023 | else { | |
2024 | /**********************************/ | |
2025 | /* Tor counter selection is wrong */ | |
2026 | /**********************************/ | |
2027 | ||
2028 | DPRINTK("Tor counter selection is wrong\n"); | |
2029 | i_ReturnValue = -4; | |
2030 | } // if (b_TorCounter <= 1) | |
2031 | } else { | |
2032 | /******************************************/ | |
2033 | /* The module is not a tor counter module */ | |
2034 | /******************************************/ | |
2035 | ||
2036 | DPRINTK("The module is not a tor counter module\n"); | |
2037 | i_ReturnValue = -3; | |
2038 | } | |
2039 | } else { | |
2040 | /***********************/ | |
2041 | /* Module number error */ | |
2042 | /***********************/ | |
2043 | ||
2044 | DPRINTK("Module number error\n"); | |
2045 | i_ReturnValue = -2; | |
2046 | } | |
2047 | ||
2048 | return (i_ReturnValue); | |
2049 | } |