staging: brcm80211: Remove unneeded definitions and structures.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / brcm80211 / sys / wlc_phy_shim.c
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1/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/*
18 * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer.
19 * WL driver can optinally call this translation layer to do some preprocessing, then reach PHY.
20 * On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the
21 * access to wlc_hw pointer.
22 */
23
24#include <wlc_cfg.h>
25#include <typedefs.h>
26#include <bcmutils.h>
27#include <bcmdefs.h>
28#include <osl.h>
29
30#include <proto/802.11.h>
31#include <bcmwifi.h>
32#include <siutils.h>
33#include <bcmendian.h>
34#include <wlioctl.h>
35#include <sbconfig.h>
36#include <sbchipc.h>
37#include <pcicfg.h>
38#include <sbhndpio.h>
39#include <sbhnddma.h>
40#include <hnddma.h>
41#include <hndpmu.h>
42#include <d11.h>
43#include <wlc_rate.h>
44#include <wlc_pub.h>
45#include <wlc_channel.h>
46#include <bcmsrom.h>
47#include <wlc_key.h>
48
49#include <wlc_mac80211.h>
50
51#include <wlc_bmac.h>
52#include <wlc_phy_shim.h>
53#include <wlc_phy_hal.h>
54#include <wl_export.h>
55
56/* PHY SHIM module specific state */
57struct wlc_phy_shim_info {
58 wlc_hw_info_t *wlc_hw; /* pointer to main wlc_hw structure */
59 void *wlc; /* pointer to main wlc structure */
60 void *wl; /* pointer to os-specific private state */
61};
62
7cc4a4c0 63wlc_phy_shim_info_t *BCMATTACHFN(wlc_phy_shim_attach) (wlc_hw_info_t *wlc_hw,
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64 void *wl, void *wlc) {
65 wlc_phy_shim_info_t *physhim = NULL;
66
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67 physhim = (wlc_phy_shim_info_t *)MALLOC(wlc_hw->osh,
68 sizeof(wlc_phy_shim_info_t));
69 if (!physhim) {
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70 WL_ERROR(("wl%d: wlc_phy_shim_attach: out of mem, malloced %d bytes\n", wlc_hw->unit, MALLOCED(wlc_hw->osh)));
71 return NULL;
72 }
73 bzero((char *)physhim, sizeof(wlc_phy_shim_info_t));
74 physhim->wlc_hw = wlc_hw;
75 physhim->wlc = wlc;
76 physhim->wl = wl;
77
78 return physhim;
79}
80
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81void BCMATTACHFN(wlc_phy_shim_detach) (wlc_phy_shim_info_t *physhim)
82{
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83 if (!physhim)
84 return;
85
86 MFREE(physhim->wlc_hw->osh, physhim, sizeof(wlc_phy_shim_info_t));
87}
88
7cc4a4c0 89struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim,
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90 void (*fn) (void *arg), void *arg,
91 const char *name)
92{
93 return (struct wlapi_timer *)wl_init_timer(physhim->wl, fn, arg, name);
94}
95
7cc4a4c0 96void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
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97{
98 wl_free_timer(physhim->wl, (struct wl_timer *)t);
99}
100
101void
7cc4a4c0 102wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms,
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103 int periodic)
104{
105 wl_add_timer(physhim->wl, (struct wl_timer *)t, ms, periodic);
106}
107
7cc4a4c0 108bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
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109{
110 return wl_del_timer(physhim->wl, (struct wl_timer *)t);
111}
112
7cc4a4c0 113void wlapi_intrson(wlc_phy_shim_info_t *physhim)
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114{
115 wl_intrson(physhim->wl);
116}
117
7cc4a4c0 118uint32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim)
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119{
120 return wl_intrsoff(physhim->wl);
121}
122
7cc4a4c0 123void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, uint32 macintmask)
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124{
125 wl_intrsrestore(physhim->wl, macintmask);
126}
127
7cc4a4c0 128void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, uint16 v)
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129{
130 wlc_bmac_write_shm(physhim->wlc_hw, offset, v);
131}
132
7cc4a4c0 133uint16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset)
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134{
135 return wlc_bmac_read_shm(physhim->wlc_hw, offset);
136}
137
138void
7cc4a4c0 139wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, uint8 idx, uint16 mask,
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140 uint16 val, int bands)
141{
142 wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands);
143}
144
7cc4a4c0 145void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, uint32 flags)
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146{
147 wlc_bmac_corereset(physhim->wlc_hw, flags);
148}
149
7cc4a4c0 150void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim)
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151{
152 wlc_suspend_mac_and_wait(physhim->wlc);
153}
154
7cc4a4c0 155void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, uint8 spurmode)
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156{
157 wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode);
158}
159
7cc4a4c0 160void wlapi_enable_mac(wlc_phy_shim_info_t *physhim)
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161{
162 wlc_enable_mac(physhim->wlc);
163}
164
7cc4a4c0 165void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, uint32 mask, uint32 val)
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166{
167 wlc_bmac_mctrl(physhim->wlc_hw, mask, val);
168}
169
7cc4a4c0 170void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim)
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171{
172 wlc_bmac_phy_reset(physhim->wlc_hw);
173}
174
7cc4a4c0 175void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, uint16 bw)
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176{
177 wlc_bmac_bw_set(physhim->wlc_hw, bw);
178}
179
7cc4a4c0 180uint16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim)
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181{
182 return wlc_bmac_get_txant(physhim->wlc_hw);
183}
184
7cc4a4c0 185void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk)
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186{
187 wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk);
188}
189
7cc4a4c0 190void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk)
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191{
192 wlc_bmac_macphyclk_set(physhim->wlc_hw, clk);
193}
194
7cc4a4c0 195void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on)
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196{
197 wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on);
198}
199
7cc4a4c0 200void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim)
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201{
202 wlc_bmac_core_phypll_reset(physhim->wlc_hw);
203}
204
7cc4a4c0 205void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim)
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206{
207 wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG);
208}
209
7cc4a4c0 210void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim)
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211{
212 wlc_ucode_wake_override_clear(physhim->wlc_hw,
213 WLC_WAKE_OVERRIDE_PHYREG);
214}
215
216void
7cc4a4c0 217wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset,
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218 int len, void *buf)
219{
220 wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf);
221}
222
7cc4a4c0 223uint16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, uint8 rate)
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224{
225 return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate);
226}
227
7cc4a4c0 228void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim)
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229{
230}
231
232void
7cc4a4c0 233wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf,
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234 int len, uint32 sel)
235{
236 wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel);
237}
238
239void
7cc4a4c0 240wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf,
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241 int l, uint32 sel)
242{
243 wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel);
244}
245
246void
7cc4a4c0 247wlapi_bmac_pktengtx(wlc_phy_shim_info_t *physhim, wl_pkteng_t *pkteng,
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248 uint8 rate, struct ether_addr *sa, uint32 wait_delay)
249{
250 wlc_pktengtx(physhim->wlc, pkteng, rate, sa, wait_delay);
251}