staging: brcm80211: replace MFREE with kfree
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / brcm80211 / sys / wlc_phy_shim.c
CommitLineData
a9533e7e
HP
1/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/*
18 * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer.
19 * WL driver can optinally call this translation layer to do some preprocessing, then reach PHY.
20 * On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the
21 * access to wlc_hw pointer.
22 */
23
24#include <wlc_cfg.h>
25#include <typedefs.h>
3327989a
BR
26#include <linuxver.h>
27#include <linux/kernel.h>
a9533e7e
HP
28#include <bcmutils.h>
29#include <bcmdefs.h>
30#include <osl.h>
31
32#include <proto/802.11.h>
33#include <bcmwifi.h>
34#include <siutils.h>
35#include <bcmendian.h>
36#include <wlioctl.h>
37#include <sbconfig.h>
38#include <sbchipc.h>
39#include <pcicfg.h>
40#include <sbhndpio.h>
41#include <sbhnddma.h>
42#include <hnddma.h>
43#include <hndpmu.h>
44#include <d11.h>
45#include <wlc_rate.h>
46#include <wlc_pub.h>
47#include <wlc_channel.h>
48#include <bcmsrom.h>
49#include <wlc_key.h>
50
51#include <wlc_mac80211.h>
52
53#include <wlc_bmac.h>
54#include <wlc_phy_shim.h>
55#include <wlc_phy_hal.h>
56#include <wl_export.h>
57
58/* PHY SHIM module specific state */
59struct wlc_phy_shim_info {
60 wlc_hw_info_t *wlc_hw; /* pointer to main wlc_hw structure */
61 void *wlc; /* pointer to main wlc structure */
62 void *wl; /* pointer to os-specific private state */
63};
64
0d2f0724 65wlc_phy_shim_info_t *wlc_phy_shim_attach(wlc_hw_info_t *wlc_hw,
a9533e7e
HP
66 void *wl, void *wlc) {
67 wlc_phy_shim_info_t *physhim = NULL;
68
5fcc1fcb 69 physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC);
ca8c1e59 70 if (!physhim) {
97e17d0e 71 WL_ERROR(("wl%d: wlc_phy_shim_attach: out of mem\n", wlc_hw->unit));
a9533e7e
HP
72 return NULL;
73 }
a9533e7e
HP
74 physhim->wlc_hw = wlc_hw;
75 physhim->wlc = wlc;
76 physhim->wl = wl;
77
78 return physhim;
79}
80
0d2f0724 81void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim)
a2627bc0 82{
a9533e7e
HP
83 if (!physhim)
84 return;
85
182acb3c 86 kfree(physhim);
a9533e7e
HP
87}
88
7cc4a4c0 89struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim,
a9533e7e
HP
90 void (*fn) (void *arg), void *arg,
91 const char *name)
92{
93 return (struct wlapi_timer *)wl_init_timer(physhim->wl, fn, arg, name);
94}
95
7cc4a4c0 96void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
a9533e7e
HP
97{
98 wl_free_timer(physhim->wl, (struct wl_timer *)t);
99}
100
101void
7cc4a4c0 102wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms,
a9533e7e
HP
103 int periodic)
104{
105 wl_add_timer(physhim->wl, (struct wl_timer *)t, ms, periodic);
106}
107
7cc4a4c0 108bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
a9533e7e
HP
109{
110 return wl_del_timer(physhim->wl, (struct wl_timer *)t);
111}
112
7cc4a4c0 113void wlapi_intrson(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
114{
115 wl_intrson(physhim->wl);
116}
117
66cbd3ab 118u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
119{
120 return wl_intrsoff(physhim->wl);
121}
122
66cbd3ab 123void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask)
a9533e7e
HP
124{
125 wl_intrsrestore(physhim->wl, macintmask);
126}
127
7d4df48e 128void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v)
a9533e7e
HP
129{
130 wlc_bmac_write_shm(physhim->wlc_hw, offset, v);
131}
132
7d4df48e 133u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset)
a9533e7e
HP
134{
135 return wlc_bmac_read_shm(physhim->wlc_hw, offset);
136}
137
138void
7d4df48e
GKH
139wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask,
140 u16 val, int bands)
a9533e7e
HP
141{
142 wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands);
143}
144
66cbd3ab 145void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags)
a9533e7e
HP
146{
147 wlc_bmac_corereset(physhim->wlc_hw, flags);
148}
149
7cc4a4c0 150void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
151{
152 wlc_suspend_mac_and_wait(physhim->wlc);
153}
154
41feb5ed 155void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode)
a9533e7e
HP
156{
157 wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode);
158}
159
7cc4a4c0 160void wlapi_enable_mac(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
161{
162 wlc_enable_mac(physhim->wlc);
163}
164
66cbd3ab 165void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val)
a9533e7e
HP
166{
167 wlc_bmac_mctrl(physhim->wlc_hw, mask, val);
168}
169
7cc4a4c0 170void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
171{
172 wlc_bmac_phy_reset(physhim->wlc_hw);
173}
174
7d4df48e 175void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw)
a9533e7e
HP
176{
177 wlc_bmac_bw_set(physhim->wlc_hw, bw);
178}
179
7d4df48e 180u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
181{
182 return wlc_bmac_get_txant(physhim->wlc_hw);
183}
184
7cc4a4c0 185void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk)
a9533e7e
HP
186{
187 wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk);
188}
189
7cc4a4c0 190void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk)
a9533e7e
HP
191{
192 wlc_bmac_macphyclk_set(physhim->wlc_hw, clk);
193}
194
7cc4a4c0 195void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on)
a9533e7e
HP
196{
197 wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on);
198}
199
7cc4a4c0 200void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
201{
202 wlc_bmac_core_phypll_reset(physhim->wlc_hw);
203}
204
7cc4a4c0 205void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
206{
207 wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG);
208}
209
7cc4a4c0 210void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
211{
212 wlc_ucode_wake_override_clear(physhim->wlc_hw,
213 WLC_WAKE_OVERRIDE_PHYREG);
214}
215
216void
7cc4a4c0 217wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset,
a9533e7e
HP
218 int len, void *buf)
219{
220 wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf);
221}
222
7d4df48e 223u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate)
a9533e7e
HP
224{
225 return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate);
226}
227
7cc4a4c0 228void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim)
a9533e7e
HP
229{
230}
231
232void
7cc4a4c0 233wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf,
66cbd3ab 234 int len, u32 sel)
a9533e7e
HP
235{
236 wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel);
237}
238
239void
7cc4a4c0 240wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf,
66cbd3ab 241 int l, u32 sel)
a9533e7e
HP
242{
243 wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel);
244}