[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / staging / arlan / arlan.h

/*
 *  Copyright (C) 1997 Cullen Jennings
 *  Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
 *  GNU General Public License applies
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/skbuff.h>
#include <linux/if_ether.h>	/* For the statistics structure. */
#include <linux/if_arp.h>	/* For ARPHRD_ETHER */
#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/in.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/timer.h>

#include <linux/init.h>
#include <linux/bitops.h>
#include <asm/system.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>


/* #define ARLAN_DEBUGGING 1 */

#define ARLAN_PROC_INTERFACE
#define MAX_ARLANS 4 /* not more than 4 ! */
#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */

#define ARLAN_MAX_MULTICAST_ADDRS 16
#define ARLAN_RCV_CLEAN 	0
#define ARLAN_RCV_PROMISC 1
#define ARLAN_RCV_CONTROL 2

#ifdef CONFIG_PROC_FS
extern int init_arlan_proc(void);
extern void cleanup_arlan_proc(void);
#else
#define init_arlan_proc()	({ 0; })
#define cleanup_arlan_proc()	do { } while (0)
#endif

extern struct net_device *arlan_device[MAX_ARLANS];
extern int	arlan_debug;
extern int	arlan_entry_debug;
extern int	arlan_exit_debug;
extern int	testMemory;
extern int     arlan_command(struct net_device *dev, int command);

#define SIDUNKNOWN -1
#define radioNodeIdUNKNOWN -1
#define irqUNKNOWN 0
#define debugUNKNOWN 0
#define testMemoryUNKNOWN 1
#define spreadingCodeUNKNOWN 0
#define channelNumberUNKNOWN 0
#define channelSetUNKNOWN 0
#define systemIdUNKNOWN -1
#define registrationModeUNKNOWN -1


#define IFDEBUG(L) if ((L) & arlan_debug)
#define ARLAN_FAKE_HDR_LEN 12

#ifdef ARLAN_DEBUGGING
	#define DEBUG 1
	#define ARLAN_ENTRY_EXIT_DEBUGGING 1
	#define ARLAN_DEBUG(a, b) printk(KERN_DEBUG a, b)
#else
	#define ARLAN_DEBUG(a, b)
#endif

#define ARLAN_SHMEM_SIZE	0x2000

struct arlan_shmem {
      /* Header Signature */
      volatile	char textRegion[48];
      volatile	u_char resetFlag;
      volatile	u_char  diagnosticInfo;
      volatile	u_short diagnosticOffset;
      volatile	u_char _1[12];
      volatile	u_char lanCardNodeId[6];
      volatile	u_char broadcastAddress[6];
      volatile	u_char hardwareType;
      volatile	u_char majorHardwareVersion;
      volatile	u_char minorHardwareVersion;
      volatile	u_char radioModule;/* shows EEPROM, can be overridden at 0x111 */
      volatile	u_char defaultChannelSet; /* shows EEProm, can be overriiden at 0x10A */
      volatile	u_char _2[47];

      /* Control/Status Block - 0x0080 */
      volatile	u_char interruptInProgress; /* not used by lancpu */
      volatile	u_char cntrlRegImage; /* not used by lancpu */
      volatile	u_char _3[13];
      volatile	u_char dumpByte;
      volatile	u_char commandByte; /* non-zero = active */
      volatile	u_char commandParameter[15];

      /* Receive Status - 0x00a0 */
      volatile	u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
      volatile	u_char rxFrmType;
      volatile	u_short rxOffset;
      volatile	u_short rxLength;
      volatile	u_char rxSrc[6];
      volatile	u_char rxBroadcastFlag;
      volatile	u_char rxQuality;
      volatile	u_char scrambled;
      volatile	u_char _4[1];

      /* Transmit Status - 0x00b0 */
      volatile	u_char txStatus;
      volatile	u_char txAckQuality;
      volatile	u_char numRetries;
      volatile	u_char _5[14];
      volatile	u_char registeredRouter[6];
      volatile	u_char backboneRouter[6];
      volatile	u_char registrationStatus;
      volatile	u_char configuredStatusFlag;
      volatile	u_char _6[1];
      volatile	u_char ultimateDestAddress[6];
      volatile	u_char immedDestAddress[6];
      volatile	u_char immedSrcAddress[6];
      volatile	u_short rxSequenceNumber;
      volatile	u_char assignedLocaltalkAddress;
      volatile	u_char _7[27];

      /* System Parameter Block */

      /* - Driver Parameters (Novell Specific) */

      volatile	u_short txTimeout;
      volatile	u_short transportTime;
      volatile	u_char _8[4];

      /* - Configuration Parameters */
      volatile	u_char irqLevel;
      volatile	u_char spreadingCode;
      volatile	u_char channelSet;
      volatile	u_char channelNumber;
      volatile	u_short radioNodeId;
      volatile	u_char _9[2];
      volatile	u_char scramblingDisable;
      volatile	u_char radioType;
      volatile	u_short routerId;
      volatile	u_char _10[9];
      volatile	u_char txAttenuation;
      volatile	u_char systemId[4];
      volatile	u_short globalChecksum;
      volatile	u_char _11[4];
      volatile	u_short maxDatagramSize;
      volatile	u_short maxFrameSize;
      volatile	u_char maxRetries;
      volatile	u_char receiveMode;
      volatile	u_char priority;
      volatile	u_char rootOrRepeater;
      volatile	u_char specifiedRouter[6];
      volatile	u_short fastPollPeriod;
      volatile	u_char pollDecay;
      volatile	u_char fastPollDelay[2];
      volatile	u_char arlThreshold;
      volatile	u_char arlDecay;
      volatile	u_char _12[1];
      volatile	u_short specRouterTimeout;
      volatile	u_char _13[5];

      /* Scrambled Area */
      volatile	u_char SID[4];
      volatile	u_char encryptionKey[12];
      volatile	u_char _14[2];
      volatile	u_char waitTime[2];
      volatile	u_char lParameter[2];
      volatile	u_char _15[3];
      volatile	u_short headerSize;
      volatile	u_short sectionChecksum;

      volatile	u_char registrationMode;
      volatile	u_char registrationFill;
      volatile	u_short pollPeriod;
      volatile	u_short refreshPeriod;
      volatile	u_char name[16];
      volatile	u_char NID[6];
      volatile	u_char localTalkAddress;
      volatile	u_char codeFormat;
      volatile	u_char numChannels;
      volatile	u_char channel1;
      volatile	u_char channel2;
      volatile	u_char channel3;
      volatile	u_char channel4;
      volatile	u_char SSCode[59];

      volatile	u_char _16[0xC0];
      volatile	u_short auxCmd;
      volatile	u_char  dumpPtr[4];
      volatile	u_char dumpVal;
      volatile	u_char _17[0x6A];
      volatile	u_char wireTest;
      volatile	u_char _18[14];

      /* Statistics Block - 0x0300 */
      volatile	u_char hostcpuLock;
      volatile	u_char lancpuLock;
      volatile	u_char resetTime[18];

      volatile	u_char numDatagramsTransmitted[4];
      volatile	u_char numReTransmissions[4];
      volatile	u_char numFramesDiscarded[4];
      volatile	u_char numDatagramsReceived[4];
      volatile	u_char numDuplicateReceivedFrames[4];
      volatile	u_char numDatagramsDiscarded[4];

      volatile	u_short maxNumReTransmitDatagram;
      volatile	u_short maxNumReTransmitFrames;
      volatile	u_short maxNumConsecutiveDuplicateFrames;
      /* misaligned here so we have to go to characters */

      volatile	u_char numBytesTransmitted[4];
      volatile	u_char numBytesReceived[4];
      volatile	u_char numCRCErrors[4];
      volatile	u_char numLengthErrors[4];
      volatile	u_char numAbortErrors[4];
      volatile	u_char numTXUnderruns[4];
      volatile	u_char numRXOverruns[4];
      volatile	u_char numHoldOffs[4];
      volatile	u_char numFramesTransmitted[4];
      volatile	u_char numFramesReceived[4];
      volatile	u_char numReceiveFramesLost[4];
      volatile	u_char numRXBufferOverflows[4];
      volatile	u_char numFramesDiscardedAddrMismatch[4];
      volatile	u_char numFramesDiscardedSIDMismatch[4];
      volatile	u_char numPollsTransmistted[4];
      volatile	u_char numPollAcknowledges[4];
      volatile	u_char numStatusTimeouts[4];
      volatile	u_char numNACKReceived[4];

      volatile	u_char _19[0x86];

      volatile	u_char txBuffer[0x800];
      volatile	u_char rxBuffer[0x800];

      volatile	u_char _20[0x800];
      volatile	u_char _21[0x3fb];
      volatile	u_char configStatus;
      volatile	u_char _22;
      volatile	u_char progIOCtrl;
      volatile	u_char shareMBase;
      volatile	u_char controlRegister;
};

struct arlan_conf_stru {
      int spreadingCode;
      int channelSet;
      int channelNumber;
      int scramblingDisable;
      int txAttenuation;
      int systemId;
      int maxDatagramSize;
      int maxFrameSize;
      int maxRetries;
      int receiveMode;
      int priority;
      int rootOrRepeater;
      int SID;
      int radioNodeId;
      int registrationMode;
      int registrationFill;
      int localTalkAddress;
      int codeFormat;
      int numChannels;
      int channel1;
      int channel2;
      int channel3;
      int channel4;
      int txClear;
      int txRetries;
      int txRouting;
      int txScrambled;
      int rxParameter;
      int txTimeoutMs;
      int txAckTimeoutMs;
      int waitCardTimeout;
      int	waitTime;
      int	lParameter;
      int	_15;
      int	headerSize;
      int retries;
      int tx_delay_ms;
      int waitReTransmitPacketMaxSize;
      int ReTransmitPacketMaxSize;
      int fastReTransCount;
      int driverRetransmissions;
      int registrationInterrupts;
      int hardwareType;
      int radioType;
      int writeRadioType;
      int writeEEPROM;
      char siteName[17];
      int measure_rate;
      int in_speed;
      int out_speed;
      int in_speed10;
      int out_speed10;
      int in_speed_max;
      int out_speed_max;
      int pre_Command_Wait;
      int rx_tweak1;
      int rx_tweak2;
      int tx_queue_len;
};

extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];

struct TxParam {
      volatile	short 		offset;
      volatile 	short 		length;
      volatile	u_char	dest[6];
      volatile	unsigned	char clear;
      volatile	unsigned	char retries;
      volatile	unsigned	char routing;
      volatile	unsigned	char scrambled;
};

#define TX_RING_SIZE 2
/* Information that need to be kept for each board. */
struct arlan_private {
      struct arlan_shmem __iomem *card;
      struct arlan_shmem *conf;

      struct arlan_conf_stru *Conf;
      int	bad;
      int	reset;
      unsigned long lastReset;
      struct timer_list timer;
      struct timer_list tx_delay_timer;
      struct timer_list tx_retry_timer;
      struct timer_list rx_check_timer;

      int registrationLostCount;
      int reRegisterExp;
      int irq_test_done;

      struct TxParam txRing[TX_RING_SIZE];
      char reTransmitBuff[0x800];
      int txLast;
      unsigned ReTransmitRequested;
      unsigned long tx_done_delayed;
      unsigned long registrationLastSeen;

      unsigned long	tx_last_sent;
      unsigned long	tx_last_cleared;
      unsigned long	retransmissions;
      unsigned long	interrupt_ack_requested;
      spinlock_t	lock;
      unsigned long	waiting_command_mask;
      unsigned long	card_polling_interval;
      unsigned long	last_command_buff_free_time;

      int		under_reset;
      int		under_config;
      int		rx_command_given;
      int		tx_command_given;
      unsigned  long	interrupt_processing_active;
      unsigned long	last_rx_int_ack_time;
      unsigned long	in_bytes;
      unsigned long	out_bytes;
      unsigned long	in_time;
      unsigned long	out_time;
      unsigned long	in_time10;
      unsigned long	out_time10;
      unsigned long	in_bytes10;
      unsigned long	out_bytes10;
      int	init_etherdev_alloc;
};


#define ARLAN_CLEAR		0x00
#define ARLAN_RESET		0x01
#define ARLAN_CHANNEL_ATTENTION 0x02
#define ARLAN_INTERRUPT_ENABLE	0x04
#define ARLAN_CLEAR_INTERRUPT	0x08
#define ARLAN_POWER		0x40
#define ARLAN_ACCESS		0x80

#define ARLAN_COM_CONF                0x01
#define ARLAN_COM_RX_ENABLE           0x03
#define ARLAN_COM_RX_ABORT            0x04
#define ARLAN_COM_TX_ENABLE           0x05
#define ARLAN_COM_TX_ABORT            0x06
#define ARLAN_COM_NOP		      0x07
#define ARLAN_COM_STANDBY             0x08
#define ARLAN_COM_ACTIVATE            0x09
#define ARLAN_COM_GOTO_SLOW_POLL      0x0a
#define ARLAN_COM_INT                 0x80


#define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])

#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)

#define READSHM(to, from, atype) {\
	atype tmp;\
	memcpy_fromio(&(tmp), &(from), sizeof(atype));\
	to = tmp;\
	}

#define READSHMEM(from, atype)\
	atype from; \
	READSHM(from, arlan->from, atype);

#define WRITESHM(to, from, atype) \
	{ atype tmpSHM = from;\
	memcpy_toio(&(to), &tmpSHM, sizeof(atype));\
	}

#define DEBUGSHM(levelSHM, stringSHM, stuff, atype) \
	{	atype tmpSHM; \
		memcpy_fromio(&tmpSHM, &(stuff), sizeof(atype));\
		IFDEBUG(levelSHM) printk(stringSHM, tmpSHM);\
	}

#define WRITESHMB(to, val) \
	writeb(val, &(to))
#define READSHMB(to) \
	readb(&(to))
#define WRITESHMS(to, val) \
	writew(val, &(to))
#define READSHMS(to) \
	readw(&(to))
#define WRITESHMI(to, val) \
	writel(val, &(to))
#define READSHMI(to) \
	readl(&(to))


#define registrationBad(dev)\
    ((READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode)    > 0) && \
     (READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0))


#define readControlRegister(dev)\
	READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)

#define writeControlRegister(dev, v) {\
   WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage, ((v) & 0xF));\
   WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister, (v)); }


#define arlan_interrupt_lancpu(dev) {\
   int cr;   \
   \
   cr = readControlRegister(dev);\
   if (cr & ARLAN_CHANNEL_ATTENTION) \
      writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
   else \
      writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
}

#define clearChannelAttention(dev) { \
   writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION); }
#define setHardwareReset(dev) {\
   writeControlRegister(dev, readControlRegister(dev) | ARLAN_RESET); }
#define clearHardwareReset(dev) {\
   writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_RESET); }
#define setInterruptEnable(dev) {\
   writeControlRegister(dev, readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE)  ; }
#define clearInterruptEnable(dev) {\
   writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE)  ; }
#define setClearInterrupt(dev) {\
   writeControlRegister(dev, readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT)   ; }
#define clearClearInterrupt(dev) {\
   writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT); }
#define setPowerOff(dev) {\
   writeControlRegister(dev, readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
   writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
#define setPowerOn(dev) {\
   writeControlRegister(dev, readControlRegister(dev) & ~(ARLAN_POWER)); }
#define arlan_lock_card_access(dev) {\
   writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
#define arlan_unlock_card_access(dev) {\
   writeControlRegister(dev, readControlRegister(dev) | ARLAN_ACCESS); }


#define ARLAN_COMMAND_RX		0x000001
#define ARLAN_COMMAND_NOOP		0x000002
#define ARLAN_COMMAND_NOOPINT		0x000004
#define ARLAN_COMMAND_TX		0x000008
#define ARLAN_COMMAND_CONF		0x000010
#define ARLAN_COMMAND_RESET		0x000020
#define ARLAN_COMMAND_TX_ABORT		0x000040
#define ARLAN_COMMAND_RX_ABORT		0x000080
#define ARLAN_COMMAND_POWERDOWN		0x000100
#define ARLAN_COMMAND_POWERUP		0x000200
#define ARLAN_COMMAND_SLOW_POLL	0x000400
#define ARLAN_COMMAND_ACTIVATE	0x000800
#define ARLAN_COMMAND_INT_ACK		0x001000
#define ARLAN_COMMAND_INT_ENABLE	0x002000
#define ARLAN_COMMAND_WAIT_NOW		0x004000
#define ARLAN_COMMAND_LONG_WAIT_NOW	0x008000
#define ARLAN_COMMAND_STANDBY		0x010000
#define ARLAN_COMMAND_INT_RACK		0x020000
#define ARLAN_COMMAND_INT_RENABLE	0x040000
#define ARLAN_COMMAND_CONF_WAIT		0x080000
#define ARLAN_COMMAND_TBUSY_CLEAR	0x100000
#define ARLAN_COMMAND_CLEAN_AND_CONF	(ARLAN_COMMAND_TX_ABORT\
					| ARLAN_COMMAND_RX_ABORT\
					| ARLAN_COMMAND_CONF)
#define ARLAN_COMMAND_CLEAN_AND_RESET   (ARLAN_COMMAND_TX_ABORT\
					| ARLAN_COMMAND_RX_ABORT\
					| ARLAN_COMMAND_RESET)


#define ARLAN_DEBUG_CHAIN_LOCKS		0x00001
#define ARLAN_DEBUG_RESET		0x00002
#define ARLAN_DEBUG_TIMING		0x00004
#define ARLAN_DEBUG_CARD_STATE		0x00008
#define ARLAN_DEBUG_TX_CHAIN		0x00010
#define ARLAN_DEBUG_MULTICAST		0x00020
#define ARLAN_DEBUG_HEADER_DUMP		0x00040
#define ARLAN_DEBUG_INTERRUPT		0x00080
#define ARLAN_DEBUG_STARTUP		0x00100
#define ARLAN_DEBUG_SHUTDOWN		0x00200
Commit	Line	Data
1da177e4 LT	1	/*
1da177e4 LT	2	* Copyright (C) 1997 Cullen Jennings
a5a86959	3	* Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
1da177e4 LT	4	* GNU General Public License applies
	5	*/
	6
	7	#include <linux/module.h>
1da177e4 LT	8	#include <linux/kernel.h>
	9	#include <linux/types.h>
	10	#include <linux/skbuff.h>
	11	#include <linux/if_ether.h> /* For the statistics structure. */
	12	#include <linux/if_arp.h> /* For ARPHRD_ETHER */
	13	#include <linux/ptrace.h>
	14	#include <linux/ioport.h>
	15	#include <linux/in.h>
	16	#include <linux/slab.h>
	17	#include <linux/string.h>
	18	#include <linux/timer.h>
	19
	20	#include <linux/init.h>
	21	#include <linux/bitops.h>
	22	#include <asm/system.h>
a5a86959	23	#include <linux/io.h>
1da177e4 LT	24	#include <linux/errno.h>
	25	#include <linux/delay.h>
	26	#include <linux/netdevice.h>
	27	#include <linux/etherdevice.h>
	28
	29
a5a86959	30	/* #define ARLAN_DEBUGGING 1 */
1da177e4 LT	31
	32	#define ARLAN_PROC_INTERFACE
	33	#define MAX_ARLANS 4 /* not more than 4 ! */
	34	#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
	35
	36	#define ARLAN_MAX_MULTICAST_ADDRS 16
	37	#define ARLAN_RCV_CLEAN 0
	38	#define ARLAN_RCV_PROMISC 1
	39	#define ARLAN_RCV_CONTROL 2
	40
	41	#ifdef CONFIG_PROC_FS
	42	extern int init_arlan_proc(void);
	43	extern void cleanup_arlan_proc(void);
	44	#else
	45	#define init_arlan_proc() ({ 0; })
	46	#define cleanup_arlan_proc() do { } while (0)
	47	#endif
	48
	49	extern struct net_device *arlan_device[MAX_ARLANS];
	50	extern int arlan_debug;
	51	extern int arlan_entry_debug;
	52	extern int arlan_exit_debug;
	53	extern int testMemory;
a5a86959 AG	54	extern int arlan_command(struct net_device *dev, int command);
a5a86959 AG	55
1da177e4 LT	56	#define SIDUNKNOWN -1
	57	#define radioNodeIdUNKNOWN -1
	58	#define irqUNKNOWN 0
	59	#define debugUNKNOWN 0
	60	#define testMemoryUNKNOWN 1
	61	#define spreadingCodeUNKNOWN 0
	62	#define channelNumberUNKNOWN 0
	63	#define channelSetUNKNOWN 0
	64	#define systemIdUNKNOWN -1
	65	#define registrationModeUNKNOWN -1
	66
	67
a5a86959 AG	68	#define IFDEBUG(L) if ((L) & arlan_debug)
a5a86959 AG	69	#define ARLAN_FAKE_HDR_LEN 12
1da177e4 LT	70
	71	#ifdef ARLAN_DEBUGGING
	72	#define DEBUG 1
	73	#define ARLAN_ENTRY_EXIT_DEBUGGING 1
a5a86959	74	#define ARLAN_DEBUG(a, b) printk(KERN_DEBUG a, b)
1da177e4	75	#else
a5a86959	76	#define ARLAN_DEBUG(a, b)
1da177e4 LT	77	#endif
	78
	79	#define ARLAN_SHMEM_SIZE 0x2000
	80
a5a86959 AG	81	struct arlan_shmem {
a5a86959 AG	82	/* Header Signature */
1da177e4 LT	83	volatile char textRegion[48];
	84	volatile u_char resetFlag;
	85	volatile u_char diagnosticInfo;
	86	volatile u_short diagnosticOffset;
	87	volatile u_char _1[12];
	88	volatile u_char lanCardNodeId[6];
	89	volatile u_char broadcastAddress[6];
	90	volatile u_char hardwareType;
	91	volatile u_char majorHardwareVersion;
	92	volatile u_char minorHardwareVersion;
b91665e9 AG	93	volatile u_char radioModule;/* shows EEPROM, can be overridden at 0x111 */
b91665e9 AG	94	volatile u_char defaultChannelSet; /* shows EEProm, can be overriiden at 0x10A */
1da177e4	95	volatile u_char _2[47];
a5a86959	96
1da177e4 LT	97	/* Control/Status Block - 0x0080 */
	98	volatile u_char interruptInProgress; /* not used by lancpu */
	99	volatile u_char cntrlRegImage; /* not used by lancpu */
	100	volatile u_char _3[13];
	101	volatile u_char dumpByte;
	102	volatile u_char commandByte; /* non-zero = active */
	103	volatile u_char commandParameter[15];
	104
	105	/* Receive Status - 0x00a0 */
	106	volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
	107	volatile u_char rxFrmType;
	108	volatile u_short rxOffset;
	109	volatile u_short rxLength;
	110	volatile u_char rxSrc[6];
	111	volatile u_char rxBroadcastFlag;
	112	volatile u_char rxQuality;
	113	volatile u_char scrambled;
	114	volatile u_char _4[1];
a5a86959	115
1da177e4 LT	116	/* Transmit Status - 0x00b0 */
	117	volatile u_char txStatus;
	118	volatile u_char txAckQuality;
	119	volatile u_char numRetries;
	120	volatile u_char _5[14];
	121	volatile u_char registeredRouter[6];
	122	volatile u_char backboneRouter[6];
	123	volatile u_char registrationStatus;
	124	volatile u_char configuredStatusFlag;
	125	volatile u_char _6[1];
	126	volatile u_char ultimateDestAddress[6];
	127	volatile u_char immedDestAddress[6];
	128	volatile u_char immedSrcAddress[6];
	129	volatile u_short rxSequenceNumber;
	130	volatile u_char assignedLocaltalkAddress;
	131	volatile u_char _7[27];
	132
	133	/* System Parameter Block */
	134
	135	/* - Driver Parameters (Novell Specific) */
	136
	137	volatile u_short txTimeout;
	138	volatile u_short transportTime;
	139	volatile u_char _8[4];
	140
	141	/* - Configuration Parameters */
	142	volatile u_char irqLevel;
	143	volatile u_char spreadingCode;
	144	volatile u_char channelSet;
	145	volatile u_char channelNumber;
	146	volatile u_short radioNodeId;
	147	volatile u_char _9[2];
	148	volatile u_char scramblingDisable;
	149	volatile u_char radioType;
	150	volatile u_short routerId;
	151	volatile u_char _10[9];
	152	volatile u_char txAttenuation;
a5a86959	153	volatile u_char systemId[4];
1da177e4 LT	154	volatile u_short globalChecksum;
	155	volatile u_char _11[4];
	156	volatile u_short maxDatagramSize;
	157	volatile u_short maxFrameSize;
	158	volatile u_char maxRetries;
	159	volatile u_char receiveMode;
	160	volatile u_char priority;
	161	volatile u_char rootOrRepeater;
	162	volatile u_char specifiedRouter[6];
	163	volatile u_short fastPollPeriod;
	164	volatile u_char pollDecay;
	165	volatile u_char fastPollDelay[2];
	166	volatile u_char arlThreshold;
	167	volatile u_char arlDecay;
	168	volatile u_char _12[1];
	169	volatile u_short specRouterTimeout;
	170	volatile u_char _13[5];
	171
	172	/* Scrambled Area */
	173	volatile u_char SID[4];
	174	volatile u_char encryptionKey[12];
	175	volatile u_char _14[2];
	176	volatile u_char waitTime[2];
	177	volatile u_char lParameter[2];
	178	volatile u_char _15[3];
	179	volatile u_short headerSize;
	180	volatile u_short sectionChecksum;
	181
	182	volatile u_char registrationMode;
	183	volatile u_char registrationFill;
	184	volatile u_short pollPeriod;
	185	volatile u_short refreshPeriod;
	186	volatile u_char name[16];
	187	volatile u_char NID[6];
	188	volatile u_char localTalkAddress;
	189	volatile u_char codeFormat;
	190	volatile u_char numChannels;
	191	volatile u_char channel1;
	192	volatile u_char channel2;
	193	volatile u_char channel3;
	194	volatile u_char channel4;
	195	volatile u_char SSCode[59];
	196
	197	volatile u_char _16[0xC0];
	198	volatile u_short auxCmd;
	199	volatile u_char dumpPtr[4];
	200	volatile u_char dumpVal;
	201	volatile u_char _17[0x6A];
	202	volatile u_char wireTest;
	203	volatile u_char _18[14];
	204
	205	/* Statistics Block - 0x0300 */
	206	volatile u_char hostcpuLock;
	207	volatile u_char lancpuLock;
	208	volatile u_char resetTime[18];
a5a86959	209
1da177e4 LT	210	volatile u_char numDatagramsTransmitted[4];
	211	volatile u_char numReTransmissions[4];
	212	volatile u_char numFramesDiscarded[4];
	213	volatile u_char numDatagramsReceived[4];
	214	volatile u_char numDuplicateReceivedFrames[4];
	215	volatile u_char numDatagramsDiscarded[4];
a5a86959	216
1da177e4 LT	217	volatile u_short maxNumReTransmitDatagram;
	218	volatile u_short maxNumReTransmitFrames;
	219	volatile u_short maxNumConsecutiveDuplicateFrames;
	220	/* misaligned here so we have to go to characters */
a5a86959	221
1da177e4 LT	222	volatile u_char numBytesTransmitted[4];
	223	volatile u_char numBytesReceived[4];
	224	volatile u_char numCRCErrors[4];
	225	volatile u_char numLengthErrors[4];
	226	volatile u_char numAbortErrors[4];
	227	volatile u_char numTXUnderruns[4];
	228	volatile u_char numRXOverruns[4];
	229	volatile u_char numHoldOffs[4];
	230	volatile u_char numFramesTransmitted[4];
	231	volatile u_char numFramesReceived[4];
	232	volatile u_char numReceiveFramesLost[4];
	233	volatile u_char numRXBufferOverflows[4];
	234	volatile u_char numFramesDiscardedAddrMismatch[4];
	235	volatile u_char numFramesDiscardedSIDMismatch[4];
	236	volatile u_char numPollsTransmistted[4];
	237	volatile u_char numPollAcknowledges[4];
	238	volatile u_char numStatusTimeouts[4];
	239	volatile u_char numNACKReceived[4];
	240
	241	volatile u_char _19[0x86];
	242
	243	volatile u_char txBuffer[0x800];
	244	volatile u_char rxBuffer[0x800];
	245
	246	volatile u_char _20[0x800];
	247	volatile u_char _21[0x3fb];
	248	volatile u_char configStatus;
	249	volatile u_char _22;
	250	volatile u_char progIOCtrl;
	251	volatile u_char shareMBase;
	252	volatile u_char controlRegister;
	253	};
	254
	255	struct arlan_conf_stru {
	256	int spreadingCode;
	257	int channelSet;
	258	int channelNumber;
	259	int scramblingDisable;
	260	int txAttenuation;
a5a86959	261	int systemId;
1da177e4 LT	262	int maxDatagramSize;
	263	int maxFrameSize;
	264	int maxRetries;
	265	int receiveMode;
	266	int priority;
	267	int rootOrRepeater;
	268	int SID;
	269	int radioNodeId;
	270	int registrationMode;
	271	int registrationFill;
	272	int localTalkAddress;
	273	int codeFormat;
	274	int numChannels;
	275	int channel1;
	276	int channel2;
	277	int channel3;
	278	int channel4;
	279	int txClear;
	280	int txRetries;
	281	int txRouting;
	282	int txScrambled;
	283	int rxParameter;
	284	int txTimeoutMs;
	285	int txAckTimeoutMs;
	286	int waitCardTimeout;
	287	int waitTime;
	288	int lParameter;
	289	int _15;
	290	int headerSize;
	291	int retries;
	292	int tx_delay_ms;
	293	int waitReTransmitPacketMaxSize;
	294	int ReTransmitPacketMaxSize;
	295	int fastReTransCount;
	296	int driverRetransmissions;
	297	int registrationInterrupts;
	298	int hardwareType;
	299	int radioType;
	300	int writeRadioType;
	301	int writeEEPROM;
	302	char siteName[17];
	303	int measure_rate;
	304	int in_speed;
	305	int out_speed;
	306	int in_speed10;
	307	int out_speed10;
	308	int in_speed_max;
	309	int out_speed_max;
	310	int pre_Command_Wait;
	311	int rx_tweak1;
	312	int rx_tweak2;
	313	int tx_queue_len;
	314	};
	315
	316	extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
	317
a5a86959	318	struct TxParam {
1da177e4 LT	319	volatile short offset;
1da177e4 LT	320	volatile short length;
b761cbb5	321	volatile u_char dest[6];
1da177e4 LT	322	volatile unsigned char clear;
	323	volatile unsigned char retries;
	324	volatile unsigned char routing;
	325	volatile unsigned char scrambled;
	326	};
	327
	328	#define TX_RING_SIZE 2
	329	/* Information that need to be kept for each board. */
	330	struct arlan_private {
a5a86959 AG	331	struct arlan_shmem __iomem *card;
a5a86959 AG	332	struct arlan_shmem *conf;
1da177e4	333
a5a86959	334	struct arlan_conf_stru *Conf;
1da177e4	335	int bad;
a5a86959	336	int reset;
1da177e4 LT	337	unsigned long lastReset;
	338	struct timer_list timer;
	339	struct timer_list tx_delay_timer;
	340	struct timer_list tx_retry_timer;
	341	struct timer_list rx_check_timer;
	342
	343	int registrationLostCount;
	344	int reRegisterExp;
	345	int irq_test_done;
	346
	347	struct TxParam txRing[TX_RING_SIZE];
	348	char reTransmitBuff[0x800];
	349	int txLast;
	350	unsigned ReTransmitRequested;
	351	unsigned long tx_done_delayed;
	352	unsigned long registrationLastSeen;
	353
	354	unsigned long tx_last_sent;
	355	unsigned long tx_last_cleared;
	356	unsigned long retransmissions;
b761cbb5	357	unsigned long interrupt_ack_requested;
1da177e4 LT	358	spinlock_t lock;
1da177e4 LT	359	unsigned long waiting_command_mask;
b761cbb5 VD	360	unsigned long card_polling_interval;
b761cbb5 VD	361	unsigned long last_command_buff_free_time;
1da177e4	362
b761cbb5 VD	363	int under_reset;
	364	int under_config;
	365	int rx_command_given;
	366	int tx_command_given;
1da177e4 LT	367	unsigned long interrupt_processing_active;
	368	unsigned long last_rx_int_ack_time;
	369	unsigned long in_bytes;
b761cbb5	370	unsigned long out_bytes;
1da177e4 LT	371	unsigned long in_time;
	372	unsigned long out_time;
	373	unsigned long in_time10;
	374	unsigned long out_time10;
	375	unsigned long in_bytes10;
b761cbb5	376	unsigned long out_bytes10;
1da177e4 LT	377	int init_etherdev_alloc;
	378	};
	379
	380
	381
	382	#define ARLAN_CLEAR 0x00
b761cbb5	383	#define ARLAN_RESET 0x01
1da177e4	384	#define ARLAN_CHANNEL_ATTENTION 0x02
b761cbb5 VD	385	#define ARLAN_INTERRUPT_ENABLE 0x04
	386	#define ARLAN_CLEAR_INTERRUPT 0x08
	387	#define ARLAN_POWER 0x40
1da177e4 LT	388	#define ARLAN_ACCESS 0x80
	389
	390	#define ARLAN_COM_CONF 0x01
	391	#define ARLAN_COM_RX_ENABLE 0x03
	392	#define ARLAN_COM_RX_ABORT 0x04
	393	#define ARLAN_COM_TX_ENABLE 0x05
	394	#define ARLAN_COM_TX_ABORT 0x06
	395	#define ARLAN_COM_NOP 0x07
	396	#define ARLAN_COM_STANDBY 0x08
	397	#define ARLAN_COM_ACTIVATE 0x09
	398	#define ARLAN_COM_GOTO_SLOW_POLL 0x0a
	399	#define ARLAN_COM_INT 0x80
	400
	401
	402	#define TXLAST(dev) (((struct arlan_private )netdev_priv(dev))->txRing[((struct arlan_private )netdev_priv(dev))->txLast])
	403	#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
	404	#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
	405
	406	#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
	407	#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
a5a86959 AG	408
a5a86959 AG	409	#define READSHM(to, from, atype) {\
1da177e4	410	atype tmp;\
a5a86959	411	memcpy_fromio(&(tmp), &(from), sizeof(atype));\
1da177e4 LT	412	to = tmp;\
	413	}
	414
a5a86959	415	#define READSHMEM(from, atype)\
1da177e4 LT	416	atype from; \
	417	READSHM(from, arlan->from, atype);
	418
a5a86959	419	#define WRITESHM(to, from, atype) \
1da177e4	420	{ atype tmpSHM = from;\
a5a86959	421	memcpy_toio(&(to), &tmpSHM, sizeof(atype));\
1da177e4 LT	422	}
1da177e4 LT	423
a5a86959	424	#define DEBUGSHM(levelSHM, stringSHM, stuff, atype) \
1da177e4	425	{ atype tmpSHM; \
a5a86959 AG	426	memcpy_fromio(&tmpSHM, &(stuff), sizeof(atype));\
a5a86959 AG	427	IFDEBUG(levelSHM) printk(stringSHM, tmpSHM);\
1da177e4 LT	428	}
	429
	430	#define WRITESHMB(to, val) \
a5a86959	431	writeb(val, &(to))
1da177e4 LT	432	#define READSHMB(to) \
	433	readb(&(to))
	434	#define WRITESHMS(to, val) \
a5a86959	435	writew(val, &(to))
1da177e4 LT	436	#define READSHMS(to) \
	437	readw(&(to))
	438	#define WRITESHMI(to, val) \
a5a86959	439	writel(val, &(to))
1da177e4 LT	440	#define READSHMI(to) \
	441	readl(&(to))
	442
	443
	444
	445
	446
	447	#define registrationBad(dev)\
b761cbb5 VD	448	((READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
b761cbb5 VD	449	(READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0))
1da177e4 LT	450
	451
	452	#define readControlRegister(dev)\
a5a86959	453	READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
1da177e4	454
a5a86959 AG	455	#define writeControlRegister(dev, v) {\
	456	WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage, ((v) & 0xF));\
	457	WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister, (v)); }
1da177e4 LT	458
	459
	460	#define arlan_interrupt_lancpu(dev) {\
	461	int cr; \
	462	\
	463	cr = readControlRegister(dev);\
b761cbb5	464	if (cr & ARLAN_CHANNEL_ATTENTION) \
1da177e4	465	writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
b761cbb5	466	else \
1da177e4 LT	467	writeControlRegister(dev, (cr \| ARLAN_CHANNEL_ATTENTION));\
	468	}
	469
a5a86959 AG	470	#define clearChannelAttention(dev) { \
a5a86959 AG	471	writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION); }
1da177e4	472	#define setHardwareReset(dev) {\
a5a86959	473	writeControlRegister(dev, readControlRegister(dev) \| ARLAN_RESET); }
1da177e4	474	#define clearHardwareReset(dev) {\
a5a86959 AG	475	writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_RESET); }
	476	#define setInterruptEnable(dev) {\
	477	writeControlRegister(dev, readControlRegister(dev) \| ARLAN_INTERRUPT_ENABLE) ; }
	478	#define clearInterruptEnable(dev) {\
	479	writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ; }
	480	#define setClearInterrupt(dev) {\
	481	writeControlRegister(dev, readControlRegister(dev) \| ARLAN_CLEAR_INTERRUPT) ; }
	482	#define clearClearInterrupt(dev) {\
	483	writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT); }
	484	#define setPowerOff(dev) {\
	485	writeControlRegister(dev, readControlRegister(dev) \| (ARLAN_POWER && ARLAN_ACCESS));\
	486	writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
	487	#define setPowerOn(dev) {\
	488	writeControlRegister(dev, readControlRegister(dev) & ~(ARLAN_POWER)); }
	489	#define arlan_lock_card_access(dev) {\
	490	writeControlRegister(dev, readControlRegister(dev) & ~ARLAN_ACCESS); }
	491	#define arlan_unlock_card_access(dev) {\
	492	writeControlRegister(dev, readControlRegister(dev) \| ARLAN_ACCESS); }
1da177e4 LT	493
	494
	495
	496
	497	#define ARLAN_COMMAND_RX 0x000001
	498	#define ARLAN_COMMAND_NOOP 0x000002
	499	#define ARLAN_COMMAND_NOOPINT 0x000004
	500	#define ARLAN_COMMAND_TX 0x000008
	501	#define ARLAN_COMMAND_CONF 0x000010
	502	#define ARLAN_COMMAND_RESET 0x000020
	503	#define ARLAN_COMMAND_TX_ABORT 0x000040
	504	#define ARLAN_COMMAND_RX_ABORT 0x000080
	505	#define ARLAN_COMMAND_POWERDOWN 0x000100
	506	#define ARLAN_COMMAND_POWERUP 0x000200
b761cbb5 VD	507	#define ARLAN_COMMAND_SLOW_POLL 0x000400
b761cbb5 VD	508	#define ARLAN_COMMAND_ACTIVATE 0x000800
1da177e4 LT	509	#define ARLAN_COMMAND_INT_ACK 0x001000
	510	#define ARLAN_COMMAND_INT_ENABLE 0x002000
	511	#define ARLAN_COMMAND_WAIT_NOW 0x004000
	512	#define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
	513	#define ARLAN_COMMAND_STANDBY 0x010000
	514	#define ARLAN_COMMAND_INT_RACK 0x020000
	515	#define ARLAN_COMMAND_INT_RENABLE 0x040000
	516	#define ARLAN_COMMAND_CONF_WAIT 0x080000
	517	#define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
	518	#define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
	519	\| ARLAN_COMMAND_RX_ABORT\
	520	\| ARLAN_COMMAND_CONF)
	521	#define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
	522	\| ARLAN_COMMAND_RX_ABORT\
	523	\| ARLAN_COMMAND_RESET)
	524
	525
1da177e4 LT	526	#define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
	527	#define ARLAN_DEBUG_RESET 0x00002
	528	#define ARLAN_DEBUG_TIMING 0x00004
	529	#define ARLAN_DEBUG_CARD_STATE 0x00008
	530	#define ARLAN_DEBUG_TX_CHAIN 0x00010
	531	#define ARLAN_DEBUG_MULTICAST 0x00020
	532	#define ARLAN_DEBUG_HEADER_DUMP 0x00040
	533	#define ARLAN_DEBUG_INTERRUPT 0x00080
	534	#define ARLAN_DEBUG_STARTUP 0x00100
	535	#define ARLAN_DEBUG_SHUTDOWN 0x00200