[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ssb / scan.c

/*
 * Sonics Silicon Backplane
 * Bus scanning
 *
 * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
 * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
 * Copyright (C) 2006 Broadcom Corporation.
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_regs.h>
#include <linux/pci.h>
#include <linux/io.h>

#include <pcmcia/cistpl.h>
#include <pcmcia/ds.h>

#include "ssb_private.h"


const char *ssb_core_name(u16 coreid)
{
	switch (coreid) {
	case SSB_DEV_CHIPCOMMON:
		return "ChipCommon";
	case SSB_DEV_ILINE20:
		return "ILine 20";
	case SSB_DEV_SDRAM:
		return "SDRAM";
	case SSB_DEV_PCI:
		return "PCI";
	case SSB_DEV_MIPS:
		return "MIPS";
	case SSB_DEV_ETHERNET:
		return "Fast Ethernet";
	case SSB_DEV_V90:
		return "V90";
	case SSB_DEV_USB11_HOSTDEV:
		return "USB 1.1 Hostdev";
	case SSB_DEV_ADSL:
		return "ADSL";
	case SSB_DEV_ILINE100:
		return "ILine 100";
	case SSB_DEV_IPSEC:
		return "IPSEC";
	case SSB_DEV_PCMCIA:
		return "PCMCIA";
	case SSB_DEV_INTERNAL_MEM:
		return "Internal Memory";
	case SSB_DEV_MEMC_SDRAM:
		return "MEMC SDRAM";
	case SSB_DEV_EXTIF:
		return "EXTIF";
	case SSB_DEV_80211:
		return "IEEE 802.11";
	case SSB_DEV_MIPS_3302:
		return "MIPS 3302";
	case SSB_DEV_USB11_HOST:
		return "USB 1.1 Host";
	case SSB_DEV_USB11_DEV:
		return "USB 1.1 Device";
	case SSB_DEV_USB20_HOST:
		return "USB 2.0 Host";
	case SSB_DEV_USB20_DEV:
		return "USB 2.0 Device";
	case SSB_DEV_SDIO_HOST:
		return "SDIO Host";
	case SSB_DEV_ROBOSWITCH:
		return "Roboswitch";
	case SSB_DEV_PARA_ATA:
		return "PATA";
	case SSB_DEV_SATA_XORDMA:
		return "SATA XOR-DMA";
	case SSB_DEV_ETHERNET_GBIT:
		return "GBit Ethernet";
	case SSB_DEV_PCIE:
		return "PCI-E";
	case SSB_DEV_MIMO_PHY:
		return "MIMO PHY";
	case SSB_DEV_SRAM_CTRLR:
		return "SRAM Controller";
	case SSB_DEV_MINI_MACPHY:
		return "Mini MACPHY";
	case SSB_DEV_ARM_1176:
		return "ARM 1176";
	case SSB_DEV_ARM_7TDMI:
		return "ARM 7TDMI";
	case SSB_DEV_ARM_CM3:
		return "ARM Cortex M3";
	}
	return "UNKNOWN";
}

static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
{
	u16 chipid_fallback = 0;

	switch (pci_dev->device) {
	case 0x4301:
		chipid_fallback = 0x4301;
		break;
	case 0x4305 ... 0x4307:
		chipid_fallback = 0x4307;
		break;
	case 0x4403:
		chipid_fallback = 0x4402;
		break;
	case 0x4610 ... 0x4615:
		chipid_fallback = 0x4610;
		break;
	case 0x4710 ... 0x4715:
		chipid_fallback = 0x4710;
		break;
	case 0x4320 ... 0x4325:
		chipid_fallback = 0x4309;
		break;
	case PCI_DEVICE_ID_BCM4401:
	case PCI_DEVICE_ID_BCM4401B0:
	case PCI_DEVICE_ID_BCM4401B1:
		chipid_fallback = 0x4401;
		break;
	default:
		ssb_printk(KERN_ERR PFX
			   "PCI-ID not in fallback list\n");
	}

	return chipid_fallback;
}

static u8 chipid_to_nrcores(u16 chipid)
{
	switch (chipid) {
	case 0x5365:
		return 7;
	case 0x4306:
		return 6;
	case 0x4310:
		return 8;
	case 0x4307:
	case 0x4301:
		return 5;
	case 0x4401:
	case 0x4402:
		return 3;
	case 0x4710:
	case 0x4610:
	case 0x4704:
		return 9;
	default:
		ssb_printk(KERN_ERR PFX
			   "CHIPID not in nrcores fallback list\n");
	}

	return 1;
}

static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
		       u16 offset)
{
	u32 lo, hi;

	switch (bus->bustype) {
	case SSB_BUSTYPE_SSB:
		offset += current_coreidx * SSB_CORE_SIZE;
		break;
	case SSB_BUSTYPE_PCI:
		break;
	case SSB_BUSTYPE_PCMCIA:
		if (offset >= 0x800) {
			ssb_pcmcia_switch_segment(bus, 1);
			offset -= 0x800;
		} else
			ssb_pcmcia_switch_segment(bus, 0);
		lo = readw(bus->mmio + offset);
		hi = readw(bus->mmio + offset + 2);
		return lo | (hi << 16);
	case SSB_BUSTYPE_SDIO:
		offset += current_coreidx * SSB_CORE_SIZE;
		return ssb_sdio_scan_read32(bus, offset);
	}
	return readl(bus->mmio + offset);
}

static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
{
	switch (bus->bustype) {
	case SSB_BUSTYPE_SSB:
		break;
	case SSB_BUSTYPE_PCI:
		return ssb_pci_switch_coreidx(bus, coreidx);
	case SSB_BUSTYPE_PCMCIA:
		return ssb_pcmcia_switch_coreidx(bus, coreidx);
	case SSB_BUSTYPE_SDIO:
		return ssb_sdio_scan_switch_coreidx(bus, coreidx);
	}
	return 0;
}

void ssb_iounmap(struct ssb_bus *bus)
{
	switch (bus->bustype) {
	case SSB_BUSTYPE_SSB:
	case SSB_BUSTYPE_PCMCIA:
		iounmap(bus->mmio);
		break;
	case SSB_BUSTYPE_PCI:
#ifdef CONFIG_SSB_PCIHOST
		pci_iounmap(bus->host_pci, bus->mmio);
#else
		SSB_BUG_ON(1); /* Can't reach this code. */
#endif
		break;
	case SSB_BUSTYPE_SDIO:
		break;
	}
	bus->mmio = NULL;
	bus->mapped_device = NULL;
}

static void __iomem *ssb_ioremap(struct ssb_bus *bus,
				 unsigned long baseaddr)
{
	void __iomem *mmio = NULL;

	switch (bus->bustype) {
	case SSB_BUSTYPE_SSB:
		/* Only map the first core for now. */
		/* fallthrough... */
	case SSB_BUSTYPE_PCMCIA:
		mmio = ioremap(baseaddr, SSB_CORE_SIZE);
		break;
	case SSB_BUSTYPE_PCI:
#ifdef CONFIG_SSB_PCIHOST
		mmio = pci_iomap(bus->host_pci, 0, ~0UL);
#else
		SSB_BUG_ON(1); /* Can't reach this code. */
#endif
		break;
	case SSB_BUSTYPE_SDIO:
		/* Nothing to ioremap in the SDIO case, just fake it */
		mmio = (void __iomem *)baseaddr;
		break;
	}

	return mmio;
}

static int we_support_multiple_80211_cores(struct ssb_bus *bus)
{
	/* More than one 802.11 core is only supported by special chips.
	 * There are chips with two 802.11 cores, but with dangling
	 * pins on the second core. Be careful and reject them here.
	 */

#ifdef CONFIG_SSB_PCIHOST
	if (bus->bustype == SSB_BUSTYPE_PCI) {
		if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
		    ((bus->host_pci->device == 0x4313) ||
		     (bus->host_pci->device == 0x431A) ||
		     (bus->host_pci->device == 0x4321) ||
		     (bus->host_pci->device == 0x4324)))
			return 1;
	}
#endif /* CONFIG_SSB_PCIHOST */
	return 0;
}

int ssb_bus_scan(struct ssb_bus *bus,
		 unsigned long baseaddr)
{
	int err = -ENOMEM;
	void __iomem *mmio;
	u32 idhi, cc, rev, tmp;
	int dev_i, i;
	struct ssb_device *dev;
	int nr_80211_cores = 0;

	mmio = ssb_ioremap(bus, baseaddr);
	if (!mmio)
		goto out;
	bus->mmio = mmio;

	err = scan_switchcore(bus, 0); /* Switch to first core */
	if (err)
		goto err_unmap;

	idhi = scan_read32(bus, 0, SSB_IDHIGH);
	cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
	rev = (idhi & SSB_IDHIGH_RCLO);
	rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;

	bus->nr_devices = 0;
	if (cc == SSB_DEV_CHIPCOMMON) {
		tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);

		bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
		bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
				SSB_CHIPCO_REVSHIFT;
		bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
				    SSB_CHIPCO_PACKSHIFT;
		if (rev >= 4) {
			bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
					  SSB_CHIPCO_NRCORESSHIFT;
		}
		tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
		bus->chipco.capabilities = tmp;
	} else {
		if (bus->bustype == SSB_BUSTYPE_PCI) {
			bus->chip_id = pcidev_to_chipid(bus->host_pci);
			bus->chip_rev = bus->host_pci->revision;
			bus->chip_package = 0;
		} else {
			bus->chip_id = 0x4710;
			bus->chip_rev = 0;
			bus->chip_package = 0;
		}
	}
	ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
		   "package 0x%02X\n", bus->chip_id, bus->chip_rev,
		   bus->chip_package);
	if (!bus->nr_devices)
		bus->nr_devices = chipid_to_nrcores(bus->chip_id);
	if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
		ssb_printk(KERN_ERR PFX
			   "More than %d ssb cores found (%d)\n",
			   SSB_MAX_NR_CORES, bus->nr_devices);
		goto err_unmap;
	}
	if (bus->bustype == SSB_BUSTYPE_SSB) {
		/* Now that we know the number of cores,
		 * remap the whole IO space for all cores.
		 */
		err = -ENOMEM;
		iounmap(mmio);
		mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
		if (!mmio)
			goto out;
		bus->mmio = mmio;
	}

	/* Fetch basic information about each core/device */
	for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
		err = scan_switchcore(bus, i);
		if (err)
			goto err_unmap;
		dev = &(bus->devices[dev_i]);

		idhi = scan_read32(bus, i, SSB_IDHIGH);
		dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
		dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
		dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
		dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
		dev->core_index = i;
		dev->bus = bus;
		dev->ops = bus->ops;

		printk(KERN_DEBUG PFX
			    "Core %d found: %s "
			    "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
			    i, ssb_core_name(dev->id.coreid),
			    dev->id.coreid, dev->id.revision, dev->id.vendor);

		switch (dev->id.coreid) {
		case SSB_DEV_80211:
			nr_80211_cores++;
			if (nr_80211_cores > 1) {
				if (!we_support_multiple_80211_cores(bus)) {
					ssb_dprintk(KERN_INFO PFX "Ignoring additional "
						    "802.11 core\n");
					continue;
				}
			}
			break;
		case SSB_DEV_EXTIF:
#ifdef CONFIG_SSB_DRIVER_EXTIF
			if (bus->extif.dev) {
				ssb_printk(KERN_WARNING PFX
					   "WARNING: Multiple EXTIFs found\n");
				break;
			}
			bus->extif.dev = dev;
#endif /* CONFIG_SSB_DRIVER_EXTIF */
			break;
		case SSB_DEV_CHIPCOMMON:
			if (bus->chipco.dev) {
				ssb_printk(KERN_WARNING PFX
					   "WARNING: Multiple ChipCommon found\n");
				break;
			}
			bus->chipco.dev = dev;
			break;
		case SSB_DEV_MIPS:
		case SSB_DEV_MIPS_3302:
#ifdef CONFIG_SSB_DRIVER_MIPS
			if (bus->mipscore.dev) {
				ssb_printk(KERN_WARNING PFX
					   "WARNING: Multiple MIPS cores found\n");
				break;
			}
			bus->mipscore.dev = dev;
#endif /* CONFIG_SSB_DRIVER_MIPS */
			break;
		case SSB_DEV_PCI:
		case SSB_DEV_PCIE:
#ifdef CONFIG_SSB_DRIVER_PCICORE
			if (bus->bustype == SSB_BUSTYPE_PCI) {
				/* Ignore PCI cores on PCI-E cards.
				 * Ignore PCI-E cores on PCI cards. */
				if (dev->id.coreid == SSB_DEV_PCI) {
					if (pci_is_pcie(bus->host_pci))
						continue;
				} else {
					if (!pci_is_pcie(bus->host_pci))
						continue;
				}
			}
			if (bus->pcicore.dev) {
				ssb_printk(KERN_WARNING PFX
					   "WARNING: Multiple PCI(E) cores found\n");
				break;
			}
			bus->pcicore.dev = dev;
#endif /* CONFIG_SSB_DRIVER_PCICORE */
			break;
		case SSB_DEV_ETHERNET:
			if (bus->bustype == SSB_BUSTYPE_PCI) {
				if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
				    (bus->host_pci->device & 0xFF00) == 0x4300) {
					/* This is a dangling ethernet core on a
					 * wireless device. Ignore it. */
					continue;
				}
			}
			break;
		default:
			break;
		}

		dev_i++;
	}
	bus->nr_devices = dev_i;

	err = 0;
out:
	return err;
err_unmap:
	ssb_iounmap(bus);
	goto out;
}
Commit	Line	Data
61e115a5 MB	1	/*
	2	* Sonics Silicon Backplane
	3	* Bus scanning
	4	*
eb032b98	5	* Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
61e115a5 MB	6	* Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
	7	* Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
	8	* Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
	9	* Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
	10	* Copyright (C) 2006 Broadcom Corporation.
	11	*
	12	* Licensed under the GNU/GPL. See COPYING for details.
	13	*/
	14
	15	#include <linux/ssb/ssb.h>
	16	#include <linux/ssb/ssb_regs.h>
	17	#include <linux/pci.h>
	18	#include <linux/io.h>
	19
61e115a5 MB	20	#include <pcmcia/cistpl.h>
	21	#include <pcmcia/ds.h>
	22
	23	#include "ssb_private.h"
	24
	25
	26	const char *ssb_core_name(u16 coreid)
	27	{
	28	switch (coreid) {
	29	case SSB_DEV_CHIPCOMMON:
	30	return "ChipCommon";
	31	case SSB_DEV_ILINE20:
	32	return "ILine 20";
	33	case SSB_DEV_SDRAM:
	34	return "SDRAM";
	35	case SSB_DEV_PCI:
	36	return "PCI";
	37	case SSB_DEV_MIPS:
	38	return "MIPS";
	39	case SSB_DEV_ETHERNET:
	40	return "Fast Ethernet";
	41	case SSB_DEV_V90:
	42	return "V90";
	43	case SSB_DEV_USB11_HOSTDEV:
	44	return "USB 1.1 Hostdev";
	45	case SSB_DEV_ADSL:
	46	return "ADSL";
	47	case SSB_DEV_ILINE100:
	48	return "ILine 100";
	49	case SSB_DEV_IPSEC:
	50	return "IPSEC";
	51	case SSB_DEV_PCMCIA:
	52	return "PCMCIA";
	53	case SSB_DEV_INTERNAL_MEM:
	54	return "Internal Memory";
	55	case SSB_DEV_MEMC_SDRAM:
	56	return "MEMC SDRAM";
	57	case SSB_DEV_EXTIF:
	58	return "EXTIF";
	59	case SSB_DEV_80211:
	60	return "IEEE 802.11";
	61	case SSB_DEV_MIPS_3302:
	62	return "MIPS 3302";
	63	case SSB_DEV_USB11_HOST:
	64	return "USB 1.1 Host";
	65	case SSB_DEV_USB11_DEV:
	66	return "USB 1.1 Device";
	67	case SSB_DEV_USB20_HOST:
	68	return "USB 2.0 Host";
	69	case SSB_DEV_USB20_DEV:
	70	return "USB 2.0 Device";
	71	case SSB_DEV_SDIO_HOST:
	72	return "SDIO Host";
	73	case SSB_DEV_ROBOSWITCH:
	74	return "Roboswitch";
	75	case SSB_DEV_PARA_ATA:
	76	return "PATA";
	77	case SSB_DEV_SATA_XORDMA:
	78	return "SATA XOR-DMA";
	79	case SSB_DEV_ETHERNET_GBIT:
	80	return "GBit Ethernet";
	81	case SSB_DEV_PCIE:
	82	return "PCI-E";
	83	case SSB_DEV_MIMO_PHY:
84	return "MIMO PHY";
85	case SSB_DEV_SRAM_CTRLR:
86	return "SRAM Controller";
87	case SSB_DEV_MINI_MACPHY:
88	return "Mini MACPHY";
89	case SSB_DEV_ARM_1176:
90	return "ARM 1176";
91	case SSB_DEV_ARM_7TDMI:
92	return "ARM 7TDMI";
ccaf8c32 HM	93	case SSB_DEV_ARM_CM3:
ccaf8c32 HM	94	return "ARM Cortex M3";
61e115a5 MB	95	}
	96	return "UNKNOWN";
	97	}
	98
	99	static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
	100	{
	101	u16 chipid_fallback = 0;
	102
	103	switch (pci_dev->device) {
	104	case 0x4301:
	105	chipid_fallback = 0x4301;
	106	break;
	107	case 0x4305 ... 0x4307:
	108	chipid_fallback = 0x4307;
	109	break;
	110	case 0x4403:
	111	chipid_fallback = 0x4402;
	112	break;
	113	case 0x4610 ... 0x4615:
	114	chipid_fallback = 0x4610;
	115	break;
	116	case 0x4710 ... 0x4715:
	117	chipid_fallback = 0x4710;
	118	break;
	119	case 0x4320 ... 0x4325:
	120	chipid_fallback = 0x4309;
	121	break;
	122	case PCI_DEVICE_ID_BCM4401:
	123	case PCI_DEVICE_ID_BCM4401B0:
	124	case PCI_DEVICE_ID_BCM4401B1:
	125	chipid_fallback = 0x4401;
	126	break;
	127	default:
	128	ssb_printk(KERN_ERR PFX
	129	"PCI-ID not in fallback list\n");
	130	}
	131
	132	return chipid_fallback;
	133	}
	134
	135	static u8 chipid_to_nrcores(u16 chipid)
	136	{
	137	switch (chipid) {
	138	case 0x5365:
	139	return 7;
	140	case 0x4306:
	141	return 6;
	142	case 0x4310:
	143	return 8;
	144	case 0x4307:
	145	case 0x4301:
	146	return 5;
	147	case 0x4401:
	148	case 0x4402:
	149	return 3;
	150	case 0x4710:
	151	case 0x4610:
	152	case 0x4704:
	153	return 9;
	154	default:
	155	ssb_printk(KERN_ERR PFX
	156	"CHIPID not in nrcores fallback list\n");
	157	}
	158
159	return 1;
160	}
161
162	static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
163	u16 offset)
164	{
d8e23522 MF	165	u32 lo, hi;
d8e23522 MF	166
61e115a5 MB	167	switch (bus->bustype) {
	168	case SSB_BUSTYPE_SSB:
	169	offset += current_coreidx * SSB_CORE_SIZE;
	170	break;
	171	case SSB_BUSTYPE_PCI:
	172	break;
	173	case SSB_BUSTYPE_PCMCIA:
	174	if (offset >= 0x800) {
	175	ssb_pcmcia_switch_segment(bus, 1);
	176	offset -= 0x800;
	177	} else
	178	ssb_pcmcia_switch_segment(bus, 0);
d8e23522 MF	179	lo = readw(bus->mmio + offset);
	180	hi = readw(bus->mmio + offset + 2);
	181	return lo \| (hi << 16);
24ea602e AH	182	case SSB_BUSTYPE_SDIO:
	183	offset += current_coreidx * SSB_CORE_SIZE;
	184	return ssb_sdio_scan_read32(bus, offset);
61e115a5 MB	185	}
	186	return readl(bus->mmio + offset);
	187	}
	188
	189	static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
	190	{
	191	switch (bus->bustype) {
	192	case SSB_BUSTYPE_SSB:
	193	break;
	194	case SSB_BUSTYPE_PCI:
	195	return ssb_pci_switch_coreidx(bus, coreidx);
	196	case SSB_BUSTYPE_PCMCIA:
	197	return ssb_pcmcia_switch_coreidx(bus, coreidx);
24ea602e AH	198	case SSB_BUSTYPE_SDIO:
24ea602e AH	199	return ssb_sdio_scan_switch_coreidx(bus, coreidx);
61e115a5 MB	200	}
	201	return 0;
	202	}
	203
	204	void ssb_iounmap(struct ssb_bus *bus)
	205	{
	206	switch (bus->bustype) {
	207	case SSB_BUSTYPE_SSB:
	208	case SSB_BUSTYPE_PCMCIA:
	209	iounmap(bus->mmio);
	210	break;
	211	case SSB_BUSTYPE_PCI:
	212	#ifdef CONFIG_SSB_PCIHOST
	213	pci_iounmap(bus->host_pci, bus->mmio);
	214	#else
	215	SSB_BUG_ON(1); /* Can't reach this code. */
	216	#endif
	217	break;
24ea602e AH	218	case SSB_BUSTYPE_SDIO:
24ea602e AH	219	break;
61e115a5 MB	220	}
	221	bus->mmio = NULL;
	222	bus->mapped_device = NULL;
	223	}
	224
	225	static void __iomem ssb_ioremap(struct ssb_bus bus,
	226	unsigned long baseaddr)
	227	{
	228	void __iomem *mmio = NULL;
	229
	230	switch (bus->bustype) {
	231	case SSB_BUSTYPE_SSB:
	232	/* Only map the first core for now. */
	233	/* fallthrough... */
	234	case SSB_BUSTYPE_PCMCIA:
	235	mmio = ioremap(baseaddr, SSB_CORE_SIZE);
	236	break;
	237	case SSB_BUSTYPE_PCI:
	238	#ifdef CONFIG_SSB_PCIHOST
	239	mmio = pci_iomap(bus->host_pci, 0, ~0UL);
	240	#else
	241	SSB_BUG_ON(1); /* Can't reach this code. */
	242	#endif
	243	break;
24ea602e AH	244	case SSB_BUSTYPE_SDIO:
	245	/* Nothing to ioremap in the SDIO case, just fake it */
	246	mmio = (void __iomem *)baseaddr;
	247	break;
61e115a5 MB	248	}
	249
	250	return mmio;
	251	}
	252
	253	static int we_support_multiple_80211_cores(struct ssb_bus *bus)
	254	{
	255	/* More than one 802.11 core is only supported by special chips.
	256	* There are chips with two 802.11 cores, but with dangling
	257	* pins on the second core. Be careful and reject them here.
	258	*/
	259
	260	#ifdef CONFIG_SSB_PCIHOST
	261	if (bus->bustype == SSB_BUSTYPE_PCI) {
	262	if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
9fcce61c RM	263	((bus->host_pci->device == 0x4313) \|\|
	264	(bus->host_pci->device == 0x431A) \|\|
	265	(bus->host_pci->device == 0x4321) \|\|
	266	(bus->host_pci->device == 0x4324)))
61e115a5 MB	267	return 1;
	268	}
	269	#endif /* CONFIG_SSB_PCIHOST */
	270	return 0;
	271	}
	272
	273	int ssb_bus_scan(struct ssb_bus *bus,
	274	unsigned long baseaddr)
	275	{
	276	int err = -ENOMEM;
	277	void __iomem *mmio;
	278	u32 idhi, cc, rev, tmp;
	279	int dev_i, i;
	280	struct ssb_device *dev;
	281	int nr_80211_cores = 0;
	282
	283	mmio = ssb_ioremap(bus, baseaddr);
	284	if (!mmio)
	285	goto out;
	286	bus->mmio = mmio;
	287
	288	err = scan_switchcore(bus, 0); /* Switch to first core */
	289	if (err)
	290	goto err_unmap;
	291
	292	idhi = scan_read32(bus, 0, SSB_IDHIGH);
	293	cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
	294	rev = (idhi & SSB_IDHIGH_RCLO);
	295	rev \|= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
	296
	297	bus->nr_devices = 0;
	298	if (cc == SSB_DEV_CHIPCOMMON) {
	299	tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
	300
	301	bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
	302	bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
	303	SSB_CHIPCO_REVSHIFT;
	304	bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
	305	SSB_CHIPCO_PACKSHIFT;
	306	if (rev >= 4) {
	307	bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
	308	SSB_CHIPCO_NRCORESSHIFT;
	309	}
	310	tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
	311	bus->chipco.capabilities = tmp;
	312	} else {
	313	if (bus->bustype == SSB_BUSTYPE_PCI) {
	314	bus->chip_id = pcidev_to_chipid(bus->host_pci);
ce2dd3c2	315	bus->chip_rev = bus->host_pci->revision;
61e115a5 MB	316	bus->chip_package = 0;
	317	} else {
	318	bus->chip_id = 0x4710;
	319	bus->chip_rev = 0;
	320	bus->chip_package = 0;
	321	}
	322	}
bedb2a18 HM	323	ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
	324	"package 0x%02X\n", bus->chip_id, bus->chip_rev,
	325	bus->chip_package);
61e115a5 MB	326	if (!bus->nr_devices)
	327	bus->nr_devices = chipid_to_nrcores(bus->chip_id);
	328	if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
	329	ssb_printk(KERN_ERR PFX
	330	"More than %d ssb cores found (%d)\n",
	331	SSB_MAX_NR_CORES, bus->nr_devices);
	332	goto err_unmap;
	333	}
	334	if (bus->bustype == SSB_BUSTYPE_SSB) {
	335	/* Now that we know the number of cores,
	336	* remap the whole IO space for all cores.
	337	*/
	338	err = -ENOMEM;
	339	iounmap(mmio);
	340	mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
	341	if (!mmio)
	342	goto out;
	343	bus->mmio = mmio;
	344	}
	345
	346	/* Fetch basic information about each core/device */
	347	for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
	348	err = scan_switchcore(bus, i);
	349	if (err)
	350	goto err_unmap;
	351	dev = &(bus->devices[dev_i]);
	352
	353	idhi = scan_read32(bus, i, SSB_IDHIGH);
	354	dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
	355	dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
	356	dev->id.revision \|= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
	357	dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
	358	dev->core_index = i;
	359	dev->bus = bus;
	360	dev->ops = bus->ops;
	361
ac2752c1	362	printk(KERN_DEBUG PFX
61e115a5 MB	363	"Core %d found: %s "
	364	"(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
	365	i, ssb_core_name(dev->id.coreid),
	366	dev->id.coreid, dev->id.revision, dev->id.vendor);
	367
	368	switch (dev->id.coreid) {
	369	case SSB_DEV_80211:
	370	nr_80211_cores++;
	371	if (nr_80211_cores > 1) {
	372	if (!we_support_multiple_80211_cores(bus)) {
	373	ssb_dprintk(KERN_INFO PFX "Ignoring additional "
	374	"802.11 core\n");
	375	continue;
	376	}
	377	}
	378	break;
	379	case SSB_DEV_EXTIF:
	380	#ifdef CONFIG_SSB_DRIVER_EXTIF
	381	if (bus->extif.dev) {
	382	ssb_printk(KERN_WARNING PFX
	383	"WARNING: Multiple EXTIFs found\n");
	384	break;
	385	}
	386	bus->extif.dev = dev;
	387	#endif /* CONFIG_SSB_DRIVER_EXTIF */
	388	break;
	389	case SSB_DEV_CHIPCOMMON:
	390	if (bus->chipco.dev) {
	391	ssb_printk(KERN_WARNING PFX
	392	"WARNING: Multiple ChipCommon found\n");
	393	break;
	394	}
	395	bus->chipco.dev = dev;
	396	break;
	397	case SSB_DEV_MIPS:
	398	case SSB_DEV_MIPS_3302:
	399	#ifdef CONFIG_SSB_DRIVER_MIPS
	400	if (bus->mipscore.dev) {
	401	ssb_printk(KERN_WARNING PFX
	402	"WARNING: Multiple MIPS cores found\n");
	403	break;
	404	}
	405	bus->mipscore.dev = dev;
	406	#endif /* CONFIG_SSB_DRIVER_MIPS */
	407	break;
	408	case SSB_DEV_PCI:
	409	case SSB_DEV_PCIE:
	410	#ifdef CONFIG_SSB_DRIVER_PCICORE
87c4ac84 MB	411	if (bus->bustype == SSB_BUSTYPE_PCI) {
	412	/* Ignore PCI cores on PCI-E cards.
	413	* Ignore PCI-E cores on PCI cards. */
	414	if (dev->id.coreid == SSB_DEV_PCI) {
6b740aaa	415	if (pci_is_pcie(bus->host_pci))
87c4ac84 MB	416	continue;
87c4ac84 MB	417	} else {
6b740aaa	418	if (!pci_is_pcie(bus->host_pci))
87c4ac84 MB	419	continue;
	420	}
	421	}
61e115a5 MB	422	if (bus->pcicore.dev) {
	423	ssb_printk(KERN_WARNING PFX
	424	"WARNING: Multiple PCI(E) cores found\n");
	425	break;
	426	}
	427	bus->pcicore.dev = dev;
	428	#endif /* CONFIG_SSB_DRIVER_PCICORE */
	429	break;
ed70c6e6 MB	430	case SSB_DEV_ETHERNET:
	431	if (bus->bustype == SSB_BUSTYPE_PCI) {
	432	if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
	433	(bus->host_pci->device & 0xFF00) == 0x4300) {
	434	/* This is a dangling ethernet core on a
	435	* wireless device. Ignore it. */
	436	continue;
	437	}
	438	}
	439	break;
61e115a5 MB	440	default:
	441	break;
	442	}
	443
	444	dev_i++;
	445	}
	446	bus->nr_devices = dev_i;
	447
	448	err = 0;
	449	out:
	450	return err;
	451	err_unmap:
	452	ssb_iounmap(bus);
	453	goto out;
	454	}