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9904f22a DB |
1 | /* |
2 | * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #include <linux/config.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/spinlock.h> | |
22 | #include <linux/workqueue.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/errno.h> | |
26 | #include <linux/platform_device.h> | |
27 | ||
28 | #include <linux/spi/spi.h> | |
29 | #include <linux/spi/spi_bitbang.h> | |
30 | ||
31 | ||
32 | /*----------------------------------------------------------------------*/ | |
33 | ||
34 | /* | |
35 | * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support. | |
36 | * Use this for GPIO or shift-register level hardware APIs. | |
37 | * | |
38 | * spi_bitbang_cs is in spi_device->controller_state, which is unavailable | |
39 | * to glue code. These bitbang setup() and cleanup() routines are always | |
40 | * used, though maybe they're called from controller-aware code. | |
41 | * | |
42 | * chipselect() and friends may use use spi_device->controller_data and | |
43 | * controller registers as appropriate. | |
44 | * | |
45 | * | |
46 | * NOTE: SPI controller pins can often be used as GPIO pins instead, | |
47 | * which means you could use a bitbang driver either to get hardware | |
48 | * working quickly, or testing for differences that aren't speed related. | |
49 | */ | |
50 | ||
51 | struct spi_bitbang_cs { | |
52 | unsigned nsecs; /* (clock cycle time)/2 */ | |
53 | u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs, | |
54 | u32 word, u8 bits); | |
55 | unsigned (*txrx_bufs)(struct spi_device *, | |
56 | u32 (*txrx_word)( | |
57 | struct spi_device *spi, | |
58 | unsigned nsecs, | |
59 | u32 word, u8 bits), | |
60 | unsigned, struct spi_transfer *); | |
61 | }; | |
62 | ||
63 | static unsigned bitbang_txrx_8( | |
64 | struct spi_device *spi, | |
65 | u32 (*txrx_word)(struct spi_device *spi, | |
66 | unsigned nsecs, | |
67 | u32 word, u8 bits), | |
68 | unsigned ns, | |
69 | struct spi_transfer *t | |
70 | ) { | |
71 | unsigned bits = spi->bits_per_word; | |
72 | unsigned count = t->len; | |
73 | const u8 *tx = t->tx_buf; | |
74 | u8 *rx = t->rx_buf; | |
75 | ||
76 | while (likely(count > 0)) { | |
77 | u8 word = 0; | |
78 | ||
79 | if (tx) | |
80 | word = *tx++; | |
81 | word = txrx_word(spi, ns, word, bits); | |
82 | if (rx) | |
83 | *rx++ = word; | |
84 | count -= 1; | |
85 | } | |
86 | return t->len - count; | |
87 | } | |
88 | ||
89 | static unsigned bitbang_txrx_16( | |
90 | struct spi_device *spi, | |
91 | u32 (*txrx_word)(struct spi_device *spi, | |
92 | unsigned nsecs, | |
93 | u32 word, u8 bits), | |
94 | unsigned ns, | |
95 | struct spi_transfer *t | |
96 | ) { | |
97 | unsigned bits = spi->bits_per_word; | |
98 | unsigned count = t->len; | |
99 | const u16 *tx = t->tx_buf; | |
100 | u16 *rx = t->rx_buf; | |
101 | ||
102 | while (likely(count > 1)) { | |
103 | u16 word = 0; | |
104 | ||
105 | if (tx) | |
106 | word = *tx++; | |
107 | word = txrx_word(spi, ns, word, bits); | |
108 | if (rx) | |
109 | *rx++ = word; | |
110 | count -= 2; | |
111 | } | |
112 | return t->len - count; | |
113 | } | |
114 | ||
115 | static unsigned bitbang_txrx_32( | |
116 | struct spi_device *spi, | |
117 | u32 (*txrx_word)(struct spi_device *spi, | |
118 | unsigned nsecs, | |
119 | u32 word, u8 bits), | |
120 | unsigned ns, | |
121 | struct spi_transfer *t | |
122 | ) { | |
123 | unsigned bits = spi->bits_per_word; | |
124 | unsigned count = t->len; | |
125 | const u32 *tx = t->tx_buf; | |
126 | u32 *rx = t->rx_buf; | |
127 | ||
128 | while (likely(count > 3)) { | |
129 | u32 word = 0; | |
130 | ||
131 | if (tx) | |
132 | word = *tx++; | |
133 | word = txrx_word(spi, ns, word, bits); | |
134 | if (rx) | |
135 | *rx++ = word; | |
136 | count -= 4; | |
137 | } | |
138 | return t->len - count; | |
139 | } | |
140 | ||
141 | /** | |
142 | * spi_bitbang_setup - default setup for per-word I/O loops | |
143 | */ | |
144 | int spi_bitbang_setup(struct spi_device *spi) | |
145 | { | |
146 | struct spi_bitbang_cs *cs = spi->controller_state; | |
147 | struct spi_bitbang *bitbang; | |
148 | ||
149 | if (!cs) { | |
150 | cs = kzalloc(sizeof *cs, SLAB_KERNEL); | |
151 | if (!cs) | |
152 | return -ENOMEM; | |
153 | spi->controller_state = cs; | |
154 | } | |
155 | bitbang = spi_master_get_devdata(spi->master); | |
156 | ||
157 | if (!spi->bits_per_word) | |
158 | spi->bits_per_word = 8; | |
159 | ||
160 | /* spi_transfer level calls that work per-word */ | |
161 | if (spi->bits_per_word <= 8) | |
162 | cs->txrx_bufs = bitbang_txrx_8; | |
163 | else if (spi->bits_per_word <= 16) | |
164 | cs->txrx_bufs = bitbang_txrx_16; | |
165 | else if (spi->bits_per_word <= 32) | |
166 | cs->txrx_bufs = bitbang_txrx_32; | |
167 | else | |
168 | return -EINVAL; | |
169 | ||
170 | /* per-word shift register access, in hardware or bitbanging */ | |
171 | cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; | |
172 | if (!cs->txrx_word) | |
173 | return -EINVAL; | |
174 | ||
175 | if (!spi->max_speed_hz) | |
176 | spi->max_speed_hz = 500 * 1000; | |
177 | ||
178 | /* nsecs = max(50, (clock period)/2), be optimistic */ | |
179 | cs->nsecs = (1000000000/2) / (spi->max_speed_hz); | |
180 | if (cs->nsecs < 50) | |
181 | cs->nsecs = 50; | |
182 | if (cs->nsecs > MAX_UDELAY_MS * 1000) | |
183 | return -EINVAL; | |
184 | ||
185 | dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec\n", | |
186 | __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA), | |
187 | spi->bits_per_word, 2 * cs->nsecs); | |
188 | ||
189 | /* NOTE we _need_ to call chipselect() early, ideally with adapter | |
190 | * setup, unless the hardware defaults cooperate to avoid confusion | |
191 | * between normal (active low) and inverted chipselects. | |
192 | */ | |
193 | ||
194 | /* deselect chip (low or high) */ | |
195 | spin_lock(&bitbang->lock); | |
196 | if (!bitbang->busy) { | |
197 | bitbang->chipselect(spi, 0); | |
198 | ndelay(cs->nsecs); | |
199 | } | |
200 | spin_unlock(&bitbang->lock); | |
201 | ||
202 | return 0; | |
203 | } | |
204 | EXPORT_SYMBOL_GPL(spi_bitbang_setup); | |
205 | ||
206 | /** | |
207 | * spi_bitbang_cleanup - default cleanup for per-word I/O loops | |
208 | */ | |
209 | void spi_bitbang_cleanup(const struct spi_device *spi) | |
210 | { | |
211 | kfree(spi->controller_state); | |
212 | } | |
213 | EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); | |
214 | ||
215 | static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) | |
216 | { | |
217 | struct spi_bitbang_cs *cs = spi->controller_state; | |
218 | unsigned nsecs = cs->nsecs; | |
219 | ||
220 | return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); | |
221 | } | |
222 | ||
223 | /*----------------------------------------------------------------------*/ | |
224 | ||
225 | /* | |
226 | * SECOND PART ... simple transfer queue runner. | |
227 | * | |
228 | * This costs a task context per controller, running the queue by | |
229 | * performing each transfer in sequence. Smarter hardware can queue | |
230 | * several DMA transfers at once, and process several controller queues | |
231 | * in parallel; this driver doesn't match such hardware very well. | |
232 | * | |
233 | * Drivers can provide word-at-a-time i/o primitives, or provide | |
234 | * transfer-at-a-time ones to leverage dma or fifo hardware. | |
235 | */ | |
236 | static void bitbang_work(void *_bitbang) | |
237 | { | |
238 | struct spi_bitbang *bitbang = _bitbang; | |
239 | unsigned long flags; | |
240 | ||
241 | spin_lock_irqsave(&bitbang->lock, flags); | |
242 | bitbang->busy = 1; | |
243 | while (!list_empty(&bitbang->queue)) { | |
244 | struct spi_message *m; | |
245 | struct spi_device *spi; | |
246 | unsigned nsecs; | |
247 | struct spi_transfer *t; | |
248 | unsigned tmp; | |
249 | unsigned chipselect; | |
250 | int status; | |
251 | ||
252 | m = container_of(bitbang->queue.next, struct spi_message, | |
253 | queue); | |
254 | list_del_init(&m->queue); | |
255 | spin_unlock_irqrestore(&bitbang->lock, flags); | |
256 | ||
257 | // FIXME this is made-up | |
258 | nsecs = 100; | |
259 | ||
260 | spi = m->spi; | |
261 | t = m->transfers; | |
262 | tmp = 0; | |
263 | chipselect = 0; | |
264 | status = 0; | |
265 | ||
266 | for (;;t++) { | |
267 | if (bitbang->shutdown) { | |
268 | status = -ESHUTDOWN; | |
269 | break; | |
270 | } | |
271 | ||
272 | /* set up default clock polarity, and activate chip */ | |
273 | if (!chipselect) { | |
274 | bitbang->chipselect(spi, 1); | |
275 | ndelay(nsecs); | |
276 | } | |
277 | if (!t->tx_buf && !t->rx_buf && t->len) { | |
278 | status = -EINVAL; | |
279 | break; | |
280 | } | |
281 | ||
282 | /* transfer data */ | |
283 | if (t->len) { | |
284 | /* FIXME if bitbang->use_dma, dma_map_single() | |
285 | * before the transfer, and dma_unmap_single() | |
286 | * afterwards, for either or both buffers... | |
287 | */ | |
288 | status = bitbang->txrx_bufs(spi, t); | |
289 | } | |
290 | if (status != t->len) { | |
291 | if (status > 0) | |
292 | status = -EMSGSIZE; | |
293 | break; | |
294 | } | |
295 | m->actual_length += status; | |
296 | status = 0; | |
297 | ||
298 | /* protocol tweaks before next transfer */ | |
299 | if (t->delay_usecs) | |
300 | udelay(t->delay_usecs); | |
301 | ||
302 | tmp++; | |
303 | if (tmp >= m->n_transfer) | |
304 | break; | |
305 | ||
306 | chipselect = !t->cs_change; | |
307 | if (chipselect); | |
308 | continue; | |
309 | ||
310 | bitbang->chipselect(spi, 0); | |
311 | ||
312 | /* REVISIT do we want the udelay here instead? */ | |
313 | msleep(1); | |
314 | } | |
315 | ||
316 | tmp = m->n_transfer - 1; | |
317 | tmp = m->transfers[tmp].cs_change; | |
318 | ||
319 | m->status = status; | |
320 | m->complete(m->context); | |
321 | ||
322 | ndelay(2 * nsecs); | |
323 | bitbang->chipselect(spi, status == 0 && tmp); | |
324 | ndelay(nsecs); | |
325 | ||
326 | spin_lock_irqsave(&bitbang->lock, flags); | |
327 | } | |
328 | bitbang->busy = 0; | |
329 | spin_unlock_irqrestore(&bitbang->lock, flags); | |
330 | } | |
331 | ||
332 | /** | |
333 | * spi_bitbang_transfer - default submit to transfer queue | |
334 | */ | |
335 | int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m) | |
336 | { | |
337 | struct spi_bitbang *bitbang; | |
338 | unsigned long flags; | |
339 | ||
340 | m->actual_length = 0; | |
341 | m->status = -EINPROGRESS; | |
342 | ||
343 | bitbang = spi_master_get_devdata(spi->master); | |
344 | if (bitbang->shutdown) | |
345 | return -ESHUTDOWN; | |
346 | ||
347 | spin_lock_irqsave(&bitbang->lock, flags); | |
348 | list_add_tail(&m->queue, &bitbang->queue); | |
349 | queue_work(bitbang->workqueue, &bitbang->work); | |
350 | spin_unlock_irqrestore(&bitbang->lock, flags); | |
351 | ||
352 | return 0; | |
353 | } | |
354 | EXPORT_SYMBOL_GPL(spi_bitbang_transfer); | |
355 | ||
356 | /*----------------------------------------------------------------------*/ | |
357 | ||
358 | /** | |
359 | * spi_bitbang_start - start up a polled/bitbanging SPI master driver | |
360 | * @bitbang: driver handle | |
361 | * | |
362 | * Caller should have zero-initialized all parts of the structure, and then | |
363 | * provided callbacks for chip selection and I/O loops. If the master has | |
364 | * a transfer method, its final step should call spi_bitbang_transfer; or, | |
365 | * that's the default if the transfer routine is not initialized. It should | |
366 | * also set up the bus number and number of chipselects. | |
367 | * | |
368 | * For i/o loops, provide callbacks either per-word (for bitbanging, or for | |
369 | * hardware that basically exposes a shift register) or per-spi_transfer | |
370 | * (which takes better advantage of hardware like fifos or DMA engines). | |
371 | * | |
372 | * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and | |
373 | * spi_bitbang_cleanup to handle those spi master methods. Those methods are | |
374 | * the defaults if the bitbang->txrx_bufs routine isn't initialized. | |
375 | * | |
376 | * This routine registers the spi_master, which will process requests in a | |
377 | * dedicated task, keeping IRQs unblocked most of the time. To stop | |
378 | * processing those requests, call spi_bitbang_stop(). | |
379 | */ | |
380 | int spi_bitbang_start(struct spi_bitbang *bitbang) | |
381 | { | |
382 | int status; | |
383 | ||
384 | if (!bitbang->master || !bitbang->chipselect) | |
385 | return -EINVAL; | |
386 | ||
387 | INIT_WORK(&bitbang->work, bitbang_work, bitbang); | |
388 | spin_lock_init(&bitbang->lock); | |
389 | INIT_LIST_HEAD(&bitbang->queue); | |
390 | ||
391 | if (!bitbang->master->transfer) | |
392 | bitbang->master->transfer = spi_bitbang_transfer; | |
393 | if (!bitbang->txrx_bufs) { | |
394 | bitbang->use_dma = 0; | |
395 | bitbang->txrx_bufs = spi_bitbang_bufs; | |
396 | if (!bitbang->master->setup) { | |
397 | bitbang->master->setup = spi_bitbang_setup; | |
398 | bitbang->master->cleanup = spi_bitbang_cleanup; | |
399 | } | |
400 | } else if (!bitbang->master->setup) | |
401 | return -EINVAL; | |
402 | ||
403 | /* this task is the only thing to touch the SPI bits */ | |
404 | bitbang->busy = 0; | |
405 | bitbang->workqueue = create_singlethread_workqueue( | |
406 | bitbang->master->cdev.dev->bus_id); | |
407 | if (bitbang->workqueue == NULL) { | |
408 | status = -EBUSY; | |
409 | goto err1; | |
410 | } | |
411 | ||
412 | /* driver may get busy before register() returns, especially | |
413 | * if someone registered boardinfo for devices | |
414 | */ | |
415 | status = spi_register_master(bitbang->master); | |
416 | if (status < 0) | |
417 | goto err2; | |
418 | ||
419 | return status; | |
420 | ||
421 | err2: | |
422 | destroy_workqueue(bitbang->workqueue); | |
423 | err1: | |
424 | return status; | |
425 | } | |
426 | EXPORT_SYMBOL_GPL(spi_bitbang_start); | |
427 | ||
428 | /** | |
429 | * spi_bitbang_stop - stops the task providing spi communication | |
430 | */ | |
431 | int spi_bitbang_stop(struct spi_bitbang *bitbang) | |
432 | { | |
433 | unsigned limit = 500; | |
434 | ||
435 | spin_lock_irq(&bitbang->lock); | |
436 | bitbang->shutdown = 0; | |
437 | while (!list_empty(&bitbang->queue) && limit--) { | |
438 | spin_unlock_irq(&bitbang->lock); | |
439 | ||
440 | dev_dbg(bitbang->master->cdev.dev, "wait for queue\n"); | |
441 | msleep(10); | |
442 | ||
443 | spin_lock_irq(&bitbang->lock); | |
444 | } | |
445 | spin_unlock_irq(&bitbang->lock); | |
446 | if (!list_empty(&bitbang->queue)) { | |
447 | dev_err(bitbang->master->cdev.dev, "queue didn't empty\n"); | |
448 | return -EBUSY; | |
449 | } | |
450 | ||
451 | destroy_workqueue(bitbang->workqueue); | |
452 | ||
453 | spi_unregister_master(bitbang->master); | |
454 | ||
455 | return 0; | |
456 | } | |
457 | EXPORT_SYMBOL_GPL(spi_bitbang_stop); | |
458 | ||
459 | MODULE_LICENSE("GPL"); | |
460 |