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[PATCH] TTY layer buffering revamp
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / serial / imx.c
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1da177e4
LT		 1/*
2 * linux/drivers/serial/imx.c
3 *
4 * Driver for Motorola IMX serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
27 */
28#include <linux/config.h>
29
30#if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
d052d1be 39#include <linux/platform_device.h>
1da177e4
LT		 40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
44
45#include <asm/io.h>
46#include <asm/irq.h>
47#include <asm/hardware.h>
48
49/* We've been assigned a range on the "Low-density serial ports" major */
50#define SERIAL_IMX_MAJOR 204
51#define MINOR_START 41
52
53#define NR_PORTS 2
54
55#define IMX_ISR_PASS_LIMIT 256
56
57/*
58 * This is the size of our serial port register set.
59 */
60#define UART_PORT_SIZE 0x100
61
62/*
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
67 */
68#define MCTRL_TIMEOUT (250*HZ/1000)
69
70#define DRIVER_NAME "IMX-uart"
71
72struct imx_port {
73 struct uart_port port;
74 struct timer_list timer;
75 unsigned int old_status;
ceca629e 76 int txirq,rxirq,rtsirq;
1da177e4
LT		 77};
78
79/*
80 * Handle any change of modem status signal since we were last called.
81 */
82static void imx_mctrl_check(struct imx_port *sport)
83{
84 unsigned int status, changed;
85
86 status = sport->port.ops->get_mctrl(&sport->port);
87 changed = status ^ sport->old_status;
88
89 if (changed == 0)
90 return;
91
92 sport->old_status = status;
93
94 if (changed & TIOCM_RI)
95 sport->port.icount.rng++;
96 if (changed & TIOCM_DSR)
97 sport->port.icount.dsr++;
98 if (changed & TIOCM_CAR)
99 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
100 if (changed & TIOCM_CTS)
101 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
102
103 wake_up_interruptible(&sport->port.info->delta_msr_wait);
104}
105
106/*
107 * This is our per-port timeout handler, for checking the
108 * modem status signals.
109 */
110static void imx_timeout(unsigned long data)
111{
112 struct imx_port *sport = (struct imx_port *)data;
113 unsigned long flags;
114
115 if (sport->port.info) {
116 spin_lock_irqsave(&sport->port.lock, flags);
117 imx_mctrl_check(sport);
118 spin_unlock_irqrestore(&sport->port.lock, flags);
119
120 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
121 }
122}
123
124/*
125 * interrupts disabled on entry
126 */
b129a8cc 127static void imx_stop_tx(struct uart_port *port)
1da177e4
LT		 128{
129 struct imx_port *sport = (struct imx_port *)port;
130 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
131}
132
133/*
134 * interrupts disabled on entry
135 */
136static void imx_stop_rx(struct uart_port *port)
137{
138 struct imx_port *sport = (struct imx_port *)port;
139 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
140}
141
142/*
143 * Set the modem control timer to fire immediately.
144 */
145static void imx_enable_ms(struct uart_port *port)
146{
147 struct imx_port *sport = (struct imx_port *)port;
148
149 mod_timer(&sport->timer, jiffies);
150}
151
152static inline void imx_transmit_buffer(struct imx_port *sport)
153{
154 struct circ_buf *xmit = &sport->port.info->xmit;
155
156 do {
157 /* send xmit->buf[xmit->tail]
158 * out the port here */
159 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
160 xmit->tail = (xmit->tail + 1) &
161 (UART_XMIT_SIZE - 1);
162 sport->port.icount.tx++;
163 if (uart_circ_empty(xmit))
164 break;
165 } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
166
167 if (uart_circ_empty(xmit))
b129a8cc 168 imx_stop_tx(&sport->port);
1da177e4
LT		 169}
170
171/*
172 * interrupts disabled on entry
173 */
b129a8cc 174static void imx_start_tx(struct uart_port *port)
1da177e4
LT		 175{
176 struct imx_port *sport = (struct imx_port *)port;
177
178 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
179
180 if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
181 imx_transmit_buffer(sport);
182}
183
ceca629e
SH		 184static irqreturn_t imx_rtsint(int irq, void *dev_id, struct pt_regs *regs)
185{
186 struct imx_port *sport = (struct imx_port *)dev_id;
187 unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS;
188 unsigned long flags;
189
190 spin_lock_irqsave(&sport->port.lock, flags);
191
192 USR1((u32)sport->port.membase) = USR1_RTSD;
193 uart_handle_cts_change(&sport->port, !!val);
194 wake_up_interruptible(&sport->port.info->delta_msr_wait);
195
196 spin_unlock_irqrestore(&sport->port.lock, flags);
197 return IRQ_HANDLED;
198}
199
1da177e4
LT		 200static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
201{
202 struct imx_port *sport = (struct imx_port *)dev_id;
203 struct circ_buf *xmit = &sport->port.info->xmit;
204 unsigned long flags;
205
206 spin_lock_irqsave(&sport->port.lock,flags);
207 if (sport->port.x_char)
208 {
209 /* Send next char */
210 URTX0((u32)sport->port.membase) = sport->port.x_char;
211 goto out;
212 }
213
214 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
b129a8cc 215 imx_stop_tx(&sport->port);
1da177e4
LT		 216 goto out;
217 }
218
219 imx_transmit_buffer(sport);
220
221 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
222 uart_write_wakeup(&sport->port);
223
224out:
225 spin_unlock_irqrestore(&sport->port.lock,flags);
226 return IRQ_HANDLED;
227}
228
229static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
230{
231 struct imx_port *sport = dev_id;
232 unsigned int rx,flg,ignored = 0;
233 struct tty_struct *tty = sport->port.info->tty;
234 unsigned long flags;
235
236 rx = URXD0((u32)sport->port.membase);
237 spin_lock_irqsave(&sport->port.lock,flags);
238
239 do {
240 flg = TTY_NORMAL;
241 sport->port.icount.rx++;
242
243 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
244 USR2((u32)sport->port.membase) |= USR2_BRCD;
245 if(uart_handle_break(&sport->port))
246 goto ignore_char;
247 }
248
249 if (uart_handle_sysrq_char
250 (&sport->port, (unsigned char)rx, regs))
251 goto ignore_char;
252
253 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
254 goto handle_error;
255
256 error_return:
257 tty_insert_flip_char(tty, rx, flg);
258
1da177e4
LT		 259 ignore_char:
260 rx = URXD0((u32)sport->port.membase);
261 } while(rx & URXD_CHARRDY);
262
263out:
264 spin_unlock_irqrestore(&sport->port.lock,flags);
265 tty_flip_buffer_push(tty);
266 return IRQ_HANDLED;
267
268handle_error:
269 if (rx & URXD_PRERR)
270 sport->port.icount.parity++;
271 else if (rx & URXD_FRMERR)
272 sport->port.icount.frame++;
273 if (rx & URXD_OVRRUN)
274 sport->port.icount.overrun++;
275
276 if (rx & sport->port.ignore_status_mask) {
277 if (++ignored > 100)
278 goto out;
279 goto ignore_char;
280 }
281
282 rx &= sport->port.read_status_mask;
283
284 if (rx & URXD_PRERR)
285 flg = TTY_PARITY;
286 else if (rx & URXD_FRMERR)
287 flg = TTY_FRAME;
288 if (rx & URXD_OVRRUN)
289 flg = TTY_OVERRUN;
290
291#ifdef SUPPORT_SYSRQ
292 sport->port.sysrq = 0;
293#endif
294 goto error_return;
295}
296
297/*
298 * Return TIOCSER_TEMT when transmitter is not busy.
299 */
300static unsigned int imx_tx_empty(struct uart_port *port)
301{
302 struct imx_port *sport = (struct imx_port *)port;
303
304 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
305}
306
0f302dc3
SH		 307/*
308 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
309 */
1da177e4
LT		 310static unsigned int imx_get_mctrl(struct uart_port *port)
311{
0f302dc3
SH		 312 struct imx_port *sport = (struct imx_port *)port;
313 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
314
315 if (USR1((u32)sport->port.membase) & USR1_RTSS)
316 tmp |= TIOCM_CTS;
317
318 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
319 tmp |= TIOCM_RTS;
320
321 return tmp;
1da177e4
LT		 322}
323
324static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
325{
0f302dc3
SH		 326 struct imx_port *sport = (struct imx_port *)port;
327
328 if (mctrl & TIOCM_RTS)
329 UCR2((u32)sport->port.membase) |= UCR2_CTS;
330 else
331 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
1da177e4
LT		 332}
333
334/*
335 * Interrupts always disabled.
336 */
337static void imx_break_ctl(struct uart_port *port, int break_state)
338{
339 struct imx_port *sport = (struct imx_port *)port;
340 unsigned long flags;
341
342 spin_lock_irqsave(&sport->port.lock, flags);
343
344 if ( break_state != 0 )
345 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
346 else
347 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
348
349 spin_unlock_irqrestore(&sport->port.lock, flags);
350}
351
352#define TXTL 2 /* reset default */
353#define RXTL 1 /* reset default */
354
587897f5
SH		 355static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
356{
357 unsigned int val;
358 unsigned int ufcr_rfdiv;
359
360 /* set receiver / transmitter trigger level.
361 * RFDIV is set such way to satisfy requested uartclk value
362 */
363 val = TXTL<<10 | RXTL;
364 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
365
366 if(!ufcr_rfdiv)
367 ufcr_rfdiv = 1;
368
369 if(ufcr_rfdiv >= 7)
370 ufcr_rfdiv = 6;
371 else
372 ufcr_rfdiv = 6 - ufcr_rfdiv;
373
374 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
375
376 UFCR((u32)sport->port.membase) = val;
377
378 return 0;
379}
380
1da177e4
LT		 381static int imx_startup(struct uart_port *port)
382{
383 struct imx_port *sport = (struct imx_port *)port;
384 int retval;
1da177e4
LT		 385 unsigned long flags;
386
587897f5 387 imx_setup_ufcr(sport, 0);
1da177e4
LT		 388
389 /* disable the DREN bit (Data Ready interrupt enable) before
390 * requesting IRQs
391 */
392 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
393
394 /*
395 * Allocate the IRQ
396 */
397 retval = request_irq(sport->rxirq, imx_rxint, 0,
398 DRIVER_NAME, sport);
86371d07 399 if (retval) goto error_out1;
1da177e4
LT		 400
401 retval = request_irq(sport->txirq, imx_txint, 0,
ceca629e 402 DRIVER_NAME, sport);
86371d07 403 if (retval) goto error_out2;
1da177e4 404
ceca629e
SH		 405 retval = request_irq(sport->rtsirq, imx_rtsint, 0,
406 DRIVER_NAME, sport);
407 if (retval) goto error_out3;
408 set_irq_type(sport->rtsirq, IRQT_BOTHEDGE);
409
1da177e4
LT		 410 /*
411 * Finally, clear and enable interrupts
412 */
413
ceca629e 414 USR1((u32)sport->port.membase) = USR1_RTSD;
1da177e4 415 UCR1((u32)sport->port.membase) |=
ceca629e 416 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
1da177e4
LT		 417
418 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
419 /*
420 * Enable modem status interrupts
421 */
422 spin_lock_irqsave(&sport->port.lock,flags);
423 imx_enable_ms(&sport->port);
424 spin_unlock_irqrestore(&sport->port.lock,flags);
425
426 return 0;
427
ceca629e
SH		 428error_out3:
429 free_irq(sport->txirq, sport);
1da177e4 430error_out2:
86371d07
SH		 431 free_irq(sport->rxirq, sport);
432error_out1:
1da177e4
LT		 433 return retval;
434}
435
436static void imx_shutdown(struct uart_port *port)
437{
438 struct imx_port *sport = (struct imx_port *)port;
439
440 /*
441 * Stop our timer.
442 */
443 del_timer_sync(&sport->timer);
444
445 /*
446 * Free the interrupts
447 */
ceca629e 448 free_irq(sport->rtsirq, sport);
1da177e4
LT		 449 free_irq(sport->txirq, sport);
450 free_irq(sport->rxirq, sport);
451
452 /*
453 * Disable all interrupts, port and break condition.
454 */
455
456 UCR1((u32)sport->port.membase) &=
ceca629e 457 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
1da177e4
LT		 458}
459
460static void
461imx_set_termios(struct uart_port *port, struct termios *termios,
462 struct termios *old)
463{
464 struct imx_port *sport = (struct imx_port *)port;
465 unsigned long flags;
466 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
467 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
468
469 /*
470 * If we don't support modem control lines, don't allow
471 * these to be set.
472 */
473 if (0) {
474 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
475 termios->c_cflag |= CLOCAL;
476 }
477
478 /*
479 * We only support CS7 and CS8.
480 */
481 while ((termios->c_cflag & CSIZE) != CS7 &&
482 (termios->c_cflag & CSIZE) != CS8) {
483 termios->c_cflag &= ~CSIZE;
484 termios->c_cflag |= old_csize;
485 old_csize = CS8;
486 }
487
488 if ((termios->c_cflag & CSIZE) == CS8)
489 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
490 else
491 ucr2 = UCR2_SRST | UCR2_IRTS;
492
493 if (termios->c_cflag & CRTSCTS) {
494 ucr2 &= ~UCR2_IRTS;
495 ucr2 |= UCR2_CTSC;
496 }
497
498 if (termios->c_cflag & CSTOPB)
499 ucr2 |= UCR2_STPB;
500 if (termios->c_cflag & PARENB) {
501 ucr2 |= UCR2_PREN;
502 if (!(termios->c_cflag & PARODD))
503 ucr2 |= UCR2_PROE;
504 }
505
506 /*
507 * Ask the core to calculate the divisor for us.
508 */
509 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
510 quot = uart_get_divisor(port, baud);
511
512 spin_lock_irqsave(&sport->port.lock, flags);
513
514 sport->port.read_status_mask = 0;
515 if (termios->c_iflag & INPCK)
516 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
517 if (termios->c_iflag & (BRKINT | PARMRK))
518 sport->port.read_status_mask |= URXD_BRK;
519
520 /*
521 * Characters to ignore
522 */
523 sport->port.ignore_status_mask = 0;
524 if (termios->c_iflag & IGNPAR)
525 sport->port.ignore_status_mask |= URXD_PRERR;
526 if (termios->c_iflag & IGNBRK) {
527 sport->port.ignore_status_mask |= URXD_BRK;
528 /*
529 * If we're ignoring parity and break indicators,
530 * ignore overruns too (for real raw support).
531 */
532 if (termios->c_iflag & IGNPAR)
533 sport->port.ignore_status_mask |= URXD_OVRRUN;
534 }
535
536 del_timer_sync(&sport->timer);
537
538 /*
539 * Update the per-port timeout.
540 */
541 uart_update_timeout(port, termios->c_cflag, baud);
542
543 /*
544 * disable interrupts and drain transmitter
545 */
546 old_ucr1 = UCR1((u32)sport->port.membase);
ceca629e 547 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
1da177e4
LT		 548
549 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
550 barrier();
551
552 /* then, disable everything */
553 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
554 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
555
556 /* set the parity, stop bits and data size */
557 UCR2((u32)sport->port.membase) = ucr2;
558
559 /* set the baud rate. We assume uartclk = 16 MHz
560 *
561 * baud * 16 UBIR - 1
562 * --------- = --------
563 * uartclk UBMR - 1
564 */
565 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
566 UBMR((u32)sport->port.membase) = 10000 - 1;
567
568 UCR1((u32)sport->port.membase) = old_ucr1;
569 UCR2((u32)sport->port.membase) |= old_txrxen;
570
571 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
572 imx_enable_ms(&sport->port);
573
574 spin_unlock_irqrestore(&sport->port.lock, flags);
575}
576
577static const char *imx_type(struct uart_port *port)
578{
579 struct imx_port *sport = (struct imx_port *)port;
580
581 return sport->port.type == PORT_IMX ? "IMX" : NULL;
582}
583
584/*
585 * Release the memory region(s) being used by 'port'.
586 */
587static void imx_release_port(struct uart_port *port)
588{
589 struct imx_port *sport = (struct imx_port *)port;
590
591 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
592}
593
594/*
595 * Request the memory region(s) being used by 'port'.
596 */
597static int imx_request_port(struct uart_port *port)
598{
599 struct imx_port *sport = (struct imx_port *)port;
600
601 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
602 "imx-uart") != NULL ? 0 : -EBUSY;
603}
604
605/*
606 * Configure/autoconfigure the port.
607 */
608static void imx_config_port(struct uart_port *port, int flags)
609{
610 struct imx_port *sport = (struct imx_port *)port;
611
612 if (flags & UART_CONFIG_TYPE &&
613 imx_request_port(&sport->port) == 0)
614 sport->port.type = PORT_IMX;
615}
616
617/*
618 * Verify the new serial_struct (for TIOCSSERIAL).
619 * The only change we allow are to the flags and type, and
620 * even then only between PORT_IMX and PORT_UNKNOWN
621 */
622static int
623imx_verify_port(struct uart_port *port, struct serial_struct *ser)
624{
625 struct imx_port *sport = (struct imx_port *)port;
626 int ret = 0;
627
628 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
629 ret = -EINVAL;
630 if (sport->port.irq != ser->irq)
631 ret = -EINVAL;
632 if (ser->io_type != UPIO_MEM)
633 ret = -EINVAL;
634 if (sport->port.uartclk / 16 != ser->baud_base)
635 ret = -EINVAL;
636 if ((void *)sport->port.mapbase != ser->iomem_base)
637 ret = -EINVAL;
638 if (sport->port.iobase != ser->port)
639 ret = -EINVAL;
640 if (ser->hub6 != 0)
641 ret = -EINVAL;
642 return ret;
643}
644
645static struct uart_ops imx_pops = {
646 .tx_empty = imx_tx_empty,
647 .set_mctrl = imx_set_mctrl,
648 .get_mctrl = imx_get_mctrl,
649 .stop_tx = imx_stop_tx,
650 .start_tx = imx_start_tx,
651 .stop_rx = imx_stop_rx,
652 .enable_ms = imx_enable_ms,
653 .break_ctl = imx_break_ctl,
654 .startup = imx_startup,
655 .shutdown = imx_shutdown,
656 .set_termios = imx_set_termios,
657 .type = imx_type,
658 .release_port = imx_release_port,
659 .request_port = imx_request_port,
660 .config_port = imx_config_port,
661 .verify_port = imx_verify_port,
662};
663
664static struct imx_port imx_ports[] = {
665 {
666 .txirq = UART1_MINT_TX,
667 .rxirq = UART1_MINT_RX,
ceca629e 668 .rtsirq = UART1_MINT_RTS,
1da177e4
LT		 669 .port = {
670 .type = PORT_IMX,
671 .iotype = SERIAL_IO_MEM,
672 .membase = (void *)IMX_UART1_BASE,
673 .mapbase = IMX_UART1_BASE, /* FIXME */
674 .irq = UART1_MINT_RX,
675 .uartclk = 16000000,
676 .fifosize = 8,
677 .flags = ASYNC_BOOT_AUTOCONF,
678 .ops = &imx_pops,
679 .line = 0,
680 },
681 }, {
682 .txirq = UART2_MINT_TX,
683 .rxirq = UART2_MINT_RX,
ceca629e 684 .rtsirq = UART2_MINT_RTS,
1da177e4
LT		 685 .port = {
686 .type = PORT_IMX,
687 .iotype = SERIAL_IO_MEM,
688 .membase = (void *)IMX_UART2_BASE,
689 .mapbase = IMX_UART2_BASE, /* FIXME */
690 .irq = UART2_MINT_RX,
691 .uartclk = 16000000,
692 .fifosize = 8,
693 .flags = ASYNC_BOOT_AUTOCONF,
694 .ops = &imx_pops,
695 .line = 1,
696 },
697 }
698};
699
700/*
701 * Setup the IMX serial ports.
702 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
703 * Which serial port this ends up being depends on the machine you're
704 * running this kernel on. I'm not convinced that this is a good idea,
705 * but that's the way it traditionally works.
706 *
707 */
708static void __init imx_init_ports(void)
709{
710 static int first = 1;
711 int i;
712
713 if (!first)
714 return;
715 first = 0;
716
717 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
718 init_timer(&imx_ports[i].timer);
719 imx_ports[i].timer.function = imx_timeout;
720 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
721 }
722
723 imx_gpio_mode(PC9_PF_UART1_CTS);
724 imx_gpio_mode(PC10_PF_UART1_RTS);
725 imx_gpio_mode(PC11_PF_UART1_TXD);
726 imx_gpio_mode(PC12_PF_UART1_RXD);
727 imx_gpio_mode(PB28_PF_UART2_CTS);
728 imx_gpio_mode(PB29_PF_UART2_RTS);
729
730 imx_gpio_mode(PB30_PF_UART2_TXD);
731 imx_gpio_mode(PB31_PF_UART2_RXD);
732
733#if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
734 * is implemented.
735 */
736 imx_gpio_mode(PD7_AF_UART2_DTR);
737 imx_gpio_mode(PD8_AF_UART2_DCD);
738 imx_gpio_mode(PD9_AF_UART2_RI);
739 imx_gpio_mode(PD10_AF_UART2_DSR);
740#endif
741
742
743}
744
745#ifdef CONFIG_SERIAL_IMX_CONSOLE
746
747/*
748 * Interrupts are disabled on entering
749 */
750static void
751imx_console_write(struct console *co, const char *s, unsigned int count)
752{
753 struct imx_port *sport = &imx_ports[co->index];
754 unsigned int old_ucr1, old_ucr2, i;
755
756 /*
757 * First, save UCR1/2 and then disable interrupts
758 */
759 old_ucr1 = UCR1((u32)sport->port.membase);
760 old_ucr2 = UCR2((u32)sport->port.membase);
761
762 UCR1((u32)sport->port.membase) =
763 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
ceca629e 764 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
1da177e4
LT		 765 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
766
767 /*
768 * Now, do each character
769 */
770 for (i = 0; i < count; i++) {
771
772 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
773 barrier();
774
775 URTX0((u32)sport->port.membase) = s[i];
776
777 if (s[i] == '\n') {
778 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
779 barrier();
780 URTX0((u32)sport->port.membase) = '\r';
781 }
782 }
783
784 /*
785 * Finally, wait for transmitter to become empty
786 * and restore UCR1/2
787 */
788 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
789
790 UCR1((u32)sport->port.membase) = old_ucr1;
791 UCR2((u32)sport->port.membase) = old_ucr2;
792}
793
794/*
795 * If the port was already initialised (eg, by a boot loader),
796 * try to determine the current setup.
797 */
798static void __init
799imx_console_get_options(struct imx_port *sport, int *baud,
800 int *parity, int *bits)
801{
587897f5 802
1da177e4
LT		 803 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
804 /* ok, the port was enabled */
805 unsigned int ucr2, ubir,ubmr, uartclk;
587897f5
SH		 806 unsigned int baud_raw;
807 unsigned int ucfr_rfdiv;
1da177e4
LT		 808
809 ucr2 = UCR2((u32)sport->port.membase);
810
811 *parity = 'n';
812 if (ucr2 & UCR2_PREN) {
813 if (ucr2 & UCR2_PROE)
814 *parity = 'o';
815 else
816 *parity = 'e';
817 }
818
819 if (ucr2 & UCR2_WS)
820 *bits = 8;
821 else
822 *bits = 7;
823
824 ubir = UBIR((u32)sport->port.membase) & 0xffff;
825 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
1da177e4 826
587897f5
SH		 827
828 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
829 if (ucfr_rfdiv == 6)
830 ucfr_rfdiv = 7;
831 else
832 ucfr_rfdiv = 6 - ucfr_rfdiv;
833
834 uartclk = imx_get_perclk1();
835 uartclk /= ucfr_rfdiv;
836
837 { /*
838 * The next code provides exact computation of
839 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
840 * without need of float support or long long division,
841 * which would be required to prevent 32bit arithmetic overflow
842 */
843 unsigned int mul = ubir + 1;
844 unsigned int div = 16 * (ubmr + 1);
845 unsigned int rem = uartclk % div;
846
847 baud_raw = (uartclk / div) * mul;
848 baud_raw += (rem * mul + div / 2) / div;
849 *baud = (baud_raw + 50) / 100 * 100;
850 }
851
852 if(*baud != baud_raw)
853 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
854 baud_raw, *baud);
1da177e4
LT		 855 }
856}
857
858static int __init
859imx_console_setup(struct console *co, char *options)
860{
861 struct imx_port *sport;
862 int baud = 9600;
863 int bits = 8;
864 int parity = 'n';
865 int flow = 'n';
866
867 /*
868 * Check whether an invalid uart number has been specified, and
869 * if so, search for the first available port that does have
870 * console support.
871 */
872 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
873 co->index = 0;
874 sport = &imx_ports[co->index];
875
876 if (options)
877 uart_parse_options(options, &baud, &parity, &bits, &flow);
878 else
879 imx_console_get_options(sport, &baud, &parity, &bits);
880
587897f5
SH		 881 imx_setup_ufcr(sport, 0);
882
1da177e4
LT		 883 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
884}
885
9f4426dd 886static struct uart_driver imx_reg;
1da177e4
LT		 887static struct console imx_console = {
888 .name = "ttySMX",
889 .write = imx_console_write,
890 .device = uart_console_device,
891 .setup = imx_console_setup,
892 .flags = CON_PRINTBUFFER,
893 .index = -1,
894 .data = &imx_reg,
895};
896
897static int __init imx_rs_console_init(void)
898{
899 imx_init_ports();
900 register_console(&imx_console);
901 return 0;
902}
903console_initcall(imx_rs_console_init);
904
905#define IMX_CONSOLE &imx_console
906#else
907#define IMX_CONSOLE NULL
908#endif
909
910static struct uart_driver imx_reg = {
911 .owner = THIS_MODULE,
912 .driver_name = DRIVER_NAME,
913 .dev_name = "ttySMX",
914 .devfs_name = "ttsmx/",
915 .major = SERIAL_IMX_MAJOR,
916 .minor = MINOR_START,
917 .nr = ARRAY_SIZE(imx_ports),
918 .cons = IMX_CONSOLE,
919};
920
3ae5eaec 921static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 922{
3ae5eaec 923 struct imx_port *sport = platform_get_drvdata(dev);
1da177e4 924
9480e307 925 if (sport)
1da177e4
LT		 926 uart_suspend_port(&imx_reg, &sport->port);
927
928 return 0;
929}
930
3ae5eaec 931static int serial_imx_resume(struct platform_device *dev)
1da177e4 932{
3ae5eaec 933 struct imx_port *sport = platform_get_drvdata(dev);
1da177e4 934
9480e307 935 if (sport)
1da177e4
LT		 936 uart_resume_port(&imx_reg, &sport->port);
937
938 return 0;
939}
940
3ae5eaec 941static int serial_imx_probe(struct platform_device *dev)
1da177e4 942{
3ae5eaec 943 imx_ports[dev->id].port.dev = &dev->dev;
1da177e4 944 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
3ae5eaec 945 platform_set_drvdata(dev, &imx_ports[dev->id]);
1da177e4
LT		 946 return 0;
947}
948
3ae5eaec 949static int serial_imx_remove(struct platform_device *dev)
1da177e4 950{
3ae5eaec 951 struct imx_port *sport = platform_get_drvdata(dev);
1da177e4 952
3ae5eaec 953 platform_set_drvdata(dev, NULL);
1da177e4
LT		 954
955 if (sport)
956 uart_remove_one_port(&imx_reg, &sport->port);
957
958 return 0;
959}
960
3ae5eaec 961static struct platform_driver serial_imx_driver = {
1da177e4
LT		 962 .probe = serial_imx_probe,
963 .remove = serial_imx_remove,
964
965 .suspend = serial_imx_suspend,
966 .resume = serial_imx_resume,
3ae5eaec
RK		 967 .driver = {
968 .name = "imx-uart",
969 },
1da177e4
LT		 970};
971
972static int __init imx_serial_init(void)
973{
974 int ret;
975
976 printk(KERN_INFO "Serial: IMX driver\n");
977
978 imx_init_ports();
979
980 ret = uart_register_driver(&imx_reg);
981 if (ret)
982 return ret;
983
3ae5eaec 984 ret = platform_driver_register(&serial_imx_driver);
1da177e4
LT		 985 if (ret != 0)
986 uart_unregister_driver(&imx_reg);
987
988 return 0;
989}
990
991static void __exit imx_serial_exit(void)
992{
993 uart_unregister_driver(&imx_reg);
c889b896 994 platform_driver_unregister(&serial_imx_driver);
1da177e4
LT		 995}
996
997module_init(imx_serial_init);
998module_exit(imx_serial_exit);
999
1000MODULE_AUTHOR("Sascha Hauer");
1001MODULE_DESCRIPTION("IMX generic serial port driver");
1002MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)