[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / serial / 21285.c

/*
 * linux/drivers/char/21285.c
 *
 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
 *
 * Based on drivers/char/serial.c
 *
 *  $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
 */
#include <linux/config.h>
#include <linux/module.h>
#include <linux/tty.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/device.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>
#include <linux/serial.h>

#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/hardware/dec21285.h>
#include <asm/hardware.h>

#define BAUD_BASE		(mem_fclk_21285/64)

#define SERIAL_21285_NAME	"ttyFB"
#define SERIAL_21285_MAJOR	204
#define SERIAL_21285_MINOR	4

#define RXSTAT_DUMMY_READ	0x80000000
#define RXSTAT_FRAME		(1 << 0)
#define RXSTAT_PARITY		(1 << 1)
#define RXSTAT_OVERRUN		(1 << 2)
#define RXSTAT_ANYERR		(RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)

#define H_UBRLCR_BREAK		(1 << 0)
#define H_UBRLCR_PARENB		(1 << 1)
#define H_UBRLCR_PAREVN		(1 << 2)
#define H_UBRLCR_STOPB		(1 << 3)
#define H_UBRLCR_FIFO		(1 << 4)

static const char serial21285_name[] = "Footbridge UART";

#define tx_enabled(port)	((port)->unused[0])
#define rx_enabled(port)	((port)->unused[1])

/*
 * The documented expression for selecting the divisor is:
 *  BAUD_BASE / baud - 1
 * However, typically BAUD_BASE is not divisible by baud, so
 * we want to select the divisor that gives us the minimum
 * error.  Therefore, we want:
 *  int(BAUD_BASE / baud - 0.5) ->
 *  int(BAUD_BASE / baud - (baud >> 1) / baud) ->
 *  int((BAUD_BASE - (baud >> 1)) / baud)
 */

static void serial21285_stop_tx(struct uart_port *port)
{
	if (tx_enabled(port)) {
		disable_irq(IRQ_CONTX);
		tx_enabled(port) = 0;
	}
}

static void serial21285_start_tx(struct uart_port *port)
{
	if (!tx_enabled(port)) {
		enable_irq(IRQ_CONTX);
		tx_enabled(port) = 1;
	}
}

static void serial21285_stop_rx(struct uart_port *port)
{
	if (rx_enabled(port)) {
		disable_irq(IRQ_CONRX);
		rx_enabled(port) = 0;
	}
}

static void serial21285_enable_ms(struct uart_port *port)
{
}

static irqreturn_t serial21285_rx_chars(int irq, void *dev_id, struct pt_regs *regs)
{
	struct uart_port *port = dev_id;
	struct tty_struct *tty = port->info->tty;
	unsigned int status, ch, flag, rxs, max_count = 256;

	status = *CSR_UARTFLG;
	while (!(status & 0x10) && max_count--) {
		ch = *CSR_UARTDR;
		flag = TTY_NORMAL;
		port->icount.rx++;

		rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
		if (unlikely(rxs & RXSTAT_ANYERR)) {
			if (rxs & RXSTAT_PARITY)
				port->icount.parity++;
			else if (rxs & RXSTAT_FRAME)
				port->icount.frame++;
			if (rxs & RXSTAT_OVERRUN)
				port->icount.overrun++;

			rxs &= port->read_status_mask;

			if (rxs & RXSTAT_PARITY)
				flag = TTY_PARITY;
			else if (rxs & RXSTAT_FRAME)
				flag = TTY_FRAME;
		}

		uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);

		status = *CSR_UARTFLG;
	}
	tty_flip_buffer_push(tty);

	return IRQ_HANDLED;
}

static irqreturn_t serial21285_tx_chars(int irq, void *dev_id, struct pt_regs *regs)
{
	struct uart_port *port = dev_id;
	struct circ_buf *xmit = &port->info->xmit;
	int count = 256;

	if (port->x_char) {
		*CSR_UARTDR = port->x_char;
		port->icount.tx++;
		port->x_char = 0;
		goto out;
	}
	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
		serial21285_stop_tx(port);
		goto out;
	}

	do {
		*CSR_UARTDR = xmit->buf[xmit->tail];
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
		if (uart_circ_empty(xmit))
			break;
	} while (--count > 0 && !(*CSR_UARTFLG & 0x20));

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (uart_circ_empty(xmit))
		serial21285_stop_tx(port);

 out:
	return IRQ_HANDLED;
}

static unsigned int serial21285_tx_empty(struct uart_port *port)
{
	return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
}

/* no modem control lines */
static unsigned int serial21285_get_mctrl(struct uart_port *port)
{
	return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
}

static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
}

static void serial21285_break_ctl(struct uart_port *port, int break_state)
{
	unsigned long flags;
	unsigned int h_lcr;

	spin_lock_irqsave(&port->lock, flags);
	h_lcr = *CSR_H_UBRLCR;
	if (break_state)
		h_lcr |= H_UBRLCR_BREAK;
	else
		h_lcr &= ~H_UBRLCR_BREAK;
	*CSR_H_UBRLCR = h_lcr;
	spin_unlock_irqrestore(&port->lock, flags);
}

static int serial21285_startup(struct uart_port *port)
{
	int ret;

	tx_enabled(port) = 1;
	rx_enabled(port) = 1;

	ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
			  serial21285_name, port);
	if (ret == 0) {
		ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
				  serial21285_name, port);
		if (ret)
			free_irq(IRQ_CONRX, port);
	}

	return ret;
}

static void serial21285_shutdown(struct uart_port *port)
{
	free_irq(IRQ_CONTX, port);
	free_irq(IRQ_CONRX, port);
}

static void
serial21285_set_termios(struct uart_port *port, struct termios *termios,
			struct termios *old)
{
	unsigned long flags;
	unsigned int baud, quot, h_lcr;

	/*
	 * We don't support modem control lines.
	 */
	termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
	termios->c_cflag |= CLOCAL;

	/*
	 * We don't support BREAK character recognition.
	 */
	termios->c_iflag &= ~(IGNBRK | BRKINT);

	/*
	 * Ask the core to calculate the divisor for us.
	 */
	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
	quot = uart_get_divisor(port, baud);

	switch (termios->c_cflag & CSIZE) {
	case CS5:
		h_lcr = 0x00;
		break;
	case CS6:
		h_lcr = 0x20;
		break;
	case CS7:
		h_lcr = 0x40;
		break;
	default: /* CS8 */
		h_lcr = 0x60;
		break;
	}

	if (termios->c_cflag & CSTOPB)
		h_lcr |= H_UBRLCR_STOPB;
	if (termios->c_cflag & PARENB) {
		h_lcr |= H_UBRLCR_PARENB;
		if (!(termios->c_cflag & PARODD))
			h_lcr |= H_UBRLCR_PAREVN;
	}

	if (port->fifosize)
		h_lcr |= H_UBRLCR_FIFO;

	spin_lock_irqsave(&port->lock, flags);

	/*
	 * Update the per-port timeout.
	 */
	uart_update_timeout(port, termios->c_cflag, baud);

	/*
	 * Which character status flags are we interested in?
	 */
	port->read_status_mask = RXSTAT_OVERRUN;
	if (termios->c_iflag & INPCK)
		port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;

	/*
	 * Which character status flags should we ignore?
	 */
	port->ignore_status_mask = 0;
	if (termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
	if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
		port->ignore_status_mask |= RXSTAT_OVERRUN;

	/*
	 * Ignore all characters if CREAD is not set.
	 */
	if ((termios->c_cflag & CREAD) == 0)
		port->ignore_status_mask |= RXSTAT_DUMMY_READ;

	quot -= 1;

	*CSR_UARTCON = 0;
	*CSR_L_UBRLCR = quot & 0xff;
	*CSR_M_UBRLCR = (quot >> 8) & 0x0f;
	*CSR_H_UBRLCR = h_lcr;
	*CSR_UARTCON = 1;

	spin_unlock_irqrestore(&port->lock, flags);
}

static const char *serial21285_type(struct uart_port *port)
{
	return port->type == PORT_21285 ? "DC21285" : NULL;
}

static void serial21285_release_port(struct uart_port *port)
{
	release_mem_region(port->mapbase, 32);
}

static int serial21285_request_port(struct uart_port *port)
{
	return request_mem_region(port->mapbase, 32, serial21285_name)
			 != NULL ? 0 : -EBUSY;
}

static void serial21285_config_port(struct uart_port *port, int flags)
{
	if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
		port->type = PORT_21285;
}

/*
 * verify the new serial_struct (for TIOCSSERIAL).
 */
static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
{
	int ret = 0;
	if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
		ret = -EINVAL;
	if (ser->irq != NO_IRQ)
		ret = -EINVAL;
	if (ser->baud_base != port->uartclk / 16)
		ret = -EINVAL;
	return ret;
}

static struct uart_ops serial21285_ops = {
	.tx_empty	= serial21285_tx_empty,
	.get_mctrl	= serial21285_get_mctrl,
	.set_mctrl	= serial21285_set_mctrl,
	.stop_tx	= serial21285_stop_tx,
	.start_tx	= serial21285_start_tx,
	.stop_rx	= serial21285_stop_rx,
	.enable_ms	= serial21285_enable_ms,
	.break_ctl	= serial21285_break_ctl,
	.startup	= serial21285_startup,
	.shutdown	= serial21285_shutdown,
	.set_termios	= serial21285_set_termios,
	.type		= serial21285_type,
	.release_port	= serial21285_release_port,
	.request_port	= serial21285_request_port,
	.config_port	= serial21285_config_port,
	.verify_port	= serial21285_verify_port,
};

static struct uart_port serial21285_port = {
	.mapbase	= 0x42000160,
	.iotype		= UPIO_MEM,
	.irq		= NO_IRQ,
	.fifosize	= 16,
	.ops		= &serial21285_ops,
	.flags		= UPF_BOOT_AUTOCONF,
};

static void serial21285_setup_ports(void)
{
	serial21285_port.uartclk = mem_fclk_21285 / 4;
}

#ifdef CONFIG_SERIAL_21285_CONSOLE
static void serial21285_console_putchar(struct uart_port *port, int ch)
{
	while (*CSR_UARTFLG & 0x20)
		barrier();
	*CSR_UARTDR = ch;
}

static void
serial21285_console_write(struct console *co, const char *s,
			  unsigned int count)
{
	uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
}

static void __init
serial21285_get_options(struct uart_port *port, int *baud,
			int *parity, int *bits)
{
	if (*CSR_UARTCON == 1) {
		unsigned int tmp;

		tmp = *CSR_H_UBRLCR;
		switch (tmp & 0x60) {
		case 0x00:
			*bits = 5;
			break;
		case 0x20:
			*bits = 6;
			break;
		case 0x40:
			*bits = 7;
			break;
		default:
		case 0x60:
			*bits = 8;
			break;
		}

		if (tmp & H_UBRLCR_PARENB) {
			*parity = 'o';
			if (tmp & H_UBRLCR_PAREVN)
				*parity = 'e';
		}

		tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);

		*baud = port->uartclk / (16 * (tmp + 1));
	}
}

static int __init serial21285_console_setup(struct console *co, char *options)
{
	struct uart_port *port = &serial21285_port;
	int baud = 9600;
	int bits = 8;
	int parity = 'n';
	int flow = 'n';

	if (machine_is_personal_server())
		baud = 57600;

	/*
	 * Check whether an invalid uart number has been specified, and
	 * if so, search for the first available port that does have
	 * console support.
	 */
	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);
	else
		serial21285_get_options(port, &baud, &parity, &bits);

	return uart_set_options(port, co, baud, parity, bits, flow);
}

static struct uart_driver serial21285_reg;

static struct console serial21285_console =
{
	.name		= SERIAL_21285_NAME,
	.write		= serial21285_console_write,
	.device		= uart_console_device,
	.setup		= serial21285_console_setup,
	.flags		= CON_PRINTBUFFER,
	.index		= -1,
	.data		= &serial21285_reg,
};

static int __init rs285_console_init(void)
{
	serial21285_setup_ports();
	register_console(&serial21285_console);
	return 0;
}
console_initcall(rs285_console_init);

#define SERIAL_21285_CONSOLE	&serial21285_console
#else
#define SERIAL_21285_CONSOLE	NULL
#endif

static struct uart_driver serial21285_reg = {
	.owner			= THIS_MODULE,
	.driver_name		= "ttyFB",
	.dev_name		= "ttyFB",
	.devfs_name             = "ttyFB",
	.major			= SERIAL_21285_MAJOR,
	.minor			= SERIAL_21285_MINOR,
	.nr			= 1,
	.cons			= SERIAL_21285_CONSOLE,
};

static int __init serial21285_init(void)
{
	int ret;

	printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");

	serial21285_setup_ports();

	ret = uart_register_driver(&serial21285_reg);
	if (ret == 0)
		uart_add_one_port(&serial21285_reg, &serial21285_port);

	return ret;
}

static void __exit serial21285_exit(void)
{
	uart_remove_one_port(&serial21285_reg, &serial21285_port);
	uart_unregister_driver(&serial21285_reg);
}

module_init(serial21285_init);
module_exit(serial21285_exit);

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/drivers/char/21285.c
	3	*
	4	* Driver for the serial port on the 21285 StrongArm-110 core logic chip.
	5	*
	6	* Based on drivers/char/serial.c
	7	*
	8	* $Id: 21285.c,v 1.37 2002/07/28 10:03:27 rmk Exp $
	9	*/
	10	#include <linux/config.h>
	11	#include <linux/module.h>
	12	#include <linux/tty.h>
	13	#include <linux/ioport.h>
	14	#include <linux/init.h>
	15	#include <linux/console.h>
	16	#include <linux/device.h>
	17	#include <linux/tty_flip.h>
	18	#include <linux/serial_core.h>
	19	#include <linux/serial.h>
	20
	21	#include <asm/io.h>
	22	#include <asm/irq.h>
	23	#include <asm/mach-types.h>
	24	#include <asm/hardware/dec21285.h>
	25	#include <asm/hardware.h>
	26
	27	#define BAUD_BASE (mem_fclk_21285/64)
	28
	29	#define SERIAL_21285_NAME "ttyFB"
	30	#define SERIAL_21285_MAJOR 204
	31	#define SERIAL_21285_MINOR 4
	32
	33	#define RXSTAT_DUMMY_READ 0x80000000
	34	#define RXSTAT_FRAME (1 << 0)
	35	#define RXSTAT_PARITY (1 << 1)
	36	#define RXSTAT_OVERRUN (1 << 2)
	37	#define RXSTAT_ANYERR (RXSTAT_FRAME\|RXSTAT_PARITY\|RXSTAT_OVERRUN)
	38
	39	#define H_UBRLCR_BREAK (1 << 0)
	40	#define H_UBRLCR_PARENB (1 << 1)
	41	#define H_UBRLCR_PAREVN (1 << 2)
	42	#define H_UBRLCR_STOPB (1 << 3)
	43	#define H_UBRLCR_FIFO (1 << 4)
	44
	45	static const char serial21285_name[] = "Footbridge UART";
	46
	47	#define tx_enabled(port) ((port)->unused[0])
	48	#define rx_enabled(port) ((port)->unused[1])
	49
	50	/*
	51	* The documented expression for selecting the divisor is:
	52	* BAUD_BASE / baud - 1
	53	* However, typically BAUD_BASE is not divisible by baud, so
	54	* we want to select the divisor that gives us the minimum
	55	* error. Therefore, we want:
	56	* int(BAUD_BASE / baud - 0.5) ->
	57	* int(BAUD_BASE / baud - (baud >> 1) / baud) ->
	58	* int((BAUD_BASE - (baud >> 1)) / baud)
	59	*/
	60
b129a8cc	61	static void serial21285_stop_tx(struct uart_port *port)
1da177e4 LT	62	{
	63	if (tx_enabled(port)) {
	64	disable_irq(IRQ_CONTX);
	65	tx_enabled(port) = 0;
	66	}
	67	}
	68
b129a8cc	69	static void serial21285_start_tx(struct uart_port *port)
1da177e4 LT	70	{
	71	if (!tx_enabled(port)) {
	72	enable_irq(IRQ_CONTX);
	73	tx_enabled(port) = 1;
	74	}
	75	}
	76
	77	static void serial21285_stop_rx(struct uart_port *port)
	78	{
	79	if (rx_enabled(port)) {
	80	disable_irq(IRQ_CONRX);
	81	rx_enabled(port) = 0;
	82	}
	83	}
	84
	85	static void serial21285_enable_ms(struct uart_port *port)
	86	{
	87	}
	88
	89	static irqreturn_t serial21285_rx_chars(int irq, void dev_id, struct pt_regs regs)
	90	{
	91	struct uart_port *port = dev_id;
	92	struct tty_struct *tty = port->info->tty;
	93	unsigned int status, ch, flag, rxs, max_count = 256;
	94
	95	status = *CSR_UARTFLG;
	96	while (!(status & 0x10) && max_count--) {
1da177e4 LT	97	ch = *CSR_UARTDR;
	98	flag = TTY_NORMAL;
	99	port->icount.rx++;
	100
	101	rxs = *CSR_RXSTAT \| RXSTAT_DUMMY_READ;
45849282	102	if (unlikely(rxs & RXSTAT_ANYERR)) {
1da177e4 LT	103	if (rxs & RXSTAT_PARITY)
	104	port->icount.parity++;
	105	else if (rxs & RXSTAT_FRAME)
	106	port->icount.frame++;
	107	if (rxs & RXSTAT_OVERRUN)
	108	port->icount.overrun++;
	109
	110	rxs &= port->read_status_mask;
	111
	112	if (rxs & RXSTAT_PARITY)
	113	flag = TTY_PARITY;
	114	else if (rxs & RXSTAT_FRAME)
	115	flag = TTY_FRAME;
	116	}
	117
05ab3014 RK	118	uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
05ab3014 RK	119
1da177e4 LT	120	status = *CSR_UARTFLG;
	121	}
	122	tty_flip_buffer_push(tty);
	123
	124	return IRQ_HANDLED;
	125	}
	126
	127	static irqreturn_t serial21285_tx_chars(int irq, void dev_id, struct pt_regs regs)
	128	{
	129	struct uart_port *port = dev_id;
	130	struct circ_buf *xmit = &port->info->xmit;
	131	int count = 256;
	132
	133	if (port->x_char) {
	134	*CSR_UARTDR = port->x_char;
	135	port->icount.tx++;
	136	port->x_char = 0;
	137	goto out;
	138	}
	139	if (uart_circ_empty(xmit) \|\| uart_tx_stopped(port)) {
b129a8cc	140	serial21285_stop_tx(port);
1da177e4 LT	141	goto out;
	142	}
	143
	144	do {
	145	*CSR_UARTDR = xmit->buf[xmit->tail];
	146	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
	147	port->icount.tx++;
	148	if (uart_circ_empty(xmit))
	149	break;
	150	} while (--count > 0 && !(*CSR_UARTFLG & 0x20));
	151
	152	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
	153	uart_write_wakeup(port);
	154
	155	if (uart_circ_empty(xmit))
b129a8cc	156	serial21285_stop_tx(port);
1da177e4 LT	157
	158	out:
	159	return IRQ_HANDLED;
	160	}
	161
	162	static unsigned int serial21285_tx_empty(struct uart_port *port)
	163	{
	164	return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
	165	}
	166
	167	/* no modem control lines */
	168	static unsigned int serial21285_get_mctrl(struct uart_port *port)
	169	{
	170	return TIOCM_CAR \| TIOCM_DSR \| TIOCM_CTS;
	171	}
	172
	173	static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
	174	{
	175	}
	176
	177	static void serial21285_break_ctl(struct uart_port *port, int break_state)
	178	{
	179	unsigned long flags;
	180	unsigned int h_lcr;
	181
	182	spin_lock_irqsave(&port->lock, flags);
	183	h_lcr = *CSR_H_UBRLCR;
	184	if (break_state)
	185	h_lcr \|= H_UBRLCR_BREAK;
	186	else
	187	h_lcr &= ~H_UBRLCR_BREAK;
	188	*CSR_H_UBRLCR = h_lcr;
	189	spin_unlock_irqrestore(&port->lock, flags);
	190	}
	191
	192	static int serial21285_startup(struct uart_port *port)
	193	{
	194	int ret;
	195
	196	tx_enabled(port) = 1;
	197	rx_enabled(port) = 1;
	198
	199	ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
	200	serial21285_name, port);
	201	if (ret == 0) {
	202	ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
	203	serial21285_name, port);
	204	if (ret)
	205	free_irq(IRQ_CONRX, port);
	206	}
	207
	208	return ret;
	209	}
	210
	211	static void serial21285_shutdown(struct uart_port *port)
	212	{
	213	free_irq(IRQ_CONTX, port);
	214	free_irq(IRQ_CONRX, port);
	215	}
	216
	217	static void
	218	serial21285_set_termios(struct uart_port port, struct termios termios,
	219	struct termios *old)
	220	{
221	unsigned long flags;
222	unsigned int baud, quot, h_lcr;
223
224	/*
225	* We don't support modem control lines.
226	*/
227	termios->c_cflag &= ~(HUPCL \| CRTSCTS \| CMSPAR);
228	termios->c_cflag \|= CLOCAL;
229
230	/*
231	* We don't support BREAK character recognition.
232	*/
233	termios->c_iflag &= ~(IGNBRK \| BRKINT);
234
235	/*
236	* Ask the core to calculate the divisor for us.
237	*/
238	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
239	quot = uart_get_divisor(port, baud);
240
241	switch (termios->c_cflag & CSIZE) {
242	case CS5:
243	h_lcr = 0x00;
244	break;
245	case CS6:
246	h_lcr = 0x20;
247	break;
248	case CS7:
249	h_lcr = 0x40;
250	break;
251	default: /* CS8 */
252	h_lcr = 0x60;
253	break;
254	}
255
256	if (termios->c_cflag & CSTOPB)
257	h_lcr \|= H_UBRLCR_STOPB;
258	if (termios->c_cflag & PARENB) {
259	h_lcr \|= H_UBRLCR_PARENB;
260	if (!(termios->c_cflag & PARODD))
261	h_lcr \|= H_UBRLCR_PAREVN;
262	}
263
264	if (port->fifosize)
265	h_lcr \|= H_UBRLCR_FIFO;
266
267	spin_lock_irqsave(&port->lock, flags);
268
269	/*
270	* Update the per-port timeout.
271	*/
272	uart_update_timeout(port, termios->c_cflag, baud);
273
274	/*
275	* Which character status flags are we interested in?
276	*/
277	port->read_status_mask = RXSTAT_OVERRUN;
278	if (termios->c_iflag & INPCK)
279	port->read_status_mask \|= RXSTAT_FRAME \| RXSTAT_PARITY;
280
281	/*
282	* Which character status flags should we ignore?
283	*/
284	port->ignore_status_mask = 0;
285	if (termios->c_iflag & IGNPAR)
286	port->ignore_status_mask \|= RXSTAT_FRAME \| RXSTAT_PARITY;
287	if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
288	port->ignore_status_mask \|= RXSTAT_OVERRUN;
289
290	/*
291	* Ignore all characters if CREAD is not set.
292	*/
293	if ((termios->c_cflag & CREAD) == 0)
294	port->ignore_status_mask \|= RXSTAT_DUMMY_READ;
295
296	quot -= 1;
297
298	*CSR_UARTCON = 0;
299	*CSR_L_UBRLCR = quot & 0xff;
300	*CSR_M_UBRLCR = (quot >> 8) & 0x0f;
301	*CSR_H_UBRLCR = h_lcr;
302	*CSR_UARTCON = 1;
303
304	spin_unlock_irqrestore(&port->lock, flags);
305	}
306
307	static const char serial21285_type(struct uart_port port)
308	{
309	return port->type == PORT_21285 ? "DC21285" : NULL;
310	}
311
312	static void serial21285_release_port(struct uart_port *port)
313	{
314	release_mem_region(port->mapbase, 32);
315	}
316
317	static int serial21285_request_port(struct uart_port *port)
318	{
319	return request_mem_region(port->mapbase, 32, serial21285_name)
320	!= NULL ? 0 : -EBUSY;
321	}
322
323	static void serial21285_config_port(struct uart_port *port, int flags)
324	{
325	if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
326	port->type = PORT_21285;
327	}
328
329	/*
330	* verify the new serial_struct (for TIOCSSERIAL).
331	*/
332	static int serial21285_verify_port(struct uart_port port, struct serial_struct ser)
333	{
334	int ret = 0;
335	if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
336	ret = -EINVAL;
337	if (ser->irq != NO_IRQ)
338	ret = -EINVAL;
339	if (ser->baud_base != port->uartclk / 16)
340	ret = -EINVAL;
341	return ret;
342	}
343
344	static struct uart_ops serial21285_ops = {
345	.tx_empty = serial21285_tx_empty,
346	.get_mctrl = serial21285_get_mctrl,
347	.set_mctrl = serial21285_set_mctrl,
348	.stop_tx = serial21285_stop_tx,
349	.start_tx = serial21285_start_tx,
350	.stop_rx = serial21285_stop_rx,
351	.enable_ms = serial21285_enable_ms,
352	.break_ctl = serial21285_break_ctl,
353	.startup = serial21285_startup,
354	.shutdown = serial21285_shutdown,
355	.set_termios = serial21285_set_termios,
356	.type = serial21285_type,
357	.release_port = serial21285_release_port,
358	.request_port = serial21285_request_port,
359	.config_port = serial21285_config_port,
360	.verify_port = serial21285_verify_port,
361	};
362
363	static struct uart_port serial21285_port = {
364	.mapbase = 0x42000160,
9b4a1617	365	.iotype = UPIO_MEM,
1da177e4 LT	366	.irq = NO_IRQ,
	367	.fifosize = 16,
	368	.ops = &serial21285_ops,
ce8337cb	369	.flags = UPF_BOOT_AUTOCONF,
1da177e4 LT	370	};
	371
	372	static void serial21285_setup_ports(void)
	373	{
	374	serial21285_port.uartclk = mem_fclk_21285 / 4;
	375	}
	376
	377	#ifdef CONFIG_SERIAL_21285_CONSOLE
d358788f RK	378	static void serial21285_console_putchar(struct uart_port *port, int ch)
	379	{
	380	while (*CSR_UARTFLG & 0x20)
	381	barrier();
	382	*CSR_UARTDR = ch;
	383	}
1da177e4 LT	384
	385	static void
	386	serial21285_console_write(struct console co, const char s,
	387	unsigned int count)
	388	{
d358788f	389	uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
1da177e4 LT	390	}
	391
	392	static void __init
	393	serial21285_get_options(struct uart_port port, int baud,
	394	int parity, int bits)
	395	{
	396	if (*CSR_UARTCON == 1) {
	397	unsigned int tmp;
	398
	399	tmp = *CSR_H_UBRLCR;
	400	switch (tmp & 0x60) {
	401	case 0x00:
	402	*bits = 5;
	403	break;
	404	case 0x20:
	405	*bits = 6;
	406	break;
	407	case 0x40:
	408	*bits = 7;
	409	break;
	410	default:
	411	case 0x60:
	412	*bits = 8;
	413	break;
	414	}
	415
	416	if (tmp & H_UBRLCR_PARENB) {
	417	*parity = 'o';
	418	if (tmp & H_UBRLCR_PAREVN)
	419	*parity = 'e';
	420	}
	421
	422	tmp = CSR_L_UBRLCR \| (CSR_M_UBRLCR << 8);
	423
	424	baud = port->uartclk / (16 (tmp + 1));
	425	}
	426	}
	427
	428	static int __init serial21285_console_setup(struct console co, char options)
	429	{
	430	struct uart_port *port = &serial21285_port;
	431	int baud = 9600;
	432	int bits = 8;
	433	int parity = 'n';
	434	int flow = 'n';
	435
	436	if (machine_is_personal_server())
	437	baud = 57600;
	438
	439	/*
	440	* Check whether an invalid uart number has been specified, and
	441	* if so, search for the first available port that does have
	442	* console support.
	443	*/
	444	if (options)
	445	uart_parse_options(options, &baud, &parity, &bits, &flow);
	446	else
	447	serial21285_get_options(port, &baud, &parity, &bits);
	448
	449	return uart_set_options(port, co, baud, parity, bits, flow);
	450	}
	451
2d93486c	452	static struct uart_driver serial21285_reg;
1da177e4 LT	453
	454	static struct console serial21285_console =
	455	{
	456	.name = SERIAL_21285_NAME,
	457	.write = serial21285_console_write,
	458	.device = uart_console_device,
	459	.setup = serial21285_console_setup,
	460	.flags = CON_PRINTBUFFER,
	461	.index = -1,
	462	.data = &serial21285_reg,
	463	};
	464
	465	static int __init rs285_console_init(void)
	466	{
	467	serial21285_setup_ports();
	468	register_console(&serial21285_console);
	469	return 0;
	470	}
	471	console_initcall(rs285_console_init);
	472
	473	#define SERIAL_21285_CONSOLE &serial21285_console
	474	#else
	475	#define SERIAL_21285_CONSOLE NULL
	476	#endif
	477
	478	static struct uart_driver serial21285_reg = {
	479	.owner = THIS_MODULE,
	480	.driver_name = "ttyFB",
	481	.dev_name = "ttyFB",
	482	.devfs_name = "ttyFB",
	483	.major = SERIAL_21285_MAJOR,
	484	.minor = SERIAL_21285_MINOR,
	485	.nr = 1,
	486	.cons = SERIAL_21285_CONSOLE,
	487	};
	488
	489	static int __init serial21285_init(void)
	490	{
	491	int ret;
	492
	493	printk(KERN_INFO "Serial: 21285 driver $Revision: 1.37 $\n");
	494
	495	serial21285_setup_ports();
	496
	497	ret = uart_register_driver(&serial21285_reg);
	498	if (ret == 0)
	499	uart_add_one_port(&serial21285_reg, &serial21285_port);
	500
	501	return ret;
	502	}
	503
	504	static void __exit serial21285_exit(void)
	505	{
	506	uart_remove_one_port(&serial21285_reg, &serial21285_port);
	507	uart_unregister_driver(&serial21285_reg);
	508	}
	509
	510	module_init(serial21285_init);
	511	module_exit(serial21285_exit);
	512
	513	MODULE_LICENSE("GPL");
	514	MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver $Revision: 1.37 $");
	515	MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);