scsi: ufs: guarantee hold and release for vendor's operation
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / scsi / ufs / ufshcd.h
CommitLineData
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1/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
dc3c8d3a 6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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7 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
a3cd5ec5 48#include <linux/rwsem.h>
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49#include <linux/workqueue.h>
50#include <linux/errno.h>
51#include <linux/types.h>
52#include <linux/wait.h>
53#include <linux/bitops.h>
54#include <linux/pm_runtime.h>
55#include <linux/clk.h>
6ccf44fe 56#include <linux/completion.h>
aa497613 57#include <linux/regulator/consumer.h>
f37aabcf 58#include "unipro.h"
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59
60#include <asm/irq.h>
61#include <asm/byteorder.h>
62#include <scsi/scsi.h>
63#include <scsi/scsi_cmnd.h>
64#include <scsi/scsi_host.h>
65#include <scsi/scsi_tcq.h>
66#include <scsi/scsi_dbg.h>
67#include <scsi/scsi_eh.h>
68
69#include "ufs.h"
70#include "ufshci.h"
71
72#define UFSHCD "ufshcd"
73#define UFSHCD_DRIVER_VERSION "0.2"
74
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75struct ufs_hba;
76
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77enum dev_cmd_type {
78 DEV_CMD_TYPE_NOP = 0x0,
68078d5c 79 DEV_CMD_TYPE_QUERY = 0x1,
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80};
81
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82/**
83 * struct uic_command - UIC command structure
84 * @command: UIC command
85 * @argument1: UIC command argument 1
86 * @argument2: UIC command argument 2
87 * @argument3: UIC command argument 3
88 * @cmd_active: Indicate if UIC command is outstanding
89 * @result: UIC command result
6ccf44fe 90 * @done: UIC command completion
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91 */
92struct uic_command {
93 u32 command;
94 u32 argument1;
95 u32 argument2;
96 u32 argument3;
97 int cmd_active;
98 int result;
6ccf44fe 99 struct completion done;
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100};
101
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102/* Used to differentiate the power management options */
103enum ufs_pm_op {
104 UFS_RUNTIME_PM,
105 UFS_SYSTEM_PM,
106 UFS_SHUTDOWN_PM,
107};
108
109#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
110#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
111#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
112
113/* Host <-> Device UniPro Link state */
114enum uic_link_state {
115 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
116 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
117 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
118};
119
120#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
126#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
127 UIC_LINK_ACTIVE_STATE)
128#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
129 UIC_LINK_HIBERN8_STATE)
130
131/*
132 * UFS Power management levels.
133 * Each level is in increasing order of power savings.
134 */
135enum ufs_pm_level {
136 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
139 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
140 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
141 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
142 UFS_PM_LVL_MAX
143};
144
145struct ufs_pm_lvl_states {
146 enum ufs_dev_pwr_mode dev_state;
147 enum uic_link_state link_state;
148};
149
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150/**
151 * struct ufshcd_lrb - local reference block
152 * @utr_descriptor_ptr: UTRD address of the command
5a0b0cb9 153 * @ucd_req_ptr: UCD address of the command
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154 * @ucd_rsp_ptr: Response UPIU address for this command
155 * @ucd_prdt_ptr: PRDT address of the command
ff8e20c6
DR
156 * @utrd_dma_addr: UTRD dma address for debug
157 * @ucd_prdt_dma_addr: PRDT dma address for debug
158 * @ucd_rsp_dma_addr: UPIU response dma address for debug
159 * @ucd_req_dma_addr: UPIU request dma address for debug
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160 * @cmd: pointer to SCSI command
161 * @sense_buffer: pointer to sense buffer address of the SCSI command
162 * @sense_bufflen: Length of the sense buffer
163 * @scsi_status: SCSI status of the command
164 * @command_type: SCSI, UFS, Query.
165 * @task_tag: Task tag of the command
166 * @lun: LUN of the command
5a0b0cb9 167 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
ff8e20c6 168 * @issue_time_stamp: time stamp for debug purposes
e0b299e3 169 * @req_abort_skip: skip request abort task flag
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170 */
171struct ufshcd_lrb {
172 struct utp_transfer_req_desc *utr_descriptor_ptr;
5a0b0cb9 173 struct utp_upiu_req *ucd_req_ptr;
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174 struct utp_upiu_rsp *ucd_rsp_ptr;
175 struct ufshcd_sg_entry *ucd_prdt_ptr;
176
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DR
177 dma_addr_t utrd_dma_addr;
178 dma_addr_t ucd_req_dma_addr;
179 dma_addr_t ucd_rsp_dma_addr;
180 dma_addr_t ucd_prdt_dma_addr;
181
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182 struct scsi_cmnd *cmd;
183 u8 *sense_buffer;
184 unsigned int sense_bufflen;
185 int scsi_status;
186
187 int command_type;
188 int task_tag;
0ce147d4 189 u8 lun; /* UPIU LUN id field is only 8-bit wide */
5a0b0cb9 190 bool intr_cmd;
ff8e20c6 191 ktime_t issue_time_stamp;
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192
193 bool req_abort_skip;
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194};
195
68078d5c 196/**
a230c2f6 197 * struct ufs_query - holds relevant data structures for query request
68078d5c
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198 * @request: request upiu and function
199 * @descriptor: buffer for sending/receiving descriptor
200 * @response: response upiu and response
201 */
202struct ufs_query {
203 struct ufs_query_req request;
204 u8 *descriptor;
205 struct ufs_query_res response;
206};
207
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208/**
209 * struct ufs_dev_cmd - all assosiated fields with device management commands
210 * @type: device management command type - Query, NOP OUT
211 * @lock: lock to allow one command at a time
212 * @complete: internal commands completion
213 * @tag_wq: wait queue until free command slot is available
214 */
215struct ufs_dev_cmd {
216 enum dev_cmd_type type;
217 struct mutex lock;
218 struct completion *complete;
219 wait_queue_head_t tag_wq;
68078d5c 220 struct ufs_query query;
5a0b0cb9 221};
e0eca63e 222
dd528aaa 223/**
224 * ufs_hba_variant: host specific data
225 */
226struct ufs_hba_variant {
227 const struct ufs_hba_variant_ops *ops;
228 u32 quirks;
229 void *vs_data;
230};
a4b0e8a4
PM
231struct ufs_desc_size {
232 int dev_desc;
233 int pwr_desc;
234 int geom_desc;
235 int interc_desc;
236 int unit_desc;
237 int conf_desc;
238};
239
c6e79dac
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240/**
241 * struct ufs_clk_info - UFS clock related info
242 * @list: list headed by hba->clk_list_head
243 * @clk: clock node
244 * @name: clock name
245 * @max_freq: maximum frequency supported by the clock
4cff6d99 246 * @min_freq: min frequency that can be used for clock scaling
856b3483 247 * @curr_freq: indicates the current frequency that it is set to
c6e79dac
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248 * @enabled: variable to check against multiple enable/disable
249 */
250struct ufs_clk_info {
251 struct list_head list;
252 struct clk *clk;
253 const char *name;
254 u32 max_freq;
4cff6d99 255 u32 min_freq;
856b3483 256 u32 curr_freq;
c6e79dac
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257 bool enabled;
258};
259
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260enum ufs_notify_change_status {
261 PRE_CHANGE,
262 POST_CHANGE,
263};
7eb584db
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264
265struct ufs_pa_layer_attr {
266 u32 gear_rx;
267 u32 gear_tx;
268 u32 lane_rx;
269 u32 lane_tx;
270 u32 pwr_rx;
271 u32 pwr_tx;
272 u32 hs_rate;
273};
274
275struct ufs_pwr_mode_info {
276 bool is_valid;
277 struct ufs_pa_layer_attr info;
278};
279
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280/**
281 * struct ufs_hba_variant_ops - variant specific callbacks
282 * @name: variant name
283 * @init: called when the driver is initialized
284 * @exit: called to cleanup everything done in init
9949e702 285 * @get_ufs_hci_version: called to get UFS HCI version
856b3483 286 * @clk_scale_notify: notifies that clks are scaled up/down
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SRT
287 * @setup_clocks: called before touching any of the controller registers
288 * @setup_regulators: called before accessing the host controller
289 * @hce_enable_notify: called before and after HCE enable bit is set to allow
290 * variant specific Uni-Pro initialization.
291 * @link_startup_notify: called before and after Link startup is carried out
292 * to allow variant specific Uni-Pro initialization.
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293 * @pwr_change_notify: called before and after a power mode change
294 * is carried out to allow vendor spesific capabilities
295 * to be set.
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296 * @setup_xfer_req: called before any transfer request is issued
297 * to set some things
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298 * @setup_task_mgmt: called before any task management request is issued
299 * to set some things
ee32c909 300 * @hibern8_notify: called around hibern8 enter/exit
56d4a186 301 * @apply_dev_quirks: called to apply device specific quirks
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302 * @suspend: called during host controller PM callback
303 * @resume: called during host controller PM callback
6e3fd44d 304 * @dbg_register_dump: used to dump controller debug information
4b9ffb5a 305 * @phy_initialization: used to initialize phys
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306 */
307struct ufs_hba_variant_ops {
308 const char *name;
309 int (*init)(struct ufs_hba *);
310 void (*exit)(struct ufs_hba *);
9949e702 311 u32 (*get_ufs_hci_version)(struct ufs_hba *);
f06fcc71
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312 int (*clk_scale_notify)(struct ufs_hba *, bool,
313 enum ufs_notify_change_status);
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314 int (*setup_clocks)(struct ufs_hba *, bool,
315 enum ufs_notify_change_status);
5c0c28a8 316 int (*setup_regulators)(struct ufs_hba *, bool);
86cba8c7 317 void (*host_reset)(struct ufs_hba *);
f06fcc71
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318 int (*hce_enable_notify)(struct ufs_hba *,
319 enum ufs_notify_change_status);
320 int (*link_startup_notify)(struct ufs_hba *,
321 enum ufs_notify_change_status);
7eb584db 322 int (*pwr_change_notify)(struct ufs_hba *,
f06fcc71
YG
323 enum ufs_notify_change_status status,
324 struct ufs_pa_layer_attr *,
7eb584db 325 struct ufs_pa_layer_attr *);
03229397 326 void (*set_nexus_t_xfer_req)(struct ufs_hba *,
327 int, struct scsi_cmnd *);
328 void (*set_nexus_t_task_mgmt)(struct ufs_hba *, int, u8);
623b5fe3 329 void (*hibern8_notify)(struct ufs_hba *, u8, bool);
56d4a186 330 int (*apply_dev_quirks)(struct ufs_hba *);
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331 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
332 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
6e3fd44d 333 void (*dbg_register_dump)(struct ufs_hba *hba);
4b9ffb5a 334 int (*phy_initialization)(struct ufs_hba *);
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335};
336
1ab27c9c
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337/* clock gating state */
338enum clk_gating_state {
339 CLKS_OFF,
340 CLKS_ON,
341 REQ_CLKS_OFF,
342 REQ_CLKS_ON,
343};
344
345/**
346 * struct ufs_clk_gating - UFS clock gating related info
347 * @gate_work: worker to turn off clocks after some delay as specified in
348 * delay_ms
349 * @ungate_work: worker to turn on clocks that will be used in case of
350 * interrupt context
351 * @state: the current clocks state
352 * @delay_ms: gating delay in ms
353 * @is_suspended: clk gating is suspended when set to 1 which can be used
354 * during suspend/resume
355 * @delay_attr: sysfs attribute to control delay_attr
b427411a
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356 * @enable_attr: sysfs attribute to enable/disable clock gating
357 * @is_enabled: Indicates the current status of clock gating
1ab27c9c
ST
358 * @active_reqs: number of requests that are pending and should be waited for
359 * completion before gating clocks.
360 */
361struct ufs_clk_gating {
362 struct delayed_work gate_work;
363 struct work_struct ungate_work;
364 enum clk_gating_state state;
365 unsigned long delay_ms;
366 bool is_suspended;
367 struct device_attribute delay_attr;
b427411a
ST
368 struct device_attribute enable_attr;
369 bool is_enabled;
1ab27c9c
ST
370 int active_reqs;
371};
372
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373struct ufs_saved_pwr_info {
374 struct ufs_pa_layer_attr info;
375 bool is_valid;
376};
377
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SJ
378/**
379 * struct ufs_clk_scaling - UFS clock scaling related data
380 * @active_reqs: number of requests that are pending. If this is zero when
381 * devfreq ->target() function is called then schedule "suspend_work" to
382 * suspend devfreq.
383 * @tot_busy_t: Total busy time in current polling window
384 * @window_start_t: Start time (in jiffies) of the current polling window
385 * @busy_start_t: Start time of current busy period
386 * @enable_attr: sysfs attribute to enable/disable clock scaling
387 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
388 * one keeps track of previous power mode.
389 * @workq: workqueue to schedule devfreq suspend/resume work
390 * @suspend_work: worker to suspend devfreq
391 * @resume_work: worker to resume devfreq
392 * @is_allowed: tracks if scaling is currently allowed or not
393 * @is_busy_started: tracks if busy period has started or not
394 * @is_suspended: tracks if devfreq is suspended or not
395 */
856b3483 396struct ufs_clk_scaling {
401f1e44
SJ
397 int active_reqs;
398 unsigned long tot_busy_t;
856b3483 399 unsigned long window_start_t;
401f1e44 400 ktime_t busy_start_t;
fcb0c4b0 401 struct device_attribute enable_attr;
a3cd5ec5 402 struct ufs_saved_pwr_info saved_pwr_info;
401f1e44
SJ
403 struct workqueue_struct *workq;
404 struct work_struct suspend_work;
405 struct work_struct resume_work;
406 bool is_allowed;
407 bool is_busy_started;
408 bool is_suspended;
856b3483
ST
409};
410
3a4bf06d
YG
411/**
412 * struct ufs_init_prefetch - contains data that is pre-fetched once during
413 * initialization
414 * @icc_level: icc level which was read during initialization
415 */
416struct ufs_init_prefetch {
417 u32 icc_level;
418};
419
ff8e20c6
DR
420#define UIC_ERR_REG_HIST_LENGTH 8
421/**
422 * struct ufs_uic_err_reg_hist - keeps history of uic errors
423 * @pos: index to indicate cyclic buffer position
424 * @reg: cyclic buffer for registers value
425 * @tstamp: cyclic buffer for time stamp
426 */
427struct ufs_uic_err_reg_hist {
428 int pos;
429 u32 reg[UIC_ERR_REG_HIST_LENGTH];
430 ktime_t tstamp[UIC_ERR_REG_HIST_LENGTH];
431};
432
433/**
434 * struct ufs_stats - keeps usage/err statistics
435 * @hibern8_exit_cnt: Counter to keep track of number of exits,
436 * reset this after link-startup.
437 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
438 * Clear after the first successful command completion.
439 * @pa_err: tracks pa-uic errors
440 * @dl_err: tracks dl-uic errors
441 * @nl_err: tracks nl-uic errors
442 * @tl_err: tracks tl-uic errors
443 * @dme_err: tracks dme errors
444 */
445struct ufs_stats {
446 u32 hibern8_exit_cnt;
447 ktime_t last_hibern8_exit_tstamp;
448 struct ufs_uic_err_reg_hist pa_err;
449 struct ufs_uic_err_reg_hist dl_err;
450 struct ufs_uic_err_reg_hist nl_err;
451 struct ufs_uic_err_reg_hist tl_err;
452 struct ufs_uic_err_reg_hist dme_err;
453};
454
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455/**
456 * struct ufs_hba - per adapter private structure
457 * @mmio_base: UFSHCI base register address
458 * @ucdl_base_addr: UFS Command Descriptor base address
459 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
460 * @utmrdl_base_addr: UTP Task Management Descriptor base address
461 * @ucdl_dma_addr: UFS Command Descriptor DMA address
462 * @utrdl_dma_addr: UTRDL DMA address
463 * @utmrdl_dma_addr: UTMRDL DMA address
464 * @host: Scsi_Host instance of the driver
465 * @dev: device handle
466 * @lrb: local reference block
5a0b0cb9 467 * @lrb_in_use: lrb in use
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468 * @outstanding_tasks: Bits representing outstanding task requests
469 * @outstanding_reqs: Bits representing outstanding transfer requests
470 * @capabilities: UFS Controller Capabilities
471 * @nutrs: Transfer Request Queue depth supported by controller
472 * @nutmrs: Task Management Queue depth supported by controller
473 * @ufs_version: UFS Version to which controller complies
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SRT
474 * @vops: pointer to variant specific operations
475 * @priv: pointer to variant specific private data
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VH
476 * @irq: Irq number of the controller
477 * @active_uic_cmd: handle of active UIC command
6ccf44fe 478 * @uic_cmd_mutex: mutex for uic command
e2933132
SRT
479 * @tm_wq: wait queue for task management
480 * @tm_tag_wq: wait queue for free task management slots
481 * @tm_slots_in_use: bit map of task management request slots in use
53b3d9c3 482 * @pwr_done: completion for power mode change
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483 * @tm_condition: condition variable for task management
484 * @ufshcd_state: UFSHCD states
3441da7d 485 * @eh_flags: Error handling flags
2fbd009b 486 * @intr_mask: Interrupt Mask Bits
66ec6d59 487 * @ee_ctrl_mask: Exception event control mask
1d337ec2 488 * @is_powered: flag to check if HBA is powered
3a4bf06d
YG
489 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
490 * @init_prefetch_data: data pre-fetched during initialization
e8e7f271 491 * @eh_work: Worker to handle UFS errors that require s/w attention
66ec6d59 492 * @eeh_work: Worker to handle exception events
e0eca63e 493 * @errors: HBA errors
e8e7f271
SRT
494 * @uic_error: UFS interconnect layer error status
495 * @saved_err: sticky error mask
496 * @saved_uic_err: sticky UIC error mask
5a0b0cb9 497 * @dev_cmd: ufs device management command information
cad2e03d 498 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
66ec6d59 499 * @auto_bkops_enabled: to track whether bkops is enabled in device
aa497613 500 * @vreg_info: UFS device voltage regulator information
c6e79dac 501 * @clk_list_head: UFS host controller clocks list node head
7eb584db
DR
502 * @pwr_info: holds current power mode
503 * @max_pwr_info: keeps the device max valid pwm
a4b0e8a4 504 * @desc_size: descriptor sizes reported by device
afdfff59
YG
505 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
506 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
507 * device is known or not.
e0eca63e
VH
508 */
509struct ufs_hba {
510 void __iomem *mmio_base;
511
512 /* Virtual memory reference */
513 struct utp_transfer_cmd_desc *ucdl_base_addr;
514 struct utp_transfer_req_desc *utrdl_base_addr;
515 struct utp_task_req_desc *utmrdl_base_addr;
516
517 /* DMA memory reference */
518 dma_addr_t ucdl_dma_addr;
519 dma_addr_t utrdl_dma_addr;
520 dma_addr_t utmrdl_dma_addr;
521
522 struct Scsi_Host *host;
523 struct device *dev;
2a8fa600
SJ
524 /*
525 * This field is to keep a reference to "scsi_device" corresponding to
526 * "UFS device" W-LU.
527 */
528 struct scsi_device *sdev_ufs_device;
e0eca63e 529
57d104c1
SJ
530 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
531 enum uic_link_state uic_link_state;
532 /* Desired UFS power management level during runtime PM */
533 enum ufs_pm_level rpm_lvl;
534 /* Desired UFS power management level during system PM */
535 enum ufs_pm_level spm_lvl;
09690d5a
SJ
536 struct device_attribute rpm_lvl_attr;
537 struct device_attribute spm_lvl_attr;
57d104c1
SJ
538 int pm_op_in_progress;
539
e0eca63e 540 struct ufshcd_lrb *lrb;
623b5fe3 541 volatile unsigned long lrb_in_use;
e0eca63e
VH
542
543 unsigned long outstanding_tasks;
544 unsigned long outstanding_reqs;
545
546 u32 capabilities;
547 int nutrs;
548 int nutmrs;
549 u32 ufs_version;
03229397 550 const struct ufs_hba_variant_ops *vops;
5c0c28a8 551 void *priv;
e0eca63e 552 unsigned int irq;
57d104c1 553 bool is_irq_enabled;
e0eca63e 554
b852190e
YG
555 /* Interrupt aggregation support is broken */
556 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
557
cad2e03d
YG
558 /*
559 * delay before each dme command is required as the unipro
560 * layer has shown instabilities
561 */
b852190e
YG
562 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
563
7ca38cf3
YG
564 /*
565 * If UFS host controller is having issue in processing LCC (Line
566 * Control Command) coming from device then enable this quirk.
567 * When this quirk is enabled, host controller driver should disable
568 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
569 * attribute of device to 0).
570 */
571 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
cad2e03d 572
c3a2f9ee
YG
573 /*
574 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
575 * inbound Link supports unterminated line in HS mode. Setting this
576 * attribute to 1 fixes moving to HS gear.
577 */
578 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
579
874237f7
YG
580 /*
581 * This quirk needs to be enabled if the host contoller only allows
582 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
583 * SLOW AUTO).
584 */
585 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
586
9949e702
YG
587 /*
588 * This quirk needs to be enabled if the host contoller doesn't
589 * advertise the correct version in UFS_VER register. If this quirk
590 * is enabled, standard UFS host driver will call the vendor specific
591 * ops (get_ufs_hci_version) to get the correct version.
592 */
593 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
594
86b7a91c 595 #define UFSHCD_QUIRK_BROKEN_REQ_LIST_CLR UFS_BIT(6)
75b1cc4a
KK
596 /*
597 * This quirk needs to be enabled if the host contoller regards
598 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
599 */
600 #define UFSHCD_QUIRK_PRDT_BYTE_GRAN UFS_BIT(7)
601
623b5fe3 602 #define UFSHCD_QUIRK_USE_OF_HCE UFS_BIT(8)
cad2e03d 603 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
6ccf44fe 604
c58ab7aa
YG
605 /* Device deviations from standard UFS device spec. */
606 unsigned int dev_quirks;
607
e2933132
SRT
608 wait_queue_head_t tm_wq;
609 wait_queue_head_t tm_tag_wq;
e0eca63e 610 unsigned long tm_condition;
e2933132 611 unsigned long tm_slots_in_use;
e0eca63e 612
57d104c1
SJ
613 struct uic_command *active_uic_cmd;
614 struct mutex uic_cmd_mutex;
615 struct completion *uic_async_done;
53b3d9c3 616
e0eca63e 617 u32 ufshcd_state;
3441da7d 618 u32 eh_flags;
2fbd009b 619 u32 intr_mask;
60916a7e 620 u32 transferred_sector;
66ec6d59 621 u16 ee_ctrl_mask;
1d337ec2 622 bool is_powered;
3a4bf06d
YG
623 bool is_init_prefetch;
624 struct ufs_init_prefetch init_prefetch_data;
e0eca63e
VH
625
626 /* Work Queues */
e8e7f271 627 struct work_struct eh_work;
66ec6d59 628 struct work_struct eeh_work;
e0eca63e
VH
629
630 /* HBA Errors */
631 u32 errors;
e8e7f271
SRT
632 u32 uic_error;
633 u32 saved_err;
634 u32 saved_uic_err;
ff8e20c6 635 struct ufs_stats ufs_stats;
5a0b0cb9 636
a60d7ef4 637 u32 tcx_replay_timer_expired_cnt;
638 u32 fcx_protection_timer_expired_cnt;
639
5a0b0cb9
SRT
640 /* Device management request data */
641 struct ufs_dev_cmd dev_cmd;
cad2e03d 642 ktime_t last_dme_cmd_tstamp;
66ec6d59 643
57d104c1
SJ
644 /* Keeps information of the UFS device connected to this host */
645 struct ufs_dev_info dev_info;
66ec6d59 646 bool auto_bkops_enabled;
aa497613 647 struct ufs_vreg_info vreg_info;
c6e79dac 648 struct list_head clk_list_head;
57d104c1
SJ
649
650 bool wlun_dev_clr_ua;
7eb584db 651
7fabb77b
GB
652 /* Number of requests aborts */
653 int req_abort_count;
654
54b879b7
YG
655 /* Number of lanes available (1 or 2) for Rx/Tx */
656 u32 lanes_per_direction;
7eb584db
DR
657 struct ufs_pa_layer_attr pwr_info;
658 struct ufs_pwr_mode_info max_pwr_info;
1ab27c9c
ST
659
660 struct ufs_clk_gating clk_gating;
661 /* Control to enable/disable host capabilities */
662 u32 caps;
663 /* Allow dynamic clk gating */
664#define UFSHCD_CAP_CLK_GATING (1 << 0)
665 /* Allow hiberb8 with clk gating */
666#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
856b3483
ST
667 /* Allow dynamic clk scaling */
668#define UFSHCD_CAP_CLK_SCALING (1 << 2)
374a246e
SJ
669 /* Allow auto bkops to enabled during runtime suspend */
670#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
b852190e
YG
671 /*
672 * This capability allows host controller driver to use the UFS HCI's
673 * interrupt aggregation capability.
674 * CAUTION: Enabling this might reduce overall UFS throughput.
675 */
676#define UFSHCD_CAP_INTR_AGGR (1 << 4)
4e768e76
SJ
677 /*
678 * This capability allows the device auto-bkops to be always enabled
679 * except during suspend (both runtime and suspend).
680 * Enabling this capability means that device will always be allowed
681 * to do background operation when it's active but it might degrade
682 * the performance of ongoing read/write operations.
683 */
684#define UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND (1 << 5)
856b3483
ST
685
686 struct devfreq *devfreq;
687 struct ufs_clk_scaling clk_scaling;
e785060e 688 bool is_sys_suspended;
afdfff59
YG
689
690 enum bkops_status urgent_bkops_lvl;
691 bool is_urgent_bkops_lvl_checked;
a3cd5ec5
SJ
692
693 struct rw_semaphore clk_scaling_lock;
a4b0e8a4 694 struct ufs_desc_size desc_size;
e0eca63e
VH
695};
696
1ab27c9c
ST
697/* Returns true if clocks can be gated. Otherwise false */
698static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
699{
700 return hba->caps & UFSHCD_CAP_CLK_GATING;
701}
702static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
703{
704 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
705}
fcb0c4b0 706static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
856b3483
ST
707{
708 return hba->caps & UFSHCD_CAP_CLK_SCALING;
709}
374a246e
SJ
710static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
711{
712 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
713}
714
b852190e
YG
715static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
716{
4b9ffb5a
JP
717/* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
718#ifndef CONFIG_SCSI_UFS_DWC
b852190e
YG
719 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
720 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
721 return true;
722 else
723 return false;
4b9ffb5a
JP
724#else
725return true;
726#endif
b852190e
YG
727}
728
b873a275
SJ
729#define ufshcd_writel(hba, val, reg) \
730 writel((val), (hba)->mmio_base + (reg))
731#define ufshcd_readl(hba, reg) \
732 readl((hba)->mmio_base + (reg))
733
e785060e
DR
734/**
735 * ufshcd_rmwl - read modify write into a register
736 * @hba - per adapter instance
737 * @mask - mask to apply on read value
738 * @val - actual value to write
739 * @reg - register address
740 */
741static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
742{
743 u32 tmp;
744
745 tmp = ufshcd_readl(hba, reg);
746 tmp &= ~mask;
747 tmp |= (val & mask);
748 ufshcd_writel(hba, tmp, reg);
749}
750
5c0c28a8 751int ufshcd_alloc_host(struct device *, struct ufs_hba **);
47555a5c 752void ufshcd_dealloc_host(struct ufs_hba *);
5c0c28a8 753int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
e0eca63e 754void ufshcd_remove(struct ufs_hba *);
596585a2
YG
755int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
756 u32 val, unsigned long interval_us,
757 unsigned long timeout_ms, bool can_sleep);
e0eca63e 758
68078d5c
DR
759static inline void check_upiu_size(void)
760{
761 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
762 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
763}
764
1ce5898a
YG
765/**
766 * ufshcd_set_variant - set variant specific data to the hba
767 * @hba - per adapter instance
768 * @variant - pointer to variant specific data
769 */
770static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
771{
772 BUG_ON(!hba);
773 hba->priv = variant;
774}
775
776/**
777 * ufshcd_get_variant - get variant specific data from the hba
778 * @hba - per adapter instance
779 */
780static inline void *ufshcd_get_variant(struct ufs_hba *hba)
781{
782 BUG_ON(!hba);
783 return hba->priv;
784}
4e768e76
SJ
785static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
786 struct ufs_hba *hba)
787{
788 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
789}
1ce5898a 790
66ec6d59
SRT
791extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
792extern int ufshcd_runtime_resume(struct ufs_hba *hba);
793extern int ufshcd_runtime_idle(struct ufs_hba *hba);
57d104c1
SJ
794extern int ufshcd_system_suspend(struct ufs_hba *hba);
795extern int ufshcd_system_resume(struct ufs_hba *hba);
796extern int ufshcd_shutdown(struct ufs_hba *hba);
12b4fdb4
SJ
797extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
798 u8 attr_set, u32 mib_val, u8 peer);
799extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
800 u32 *mib_val, u8 peer);
623b5fe3 801extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
802 struct ufs_pa_layer_attr *desired_pwr_mode);
12b4fdb4
SJ
803
804/* UIC command interfaces for DME primitives */
805#define DME_LOCAL 0
806#define DME_PEER 1
807#define ATTR_SET_NOR 0 /* NORMAL */
808#define ATTR_SET_ST 1 /* STATIC */
809
810static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
811 u32 mib_val)
812{
813 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
814 mib_val, DME_LOCAL);
815}
816
817static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
818 u32 mib_val)
819{
820 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
821 mib_val, DME_LOCAL);
822}
823
824static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
825 u32 mib_val)
826{
827 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
828 mib_val, DME_PEER);
829}
830
831static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
832 u32 mib_val)
833{
834 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
835 mib_val, DME_PEER);
836}
837
838static inline int ufshcd_dme_get(struct ufs_hba *hba,
839 u32 attr_sel, u32 *mib_val)
840{
841 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
842}
843
844static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
845 u32 attr_sel, u32 *mib_val)
846{
847 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
848}
849
f37aabcf
YG
850static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
851{
852 return (pwr_info->pwr_rx == FAST_MODE ||
853 pwr_info->pwr_rx == FASTAUTO_MODE) &&
854 (pwr_info->pwr_tx == FAST_MODE ||
855 pwr_info->pwr_tx == FASTAUTO_MODE);
856}
857
dc3c8d3a
YG
858/* Expose Query-Request API */
859int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
860 enum flag_idn idn, bool *flag_res);
1ab27c9c
ST
861int ufshcd_hold(struct ufs_hba *hba, bool async);
862void ufshcd_release(struct ufs_hba *hba);
a4b0e8a4
PM
863
864int ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
865 int *desc_length);
866
37113106 867u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
0263bcd0
YG
868
869/* Wrapper functions for safely calling variant operations */
870static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
871{
872 if (hba->vops)
873 return hba->vops->name;
874 return "";
875}
876
877static inline int ufshcd_vops_init(struct ufs_hba *hba)
878{
879 if (hba->vops && hba->vops->init)
880 return hba->vops->init(hba);
881
882 return 0;
883}
884
885static inline void ufshcd_vops_exit(struct ufs_hba *hba)
886{
887 if (hba->vops && hba->vops->exit)
888 return hba->vops->exit(hba);
889}
890
891static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
892{
893 if (hba->vops && hba->vops->get_ufs_hci_version)
894 return hba->vops->get_ufs_hci_version(hba);
895
896 return ufshcd_readl(hba, REG_UFS_VERSION);
897}
898
f06fcc71
YG
899static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
900 bool up, enum ufs_notify_change_status status)
0263bcd0
YG
901{
902 if (hba->vops && hba->vops->clk_scale_notify)
f06fcc71
YG
903 return hba->vops->clk_scale_notify(hba, up, status);
904 return 0;
0263bcd0
YG
905}
906
1e879e8f
SJ
907static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
908 enum ufs_notify_change_status status)
0263bcd0
YG
909{
910 if (hba->vops && hba->vops->setup_clocks)
1e879e8f 911 return hba->vops->setup_clocks(hba, on, status);
0263bcd0
YG
912 return 0;
913}
914
915static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
916{
917 if (hba->vops && hba->vops->setup_regulators)
918 return hba->vops->setup_regulators(hba, status);
919
920 return 0;
921}
922
923static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
924 bool status)
925{
926 if (hba->vops && hba->vops->hce_enable_notify)
927 return hba->vops->hce_enable_notify(hba, status);
928
929 return 0;
930}
931static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
932 bool status)
933{
934 if (hba->vops && hba->vops->link_startup_notify)
935 return hba->vops->link_startup_notify(hba, status);
936
937 return 0;
938}
939
940static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
941 bool status,
942 struct ufs_pa_layer_attr *dev_max_params,
943 struct ufs_pa_layer_attr *dev_req_params)
944{
945 if (hba->vops && hba->vops->pwr_change_notify)
946 return hba->vops->pwr_change_notify(hba, status,
947 dev_max_params, dev_req_params);
948
949 return -ENOTSUPP;
950}
951
0e675efa
KK
952static inline void ufshcd_vops_setup_xfer_req(struct ufs_hba *hba, int tag,
953 bool is_scsi_cmd)
954{
955 if (hba->vops && hba->vops->setup_xfer_req)
956 return hba->vops->setup_xfer_req(hba, tag, is_scsi_cmd);
957}
958
d2877be4
KK
959static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
960 int tag, u8 tm_function)
961{
962 if (hba->vops && hba->vops->setup_task_mgmt)
963 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
964}
965
ee32c909
KK
966static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
967 enum uic_cmd_dme cmd,
968 enum ufs_notify_change_status status)
969{
970 if (hba->vops && hba->vops->hibern8_notify)
971 return hba->vops->hibern8_notify(hba, cmd, status);
972}
973
56d4a186
SJ
974static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
975{
976 if (hba->vops && hba->vops->apply_dev_quirks)
977 return hba->vops->apply_dev_quirks(hba);
978 return 0;
979}
980
0263bcd0
YG
981static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
982{
983 if (hba->vops && hba->vops->suspend)
984 return hba->vops->suspend(hba, op);
985
986 return 0;
987}
988
989static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
990{
991 if (hba->vops && hba->vops->resume)
992 return hba->vops->resume(hba, op);
993
994 return 0;
995}
996
6e3fd44d
YG
997static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
998{
999 if (hba->vops && hba->vops->dbg_register_dump)
1000 hba->vops->dbg_register_dump(hba);
1001}
1002
8d65d1bb 1003int ufshcd_read_health_desc(struct ufs_hba *hba, u8 *buf, u32 size);
e0eca63e 1004#endif /* End of Header */