[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / sun3_scsi.c

/*
 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
 *
 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
 *
 * Adapted from mac_scsinew.c:
 */
/*
 * Generic Macintosh NCR5380 driver
 *
 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
 *
 * derived in part from:
 */
/*
 * Generic Generic NCR5380 driver
 *
 * Copyright 1995, Russell King
 *
 * ALPHA RELEASE 1.
 *
 * For more information, please consult
 *
 * NCR 5380 Family
 * SCSI Protocol Controller
 * Databook
 *
 * NCR Microelectronics
 * 1635 Aeroplaza Drive
 * Colorado Springs, CO 80916
 * 1+ (719) 578-3400
 * 1+ (800) 334-5454
 */


/*
 * This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :)
 *
 * Options :
 *
 * PARITY - enable parity checking.  Not supported.
 *
 * SCSI2 - enable support for SCSI-II tagged queueing.  Untested.
 *
 * USLEEP - enable support for devices that don't disconnect.  Untested.
 */

/*
 * $Log: sun3_NCR5380.c,v $
 */

#define AUTOSENSE

#include <linux/types.h>
#include <linux/stddef.h>
#include <linux/ctype.h>
#include <linux/delay.h>

#include <linux/module.h>
#include <linux/signal.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/blkdev.h>

#include <asm/io.h>
#include <asm/system.h>

#include <asm/sun3ints.h>
#include <asm/dvma.h>
#include <asm/idprom.h>
#include <asm/machines.h>

#define NDEBUG 0

#define NDEBUG_ABORT		0x00100000
#define NDEBUG_TAGS		0x00200000
#define NDEBUG_MERGING		0x00400000

/* dma on! */
#define REAL_DMA

#include "scsi.h"
#include "initio.h"
#include <scsi/scsi_host.h>
#include "sun3_scsi.h"

static void NCR5380_print(struct Scsi_Host *instance);

/* #define OLDDMA */

#define USE_WRAPPER
/*#define RESET_BOOT */
#define DRIVER_SETUP

/*
 * BUG can be used to trigger a strange code-size related hang on 2.1 kernels
 */
#ifdef BUG
#undef RESET_BOOT
#undef DRIVER_SETUP
#endif

/* #define SUPPORT_TAGS */

#define	ENABLE_IRQ()	enable_irq( IRQ_SUN3_SCSI ); 


static irqreturn_t scsi_sun3_intr(int irq, void *dummy);
static inline unsigned char sun3scsi_read(int reg);
static inline void sun3scsi_write(int reg, int value);

static int setup_can_queue = -1;
module_param(setup_can_queue, int, 0);
static int setup_cmd_per_lun = -1;
module_param(setup_cmd_per_lun, int, 0);
static int setup_sg_tablesize = -1;
module_param(setup_sg_tablesize, int, 0);
#ifdef SUPPORT_TAGS
static int setup_use_tagged_queuing = -1;
module_param(setup_use_tagged_queuing, int, 0);
#endif
static int setup_hostid = -1;
module_param(setup_hostid, int, 0);

static struct scsi_cmnd *sun3_dma_setup_done = NULL;

#define	AFTER_RESET_DELAY	(HZ/2)

/* ms to wait after hitting dma regs */
#define SUN3_DMA_DELAY 10

/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
#define SUN3_DVMA_BUFSIZE 0xe000

/* minimum number of bytes to do dma on */
#define SUN3_DMA_MINSIZE 128

static volatile unsigned char *sun3_scsi_regp;
static volatile struct sun3_dma_regs *dregs;
#ifdef OLDDMA
static unsigned char *dmabuf = NULL; /* dma memory buffer */
#endif
static struct sun3_udc_regs *udc_regs = NULL;
static unsigned char *sun3_dma_orig_addr = NULL;
static unsigned long sun3_dma_orig_count = 0;
static int sun3_dma_active = 0;
static unsigned long last_residual = 0;

/*
 * NCR 5380 register access functions
 */

static inline unsigned char sun3scsi_read(int reg)
{
	return( sun3_scsi_regp[reg] );
}

static inline void sun3scsi_write(int reg, int value)
{
	sun3_scsi_regp[reg] = value;
}

/* dma controller register access functions */

static inline unsigned short sun3_udc_read(unsigned char reg)
{
	unsigned short ret;

	dregs->udc_addr = UDC_CSR;
	udelay(SUN3_DMA_DELAY);
	ret = dregs->udc_data;
	udelay(SUN3_DMA_DELAY);
	
	return ret;
}

static inline void sun3_udc_write(unsigned short val, unsigned char reg)
{
	dregs->udc_addr = reg;
	udelay(SUN3_DMA_DELAY);
	dregs->udc_data = val;
	udelay(SUN3_DMA_DELAY);
}

/*
 * XXX: status debug
 */
static struct Scsi_Host *default_instance;

/*
 * Function : int sun3scsi_detect(struct scsi_host_template * tpnt)
 *
 * Purpose : initializes mac NCR5380 driver based on the
 *	command line / compile time port and irq definitions.
 *
 * Inputs : tpnt - template for this SCSI adapter.
 *
 * Returns : 1 if a host adapter was found, 0 if not.
 *
 */
 
int __init sun3scsi_detect(struct scsi_host_template * tpnt)
{
	unsigned long ioaddr;
	static int called = 0;
	struct Scsi_Host *instance;

	/* check that this machine has an onboard 5380 */
	switch(idprom->id_machtype) {
	case SM_SUN3|SM_3_50:
	case SM_SUN3|SM_3_60:
		break;

	default:
		return 0;
	}

	if(called)
		return 0;

	tpnt->proc_name = "Sun3 5380 SCSI";

	/* setup variables */
	tpnt->can_queue =
		(setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE;
	tpnt->cmd_per_lun =
		(setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN;
	tpnt->sg_tablesize = 
		(setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE;

	if (setup_hostid >= 0)
		tpnt->this_id = setup_hostid;
	else {
		/* use 7 as default */
		tpnt->this_id = 7;
	}

	ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE);
	sun3_scsi_regp = (unsigned char *)ioaddr;

	dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8);

	if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)))
	   == NULL) {
	     printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
	     return 0;
	}
#ifdef OLDDMA
	if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) {
	     printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
	     return 0;
	}
#endif
#ifdef SUPPORT_TAGS
	if (setup_use_tagged_queuing < 0)
		setup_use_tagged_queuing = USE_TAGGED_QUEUING;
#endif

	instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata));
	if(instance == NULL)
		return 0;
		
	default_instance = instance;

        instance->io_port = (unsigned long) ioaddr;
	instance->irq = IRQ_SUN3_SCSI;

	NCR5380_init(instance, 0);

	instance->n_io_port = 32;

        ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0;

	if (request_irq(instance->irq, scsi_sun3_intr,
			     0, "Sun3SCSI-5380", instance)) {
#ifndef REAL_DMA
		printk("scsi%d: IRQ%d not free, interrupts disabled\n",
		       instance->host_no, instance->irq);
		instance->irq = SCSI_IRQ_NONE;
#else
		printk("scsi%d: IRQ%d not free, bailing out\n",
		       instance->host_no, instance->irq);
		return 0;
#endif
	}
	
	printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port);
	if (instance->irq == SCSI_IRQ_NONE)
		printk ("s disabled");
	else
		printk (" %d", instance->irq);
	printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d",
	       instance->can_queue, instance->cmd_per_lun,
	       SUN3SCSI_PUBLIC_RELEASE);
	printk("\nscsi%d:", instance->host_no);
	NCR5380_print_options(instance);
	printk("\n");

	dregs->csr = 0;
	udelay(SUN3_DMA_DELAY);
	dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
	udelay(SUN3_DMA_DELAY);
	dregs->fifo_count = 0;

	called = 1;

#ifdef RESET_BOOT
	sun3_scsi_reset_boot(instance);
#endif

	return 1;
}

int sun3scsi_release (struct Scsi_Host *shpnt)
{
	if (shpnt->irq != SCSI_IRQ_NONE)
		free_irq(shpnt->irq, shpnt);

	iounmap((void *)sun3_scsi_regp);

	NCR5380_exit(shpnt);
	return 0;
}

#ifdef RESET_BOOT
/*
 * Our 'bus reset on boot' function
 */

static void sun3_scsi_reset_boot(struct Scsi_Host *instance)
{
	unsigned long end;

	NCR5380_local_declare();
	NCR5380_setup(instance);
	
	/*
	 * Do a SCSI reset to clean up the bus during initialization. No
	 * messing with the queues, interrupts, or locks necessary here.
	 */

	printk( "Sun3 SCSI: resetting the SCSI bus..." );

	/* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */
//       	sun3_disable_irq( IRQ_SUN3_SCSI );

	/* get in phase */
	NCR5380_write( TARGET_COMMAND_REG,
		      PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) ));

	/* assert RST */
	NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST );

	/* The min. reset hold time is 25us, so 40us should be enough */
	udelay( 50 );

	/* reset RST and interrupt */
	NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE );
	NCR5380_read( RESET_PARITY_INTERRUPT_REG );

	for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); )
		barrier();

	/* switch on SCSI IRQ again */
//       	sun3_enable_irq( IRQ_SUN3_SCSI );

	printk( " done\n" );
}
#endif

const char * sun3scsi_info (struct Scsi_Host *spnt) {
    return "";
}

// safe bits for the CSR
#define CSR_GOOD 0x060f

static irqreturn_t scsi_sun3_intr(int irq, void *dummy)
{
	unsigned short csr = dregs->csr;
	int handled = 0;

	if(csr & ~CSR_GOOD) {
		if(csr & CSR_DMA_BUSERR) {
			printk("scsi%d: bus error in dma\n", default_instance->host_no);
		}

		if(csr & CSR_DMA_CONFLICT) {
			printk("scsi%d: dma conflict\n", default_instance->host_no);
		}
		handled = 1;
	}

	if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
		NCR5380_intr(irq, dummy);
		handled = 1;
	}

	return IRQ_RETVAL(handled);
}

/*
 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk; 
 * reentering NCR5380_print_status seems to have ugly side effects
 */

/* this doesn't seem to get used at all -- sam */
#if 0
void sun3_sun3_debug (void)
{
	unsigned long flags;
	NCR5380_local_declare();

	if (default_instance) {
			local_irq_save(flags);
			NCR5380_print_status(default_instance);
			local_irq_restore(flags);
	}
}
#endif


/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
{
#ifdef OLDDMA
	if(write_flag) 
		memcpy(dmabuf, data, count);
	else {
		sun3_dma_orig_addr = data;
		sun3_dma_orig_count = count;
	}
#else
	void *addr;

	if(sun3_dma_orig_addr != NULL)
		dvma_unmap(sun3_dma_orig_addr);

//	addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf);
	addr = (void *)dvma_map((unsigned long) data, count);
		
	sun3_dma_orig_addr = addr;
	sun3_dma_orig_count = count;
#endif
	dregs->fifo_count = 0;
	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
	
	/* set direction */
	if(write_flag)
		dregs->csr |= CSR_SEND;
	else
		dregs->csr &= ~CSR_SEND;
	
	/* byte count for fifo */
	dregs->fifo_count = count;

	sun3_udc_write(UDC_RESET, UDC_CSR);
	
	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
	
	if(dregs->fifo_count != count) { 
		printk("scsi%d: fifo_mismatch %04x not %04x\n",
		       default_instance->host_no, dregs->fifo_count,
		       (unsigned int) count);
		NCR5380_print(default_instance);
	}

	/* setup udc */
#ifdef OLDDMA
	udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8);
	udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff);
#else
	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
#endif
	udc_regs->count = count/2; /* count in words */
	udc_regs->mode_hi = UDC_MODE_HIWORD;
	if(write_flag) {
		if(count & 1)
			udc_regs->count++;
		udc_regs->mode_lo = UDC_MODE_LSEND;
		udc_regs->rsel = UDC_RSEL_SEND;
	} else {
		udc_regs->mode_lo = UDC_MODE_LRECV;
		udc_regs->rsel = UDC_RSEL_RECV;
	}
	
	/* announce location of regs block */
	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
		       UDC_CHN_HI); 

	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);

	/* set dma master on */
	sun3_udc_write(0xd, UDC_MODE);

	/* interrupt enable */
	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
	
       	return count;

}

static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
{
	unsigned short resid;

	dregs->udc_addr = 0x32; 
	udelay(SUN3_DMA_DELAY);
	resid = dregs->udc_data;
	udelay(SUN3_DMA_DELAY);
	resid *= 2;

	return (unsigned long) resid;
}

static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
{
	return last_residual;
}

static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
						  struct scsi_cmnd *cmd,
						  int write_flag)
{
	if (cmd->request->cmd_type == REQ_TYPE_FS)
 		return wanted;
	else
		return 0;
}

static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
{

    sun3_udc_write(UDC_CHN_START, UDC_CSR);
    
    return 0;
}

/* clean up after our dma is done */
static int sun3scsi_dma_finish(int write_flag)
{
	unsigned short count;
	unsigned short fifo;
	int ret = 0;
	
	sun3_dma_active = 0;
#if 1
	// check to empty the fifo on a read
	if(!write_flag) {
		int tmo = 20000; /* .2 sec */
		
		while(1) {
			if(dregs->csr & CSR_FIFO_EMPTY)
				break;

			if(--tmo <= 0) {
				printk("sun3scsi: fifo failed to empty!\n");
				return 1;
			}
			udelay(10);
		}
	}
		
#endif

	count = sun3scsi_dma_count(default_instance);
#ifdef OLDDMA

	/* if we've finished a read, copy out the data we read */
 	if(sun3_dma_orig_addr) {
		/* check for residual bytes after dma end */
		if(count && (NCR5380_read(BUS_AND_STATUS_REG) &
			     (BASR_PHASE_MATCH | BASR_ACK))) {
			printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no);
			printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG));
			ret = count;
		}
		
		/* copy in what we dma'd no matter what */
		memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count);
		sun3_dma_orig_addr = NULL;

	}
#else

	fifo = dregs->fifo_count;
	last_residual = fifo;

	/* empty bytes from the fifo which didn't make it */
	if((!write_flag) && (count - fifo) == 2) {
		unsigned short data;
		unsigned char *vaddr;

		data = dregs->fifo_data;
		vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
		
		vaddr += (sun3_dma_orig_count - fifo);

		vaddr[-2] = (data & 0xff00) >> 8;
		vaddr[-1] = (data & 0xff);
	}

	dvma_unmap(sun3_dma_orig_addr);
	sun3_dma_orig_addr = NULL;
#endif
	sun3_udc_write(UDC_RESET, UDC_CSR);
	dregs->fifo_count = 0;
	dregs->csr &= ~CSR_SEND;

	/* reset fifo */
	dregs->csr &= ~CSR_FIFO;
	dregs->csr |= CSR_FIFO;
	
	sun3_dma_setup_done = NULL;

	return ret;

}
	
#include "sun3_NCR5380.c"

static struct scsi_host_template driver_template = {
	.name			= SUN3_SCSI_NAME,
	.detect			= sun3scsi_detect,
	.release		= sun3scsi_release,
	.info			= sun3scsi_info,
	.queuecommand		= sun3scsi_queue_command,
	.eh_abort_handler      	= sun3scsi_abort,
	.eh_bus_reset_handler  	= sun3scsi_bus_reset,
	.can_queue		= CAN_QUEUE,
	.this_id		= 7,
	.sg_tablesize		= SG_TABLESIZE,
	.cmd_per_lun		= CMD_PER_LUN,
	.use_clustering		= DISABLE_CLUSTERING
};


#include "scsi_module.c"

MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
	3	*
	4	* Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
	5	*
	6	* Adapted from mac_scsinew.c:
	7	*/
	8	/*
	9	* Generic Macintosh NCR5380 driver
	10	*
	11	* Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
	12	*
	13	* derived in part from:
	14	*/
	15	/*
	16	* Generic Generic NCR5380 driver
	17	*
	18	* Copyright 1995, Russell King
	19	*
	20	* ALPHA RELEASE 1.
	21	*
	22	* For more information, please consult
	23	*
	24	* NCR 5380 Family
	25	* SCSI Protocol Controller
	26	* Databook
	27	*
	28	* NCR Microelectronics
	29	* 1635 Aeroplaza Drive
	30	* Colorado Springs, CO 80916
	31	* 1+ (719) 578-3400
	32	* 1+ (800) 334-5454
	33	*/
	34
	35
	36	/*
	37	* This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :)
	38	*
	39	* Options :
	40	*
	41	* PARITY - enable parity checking. Not supported.
	42	*
	43	* SCSI2 - enable support for SCSI-II tagged queueing. Untested.
	44	*
	45	* USLEEP - enable support for devices that don't disconnect. Untested.
	46	*/
	47
	48	/*
	49	* $Log: sun3_NCR5380.c,v $
	50	*/
	51
	52	#define AUTOSENSE
	53
	54	#include <linux/types.h>
	55	#include <linux/stddef.h>
	56	#include <linux/ctype.h>
	57	#include <linux/delay.h>
	58
	59	#include <linux/module.h>
	60	#include <linux/signal.h>
1da177e4 LT	61	#include <linux/ioport.h>
	62	#include <linux/init.h>
	63	#include <linux/blkdev.h>
	64
	65	#include <asm/io.h>
	66	#include <asm/system.h>
	67
	68	#include <asm/sun3ints.h>
	69	#include <asm/dvma.h>
	70	#include <asm/idprom.h>
	71	#include <asm/machines.h>
	72
2ba51ea2 GU	73	#define NDEBUG 0
	74
	75	#define NDEBUG_ABORT 0x00100000
	76	#define NDEBUG_TAGS 0x00200000
	77	#define NDEBUG_MERGING 0x00400000
	78
1da177e4 LT	79	/* dma on! */
	80	#define REAL_DMA
	81
	82	#include "scsi.h"
c39e7eee	83	#include "initio.h"
1da177e4 LT	84	#include <scsi/scsi_host.h>
1da177e4 LT	85	#include "sun3_scsi.h"
1da177e4 LT	86
	87	static void NCR5380_print(struct Scsi_Host *instance);
	88
	89	/* #define OLDDMA */
	90
	91	#define USE_WRAPPER
	92	/#define RESET_BOOT /
	93	#define DRIVER_SETUP
	94
1da177e4 LT	95	/*
	96	* BUG can be used to trigger a strange code-size related hang on 2.1 kernels
	97	*/
	98	#ifdef BUG
	99	#undef RESET_BOOT
	100	#undef DRIVER_SETUP
	101	#endif
	102
	103	/* #define SUPPORT_TAGS */
	104
	105	#define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI );
	106
	107
7d12e780	108	static irqreturn_t scsi_sun3_intr(int irq, void *dummy);
1da177e4 LT	109	static inline unsigned char sun3scsi_read(int reg);
	110	static inline void sun3scsi_write(int reg, int value);
	111
	112	static int setup_can_queue = -1;
	113	module_param(setup_can_queue, int, 0);
	114	static int setup_cmd_per_lun = -1;
	115	module_param(setup_cmd_per_lun, int, 0);
	116	static int setup_sg_tablesize = -1;
	117	module_param(setup_sg_tablesize, int, 0);
	118	#ifdef SUPPORT_TAGS
	119	static int setup_use_tagged_queuing = -1;
	120	module_param(setup_use_tagged_queuing, int, 0);
	121	#endif
	122	static int setup_hostid = -1;
	123	module_param(setup_hostid, int, 0);
	124
811c9366	125	static struct scsi_cmnd *sun3_dma_setup_done = NULL;
1da177e4 LT	126
	127	#define AFTER_RESET_DELAY (HZ/2)
	128
	129	/* ms to wait after hitting dma regs */
	130	#define SUN3_DMA_DELAY 10
	131
	132	/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
	133	#define SUN3_DVMA_BUFSIZE 0xe000
	134
	135	/* minimum number of bytes to do dma on */
	136	#define SUN3_DMA_MINSIZE 128
	137
	138	static volatile unsigned char *sun3_scsi_regp;
	139	static volatile struct sun3_dma_regs *dregs;
	140	#ifdef OLDDMA
	141	static unsigned char dmabuf = NULL; / dma memory buffer */
	142	#endif
	143	static struct sun3_udc_regs *udc_regs = NULL;
	144	static unsigned char *sun3_dma_orig_addr = NULL;
	145	static unsigned long sun3_dma_orig_count = 0;
	146	static int sun3_dma_active = 0;
	147	static unsigned long last_residual = 0;
	148
	149	/*
	150	* NCR 5380 register access functions
	151	*/
	152
	153	static inline unsigned char sun3scsi_read(int reg)
	154	{
	155	return( sun3_scsi_regp[reg] );
	156	}
	157
	158	static inline void sun3scsi_write(int reg, int value)
	159	{
	160	sun3_scsi_regp[reg] = value;
	161	}
	162
	163	/* dma controller register access functions */
	164
	165	static inline unsigned short sun3_udc_read(unsigned char reg)
	166	{
	167	unsigned short ret;
	168
	169	dregs->udc_addr = UDC_CSR;
	170	udelay(SUN3_DMA_DELAY);
	171	ret = dregs->udc_data;
	172	udelay(SUN3_DMA_DELAY);
	173
	174	return ret;
	175	}
	176
	177	static inline void sun3_udc_write(unsigned short val, unsigned char reg)
	178	{
	179	dregs->udc_addr = reg;
	180	udelay(SUN3_DMA_DELAY);
	181	dregs->udc_data = val;
	182	udelay(SUN3_DMA_DELAY);
	183	}
	184
	185	/*
	186	* XXX: status debug
	187	*/
	188	static struct Scsi_Host *default_instance;
	189
190	/*
d0be4a7d	191	* Function : int sun3scsi_detect(struct scsi_host_template * tpnt)
1da177e4 LT	192	*
	193	* Purpose : initializes mac NCR5380 driver based on the
	194	* command line / compile time port and irq definitions.
	195	*
	196	* Inputs : tpnt - template for this SCSI adapter.
	197	*
	198	* Returns : 1 if a host adapter was found, 0 if not.
	199	*
	200	*/
	201
d559c49e	202	int __init sun3scsi_detect(struct scsi_host_template * tpnt)
1da177e4 LT	203	{
	204	unsigned long ioaddr;
	205	static int called = 0;
	206	struct Scsi_Host *instance;
	207
	208	/* check that this machine has an onboard 5380 */
	209	switch(idprom->id_machtype) {
	210	case SM_SUN3\|SM_3_50:
	211	case SM_SUN3\|SM_3_60:
	212	break;
	213
	214	default:
	215	return 0;
	216	}
	217
	218	if(called)
	219	return 0;
	220
	221	tpnt->proc_name = "Sun3 5380 SCSI";
	222
	223	/* setup variables */
	224	tpnt->can_queue =
	225	(setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE;
	226	tpnt->cmd_per_lun =
	227	(setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN;
	228	tpnt->sg_tablesize =
	229	(setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE;
	230
	231	if (setup_hostid >= 0)
	232	tpnt->this_id = setup_hostid;
	233	else {
	234	/* use 7 as default */
	235	tpnt->this_id = 7;
	236	}
	237
	238	ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE);
	239	sun3_scsi_regp = (unsigned char *)ioaddr;
	240
	241	dregs = (struct sun3_dma_regs )(((unsigned char )ioaddr) + 8);
	242
	243	if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)))
	244	== NULL) {
	245	printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
	246	return 0;
	247	}
	248	#ifdef OLDDMA
	249	if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) {
	250	printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
	251	return 0;
	252	}
	253	#endif
	254	#ifdef SUPPORT_TAGS
	255	if (setup_use_tagged_queuing < 0)
	256	setup_use_tagged_queuing = USE_TAGGED_QUEUING;
	257	#endif
	258
	259	instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata));
	260	if(instance == NULL)
	261	return 0;
	262
	263	default_instance = instance;
	264
	265	instance->io_port = (unsigned long) ioaddr;
	266	instance->irq = IRQ_SUN3_SCSI;
267
268	NCR5380_init(instance, 0);
269
270	instance->n_io_port = 32;
271
272	((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0;
273
274	if (request_irq(instance->irq, scsi_sun3_intr,
1e641664	275	0, "Sun3SCSI-5380", instance)) {
1da177e4 LT	276	#ifndef REAL_DMA
	277	printk("scsi%d: IRQ%d not free, interrupts disabled\n",
	278	instance->host_no, instance->irq);
	279	instance->irq = SCSI_IRQ_NONE;
	280	#else
	281	printk("scsi%d: IRQ%d not free, bailing out\n",
	282	instance->host_no, instance->irq);
	283	return 0;
	284	#endif
	285	}
	286
	287	printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port);
	288	if (instance->irq == SCSI_IRQ_NONE)
	289	printk ("s disabled");
	290	else
	291	printk (" %d", instance->irq);
	292	printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d",
	293	instance->can_queue, instance->cmd_per_lun,
	294	SUN3SCSI_PUBLIC_RELEASE);
	295	printk("\nscsi%d:", instance->host_no);
	296	NCR5380_print_options(instance);
	297	printk("\n");
	298
	299	dregs->csr = 0;
	300	udelay(SUN3_DMA_DELAY);
	301	dregs->csr = CSR_SCSI \| CSR_FIFO \| CSR_INTR;
	302	udelay(SUN3_DMA_DELAY);
	303	dregs->fifo_count = 0;
	304
	305	called = 1;
	306
	307	#ifdef RESET_BOOT
	308	sun3_scsi_reset_boot(instance);
	309	#endif
	310
	311	return 1;
	312	}
	313
	314	int sun3scsi_release (struct Scsi_Host *shpnt)
	315	{
	316	if (shpnt->irq != SCSI_IRQ_NONE)
1e641664	317	free_irq(shpnt->irq, shpnt);
1da177e4 LT	318
	319	iounmap((void *)sun3_scsi_regp);
	320
19b6c51c	321	NCR5380_exit(shpnt);
1da177e4 LT	322	return 0;
	323	}
	324
	325	#ifdef RESET_BOOT
	326	/*
	327	* Our 'bus reset on boot' function
	328	*/
	329
	330	static void sun3_scsi_reset_boot(struct Scsi_Host *instance)
	331	{
	332	unsigned long end;
	333
	334	NCR5380_local_declare();
	335	NCR5380_setup(instance);
	336
	337	/*
	338	* Do a SCSI reset to clean up the bus during initialization. No
	339	* messing with the queues, interrupts, or locks necessary here.
	340	*/
	341
	342	printk( "Sun3 SCSI: resetting the SCSI bus..." );
	343
	344	/* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */
	345	// sun3_disable_irq( IRQ_SUN3_SCSI );
	346
	347	/* get in phase */
	348	NCR5380_write( TARGET_COMMAND_REG,
	349	PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) ));
	350
	351	/* assert RST */
	352	NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE \| ICR_ASSERT_RST );
	353
	354	/* The min. reset hold time is 25us, so 40us should be enough */
	355	udelay( 50 );
	356
	357	/* reset RST and interrupt */
	358	NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE );
	359	NCR5380_read( RESET_PARITY_INTERRUPT_REG );
	360
	361	for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); )
	362	barrier();
	363
	364	/* switch on SCSI IRQ again */
	365	// sun3_enable_irq( IRQ_SUN3_SCSI );
	366
	367	printk( " done\n" );
	368	}
	369	#endif
	370
	371	const char * sun3scsi_info (struct Scsi_Host *spnt) {
	372	return "";
	373	}
	374
	375	// safe bits for the CSR
	376	#define CSR_GOOD 0x060f
	377
7d12e780	378	static irqreturn_t scsi_sun3_intr(int irq, void *dummy)
1da177e4 LT	379	{
	380	unsigned short csr = dregs->csr;
	381	int handled = 0;
	382
	383	if(csr & ~CSR_GOOD) {
	384	if(csr & CSR_DMA_BUSERR) {
	385	printk("scsi%d: bus error in dma\n", default_instance->host_no);
	386	}
	387
	388	if(csr & CSR_DMA_CONFLICT) {
	389	printk("scsi%d: dma conflict\n", default_instance->host_no);
	390	}
	391	handled = 1;
	392	}
	393
	394	if(csr & (CSR_SDB_INT \| CSR_DMA_INT)) {
7d12e780	395	NCR5380_intr(irq, dummy);
1da177e4 LT	396	handled = 1;
	397	}
	398
	399	return IRQ_RETVAL(handled);
	400	}
	401
	402	/*
	403	* Debug stuff - to be called on NMI, or sysrq key. Use at your own risk;
	404	* reentering NCR5380_print_status seems to have ugly side effects
	405	*/
	406
	407	/* this doesn't seem to get used at all -- sam */
	408	#if 0
	409	void sun3_sun3_debug (void)
	410	{
	411	unsigned long flags;
	412	NCR5380_local_declare();
	413
	414	if (default_instance) {
	415	local_irq_save(flags);
	416	NCR5380_print_status(default_instance);
	417	local_irq_restore(flags);
	418	}
	419	}
	420	#endif
	421
	422
	423	/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
	424	static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
	425	{
	426	#ifdef OLDDMA
	427	if(write_flag)
	428	memcpy(dmabuf, data, count);
	429	else {
	430	sun3_dma_orig_addr = data;
	431	sun3_dma_orig_count = count;
	432	}
	433	#else
	434	void *addr;
	435
	436	if(sun3_dma_orig_addr != NULL)
	437	dvma_unmap(sun3_dma_orig_addr);
	438
	439	// addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf);
	440	addr = (void *)dvma_map((unsigned long) data, count);
	441
	442	sun3_dma_orig_addr = addr;
	443	sun3_dma_orig_count = count;
	444	#endif
	445	dregs->fifo_count = 0;
	446	sun3_udc_write(UDC_RESET, UDC_CSR);
	447
	448	/* reset fifo */
	449	dregs->csr &= ~CSR_FIFO;
	450	dregs->csr \|= CSR_FIFO;
	451
	452	/* set direction */
	453	if(write_flag)
	454	dregs->csr \|= CSR_SEND;
	455	else
	456	dregs->csr &= ~CSR_SEND;
	457
	458	/* byte count for fifo */
	459	dregs->fifo_count = count;
460
461	sun3_udc_write(UDC_RESET, UDC_CSR);
462
463	/* reset fifo */
464	dregs->csr &= ~CSR_FIFO;
465	dregs->csr \|= CSR_FIFO;
466
467	if(dregs->fifo_count != count) {
468	printk("scsi%d: fifo_mismatch %04x not %04x\n",
469	default_instance->host_no, dregs->fifo_count,
470	(unsigned int) count);
471	NCR5380_print(default_instance);
472	}
473
474	/* setup udc */
475	#ifdef OLDDMA
476	udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8);
477	udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff);
478	#else
479	udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
480	udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
481	#endif
482	udc_regs->count = count/2; /* count in words */
483	udc_regs->mode_hi = UDC_MODE_HIWORD;
484	if(write_flag) {
485	if(count & 1)
486	udc_regs->count++;
487	udc_regs->mode_lo = UDC_MODE_LSEND;
488	udc_regs->rsel = UDC_RSEL_SEND;
489	} else {
490	udc_regs->mode_lo = UDC_MODE_LRECV;
491	udc_regs->rsel = UDC_RSEL_RECV;
492	}
493
494	/* announce location of regs block */
495	sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
496	UDC_CHN_HI);
497
498	sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
499
500	/* set dma master on */
501	sun3_udc_write(0xd, UDC_MODE);
502
503	/* interrupt enable */
504	sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
505
506	return count;
507
508	}
509
510	static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
511	{
512	unsigned short resid;
513
514	dregs->udc_addr = 0x32;
515	udelay(SUN3_DMA_DELAY);
516	resid = dregs->udc_data;
517	udelay(SUN3_DMA_DELAY);
518	resid *= 2;
519
520	return (unsigned long) resid;
521	}
522
523	static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
524	{
525	return last_residual;
526	}
527
811c9366 HK	528	static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
	529	struct scsi_cmnd *cmd,
	530	int write_flag)
1da177e4	531	{
33659ebb	532	if (cmd->request->cmd_type == REQ_TYPE_FS)
1da177e4 LT	533	return wanted;
	534	else
	535	return 0;
	536	}
	537
	538	static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
	539	{
	540
	541	sun3_udc_write(UDC_CHN_START, UDC_CSR);
	542
	543	return 0;
	544	}
	545
	546	/* clean up after our dma is done */
	547	static int sun3scsi_dma_finish(int write_flag)
	548	{
	549	unsigned short count;
	550	unsigned short fifo;
	551	int ret = 0;
	552
	553	sun3_dma_active = 0;
	554	#if 1
	555	// check to empty the fifo on a read
	556	if(!write_flag) {
	557	int tmo = 20000; /* .2 sec */
	558
	559	while(1) {
	560	if(dregs->csr & CSR_FIFO_EMPTY)
	561	break;
	562
	563	if(--tmo <= 0) {
	564	printk("sun3scsi: fifo failed to empty!\n");
	565	return 1;
	566	}
	567	udelay(10);
	568	}
	569	}
	570
	571	#endif
	572
	573	count = sun3scsi_dma_count(default_instance);
	574	#ifdef OLDDMA
	575
	576	/* if we've finished a read, copy out the data we read */
	577	if(sun3_dma_orig_addr) {
	578	/* check for residual bytes after dma end */
	579	if(count && (NCR5380_read(BUS_AND_STATUS_REG) &
	580	(BASR_PHASE_MATCH \| BASR_ACK))) {
	581	printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no);
	582	printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG));
	583	ret = count;
	584	}
	585
	586	/* copy in what we dma'd no matter what */
	587	memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count);
	588	sun3_dma_orig_addr = NULL;
	589
	590	}
	591	#else
	592
	593	fifo = dregs->fifo_count;
	594	last_residual = fifo;
	595
	596	/* empty bytes from the fifo which didn't make it */
597	if((!write_flag) && (count - fifo) == 2) {
598	unsigned short data;
599	unsigned char *vaddr;
600
601	data = dregs->fifo_data;
602	vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
603
604	vaddr += (sun3_dma_orig_count - fifo);
605
606	vaddr[-2] = (data & 0xff00) >> 8;
607	vaddr[-1] = (data & 0xff);
608	}
609
610	dvma_unmap(sun3_dma_orig_addr);
611	sun3_dma_orig_addr = NULL;
612	#endif
613	sun3_udc_write(UDC_RESET, UDC_CSR);
614	dregs->fifo_count = 0;
615	dregs->csr &= ~CSR_SEND;
616
617	/* reset fifo */
618	dregs->csr &= ~CSR_FIFO;
619	dregs->csr \|= CSR_FIFO;
620
621	sun3_dma_setup_done = NULL;
622
623	return ret;
624
625	}
626
627	#include "sun3_NCR5380.c"
628
d0be4a7d	629	static struct scsi_host_template driver_template = {
1da177e4 LT	630	.name = SUN3_SCSI_NAME,
	631	.detect = sun3scsi_detect,
	632	.release = sun3scsi_release,
	633	.info = sun3scsi_info,
	634	.queuecommand = sun3scsi_queue_command,
	635	.eh_abort_handler = sun3scsi_abort,
	636	.eh_bus_reset_handler = sun3scsi_bus_reset,
	637	.can_queue = CAN_QUEUE,
	638	.this_id = 7,
	639	.sg_tablesize = SG_TABLESIZE,
	640	.cmd_per_lun = CMD_PER_LUN,
	641	.use_clustering = DISABLE_CLUSTERING
	642	};
	643
	644
	645	#include "scsi_module.c"
	646
	647	MODULE_LICENSE("GPL");