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1da177e4 LT |
1 | /* |
2 | * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver | |
3 | * Copyright (C) 2001, 2002, 2003 | |
4 | * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp> | |
5 | * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2, or (at your option) | |
10 | * any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * | |
18 | * Revision History: | |
19 | * 1.0: Initial Release. | |
20 | * 1.1: Add /proc SDTR status. | |
21 | * Remove obsolete error handler nsp32_reset. | |
22 | * Some clean up. | |
23 | * 1.2: PowerPC (big endian) support. | |
24 | */ | |
25 | ||
26 | #include <linux/version.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/init.h> | |
29 | #include <linux/kernel.h> | |
1da177e4 LT |
30 | #include <linux/slab.h> |
31 | #include <linux/string.h> | |
32 | #include <linux/timer.h> | |
33 | #include <linux/ioport.h> | |
34 | #include <linux/major.h> | |
35 | #include <linux/blkdev.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/ctype.h> | |
910638ae | 40 | #include <linux/dma-mapping.h> |
1da177e4 LT |
41 | |
42 | #include <asm/dma.h> | |
43 | #include <asm/system.h> | |
44 | #include <asm/io.h> | |
45 | ||
46 | #include <scsi/scsi.h> | |
47 | #include <scsi/scsi_cmnd.h> | |
48 | #include <scsi/scsi_device.h> | |
49 | #include <scsi/scsi_host.h> | |
50 | #include <scsi/scsi_ioctl.h> | |
51 | ||
1da177e4 LT |
52 | #include "nsp32.h" |
53 | ||
54 | ||
55 | /*********************************************************************** | |
56 | * Module parameters | |
57 | */ | |
58 | static int trans_mode = 0; /* default: BIOS */ | |
59 | module_param (trans_mode, int, 0); | |
60 | MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M"); | |
61 | #define ASYNC_MODE 1 | |
62 | #define ULTRA20M_MODE 2 | |
63 | ||
64 | static int auto_param = 0; /* default: ON */ | |
65 | module_param (auto_param, bool, 0); | |
66 | MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)"); | |
67 | ||
68 | static int disc_priv = 1; /* default: OFF */ | |
69 | module_param (disc_priv, bool, 0); | |
70 | MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))"); | |
71 | ||
72 | MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>"); | |
73 | MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module"); | |
74 | MODULE_LICENSE("GPL"); | |
75 | ||
76 | static const char *nsp32_release_version = "1.2"; | |
77 | ||
78 | ||
79 | /**************************************************************************** | |
80 | * Supported hardware | |
81 | */ | |
82 | static struct pci_device_id nsp32_pci_table[] __devinitdata = { | |
83 | { | |
84 | .vendor = PCI_VENDOR_ID_IODATA, | |
85 | .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II, | |
86 | .subvendor = PCI_ANY_ID, | |
87 | .subdevice = PCI_ANY_ID, | |
88 | .driver_data = MODEL_IODATA, | |
89 | }, | |
90 | { | |
91 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
92 | .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME, | |
93 | .subvendor = PCI_ANY_ID, | |
94 | .subdevice = PCI_ANY_ID, | |
95 | .driver_data = MODEL_KME, | |
96 | }, | |
97 | { | |
98 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
99 | .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT, | |
100 | .subvendor = PCI_ANY_ID, | |
101 | .subdevice = PCI_ANY_ID, | |
102 | .driver_data = MODEL_WORKBIT, | |
103 | }, | |
104 | { | |
105 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
106 | .device = PCI_DEVICE_ID_WORKBIT_STANDARD, | |
107 | .subvendor = PCI_ANY_ID, | |
108 | .subdevice = PCI_ANY_ID, | |
109 | .driver_data = MODEL_PCI_WORKBIT, | |
110 | }, | |
111 | { | |
112 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
113 | .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC, | |
114 | .subvendor = PCI_ANY_ID, | |
115 | .subdevice = PCI_ANY_ID, | |
116 | .driver_data = MODEL_LOGITEC, | |
117 | }, | |
118 | { | |
119 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
120 | .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC, | |
121 | .subvendor = PCI_ANY_ID, | |
122 | .subdevice = PCI_ANY_ID, | |
123 | .driver_data = MODEL_PCI_LOGITEC, | |
124 | }, | |
125 | { | |
126 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
127 | .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO, | |
128 | .subvendor = PCI_ANY_ID, | |
129 | .subdevice = PCI_ANY_ID, | |
130 | .driver_data = MODEL_PCI_MELCO, | |
131 | }, | |
132 | { | |
133 | .vendor = PCI_VENDOR_ID_WORKBIT, | |
134 | .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II, | |
135 | .subvendor = PCI_ANY_ID, | |
136 | .subdevice = PCI_ANY_ID, | |
137 | .driver_data = MODEL_PCI_MELCO, | |
138 | }, | |
139 | {0,0,}, | |
140 | }; | |
141 | MODULE_DEVICE_TABLE(pci, nsp32_pci_table); | |
142 | ||
143 | static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */ | |
144 | ||
145 | ||
146 | /* | |
147 | * Period/AckWidth speed conversion table | |
148 | * | |
149 | * Note: This period/ackwidth speed table must be in descending order. | |
150 | */ | |
151 | static nsp32_sync_table nsp32_sync_table_40M[] = { | |
152 | /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */ | |
153 | {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */ | |
154 | {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */ | |
155 | {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ | |
156 | {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */ | |
157 | {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */ | |
158 | {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */ | |
159 | {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ | |
160 | {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */ | |
161 | {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ | |
162 | }; | |
163 | ||
164 | static nsp32_sync_table nsp32_sync_table_20M[] = { | |
165 | {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ | |
166 | {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */ | |
167 | {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ | |
168 | {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ | |
169 | {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */ | |
170 | {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */ | |
171 | {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */ | |
172 | {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */ | |
173 | {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */ | |
174 | }; | |
175 | ||
176 | static nsp32_sync_table nsp32_sync_table_pci[] = { | |
177 | {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */ | |
178 | {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */ | |
179 | {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */ | |
180 | {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */ | |
181 | {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */ | |
182 | {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */ | |
183 | {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */ | |
184 | {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */ | |
185 | {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */ | |
186 | }; | |
187 | ||
188 | /* | |
189 | * function declaration | |
190 | */ | |
191 | /* module entry point */ | |
192 | static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *); | |
193 | static void __devexit nsp32_remove(struct pci_dev *); | |
194 | static int __init init_nsp32 (void); | |
195 | static void __exit exit_nsp32 (void); | |
196 | ||
d0be4a7d | 197 | /* struct struct scsi_host_template */ |
1da177e4 | 198 | static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int); |
1da177e4 | 199 | |
1da177e4 | 200 | static int nsp32_detect (struct pci_dev *pdev); |
1da177e4 LT |
201 | static int nsp32_queuecommand(struct scsi_cmnd *, |
202 | void (*done)(struct scsi_cmnd *)); | |
203 | static const char *nsp32_info (struct Scsi_Host *); | |
204 | static int nsp32_release (struct Scsi_Host *); | |
205 | ||
206 | /* SCSI error handler */ | |
207 | static int nsp32_eh_abort (struct scsi_cmnd *); | |
208 | static int nsp32_eh_bus_reset (struct scsi_cmnd *); | |
209 | static int nsp32_eh_host_reset(struct scsi_cmnd *); | |
210 | ||
211 | /* generate SCSI message */ | |
212 | static void nsp32_build_identify(struct scsi_cmnd *); | |
213 | static void nsp32_build_nop (struct scsi_cmnd *); | |
214 | static void nsp32_build_reject (struct scsi_cmnd *); | |
215 | static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char); | |
216 | ||
217 | /* SCSI message handler */ | |
218 | static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short); | |
219 | static void nsp32_msgout_occur (struct scsi_cmnd *); | |
220 | static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short); | |
221 | ||
222 | static int nsp32_setup_sg_table (struct scsi_cmnd *); | |
223 | static int nsp32_selection_autopara(struct scsi_cmnd *); | |
224 | static int nsp32_selection_autoscsi(struct scsi_cmnd *); | |
225 | static void nsp32_scsi_done (struct scsi_cmnd *); | |
226 | static int nsp32_arbitration (struct scsi_cmnd *, unsigned int); | |
227 | static int nsp32_reselection (struct scsi_cmnd *, unsigned char); | |
228 | static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int); | |
229 | static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short); | |
230 | ||
231 | /* SCSI SDTR */ | |
232 | static void nsp32_analyze_sdtr (struct scsi_cmnd *); | |
233 | static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char); | |
234 | static void nsp32_set_async (nsp32_hw_data *, nsp32_target *); | |
235 | static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *); | |
236 | static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char); | |
237 | ||
238 | /* SCSI bus status handler */ | |
239 | static void nsp32_wait_req (nsp32_hw_data *, int); | |
240 | static void nsp32_wait_sack (nsp32_hw_data *, int); | |
241 | static void nsp32_sack_assert (nsp32_hw_data *); | |
242 | static void nsp32_sack_negate (nsp32_hw_data *); | |
243 | static void nsp32_do_bus_reset(nsp32_hw_data *); | |
244 | ||
245 | /* hardware interrupt handler */ | |
7d12e780 | 246 | static irqreturn_t do_nsp32_isr(int, void *); |
1da177e4 LT |
247 | |
248 | /* initialize hardware */ | |
249 | static int nsp32hw_init(nsp32_hw_data *); | |
250 | ||
251 | /* EEPROM handler */ | |
252 | static int nsp32_getprom_param (nsp32_hw_data *); | |
253 | static int nsp32_getprom_at24 (nsp32_hw_data *); | |
254 | static int nsp32_getprom_c16 (nsp32_hw_data *); | |
255 | static void nsp32_prom_start (nsp32_hw_data *); | |
256 | static void nsp32_prom_stop (nsp32_hw_data *); | |
257 | static int nsp32_prom_read (nsp32_hw_data *, int); | |
258 | static int nsp32_prom_read_bit (nsp32_hw_data *); | |
259 | static void nsp32_prom_write_bit(nsp32_hw_data *, int); | |
260 | static void nsp32_prom_set (nsp32_hw_data *, int, int); | |
261 | static int nsp32_prom_get (nsp32_hw_data *, int); | |
262 | ||
263 | /* debug/warning/info message */ | |
264 | static void nsp32_message (const char *, int, char *, char *, ...); | |
265 | #ifdef NSP32_DEBUG | |
266 | static void nsp32_dmessage(const char *, int, int, char *, ...); | |
267 | #endif | |
268 | ||
269 | /* | |
270 | * max_sectors is currently limited up to 128. | |
271 | */ | |
272 | static struct scsi_host_template nsp32_template = { | |
273 | .proc_name = "nsp32", | |
274 | .name = "Workbit NinjaSCSI-32Bi/UDE", | |
275 | .proc_info = nsp32_proc_info, | |
276 | .info = nsp32_info, | |
277 | .queuecommand = nsp32_queuecommand, | |
278 | .can_queue = 1, | |
279 | .sg_tablesize = NSP32_SG_SIZE, | |
280 | .max_sectors = 128, | |
281 | .cmd_per_lun = 1, | |
282 | .this_id = NSP32_HOST_SCSIID, | |
283 | .use_clustering = DISABLE_CLUSTERING, | |
284 | .eh_abort_handler = nsp32_eh_abort, | |
1da177e4 LT |
285 | .eh_bus_reset_handler = nsp32_eh_bus_reset, |
286 | .eh_host_reset_handler = nsp32_eh_host_reset, | |
1da177e4 | 287 | /* .highmem_io = 1, */ |
1da177e4 LT |
288 | }; |
289 | ||
290 | #include "nsp32_io.h" | |
291 | ||
292 | /*********************************************************************** | |
293 | * debug, error print | |
294 | */ | |
295 | #ifndef NSP32_DEBUG | |
296 | # define NSP32_DEBUG_MASK 0x000000 | |
297 | # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args) | |
298 | # define nsp32_dbg(mask, args...) /* */ | |
299 | #else | |
300 | # define NSP32_DEBUG_MASK 0xffffff | |
301 | # define nsp32_msg(type, args...) \ | |
302 | nsp32_message (__FUNCTION__, __LINE__, (type), args) | |
303 | # define nsp32_dbg(mask, args...) \ | |
304 | nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args) | |
305 | #endif | |
306 | ||
307 | #define NSP32_DEBUG_QUEUECOMMAND BIT(0) | |
308 | #define NSP32_DEBUG_REGISTER BIT(1) | |
309 | #define NSP32_DEBUG_AUTOSCSI BIT(2) | |
310 | #define NSP32_DEBUG_INTR BIT(3) | |
311 | #define NSP32_DEBUG_SGLIST BIT(4) | |
312 | #define NSP32_DEBUG_BUSFREE BIT(5) | |
313 | #define NSP32_DEBUG_CDB_CONTENTS BIT(6) | |
314 | #define NSP32_DEBUG_RESELECTION BIT(7) | |
315 | #define NSP32_DEBUG_MSGINOCCUR BIT(8) | |
316 | #define NSP32_DEBUG_EEPROM BIT(9) | |
317 | #define NSP32_DEBUG_MSGOUTOCCUR BIT(10) | |
318 | #define NSP32_DEBUG_BUSRESET BIT(11) | |
319 | #define NSP32_DEBUG_RESTART BIT(12) | |
320 | #define NSP32_DEBUG_SYNC BIT(13) | |
321 | #define NSP32_DEBUG_WAIT BIT(14) | |
322 | #define NSP32_DEBUG_TARGETFLAG BIT(15) | |
323 | #define NSP32_DEBUG_PROC BIT(16) | |
324 | #define NSP32_DEBUG_INIT BIT(17) | |
325 | #define NSP32_SPECIAL_PRINT_REGISTER BIT(20) | |
326 | ||
327 | #define NSP32_DEBUG_BUF_LEN 100 | |
328 | ||
329 | static void nsp32_message(const char *func, int line, char *type, char *fmt, ...) | |
330 | { | |
331 | va_list args; | |
332 | char buf[NSP32_DEBUG_BUF_LEN]; | |
333 | ||
334 | va_start(args, fmt); | |
335 | vsnprintf(buf, sizeof(buf), fmt, args); | |
336 | va_end(args); | |
337 | ||
338 | #ifndef NSP32_DEBUG | |
339 | printk("%snsp32: %s\n", type, buf); | |
340 | #else | |
341 | printk("%snsp32: %s (%d): %s\n", type, func, line, buf); | |
342 | #endif | |
343 | } | |
344 | ||
345 | #ifdef NSP32_DEBUG | |
346 | static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...) | |
347 | { | |
348 | va_list args; | |
349 | char buf[NSP32_DEBUG_BUF_LEN]; | |
350 | ||
351 | va_start(args, fmt); | |
352 | vsnprintf(buf, sizeof(buf), fmt, args); | |
353 | va_end(args); | |
354 | ||
355 | if (mask & NSP32_DEBUG_MASK) { | |
356 | printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf); | |
357 | } | |
358 | } | |
359 | #endif | |
360 | ||
361 | #ifdef NSP32_DEBUG | |
362 | # include "nsp32_debug.c" | |
363 | #else | |
364 | # define show_command(arg) /* */ | |
365 | # define show_busphase(arg) /* */ | |
366 | # define show_autophase(arg) /* */ | |
367 | #endif | |
368 | ||
369 | /* | |
370 | * IDENTIFY Message | |
371 | */ | |
372 | static void nsp32_build_identify(struct scsi_cmnd *SCpnt) | |
373 | { | |
374 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
375 | int pos = data->msgout_len; | |
376 | int mode = FALSE; | |
377 | ||
378 | /* XXX: Auto DiscPriv detection is progressing... */ | |
379 | if (disc_priv == 0) { | |
380 | /* mode = TRUE; */ | |
381 | } | |
382 | ||
383 | data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++; | |
384 | ||
385 | data->msgout_len = pos; | |
386 | } | |
387 | ||
388 | /* | |
389 | * SDTR Message Routine | |
390 | */ | |
391 | static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt, | |
392 | unsigned char period, | |
393 | unsigned char offset) | |
394 | { | |
395 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
396 | int pos = data->msgout_len; | |
397 | ||
398 | data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++; | |
399 | data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++; | |
400 | data->msgoutbuf[pos] = EXTENDED_SDTR; pos++; | |
401 | data->msgoutbuf[pos] = period; pos++; | |
402 | data->msgoutbuf[pos] = offset; pos++; | |
403 | ||
404 | data->msgout_len = pos; | |
405 | } | |
406 | ||
407 | /* | |
408 | * No Operation Message | |
409 | */ | |
410 | static void nsp32_build_nop(struct scsi_cmnd *SCpnt) | |
411 | { | |
412 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
413 | int pos = data->msgout_len; | |
414 | ||
415 | if (pos != 0) { | |
416 | nsp32_msg(KERN_WARNING, | |
417 | "Some messages are already contained!"); | |
418 | return; | |
419 | } | |
420 | ||
421 | data->msgoutbuf[pos] = NOP; pos++; | |
422 | data->msgout_len = pos; | |
423 | } | |
424 | ||
425 | /* | |
426 | * Reject Message | |
427 | */ | |
428 | static void nsp32_build_reject(struct scsi_cmnd *SCpnt) | |
429 | { | |
430 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
431 | int pos = data->msgout_len; | |
432 | ||
433 | data->msgoutbuf[pos] = MESSAGE_REJECT; pos++; | |
434 | data->msgout_len = pos; | |
435 | } | |
436 | ||
437 | /* | |
438 | * timer | |
439 | */ | |
440 | #if 0 | |
441 | static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time) | |
442 | { | |
443 | unsigned int base = SCpnt->host->io_port; | |
444 | ||
445 | nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time); | |
446 | ||
447 | if (time & (~TIMER_CNT_MASK)) { | |
448 | nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow"); | |
449 | } | |
450 | ||
451 | nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK); | |
452 | } | |
453 | #endif | |
454 | ||
455 | ||
456 | /* | |
457 | * set SCSI command and other parameter to asic, and start selection phase | |
458 | */ | |
459 | static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt) | |
460 | { | |
461 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
462 | unsigned int base = SCpnt->device->host->io_port; | |
463 | unsigned int host_id = SCpnt->device->host->this_id; | |
422c0d61 | 464 | unsigned char target = scmd_id(SCpnt); |
1da177e4 LT |
465 | nsp32_autoparam *param = data->autoparam; |
466 | unsigned char phase; | |
467 | int i, ret; | |
468 | unsigned int msgout; | |
469 | u16_le s; | |
470 | ||
471 | nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); | |
472 | ||
473 | /* | |
474 | * check bus free | |
475 | */ | |
476 | phase = nsp32_read1(base, SCSI_BUS_MONITOR); | |
477 | if (phase != BUSMON_BUS_FREE) { | |
478 | nsp32_msg(KERN_WARNING, "bus busy"); | |
479 | show_busphase(phase & BUSMON_PHASE_MASK); | |
480 | SCpnt->result = DID_BUS_BUSY << 16; | |
481 | return FALSE; | |
482 | } | |
483 | ||
484 | /* | |
485 | * message out | |
486 | * | |
487 | * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. | |
488 | * over 3 messages needs another routine. | |
489 | */ | |
490 | if (data->msgout_len == 0) { | |
491 | nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); | |
492 | SCpnt->result = DID_ERROR << 16; | |
493 | return FALSE; | |
494 | } else if (data->msgout_len > 0 && data->msgout_len <= 3) { | |
495 | msgout = 0; | |
496 | for (i = 0; i < data->msgout_len; i++) { | |
497 | /* | |
498 | * the sending order of the message is: | |
499 | * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 | |
500 | * MCNT 2: MSG#1 -> MSG#2 | |
501 | * MCNT 1: MSG#2 | |
502 | */ | |
503 | msgout >>= 8; | |
504 | msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); | |
505 | } | |
506 | msgout |= MV_VALID; /* MV valid */ | |
507 | msgout |= (unsigned int)data->msgout_len; /* len */ | |
508 | } else { | |
509 | /* data->msgout_len > 3 */ | |
510 | msgout = 0; | |
511 | } | |
512 | ||
513 | // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT)); | |
514 | // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); | |
515 | ||
516 | /* | |
517 | * setup asic parameter | |
518 | */ | |
519 | memset(param, 0, sizeof(nsp32_autoparam)); | |
520 | ||
521 | /* cdb */ | |
522 | for (i = 0; i < SCpnt->cmd_len; i++) { | |
523 | param->cdb[4 * i] = SCpnt->cmnd[i]; | |
524 | } | |
525 | ||
526 | /* outgoing messages */ | |
527 | param->msgout = cpu_to_le32(msgout); | |
528 | ||
529 | /* syncreg, ackwidth, target id, SREQ sampling rate */ | |
530 | param->syncreg = data->cur_target->syncreg; | |
531 | param->ackwidth = data->cur_target->ackwidth; | |
532 | param->target_id = BIT(host_id) | BIT(target); | |
533 | param->sample_reg = data->cur_target->sample_reg; | |
534 | ||
535 | // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg); | |
536 | ||
537 | /* command control */ | |
538 | param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER | | |
539 | AUTOSCSI_START | | |
540 | AUTO_MSGIN_00_OR_04 | | |
541 | AUTO_MSGIN_02 | | |
542 | AUTO_ATN ); | |
543 | ||
544 | ||
545 | /* transfer control */ | |
546 | s = 0; | |
547 | switch (data->trans_method) { | |
548 | case NSP32_TRANSFER_BUSMASTER: | |
549 | s |= BM_START; | |
550 | break; | |
551 | case NSP32_TRANSFER_MMIO: | |
552 | s |= CB_MMIO_MODE; | |
553 | break; | |
554 | case NSP32_TRANSFER_PIO: | |
555 | s |= CB_IO_MODE; | |
556 | break; | |
557 | default: | |
558 | nsp32_msg(KERN_ERR, "unknown trans_method"); | |
559 | break; | |
560 | } | |
561 | /* | |
562 | * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits. | |
563 | * For bus master transfer, it's taken off. | |
564 | */ | |
565 | s |= (TRANSFER_GO | ALL_COUNTER_CLR); | |
566 | param->transfer_control = cpu_to_le16(s); | |
567 | ||
568 | /* sg table addr */ | |
569 | param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr); | |
570 | ||
571 | /* | |
572 | * transfer parameter to ASIC | |
573 | */ | |
574 | nsp32_write4(base, SGT_ADR, data->auto_paddr); | |
575 | nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER | | |
576 | AUTO_PARAMETER ); | |
577 | ||
578 | /* | |
579 | * Check arbitration | |
580 | */ | |
581 | ret = nsp32_arbitration(SCpnt, base); | |
582 | ||
583 | return ret; | |
584 | } | |
585 | ||
586 | ||
587 | /* | |
588 | * Selection with AUTO SCSI (without AUTO PARAMETER) | |
589 | */ | |
590 | static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt) | |
591 | { | |
592 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
593 | unsigned int base = SCpnt->device->host->io_port; | |
594 | unsigned int host_id = SCpnt->device->host->this_id; | |
422c0d61 | 595 | unsigned char target = scmd_id(SCpnt); |
1da177e4 LT |
596 | unsigned char phase; |
597 | int status; | |
598 | unsigned short command = 0; | |
599 | unsigned int msgout = 0; | |
600 | unsigned short execph; | |
601 | int i; | |
602 | ||
603 | nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); | |
604 | ||
605 | /* | |
606 | * IRQ disable | |
607 | */ | |
608 | nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); | |
609 | ||
610 | /* | |
611 | * check bus line | |
612 | */ | |
613 | phase = nsp32_read1(base, SCSI_BUS_MONITOR); | |
614 | if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) { | |
615 | nsp32_msg(KERN_WARNING, "bus busy"); | |
616 | SCpnt->result = DID_BUS_BUSY << 16; | |
617 | status = 1; | |
618 | goto out; | |
619 | } | |
620 | ||
621 | /* | |
622 | * clear execph | |
623 | */ | |
624 | execph = nsp32_read2(base, SCSI_EXECUTE_PHASE); | |
625 | ||
626 | /* | |
627 | * clear FIFO counter to set CDBs | |
628 | */ | |
629 | nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER); | |
630 | ||
631 | /* | |
632 | * set CDB0 - CDB15 | |
633 | */ | |
634 | for (i = 0; i < SCpnt->cmd_len; i++) { | |
635 | nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]); | |
636 | } | |
637 | nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]); | |
638 | ||
639 | /* | |
640 | * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID | |
641 | */ | |
642 | nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target)); | |
643 | ||
644 | /* | |
645 | * set SCSI MSGOUT REG | |
646 | * | |
647 | * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. | |
648 | * over 3 messages needs another routine. | |
649 | */ | |
650 | if (data->msgout_len == 0) { | |
651 | nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); | |
652 | SCpnt->result = DID_ERROR << 16; | |
653 | status = 1; | |
654 | goto out; | |
655 | } else if (data->msgout_len > 0 && data->msgout_len <= 3) { | |
656 | msgout = 0; | |
657 | for (i = 0; i < data->msgout_len; i++) { | |
658 | /* | |
659 | * the sending order of the message is: | |
660 | * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 | |
661 | * MCNT 2: MSG#1 -> MSG#2 | |
662 | * MCNT 1: MSG#2 | |
663 | */ | |
664 | msgout >>= 8; | |
665 | msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); | |
666 | } | |
667 | msgout |= MV_VALID; /* MV valid */ | |
668 | msgout |= (unsigned int)data->msgout_len; /* len */ | |
669 | nsp32_write4(base, SCSI_MSG_OUT, msgout); | |
670 | } else { | |
671 | /* data->msgout_len > 3 */ | |
672 | nsp32_write4(base, SCSI_MSG_OUT, 0); | |
673 | } | |
674 | ||
675 | /* | |
676 | * set selection timeout(= 250ms) | |
677 | */ | |
678 | nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); | |
679 | ||
680 | /* | |
681 | * set SREQ hazard killer sampling rate | |
682 | * | |
683 | * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz. | |
684 | * check other internal clock! | |
685 | */ | |
686 | nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); | |
687 | ||
688 | /* | |
689 | * clear Arbit | |
690 | */ | |
691 | nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); | |
692 | ||
693 | /* | |
694 | * set SYNCREG | |
695 | * Don't set BM_START_ADR before setting this register. | |
696 | */ | |
697 | nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); | |
698 | ||
699 | /* | |
700 | * set ACKWIDTH | |
701 | */ | |
702 | nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); | |
703 | ||
704 | nsp32_dbg(NSP32_DEBUG_AUTOSCSI, | |
705 | "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x", | |
706 | nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH), | |
707 | nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID)); | |
708 | nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x", | |
709 | data->msgout_len, msgout); | |
710 | ||
711 | /* | |
712 | * set SGT ADDR (physical address) | |
713 | */ | |
714 | nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); | |
715 | ||
716 | /* | |
717 | * set TRANSFER CONTROL REG | |
718 | */ | |
719 | command = 0; | |
720 | command |= (TRANSFER_GO | ALL_COUNTER_CLR); | |
721 | if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { | |
722 | if (SCpnt->request_bufflen > 0) { | |
723 | command |= BM_START; | |
724 | } | |
725 | } else if (data->trans_method & NSP32_TRANSFER_MMIO) { | |
726 | command |= CB_MMIO_MODE; | |
727 | } else if (data->trans_method & NSP32_TRANSFER_PIO) { | |
728 | command |= CB_IO_MODE; | |
729 | } | |
730 | nsp32_write2(base, TRANSFER_CONTROL, command); | |
731 | ||
732 | /* | |
733 | * start AUTO SCSI, kick off arbitration | |
734 | */ | |
735 | command = (CLEAR_CDB_FIFO_POINTER | | |
736 | AUTOSCSI_START | | |
737 | AUTO_MSGIN_00_OR_04 | | |
738 | AUTO_MSGIN_02 | | |
739 | AUTO_ATN ); | |
740 | nsp32_write2(base, COMMAND_CONTROL, command); | |
741 | ||
742 | /* | |
743 | * Check arbitration | |
744 | */ | |
745 | status = nsp32_arbitration(SCpnt, base); | |
746 | ||
747 | out: | |
748 | /* | |
749 | * IRQ enable | |
750 | */ | |
751 | nsp32_write2(base, IRQ_CONTROL, 0); | |
752 | ||
753 | return status; | |
754 | } | |
755 | ||
756 | ||
757 | /* | |
758 | * Arbitration Status Check | |
759 | * | |
760 | * Note: Arbitration counter is waited during ARBIT_GO is not lifting. | |
761 | * Using udelay(1) consumes CPU time and system time, but | |
762 | * arbitration delay time is defined minimal 2.4us in SCSI | |
763 | * specification, thus udelay works as coarse grained wait timer. | |
764 | */ | |
765 | static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base) | |
766 | { | |
767 | unsigned char arbit; | |
768 | int status = TRUE; | |
769 | int time = 0; | |
770 | ||
771 | do { | |
772 | arbit = nsp32_read1(base, ARBIT_STATUS); | |
773 | time++; | |
774 | } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 && | |
775 | (time <= ARBIT_TIMEOUT_TIME)); | |
776 | ||
777 | nsp32_dbg(NSP32_DEBUG_AUTOSCSI, | |
778 | "arbit: 0x%x, delay time: %d", arbit, time); | |
779 | ||
780 | if (arbit & ARBIT_WIN) { | |
781 | /* Arbitration succeeded */ | |
782 | SCpnt->result = DID_OK << 16; | |
783 | nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */ | |
784 | } else if (arbit & ARBIT_FAIL) { | |
785 | /* Arbitration failed */ | |
786 | SCpnt->result = DID_BUS_BUSY << 16; | |
787 | status = FALSE; | |
788 | } else { | |
789 | /* | |
790 | * unknown error or ARBIT_GO timeout, | |
791 | * something lock up! guess no connection. | |
792 | */ | |
793 | nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout"); | |
794 | SCpnt->result = DID_NO_CONNECT << 16; | |
795 | status = FALSE; | |
796 | } | |
797 | ||
798 | /* | |
799 | * clear Arbit | |
800 | */ | |
801 | nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); | |
802 | ||
803 | return status; | |
804 | } | |
805 | ||
806 | ||
807 | /* | |
808 | * reselection | |
809 | * | |
810 | * Note: This reselection routine is called from msgin_occur, | |
811 | * reselection target id&lun must be already set. | |
812 | * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation. | |
813 | */ | |
814 | static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun) | |
815 | { | |
816 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
817 | unsigned int host_id = SCpnt->device->host->this_id; | |
818 | unsigned int base = SCpnt->device->host->io_port; | |
819 | unsigned char tmpid, newid; | |
820 | ||
821 | nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter"); | |
822 | ||
823 | /* | |
824 | * calculate reselected SCSI ID | |
825 | */ | |
826 | tmpid = nsp32_read1(base, RESELECT_ID); | |
827 | tmpid &= (~BIT(host_id)); | |
828 | newid = 0; | |
829 | while (tmpid) { | |
830 | if (tmpid & 1) { | |
831 | break; | |
832 | } | |
833 | tmpid >>= 1; | |
834 | newid++; | |
835 | } | |
836 | ||
837 | /* | |
838 | * If reselected New ID:LUN is not existed | |
839 | * or current nexus is not existed, unexpected | |
840 | * reselection is occurred. Send reject message. | |
841 | */ | |
842 | if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) { | |
843 | nsp32_msg(KERN_WARNING, "unknown id/lun"); | |
844 | return FALSE; | |
845 | } else if(data->lunt[newid][newlun].SCpnt == NULL) { | |
846 | nsp32_msg(KERN_WARNING, "no SCSI command is processing"); | |
847 | return FALSE; | |
848 | } | |
849 | ||
850 | data->cur_id = newid; | |
851 | data->cur_lun = newlun; | |
852 | data->cur_target = &(data->target[newid]); | |
853 | data->cur_lunt = &(data->lunt[newid][newlun]); | |
854 | ||
855 | /* reset SACK/SavedACK counter (or ALL clear?) */ | |
856 | nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); | |
857 | ||
858 | return TRUE; | |
859 | } | |
860 | ||
861 | ||
862 | /* | |
863 | * nsp32_setup_sg_table - build scatter gather list for transfer data | |
864 | * with bus master. | |
865 | * | |
866 | * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time. | |
867 | */ | |
868 | static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt) | |
869 | { | |
870 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
871 | struct scatterlist *sgl; | |
872 | nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; | |
873 | int num, i; | |
874 | u32_le l; | |
875 | ||
876 | if (SCpnt->request_bufflen == 0) { | |
877 | return TRUE; | |
878 | } | |
879 | ||
880 | if (sgt == NULL) { | |
881 | nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null"); | |
882 | return FALSE; | |
883 | } | |
884 | ||
885 | if (SCpnt->use_sg) { | |
886 | sgl = (struct scatterlist *)SCpnt->request_buffer; | |
887 | num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg, | |
888 | SCpnt->sc_data_direction); | |
889 | for (i = 0; i < num; i++) { | |
890 | /* | |
891 | * Build nsp32_sglist, substitute sg dma addresses. | |
892 | */ | |
893 | sgt[i].addr = cpu_to_le32(sg_dma_address(sgl)); | |
894 | sgt[i].len = cpu_to_le32(sg_dma_len(sgl)); | |
895 | sgl++; | |
896 | ||
897 | if (le32_to_cpu(sgt[i].len) > 0x10000) { | |
898 | nsp32_msg(KERN_ERR, | |
899 | "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len)); | |
900 | return FALSE; | |
901 | } | |
902 | nsp32_dbg(NSP32_DEBUG_SGLIST, | |
903 | "num 0x%x : addr 0x%lx len 0x%lx", | |
904 | i, | |
905 | le32_to_cpu(sgt[i].addr), | |
906 | le32_to_cpu(sgt[i].len )); | |
907 | } | |
908 | ||
909 | /* set end mark */ | |
910 | l = le32_to_cpu(sgt[num-1].len); | |
911 | sgt[num-1].len = cpu_to_le32(l | SGTEND); | |
912 | ||
913 | } else { | |
914 | SCpnt->SCp.have_data_in = pci_map_single(data->Pci, | |
915 | SCpnt->request_buffer, SCpnt->request_bufflen, | |
916 | SCpnt->sc_data_direction); | |
917 | ||
918 | sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in); | |
919 | sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */ | |
920 | ||
921 | if (SCpnt->request_bufflen > 0x10000) { | |
922 | nsp32_msg(KERN_ERR, | |
923 | "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen); | |
924 | return FALSE; | |
925 | } | |
926 | nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx", | |
927 | le32_to_cpu(sgt[0].addr), | |
928 | le32_to_cpu(sgt[0].len )); | |
929 | } | |
930 | ||
931 | return TRUE; | |
932 | } | |
933 | ||
934 | static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) | |
935 | { | |
936 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
937 | nsp32_target *target; | |
938 | nsp32_lunt *cur_lunt; | |
939 | int ret; | |
940 | ||
941 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, | |
942 | "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x " | |
943 | "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x", | |
944 | SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len, | |
945 | SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen); | |
946 | ||
947 | if (data->CurrentSC != NULL) { | |
948 | nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request"); | |
949 | data->CurrentSC = NULL; | |
950 | SCpnt->result = DID_NO_CONNECT << 16; | |
951 | done(SCpnt); | |
952 | return 0; | |
953 | } | |
954 | ||
955 | /* check target ID is not same as this initiator ID */ | |
422c0d61 | 956 | if (scmd_id(SCpnt) == SCpnt->device->host->this_id) { |
1da177e4 LT |
957 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???"); |
958 | SCpnt->result = DID_BAD_TARGET << 16; | |
959 | done(SCpnt); | |
960 | return 0; | |
961 | } | |
962 | ||
963 | /* check target LUN is allowable value */ | |
964 | if (SCpnt->device->lun >= MAX_LUN) { | |
965 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun"); | |
966 | SCpnt->result = DID_BAD_TARGET << 16; | |
967 | done(SCpnt); | |
968 | return 0; | |
969 | } | |
970 | ||
971 | show_command(SCpnt); | |
972 | ||
973 | SCpnt->scsi_done = done; | |
974 | data->CurrentSC = SCpnt; | |
975 | SCpnt->SCp.Status = CHECK_CONDITION; | |
976 | SCpnt->SCp.Message = 0; | |
977 | SCpnt->resid = SCpnt->request_bufflen; | |
978 | ||
979 | SCpnt->SCp.ptr = (char *) SCpnt->request_buffer; | |
980 | SCpnt->SCp.this_residual = SCpnt->request_bufflen; | |
981 | SCpnt->SCp.buffer = NULL; | |
982 | SCpnt->SCp.buffers_residual = 0; | |
983 | ||
984 | /* initialize data */ | |
985 | data->msgout_len = 0; | |
986 | data->msgin_len = 0; | |
987 | cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]); | |
988 | cur_lunt->SCpnt = SCpnt; | |
989 | cur_lunt->save_datp = 0; | |
990 | cur_lunt->msgin03 = FALSE; | |
991 | data->cur_lunt = cur_lunt; | |
992 | data->cur_id = SCpnt->device->id; | |
993 | data->cur_lun = SCpnt->device->lun; | |
994 | ||
995 | ret = nsp32_setup_sg_table(SCpnt); | |
996 | if (ret == FALSE) { | |
997 | nsp32_msg(KERN_ERR, "SGT fail"); | |
998 | SCpnt->result = DID_ERROR << 16; | |
999 | nsp32_scsi_done(SCpnt); | |
1000 | return 0; | |
1001 | } | |
1002 | ||
1003 | /* Build IDENTIFY */ | |
1004 | nsp32_build_identify(SCpnt); | |
1005 | ||
1006 | /* | |
1007 | * If target is the first time to transfer after the reset | |
1008 | * (target don't have SDTR_DONE and SDTR_INITIATOR), sync | |
1009 | * message SDTR is needed to do synchronous transfer. | |
1010 | */ | |
422c0d61 | 1011 | target = &data->target[scmd_id(SCpnt)]; |
1da177e4 LT |
1012 | data->cur_target = target; |
1013 | ||
1014 | if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) { | |
1015 | unsigned char period, offset; | |
1016 | ||
1017 | if (trans_mode != ASYNC_MODE) { | |
1018 | nsp32_set_max_sync(data, target, &period, &offset); | |
1019 | nsp32_build_sdtr(SCpnt, period, offset); | |
1020 | target->sync_flag |= SDTR_INITIATOR; | |
1021 | } else { | |
1022 | nsp32_set_async(data, target); | |
1023 | target->sync_flag |= SDTR_DONE; | |
1024 | } | |
1025 | ||
1026 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, | |
1027 | "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n", | |
1028 | target->limit_entry, period, offset); | |
1029 | } else if (target->sync_flag & SDTR_INITIATOR) { | |
1030 | /* | |
1031 | * It was negotiating SDTR with target, sending from the | |
1032 | * initiator, but there are no chance to remove this flag. | |
1033 | * Set async because we don't get proper negotiation. | |
1034 | */ | |
1035 | nsp32_set_async(data, target); | |
1036 | target->sync_flag &= ~SDTR_INITIATOR; | |
1037 | target->sync_flag |= SDTR_DONE; | |
1038 | ||
1039 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, | |
1040 | "SDTR_INITIATOR: fall back to async"); | |
1041 | } else if (target->sync_flag & SDTR_TARGET) { | |
1042 | /* | |
1043 | * It was negotiating SDTR with target, sending from target, | |
1044 | * but there are no chance to remove this flag. Set async | |
1045 | * because we don't get proper negotiation. | |
1046 | */ | |
1047 | nsp32_set_async(data, target); | |
1048 | target->sync_flag &= ~SDTR_TARGET; | |
1049 | target->sync_flag |= SDTR_DONE; | |
1050 | ||
1051 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, | |
1052 | "Unknown SDTR from target is reached, fall back to async."); | |
1053 | } | |
1054 | ||
1055 | nsp32_dbg(NSP32_DEBUG_TARGETFLAG, | |
1056 | "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x", | |
1057 | SCpnt->device->id, target->sync_flag, target->syncreg, | |
1058 | target->ackwidth); | |
1059 | ||
1060 | /* Selection */ | |
1061 | if (auto_param == 0) { | |
1062 | ret = nsp32_selection_autopara(SCpnt); | |
1063 | } else { | |
1064 | ret = nsp32_selection_autoscsi(SCpnt); | |
1065 | } | |
1066 | ||
1067 | if (ret != TRUE) { | |
1068 | nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail"); | |
1069 | nsp32_scsi_done(SCpnt); | |
1070 | } | |
1071 | ||
1072 | return 0; | |
1073 | } | |
1074 | ||
1075 | /* initialize asic */ | |
1076 | static int nsp32hw_init(nsp32_hw_data *data) | |
1077 | { | |
1078 | unsigned int base = data->BaseAddress; | |
1079 | unsigned short irq_stat; | |
1080 | unsigned long lc_reg; | |
1081 | unsigned char power; | |
1082 | ||
1083 | lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE); | |
1084 | if ((lc_reg & 0xff00) == 0) { | |
1085 | lc_reg |= (0x20 << 8); | |
1086 | nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff); | |
1087 | } | |
1088 | ||
1089 | nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); | |
1090 | nsp32_write2(base, TRANSFER_CONTROL, 0); | |
1091 | nsp32_write4(base, BM_CNT, 0); | |
1092 | nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); | |
1093 | ||
1094 | do { | |
1095 | irq_stat = nsp32_read2(base, IRQ_STATUS); | |
1096 | nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat); | |
1097 | } while (irq_stat & IRQSTATUS_ANY_IRQ); | |
1098 | ||
1099 | /* | |
1100 | * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is | |
1101 | * designated by specification. | |
1102 | */ | |
1103 | if ((data->trans_method & NSP32_TRANSFER_PIO) || | |
1104 | (data->trans_method & NSP32_TRANSFER_MMIO)) { | |
1105 | nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40); | |
1106 | nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40); | |
1107 | } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { | |
1108 | nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10); | |
1109 | nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60); | |
1110 | } else { | |
1111 | nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode"); | |
1112 | } | |
1113 | ||
1114 | nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x", | |
1115 | nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT), | |
1116 | nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT)); | |
1117 | ||
1118 | nsp32_index_write1(base, CLOCK_DIV, data->clock); | |
1119 | nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD); | |
1120 | nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */ | |
1121 | ||
1122 | /* | |
1123 | * initialize MISC_WRRD register | |
1124 | * | |
1125 | * Note: Designated parameters is obeyed as following: | |
1126 | * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set. | |
1127 | * MISC_MASTER_TERMINATION_SELECT: It must be set. | |
1128 | * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set. | |
1129 | * MISC_AUTOSEL_TIMING_SEL: It should be set. | |
1130 | * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set. | |
1131 | * MISC_DELAYED_BMSTART: It's selected for safety. | |
1132 | * | |
1133 | * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then | |
1134 | * we have to set TRANSFERCONTROL_BM_START as 0 and set | |
1135 | * appropriate value before restarting bus master transfer. | |
1136 | */ | |
1137 | nsp32_index_write2(base, MISC_WR, | |
1138 | (SCSI_DIRECTION_DETECTOR_SELECT | | |
1139 | DELAYED_BMSTART | | |
1140 | MASTER_TERMINATION_SELECT | | |
1141 | BMREQ_NEGATE_TIMING_SEL | | |
1142 | AUTOSEL_TIMING_SEL | | |
1143 | BMSTOP_CHANGE2_NONDATA_PHASE)); | |
1144 | ||
1145 | nsp32_index_write1(base, TERM_PWR_CONTROL, 0); | |
1146 | power = nsp32_index_read1(base, TERM_PWR_CONTROL); | |
1147 | if (!(power & SENSE)) { | |
1148 | nsp32_msg(KERN_INFO, "term power on"); | |
1149 | nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR); | |
1150 | } | |
1151 | ||
1152 | nsp32_write2(base, TIMER_SET, TIMER_STOP); | |
1153 | nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */ | |
1154 | ||
1155 | nsp32_write1(base, SYNC_REG, 0); | |
1156 | nsp32_write1(base, ACK_WIDTH, 0); | |
1157 | nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); | |
1158 | ||
1159 | /* | |
1160 | * enable to select designated IRQ (except for | |
1161 | * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR) | |
1162 | */ | |
1163 | nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ | | |
1164 | IRQSELECT_SCSIRESET_IRQ | | |
1165 | IRQSELECT_FIFO_SHLD_IRQ | | |
1166 | IRQSELECT_RESELECT_IRQ | | |
1167 | IRQSELECT_PHASE_CHANGE_IRQ | | |
1168 | IRQSELECT_AUTO_SCSI_SEQ_IRQ | | |
1169 | // IRQSELECT_BMCNTERR_IRQ | | |
1170 | IRQSELECT_TARGET_ABORT_IRQ | | |
1171 | IRQSELECT_MASTER_ABORT_IRQ ); | |
1172 | nsp32_write2(base, IRQ_CONTROL, 0); | |
1173 | ||
1174 | /* PCI LED off */ | |
1175 | nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF); | |
1176 | nsp32_index_write1(base, EXT_PORT, LED_OFF); | |
1177 | ||
1178 | return TRUE; | |
1179 | } | |
1180 | ||
1181 | ||
1182 | /* interrupt routine */ | |
7d12e780 | 1183 | static irqreturn_t do_nsp32_isr(int irq, void *dev_id) |
1da177e4 LT |
1184 | { |
1185 | nsp32_hw_data *data = dev_id; | |
1186 | unsigned int base = data->BaseAddress; | |
1187 | struct scsi_cmnd *SCpnt = data->CurrentSC; | |
1188 | unsigned short auto_stat, irq_stat, trans_stat; | |
1189 | unsigned char busmon, busphase; | |
1190 | unsigned long flags; | |
1191 | int ret; | |
1192 | int handled = 0; | |
1da177e4 | 1193 | struct Scsi_Host *host = data->Host; |
6a31a8a6 | 1194 | |
1da177e4 | 1195 | spin_lock_irqsave(host->host_lock, flags); |
1da177e4 LT |
1196 | |
1197 | /* | |
1198 | * IRQ check, then enable IRQ mask | |
1199 | */ | |
1200 | irq_stat = nsp32_read2(base, IRQ_STATUS); | |
1201 | nsp32_dbg(NSP32_DEBUG_INTR, | |
1202 | "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat); | |
1203 | /* is this interrupt comes from Ninja asic? */ | |
1204 | if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) { | |
1205 | nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat); | |
1206 | goto out2; | |
1207 | } | |
1208 | handled = 1; | |
1209 | nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); | |
1210 | ||
1211 | busmon = nsp32_read1(base, SCSI_BUS_MONITOR); | |
1212 | busphase = busmon & BUSMON_PHASE_MASK; | |
1213 | ||
1214 | trans_stat = nsp32_read2(base, TRANSFER_STATUS); | |
1215 | if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) { | |
1216 | nsp32_msg(KERN_INFO, "card disconnect"); | |
1217 | if (data->CurrentSC != NULL) { | |
1218 | nsp32_msg(KERN_INFO, "clean up current SCSI command"); | |
1219 | SCpnt->result = DID_BAD_TARGET << 16; | |
1220 | nsp32_scsi_done(SCpnt); | |
1221 | } | |
1222 | goto out; | |
1223 | } | |
1224 | ||
1225 | /* Timer IRQ */ | |
1226 | if (irq_stat & IRQSTATUS_TIMER_IRQ) { | |
1227 | nsp32_dbg(NSP32_DEBUG_INTR, "timer stop"); | |
1228 | nsp32_write2(base, TIMER_SET, TIMER_STOP); | |
1229 | goto out; | |
1230 | } | |
1231 | ||
1232 | /* SCSI reset */ | |
1233 | if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) { | |
1234 | nsp32_msg(KERN_INFO, "detected someone do bus reset"); | |
1235 | nsp32_do_bus_reset(data); | |
1236 | if (SCpnt != NULL) { | |
1237 | SCpnt->result = DID_RESET << 16; | |
1238 | nsp32_scsi_done(SCpnt); | |
1239 | } | |
1240 | goto out; | |
1241 | } | |
1242 | ||
1243 | if (SCpnt == NULL) { | |
1244 | nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened"); | |
1245 | nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); | |
1246 | goto out; | |
1247 | } | |
1248 | ||
1249 | /* | |
1250 | * AutoSCSI Interrupt. | |
1251 | * Note: This interrupt is occurred when AutoSCSI is finished. Then | |
1252 | * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are | |
1253 | * recorded when AutoSCSI sequencer has been processed. | |
1254 | */ | |
1255 | if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) { | |
1256 | /* getting SCSI executed phase */ | |
1257 | auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE); | |
1258 | nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); | |
1259 | ||
1260 | /* Selection Timeout, go busfree phase. */ | |
1261 | if (auto_stat & SELECTION_TIMEOUT) { | |
1262 | nsp32_dbg(NSP32_DEBUG_INTR, | |
1263 | "selection timeout occurred"); | |
1264 | ||
1265 | SCpnt->result = DID_TIME_OUT << 16; | |
1266 | nsp32_scsi_done(SCpnt); | |
1267 | goto out; | |
1268 | } | |
1269 | ||
1270 | if (auto_stat & MSGOUT_PHASE) { | |
1271 | /* | |
1272 | * MsgOut phase was processed. | |
1273 | * If MSG_IN_OCCUER is not set, then MsgOut phase is | |
1274 | * completed. Thus, msgout_len must reset. Otherwise, | |
1275 | * nothing to do here. If MSG_OUT_OCCUER is occurred, | |
1276 | * then we will encounter the condition and check. | |
1277 | */ | |
1278 | if (!(auto_stat & MSG_IN_OCCUER) && | |
1279 | (data->msgout_len <= 3)) { | |
1280 | /* | |
1281 | * !MSG_IN_OCCUER && msgout_len <=3 | |
1282 | * ---> AutoSCSI with MSGOUTreg is processed. | |
1283 | */ | |
1284 | data->msgout_len = 0; | |
1285 | }; | |
1286 | ||
1287 | nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed"); | |
1288 | } | |
1289 | ||
1290 | if ((auto_stat & DATA_IN_PHASE) && | |
1291 | (SCpnt->resid > 0) && | |
1292 | ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) { | |
1293 | printk( "auto+fifo\n"); | |
1294 | //nsp32_pio_read(SCpnt); | |
1295 | } | |
1296 | ||
1297 | if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) { | |
1298 | /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */ | |
1299 | nsp32_dbg(NSP32_DEBUG_INTR, | |
1300 | "Data in/out phase processed"); | |
1301 | ||
1302 | /* read BMCNT, SGT pointer addr */ | |
1303 | nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx", | |
1304 | nsp32_read4(base, BM_CNT)); | |
1305 | nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx", | |
1306 | nsp32_read4(base, SGT_ADR)); | |
1307 | nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx", | |
1308 | nsp32_read4(base, SACK_CNT)); | |
1309 | nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx", | |
1310 | nsp32_read4(base, SAVED_SACK_CNT)); | |
1311 | ||
1312 | SCpnt->resid = 0; /* all data transfered! */ | |
1313 | } | |
1314 | ||
1315 | /* | |
1316 | * MsgIn Occur | |
1317 | */ | |
1318 | if (auto_stat & MSG_IN_OCCUER) { | |
1319 | nsp32_msgin_occur(SCpnt, irq_stat, auto_stat); | |
1320 | } | |
1321 | ||
1322 | /* | |
1323 | * MsgOut Occur | |
1324 | */ | |
1325 | if (auto_stat & MSG_OUT_OCCUER) { | |
1326 | nsp32_msgout_occur(SCpnt); | |
1327 | } | |
1328 | ||
1329 | /* | |
1330 | * Bus Free Occur | |
1331 | */ | |
1332 | if (auto_stat & BUS_FREE_OCCUER) { | |
1333 | ret = nsp32_busfree_occur(SCpnt, auto_stat); | |
1334 | if (ret == TRUE) { | |
1335 | goto out; | |
1336 | } | |
1337 | } | |
1338 | ||
1339 | if (auto_stat & STATUS_PHASE) { | |
1340 | /* | |
1341 | * Read CSB and substitute CSB for SCpnt->result | |
1342 | * to save status phase stutas byte. | |
1343 | * scsi error handler checks host_byte (DID_*: | |
1344 | * low level driver to indicate status), then checks | |
1345 | * status_byte (SCSI status byte). | |
1346 | */ | |
1347 | SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN); | |
1348 | } | |
1349 | ||
1350 | if (auto_stat & ILLEGAL_PHASE) { | |
1351 | /* Illegal phase is detected. SACK is not back. */ | |
1352 | nsp32_msg(KERN_WARNING, | |
1353 | "AUTO SCSI ILLEGAL PHASE OCCUR!!!!"); | |
1354 | ||
1355 | /* TODO: currently we don't have any action... bus reset? */ | |
1356 | ||
1357 | /* | |
1358 | * To send back SACK, assert, wait, and negate. | |
1359 | */ | |
1360 | nsp32_sack_assert(data); | |
1361 | nsp32_wait_req(data, NEGATE); | |
1362 | nsp32_sack_negate(data); | |
1363 | ||
1364 | } | |
1365 | ||
1366 | if (auto_stat & COMMAND_PHASE) { | |
1367 | /* nothing to do */ | |
1368 | nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed"); | |
1369 | } | |
1370 | ||
1371 | if (auto_stat & AUTOSCSI_BUSY) { | |
1372 | /* AutoSCSI is running */ | |
1373 | } | |
1374 | ||
1375 | show_autophase(auto_stat); | |
1376 | } | |
1377 | ||
1378 | /* FIFO_SHLD_IRQ */ | |
1379 | if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) { | |
1380 | nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ"); | |
1381 | ||
1382 | switch(busphase) { | |
1383 | case BUSPHASE_DATA_OUT: | |
1384 | nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write"); | |
1385 | ||
1386 | //nsp32_pio_write(SCpnt); | |
1387 | ||
1388 | break; | |
1389 | ||
1390 | case BUSPHASE_DATA_IN: | |
1391 | nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read"); | |
1392 | ||
1393 | //nsp32_pio_read(SCpnt); | |
1394 | ||
1395 | break; | |
1396 | ||
1397 | case BUSPHASE_STATUS: | |
1398 | nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status"); | |
1399 | ||
1400 | SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); | |
1401 | ||
1402 | break; | |
1403 | default: | |
1404 | nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase"); | |
1405 | nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); | |
1406 | show_busphase(busphase); | |
1407 | break; | |
1408 | } | |
1409 | ||
1410 | goto out; | |
1411 | } | |
1412 | ||
1413 | /* Phase Change IRQ */ | |
1414 | if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) { | |
1415 | nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ"); | |
1416 | ||
1417 | switch(busphase) { | |
1418 | case BUSPHASE_MESSAGE_IN: | |
1419 | nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in"); | |
1420 | nsp32_msgin_occur(SCpnt, irq_stat, 0); | |
1421 | break; | |
1422 | default: | |
1423 | nsp32_msg(KERN_WARNING, "phase chg/other phase?"); | |
1424 | nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n", | |
1425 | irq_stat, trans_stat); | |
1426 | show_busphase(busphase); | |
1427 | break; | |
1428 | } | |
1429 | goto out; | |
1430 | } | |
1431 | ||
1432 | /* PCI_IRQ */ | |
1433 | if (irq_stat & IRQSTATUS_PCI_IRQ) { | |
1434 | nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred"); | |
1435 | /* Do nothing */ | |
1436 | } | |
1437 | ||
1438 | /* BMCNTERR_IRQ */ | |
1439 | if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) { | |
1440 | nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! "); | |
1441 | /* | |
1442 | * TODO: To be implemented improving bus master | |
1443 | * transfer reliablity when BMCNTERR is occurred in | |
1444 | * AutoSCSI phase described in specification. | |
1445 | */ | |
1446 | } | |
1447 | ||
1448 | #if 0 | |
1449 | nsp32_dbg(NSP32_DEBUG_INTR, | |
1450 | "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); | |
1451 | show_busphase(busphase); | |
1452 | #endif | |
1453 | ||
1454 | out: | |
1455 | /* disable IRQ mask */ | |
1456 | nsp32_write2(base, IRQ_CONTROL, 0); | |
1457 | ||
1458 | out2: | |
1da177e4 | 1459 | spin_unlock_irqrestore(host->host_lock, flags); |
1da177e4 LT |
1460 | |
1461 | nsp32_dbg(NSP32_DEBUG_INTR, "exit"); | |
1462 | ||
1463 | return IRQ_RETVAL(handled); | |
1464 | } | |
1465 | ||
1466 | #undef SPRINTF | |
1467 | #define SPRINTF(args...) \ | |
1468 | do { \ | |
1469 | if(length > (pos - buffer)) { \ | |
1470 | pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \ | |
1471 | nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\ | |
1472 | } \ | |
1473 | } while(0) | |
6a31a8a6 AB |
1474 | |
1475 | static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start, | |
1476 | off_t offset, int length, int inout) | |
1da177e4 LT |
1477 | { |
1478 | char *pos = buffer; | |
1479 | int thislength; | |
1480 | unsigned long flags; | |
1481 | nsp32_hw_data *data; | |
1da177e4 | 1482 | int hostno; |
1da177e4 LT |
1483 | unsigned int base; |
1484 | unsigned char mode_reg; | |
1485 | int id, speed; | |
1486 | long model; | |
1487 | ||
1488 | /* Write is not supported, just return. */ | |
1489 | if (inout == TRUE) { | |
1490 | return -EINVAL; | |
1491 | } | |
1492 | ||
1da177e4 | 1493 | hostno = host->host_no; |
1da177e4 LT |
1494 | data = (nsp32_hw_data *)host->hostdata; |
1495 | base = host->io_port; | |
1496 | ||
1497 | SPRINTF("NinjaSCSI-32 status\n\n"); | |
1498 | SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version); | |
1499 | SPRINTF("SCSI host No.: %d\n", hostno); | |
1500 | SPRINTF("IRQ: %d\n", host->irq); | |
1501 | SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1); | |
1502 | SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1); | |
1503 | SPRINTF("sg_tablesize: %d\n", host->sg_tablesize); | |
1504 | SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff); | |
1505 | ||
1506 | mode_reg = nsp32_index_read1(base, CHIP_MODE); | |
1507 | model = data->pci_devid->driver_data; | |
1508 | ||
1509 | #ifdef CONFIG_PM | |
1510 | SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no"); | |
1511 | #endif | |
1512 | SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]); | |
1513 | ||
1514 | spin_lock_irqsave(&(data->Lock), flags); | |
1515 | SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC); | |
1516 | spin_unlock_irqrestore(&(data->Lock), flags); | |
1517 | ||
1518 | ||
1519 | SPRINTF("SDTR status\n"); | |
1520 | for (id = 0; id < ARRAY_SIZE(data->target); id++) { | |
1521 | ||
1522 | SPRINTF("id %d: ", id); | |
1523 | ||
1524 | if (id == host->this_id) { | |
1525 | SPRINTF("----- NinjaSCSI-32 host adapter\n"); | |
1526 | continue; | |
1527 | } | |
1528 | ||
1529 | if (data->target[id].sync_flag == SDTR_DONE) { | |
1530 | if (data->target[id].period == 0 && | |
1531 | data->target[id].offset == ASYNC_OFFSET ) { | |
1532 | SPRINTF("async"); | |
1533 | } else { | |
1534 | SPRINTF(" sync"); | |
1535 | } | |
1536 | } else { | |
1537 | SPRINTF(" none"); | |
1538 | } | |
1539 | ||
1540 | if (data->target[id].period != 0) { | |
1541 | ||
1542 | speed = 1000000 / (data->target[id].period * 4); | |
1543 | ||
1544 | SPRINTF(" transfer %d.%dMB/s, offset %d", | |
1545 | speed / 1000, | |
1546 | speed % 1000, | |
1547 | data->target[id].offset | |
1548 | ); | |
1549 | } | |
1550 | SPRINTF("\n"); | |
1551 | } | |
1552 | ||
1553 | ||
1554 | thislength = pos - (buffer + offset); | |
1555 | ||
1556 | if(thislength < 0) { | |
1557 | *start = NULL; | |
1558 | return 0; | |
1559 | } | |
1560 | ||
1561 | ||
1562 | thislength = min(thislength, length); | |
1563 | *start = buffer + offset; | |
1564 | ||
1565 | return thislength; | |
1566 | } | |
1567 | #undef SPRINTF | |
1568 | ||
1569 | ||
1570 | ||
1571 | /* | |
1572 | * Reset parameters and call scsi_done for data->cur_lunt. | |
1573 | * Be careful setting SCpnt->result = DID_* before calling this function. | |
1574 | */ | |
1575 | static void nsp32_scsi_done(struct scsi_cmnd *SCpnt) | |
1576 | { | |
1577 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
1578 | unsigned int base = SCpnt->device->host->io_port; | |
1579 | ||
1580 | /* | |
1581 | * unmap pci | |
1582 | */ | |
1583 | if (SCpnt->request_bufflen == 0) { | |
1584 | goto skip; | |
1585 | } | |
1586 | ||
1587 | if (SCpnt->use_sg) { | |
1588 | pci_unmap_sg(data->Pci, | |
5d5ff44f | 1589 | (struct scatterlist *)SCpnt->request_buffer, |
1da177e4 LT |
1590 | SCpnt->use_sg, SCpnt->sc_data_direction); |
1591 | } else { | |
1592 | pci_unmap_single(data->Pci, | |
1593 | (u32)SCpnt->SCp.have_data_in, | |
1594 | SCpnt->request_bufflen, | |
1595 | SCpnt->sc_data_direction); | |
1596 | } | |
1597 | ||
1598 | skip: | |
1599 | /* | |
1600 | * clear TRANSFERCONTROL_BM_START | |
1601 | */ | |
1602 | nsp32_write2(base, TRANSFER_CONTROL, 0); | |
1603 | nsp32_write4(base, BM_CNT, 0); | |
1604 | ||
1605 | /* | |
1606 | * call scsi_done | |
1607 | */ | |
1608 | (*SCpnt->scsi_done)(SCpnt); | |
1609 | ||
1610 | /* | |
1611 | * reset parameters | |
1612 | */ | |
1613 | data->cur_lunt->SCpnt = NULL; | |
1614 | data->cur_lunt = NULL; | |
1615 | data->cur_target = NULL; | |
1616 | data->CurrentSC = NULL; | |
1617 | } | |
1618 | ||
1619 | ||
1620 | /* | |
1621 | * Bus Free Occur | |
1622 | * | |
1623 | * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase | |
1624 | * with ACK reply when below condition is matched: | |
1625 | * MsgIn 00: Command Complete. | |
1626 | * MsgIn 02: Save Data Pointer. | |
1627 | * MsgIn 04: Diconnect. | |
1628 | * In other case, unexpected BUSFREE is detected. | |
1629 | */ | |
1630 | static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph) | |
1631 | { | |
1632 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
1633 | unsigned int base = SCpnt->device->host->io_port; | |
1634 | ||
1635 | nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph); | |
1636 | show_autophase(execph); | |
1637 | ||
1638 | nsp32_write4(base, BM_CNT, 0); | |
1639 | nsp32_write2(base, TRANSFER_CONTROL, 0); | |
1640 | ||
1641 | /* | |
1642 | * MsgIn 02: Save Data Pointer | |
1643 | * | |
1644 | * VALID: | |
1645 | * Save Data Pointer is received. Adjust pointer. | |
1646 | * | |
1647 | * NO-VALID: | |
1648 | * SCSI-3 says if Save Data Pointer is not received, then we restart | |
1649 | * processing and we can't adjust any SCSI data pointer in next data | |
1650 | * phase. | |
1651 | */ | |
1652 | if (execph & MSGIN_02_VALID) { | |
1653 | nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid"); | |
1654 | ||
1655 | /* | |
1656 | * Check sack_cnt/saved_sack_cnt, then adjust sg table if | |
1657 | * needed. | |
1658 | */ | |
1659 | if (!(execph & MSGIN_00_VALID) && | |
1660 | ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) { | |
1661 | unsigned int sacklen, s_sacklen; | |
1662 | ||
1663 | /* | |
1664 | * Read SACK count and SAVEDSACK count, then compare. | |
1665 | */ | |
1666 | sacklen = nsp32_read4(base, SACK_CNT ); | |
1667 | s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); | |
1668 | ||
1669 | /* | |
1670 | * If SAVEDSACKCNT == 0, it means SavedDataPointer is | |
1671 | * come after data transfering. | |
1672 | */ | |
1673 | if (s_sacklen > 0) { | |
1674 | /* | |
1675 | * Comparing between sack and savedsack to | |
1676 | * check the condition of AutoMsgIn03. | |
1677 | * | |
1678 | * If they are same, set msgin03 == TRUE, | |
1679 | * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at | |
1680 | * reselection. On the other hand, if they | |
1681 | * aren't same, set msgin03 == FALSE, and | |
1682 | * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at | |
1683 | * reselection. | |
1684 | */ | |
1685 | if (sacklen != s_sacklen) { | |
1686 | data->cur_lunt->msgin03 = FALSE; | |
1687 | } else { | |
1688 | data->cur_lunt->msgin03 = TRUE; | |
1689 | } | |
1690 | ||
1691 | nsp32_adjust_busfree(SCpnt, s_sacklen); | |
1692 | } | |
1693 | } | |
1694 | ||
1695 | /* This value has not substitude with valid value yet... */ | |
1696 | //data->cur_lunt->save_datp = data->cur_datp; | |
1697 | } else { | |
1698 | /* | |
1699 | * no processing. | |
1700 | */ | |
1701 | } | |
1702 | ||
1703 | if (execph & MSGIN_03_VALID) { | |
1704 | /* MsgIn03 was valid to be processed. No need processing. */ | |
1705 | } | |
1706 | ||
1707 | /* | |
1708 | * target SDTR check | |
1709 | */ | |
1710 | if (data->cur_target->sync_flag & SDTR_INITIATOR) { | |
1711 | /* | |
1712 | * SDTR negotiation pulled by the initiator has not | |
1713 | * finished yet. Fall back to ASYNC mode. | |
1714 | */ | |
1715 | nsp32_set_async(data, data->cur_target); | |
1716 | data->cur_target->sync_flag &= ~SDTR_INITIATOR; | |
1717 | data->cur_target->sync_flag |= SDTR_DONE; | |
1718 | } else if (data->cur_target->sync_flag & SDTR_TARGET) { | |
1719 | /* | |
1720 | * SDTR negotiation pulled by the target has been | |
1721 | * negotiating. | |
1722 | */ | |
1723 | if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) { | |
1724 | /* | |
1725 | * If valid message is received, then | |
1726 | * negotiation is succeeded. | |
1727 | */ | |
1728 | } else { | |
1729 | /* | |
1730 | * On the contrary, if unexpected bus free is | |
1731 | * occurred, then negotiation is failed. Fall | |
1732 | * back to ASYNC mode. | |
1733 | */ | |
1734 | nsp32_set_async(data, data->cur_target); | |
1735 | } | |
1736 | data->cur_target->sync_flag &= ~SDTR_TARGET; | |
1737 | data->cur_target->sync_flag |= SDTR_DONE; | |
1738 | } | |
1739 | ||
1740 | /* | |
1741 | * It is always ensured by SCSI standard that initiator | |
1742 | * switches into Bus Free Phase after | |
1743 | * receiving message 00 (Command Complete), 04 (Disconnect). | |
1744 | * It's the reason that processing here is valid. | |
1745 | */ | |
1746 | if (execph & MSGIN_00_VALID) { | |
1747 | /* MsgIn 00: Command Complete */ | |
1748 | nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete"); | |
1749 | ||
1750 | SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); | |
1751 | SCpnt->SCp.Message = 0; | |
1752 | nsp32_dbg(NSP32_DEBUG_BUSFREE, | |
1753 | "normal end stat=0x%x resid=0x%x\n", | |
1754 | SCpnt->SCp.Status, SCpnt->resid); | |
1755 | SCpnt->result = (DID_OK << 16) | | |
1756 | (SCpnt->SCp.Message << 8) | | |
1757 | (SCpnt->SCp.Status << 0); | |
1758 | nsp32_scsi_done(SCpnt); | |
1759 | /* All operation is done */ | |
1760 | return TRUE; | |
1761 | } else if (execph & MSGIN_04_VALID) { | |
1762 | /* MsgIn 04: Disconnect */ | |
1763 | SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); | |
1764 | SCpnt->SCp.Message = 4; | |
1765 | ||
1766 | nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect"); | |
1767 | return TRUE; | |
1768 | } else { | |
1769 | /* Unexpected bus free */ | |
1770 | nsp32_msg(KERN_WARNING, "unexpected bus free occurred"); | |
1771 | ||
1772 | /* DID_ERROR? */ | |
1773 | //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0); | |
1774 | SCpnt->result = DID_ERROR << 16; | |
1775 | nsp32_scsi_done(SCpnt); | |
1776 | return TRUE; | |
1777 | } | |
1778 | return FALSE; | |
1779 | } | |
1780 | ||
1781 | ||
1782 | /* | |
1783 | * nsp32_adjust_busfree - adjusting SG table | |
1784 | * | |
1785 | * Note: This driver adjust the SG table using SCSI ACK | |
1786 | * counter instead of BMCNT counter! | |
1787 | */ | |
1788 | static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen) | |
1789 | { | |
1790 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
1791 | int old_entry = data->cur_entry; | |
1792 | int new_entry; | |
1793 | int sg_num = data->cur_lunt->sg_num; | |
1794 | nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; | |
1795 | unsigned int restlen, sentlen; | |
1796 | u32_le len, addr; | |
1797 | ||
1798 | nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid); | |
1799 | ||
1800 | /* adjust saved SACK count with 4 byte start address boundary */ | |
1801 | s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3; | |
1802 | ||
1803 | /* | |
1804 | * calculate new_entry from sack count and each sgt[].len | |
1805 | * calculate the byte which is intent to send | |
1806 | */ | |
1807 | sentlen = 0; | |
1808 | for (new_entry = old_entry; new_entry < sg_num; new_entry++) { | |
1809 | sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND); | |
1810 | if (sentlen > s_sacklen) { | |
1811 | break; | |
1812 | } | |
1813 | } | |
1814 | ||
1815 | /* all sgt is processed */ | |
1816 | if (new_entry == sg_num) { | |
1817 | goto last; | |
1818 | } | |
1819 | ||
1820 | if (sentlen == s_sacklen) { | |
1821 | /* XXX: confirm it's ok or not */ | |
1822 | /* In this case, it's ok because we are at | |
1823 | the head element of the sg. restlen is correctly calculated. */ | |
1824 | } | |
1825 | ||
1826 | /* calculate the rest length for transfering */ | |
1827 | restlen = sentlen - s_sacklen; | |
1828 | ||
1829 | /* update adjusting current SG table entry */ | |
1830 | len = le32_to_cpu(sgt[new_entry].len); | |
1831 | addr = le32_to_cpu(sgt[new_entry].addr); | |
1832 | addr += (len - restlen); | |
1833 | sgt[new_entry].addr = cpu_to_le32(addr); | |
1834 | sgt[new_entry].len = cpu_to_le32(restlen); | |
1835 | ||
1836 | /* set cur_entry with new_entry */ | |
1837 | data->cur_entry = new_entry; | |
1838 | ||
1839 | return; | |
1840 | ||
1841 | last: | |
1842 | if (SCpnt->resid < sentlen) { | |
1843 | nsp32_msg(KERN_ERR, "resid underflow"); | |
1844 | } | |
1845 | ||
1846 | SCpnt->resid -= sentlen; | |
1847 | nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid); | |
1848 | ||
1849 | /* update hostdata and lun */ | |
1850 | ||
1851 | return; | |
1852 | } | |
1853 | ||
1854 | ||
1855 | /* | |
1856 | * It's called MsgOut phase occur. | |
1857 | * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in | |
1858 | * message out phase. It, however, has more than 3 messages, | |
1859 | * HBA creates the interrupt and we have to process by hand. | |
1860 | */ | |
1861 | static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt) | |
1862 | { | |
1863 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
1864 | unsigned int base = SCpnt->device->host->io_port; | |
1865 | //unsigned short command; | |
1866 | long new_sgtp; | |
1867 | int i; | |
1868 | ||
1869 | nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, | |
1870 | "enter: msgout_len: 0x%x", data->msgout_len); | |
1871 | ||
1872 | /* | |
1873 | * If MsgOut phase is occurred without having any | |
1874 | * message, then No_Operation is sent (SCSI-2). | |
1875 | */ | |
1876 | if (data->msgout_len == 0) { | |
1877 | nsp32_build_nop(SCpnt); | |
1878 | } | |
1879 | ||
1880 | /* | |
1881 | * Set SGTP ADDR current entry for restarting AUTOSCSI, | |
1882 | * because SGTP is incremented next point. | |
1883 | * There is few statement in the specification... | |
1884 | */ | |
1885 | new_sgtp = data->cur_lunt->sglun_paddr + | |
1886 | (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); | |
1887 | ||
1888 | /* | |
1889 | * send messages | |
1890 | */ | |
1891 | for (i = 0; i < data->msgout_len; i++) { | |
1892 | nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, | |
1893 | "%d : 0x%x", i, data->msgoutbuf[i]); | |
1894 | ||
1895 | /* | |
1896 | * Check REQ is asserted. | |
1897 | */ | |
1898 | nsp32_wait_req(data, ASSERT); | |
1899 | ||
1900 | if (i == (data->msgout_len - 1)) { | |
1901 | /* | |
1902 | * If the last message, set the AutoSCSI restart | |
1903 | * before send back the ack message. AutoSCSI | |
1904 | * restart automatically negate ATN signal. | |
1905 | */ | |
1906 | //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); | |
1907 | //nsp32_restart_autoscsi(SCpnt, command); | |
1908 | nsp32_write2(base, COMMAND_CONTROL, | |
1909 | (CLEAR_CDB_FIFO_POINTER | | |
1910 | AUTO_COMMAND_PHASE | | |
1911 | AUTOSCSI_RESTART | | |
1912 | AUTO_MSGIN_00_OR_04 | | |
1913 | AUTO_MSGIN_02 )); | |
1914 | } | |
1915 | /* | |
1916 | * Write data with SACK, then wait sack is | |
1917 | * automatically negated. | |
1918 | */ | |
1919 | nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]); | |
1920 | nsp32_wait_sack(data, NEGATE); | |
1921 | ||
1922 | nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n", | |
1923 | nsp32_read1(base, SCSI_BUS_MONITOR)); | |
1924 | }; | |
1925 | ||
1926 | data->msgout_len = 0; | |
1927 | ||
1928 | nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit"); | |
1929 | } | |
1930 | ||
1931 | /* | |
1932 | * Restart AutoSCSI | |
1933 | * | |
1934 | * Note: Restarting AutoSCSI needs set: | |
1935 | * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL | |
1936 | */ | |
1937 | static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command) | |
1938 | { | |
1939 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
1940 | unsigned int base = data->BaseAddress; | |
1941 | unsigned short transfer = 0; | |
1942 | ||
1943 | nsp32_dbg(NSP32_DEBUG_RESTART, "enter"); | |
1944 | ||
1945 | if (data->cur_target == NULL || data->cur_lunt == NULL) { | |
1946 | nsp32_msg(KERN_ERR, "Target or Lun is invalid"); | |
1947 | } | |
1948 | ||
1949 | /* | |
1950 | * set SYNC_REG | |
1951 | * Don't set BM_START_ADR before setting this register. | |
1952 | */ | |
1953 | nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); | |
1954 | ||
1955 | /* | |
1956 | * set ACKWIDTH | |
1957 | */ | |
1958 | nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); | |
1959 | ||
1960 | /* | |
1961 | * set SREQ hazard killer sampling rate | |
1962 | */ | |
1963 | nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); | |
1964 | ||
1965 | /* | |
1966 | * set SGT ADDR (physical address) | |
1967 | */ | |
1968 | nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); | |
1969 | ||
1970 | /* | |
1971 | * set TRANSFER CONTROL REG | |
1972 | */ | |
1973 | transfer = 0; | |
1974 | transfer |= (TRANSFER_GO | ALL_COUNTER_CLR); | |
1975 | if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { | |
1976 | if (SCpnt->request_bufflen > 0) { | |
1977 | transfer |= BM_START; | |
1978 | } | |
1979 | } else if (data->trans_method & NSP32_TRANSFER_MMIO) { | |
1980 | transfer |= CB_MMIO_MODE; | |
1981 | } else if (data->trans_method & NSP32_TRANSFER_PIO) { | |
1982 | transfer |= CB_IO_MODE; | |
1983 | } | |
1984 | nsp32_write2(base, TRANSFER_CONTROL, transfer); | |
1985 | ||
1986 | /* | |
1987 | * restart AutoSCSI | |
1988 | * | |
1989 | * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ? | |
1990 | */ | |
1991 | command |= (CLEAR_CDB_FIFO_POINTER | | |
1992 | AUTO_COMMAND_PHASE | | |
1993 | AUTOSCSI_RESTART ); | |
1994 | nsp32_write2(base, COMMAND_CONTROL, command); | |
1995 | ||
1996 | nsp32_dbg(NSP32_DEBUG_RESTART, "exit"); | |
1997 | } | |
1998 | ||
1999 | ||
2000 | /* | |
2001 | * cannot run automatically message in occur | |
2002 | */ | |
2003 | static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt, | |
2004 | unsigned long irq_status, | |
2005 | unsigned short execph) | |
2006 | { | |
2007 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
2008 | unsigned int base = SCpnt->device->host->io_port; | |
2009 | unsigned char msg; | |
2010 | unsigned char msgtype; | |
2011 | unsigned char newlun; | |
2012 | unsigned short command = 0; | |
2013 | int msgclear = TRUE; | |
2014 | long new_sgtp; | |
2015 | int ret; | |
2016 | ||
2017 | /* | |
2018 | * read first message | |
2019 | * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure | |
2020 | * of Message-In have to be processed before sending back SCSI ACK. | |
2021 | */ | |
2022 | msg = nsp32_read1(base, SCSI_DATA_IN); | |
2023 | data->msginbuf[(unsigned char)data->msgin_len] = msg; | |
2024 | msgtype = data->msginbuf[0]; | |
2025 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, | |
2026 | "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x", | |
2027 | data->msgin_len, msg, msgtype); | |
2028 | ||
2029 | /* | |
2030 | * TODO: We need checking whether bus phase is message in? | |
2031 | */ | |
2032 | ||
2033 | /* | |
2034 | * assert SCSI ACK | |
2035 | */ | |
2036 | nsp32_sack_assert(data); | |
2037 | ||
2038 | /* | |
2039 | * processing IDENTIFY | |
2040 | */ | |
2041 | if (msgtype & 0x80) { | |
2042 | if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) { | |
2043 | /* Invalid (non reselect) phase */ | |
2044 | goto reject; | |
2045 | } | |
2046 | ||
2047 | newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */ | |
2048 | ret = nsp32_reselection(SCpnt, newlun); | |
2049 | if (ret == TRUE) { | |
2050 | goto restart; | |
2051 | } else { | |
2052 | goto reject; | |
2053 | } | |
2054 | } | |
2055 | ||
2056 | /* | |
2057 | * processing messages except for IDENTIFY | |
2058 | * | |
2059 | * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO. | |
2060 | */ | |
2061 | switch (msgtype) { | |
2062 | /* | |
2063 | * 1-byte message | |
2064 | */ | |
2065 | case COMMAND_COMPLETE: | |
2066 | case DISCONNECT: | |
2067 | /* | |
2068 | * These messages should not be occurred. | |
2069 | * They should be processed on AutoSCSI sequencer. | |
2070 | */ | |
2071 | nsp32_msg(KERN_WARNING, | |
2072 | "unexpected message of AutoSCSI MsgIn: 0x%x", msg); | |
2073 | break; | |
2074 | ||
2075 | case RESTORE_POINTERS: | |
2076 | /* | |
2077 | * AutoMsgIn03 is disabled, and HBA gets this message. | |
2078 | */ | |
2079 | ||
2080 | if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) { | |
2081 | unsigned int s_sacklen; | |
2082 | ||
2083 | s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); | |
2084 | if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) { | |
2085 | nsp32_adjust_busfree(SCpnt, s_sacklen); | |
2086 | } else { | |
2087 | /* No need to rewrite SGT */ | |
2088 | } | |
2089 | } | |
2090 | data->cur_lunt->msgin03 = FALSE; | |
2091 | ||
2092 | /* Update with the new value */ | |
2093 | ||
2094 | /* reset SACK/SavedACK counter (or ALL clear?) */ | |
2095 | nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); | |
2096 | ||
2097 | /* | |
2098 | * set new sg pointer | |
2099 | */ | |
2100 | new_sgtp = data->cur_lunt->sglun_paddr + | |
2101 | (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); | |
2102 | nsp32_write4(base, SGT_ADR, new_sgtp); | |
2103 | ||
2104 | break; | |
2105 | ||
2106 | case SAVE_POINTERS: | |
2107 | /* | |
2108 | * These messages should not be occurred. | |
2109 | * They should be processed on AutoSCSI sequencer. | |
2110 | */ | |
2111 | nsp32_msg (KERN_WARNING, | |
2112 | "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS"); | |
2113 | ||
2114 | break; | |
2115 | ||
2116 | case MESSAGE_REJECT: | |
2117 | /* If previous message_out is sending SDTR, and get | |
2118 | message_reject from target, SDTR negotiation is failed */ | |
2119 | if (data->cur_target->sync_flag & | |
2120 | (SDTR_INITIATOR | SDTR_TARGET)) { | |
2121 | /* | |
2122 | * Current target is negotiating SDTR, but it's | |
2123 | * failed. Fall back to async transfer mode, and set | |
2124 | * SDTR_DONE. | |
2125 | */ | |
2126 | nsp32_set_async(data, data->cur_target); | |
2127 | data->cur_target->sync_flag &= ~SDTR_INITIATOR; | |
2128 | data->cur_target->sync_flag |= SDTR_DONE; | |
2129 | ||
2130 | } | |
2131 | break; | |
2132 | ||
2133 | case LINKED_CMD_COMPLETE: | |
2134 | case LINKED_FLG_CMD_COMPLETE: | |
2135 | /* queue tag is not supported currently */ | |
2136 | nsp32_msg (KERN_WARNING, | |
2137 | "unsupported message: 0x%x", msgtype); | |
2138 | break; | |
2139 | ||
2140 | case INITIATE_RECOVERY: | |
2141 | /* staring ECA (Extended Contingent Allegiance) state. */ | |
2142 | /* This message is declined in SPI2 or later. */ | |
2143 | ||
2144 | goto reject; | |
2145 | ||
2146 | /* | |
2147 | * 2-byte message | |
2148 | */ | |
2149 | case SIMPLE_QUEUE_TAG: | |
2150 | case 0x23: | |
2151 | /* | |
2152 | * 0x23: Ignore_Wide_Residue is not declared in scsi.h. | |
2153 | * No support is needed. | |
2154 | */ | |
2155 | if (data->msgin_len >= 1) { | |
2156 | goto reject; | |
2157 | } | |
2158 | ||
2159 | /* current position is 1-byte of 2 byte */ | |
2160 | msgclear = FALSE; | |
2161 | ||
2162 | break; | |
2163 | ||
2164 | /* | |
2165 | * extended message | |
2166 | */ | |
2167 | case EXTENDED_MESSAGE: | |
2168 | if (data->msgin_len < 1) { | |
2169 | /* | |
2170 | * Current position does not reach 2-byte | |
2171 | * (2-byte is extended message length). | |
2172 | */ | |
2173 | msgclear = FALSE; | |
2174 | break; | |
2175 | } | |
2176 | ||
2177 | if ((data->msginbuf[1] + 1) > data->msgin_len) { | |
2178 | /* | |
2179 | * Current extended message has msginbuf[1] + 2 | |
2180 | * (msgin_len starts counting from 0, so buf[1] + 1). | |
2181 | * If current message position is not finished, | |
2182 | * continue receiving message. | |
2183 | */ | |
2184 | msgclear = FALSE; | |
2185 | break; | |
2186 | } | |
2187 | ||
2188 | /* | |
2189 | * Reach here means regular length of each type of | |
2190 | * extended messages. | |
2191 | */ | |
2192 | switch (data->msginbuf[2]) { | |
2193 | case EXTENDED_MODIFY_DATA_POINTER: | |
2194 | /* TODO */ | |
2195 | goto reject; /* not implemented yet */ | |
2196 | break; | |
2197 | ||
2198 | case EXTENDED_SDTR: | |
2199 | /* | |
2200 | * Exchange this message between initiator and target. | |
2201 | */ | |
2202 | if (data->msgin_len != EXTENDED_SDTR_LEN + 1) { | |
2203 | /* | |
2204 | * received inappropriate message. | |
2205 | */ | |
2206 | goto reject; | |
2207 | break; | |
2208 | } | |
2209 | ||
2210 | nsp32_analyze_sdtr(SCpnt); | |
2211 | ||
2212 | break; | |
2213 | ||
2214 | case EXTENDED_EXTENDED_IDENTIFY: | |
2215 | /* SCSI-I only, not supported. */ | |
2216 | goto reject; /* not implemented yet */ | |
2217 | ||
2218 | break; | |
2219 | ||
2220 | case EXTENDED_WDTR: | |
2221 | goto reject; /* not implemented yet */ | |
2222 | ||
2223 | break; | |
2224 | ||
2225 | default: | |
2226 | goto reject; | |
2227 | } | |
2228 | break; | |
2229 | ||
2230 | default: | |
2231 | goto reject; | |
2232 | } | |
2233 | ||
2234 | restart: | |
2235 | if (msgclear == TRUE) { | |
2236 | data->msgin_len = 0; | |
2237 | ||
2238 | /* | |
2239 | * If restarting AutoSCSI, but there are some message to out | |
2240 | * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0 | |
2241 | * (MV_VALID = 0). When commandcontrol is written with | |
2242 | * AutoSCSI restart, at the same time MsgOutOccur should be | |
2243 | * happened (however, such situation is really possible...?). | |
2244 | */ | |
2245 | if (data->msgout_len > 0) { | |
2246 | nsp32_write4(base, SCSI_MSG_OUT, 0); | |
2247 | command |= AUTO_ATN; | |
2248 | } | |
2249 | ||
2250 | /* | |
2251 | * restart AutoSCSI | |
2252 | * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed. | |
2253 | */ | |
2254 | command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); | |
2255 | ||
2256 | /* | |
2257 | * If current msgin03 is TRUE, then flag on. | |
2258 | */ | |
2259 | if (data->cur_lunt->msgin03 == TRUE) { | |
2260 | command |= AUTO_MSGIN_03; | |
2261 | } | |
2262 | data->cur_lunt->msgin03 = FALSE; | |
2263 | } else { | |
2264 | data->msgin_len++; | |
2265 | } | |
2266 | ||
2267 | /* | |
2268 | * restart AutoSCSI | |
2269 | */ | |
2270 | nsp32_restart_autoscsi(SCpnt, command); | |
2271 | ||
2272 | /* | |
2273 | * wait SCSI REQ negate for REQ-ACK handshake | |
2274 | */ | |
2275 | nsp32_wait_req(data, NEGATE); | |
2276 | ||
2277 | /* | |
2278 | * negate SCSI ACK | |
2279 | */ | |
2280 | nsp32_sack_negate(data); | |
2281 | ||
2282 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); | |
2283 | ||
2284 | return; | |
2285 | ||
2286 | reject: | |
2287 | nsp32_msg(KERN_WARNING, | |
2288 | "invalid or unsupported MessageIn, rejected. " | |
2289 | "current msg: 0x%x (len: 0x%x), processing msg: 0x%x", | |
2290 | msg, data->msgin_len, msgtype); | |
2291 | nsp32_build_reject(SCpnt); | |
2292 | data->msgin_len = 0; | |
2293 | ||
2294 | goto restart; | |
2295 | } | |
2296 | ||
2297 | /* | |
2298 | * | |
2299 | */ | |
2300 | static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt) | |
2301 | { | |
2302 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
2303 | nsp32_target *target = data->cur_target; | |
2304 | nsp32_sync_table *synct; | |
2305 | unsigned char get_period = data->msginbuf[3]; | |
2306 | unsigned char get_offset = data->msginbuf[4]; | |
2307 | int entry; | |
2308 | int syncnum; | |
2309 | ||
2310 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter"); | |
2311 | ||
2312 | synct = data->synct; | |
2313 | syncnum = data->syncnum; | |
2314 | ||
2315 | /* | |
2316 | * If this inititor sent the SDTR message, then target responds SDTR, | |
2317 | * initiator SYNCREG, ACKWIDTH from SDTR parameter. | |
2318 | * Messages are not appropriate, then send back reject message. | |
2319 | * If initiator did not send the SDTR, but target sends SDTR, | |
2320 | * initiator calculator the appropriate parameter and send back SDTR. | |
2321 | */ | |
2322 | if (target->sync_flag & SDTR_INITIATOR) { | |
2323 | /* | |
2324 | * Initiator sent SDTR, the target responds and | |
2325 | * send back negotiation SDTR. | |
2326 | */ | |
2327 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR"); | |
2328 | ||
2329 | target->sync_flag &= ~SDTR_INITIATOR; | |
2330 | target->sync_flag |= SDTR_DONE; | |
2331 | ||
2332 | /* | |
2333 | * offset: | |
2334 | */ | |
2335 | if (get_offset > SYNC_OFFSET) { | |
2336 | /* | |
2337 | * Negotiation is failed, the target send back | |
2338 | * unexpected offset value. | |
2339 | */ | |
2340 | goto reject; | |
2341 | } | |
2342 | ||
2343 | if (get_offset == ASYNC_OFFSET) { | |
2344 | /* | |
2345 | * Negotiation is succeeded, the target want | |
2346 | * to fall back into asynchronous transfer mode. | |
2347 | */ | |
2348 | goto async; | |
2349 | } | |
2350 | ||
2351 | /* | |
2352 | * period: | |
2353 | * Check whether sync period is too short. If too short, | |
2354 | * fall back to async mode. If it's ok, then investigate | |
2355 | * the received sync period. If sync period is acceptable | |
2356 | * between sync table start_period and end_period, then | |
2357 | * set this I_T nexus as sent offset and period. | |
2358 | * If it's not acceptable, send back reject and fall back | |
2359 | * to async mode. | |
2360 | */ | |
2361 | if (get_period < data->synct[0].period_num) { | |
2362 | /* | |
2363 | * Negotiation is failed, the target send back | |
2364 | * unexpected period value. | |
2365 | */ | |
2366 | goto reject; | |
2367 | } | |
2368 | ||
2369 | entry = nsp32_search_period_entry(data, target, get_period); | |
2370 | ||
2371 | if (entry < 0) { | |
2372 | /* | |
2373 | * Target want to use long period which is not | |
2374 | * acceptable NinjaSCSI-32Bi/UDE. | |
2375 | */ | |
2376 | goto reject; | |
2377 | } | |
2378 | ||
2379 | /* | |
2380 | * Set new sync table and offset in this I_T nexus. | |
2381 | */ | |
2382 | nsp32_set_sync_entry(data, target, entry, get_offset); | |
2383 | } else { | |
2384 | /* Target send SDTR to initiator. */ | |
2385 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR"); | |
2386 | ||
2387 | target->sync_flag |= SDTR_INITIATOR; | |
2388 | ||
2389 | /* offset: */ | |
2390 | if (get_offset > SYNC_OFFSET) { | |
2391 | /* send back as SYNC_OFFSET */ | |
2392 | get_offset = SYNC_OFFSET; | |
2393 | } | |
2394 | ||
2395 | /* period: */ | |
2396 | if (get_period < data->synct[0].period_num) { | |
2397 | get_period = data->synct[0].period_num; | |
2398 | } | |
2399 | ||
2400 | entry = nsp32_search_period_entry(data, target, get_period); | |
2401 | ||
2402 | if (get_offset == ASYNC_OFFSET || entry < 0) { | |
2403 | nsp32_set_async(data, target); | |
2404 | nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET); | |
2405 | } else { | |
2406 | nsp32_set_sync_entry(data, target, entry, get_offset); | |
2407 | nsp32_build_sdtr(SCpnt, get_period, get_offset); | |
2408 | } | |
2409 | } | |
2410 | ||
2411 | target->period = get_period; | |
2412 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); | |
2413 | return; | |
2414 | ||
2415 | reject: | |
2416 | /* | |
2417 | * If the current message is unacceptable, send back to the target | |
2418 | * with reject message. | |
2419 | */ | |
2420 | nsp32_build_reject(SCpnt); | |
2421 | ||
2422 | async: | |
2423 | nsp32_set_async(data, target); /* set as ASYNC transfer mode */ | |
2424 | ||
2425 | target->period = 0; | |
2426 | nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async"); | |
2427 | return; | |
2428 | } | |
2429 | ||
2430 | ||
2431 | /* | |
2432 | * Search config entry number matched in sync_table from given | |
2433 | * target and speed period value. If failed to search, return negative value. | |
2434 | */ | |
2435 | static int nsp32_search_period_entry(nsp32_hw_data *data, | |
2436 | nsp32_target *target, | |
2437 | unsigned char period) | |
2438 | { | |
2439 | int i; | |
2440 | ||
2441 | if (target->limit_entry >= data->syncnum) { | |
2442 | nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!"); | |
2443 | target->limit_entry = 0; | |
2444 | } | |
2445 | ||
2446 | for (i = target->limit_entry; i < data->syncnum; i++) { | |
2447 | if (period >= data->synct[i].start_period && | |
2448 | period <= data->synct[i].end_period) { | |
2449 | break; | |
2450 | } | |
2451 | } | |
2452 | ||
2453 | /* | |
2454 | * Check given period value is over the sync_table value. | |
2455 | * If so, return max value. | |
2456 | */ | |
2457 | if (i == data->syncnum) { | |
2458 | i = -1; | |
2459 | } | |
2460 | ||
2461 | return i; | |
2462 | } | |
2463 | ||
2464 | ||
2465 | /* | |
2466 | * target <-> initiator use ASYNC transfer | |
2467 | */ | |
2468 | static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target) | |
2469 | { | |
2470 | unsigned char period = data->synct[target->limit_entry].period_num; | |
2471 | ||
2472 | target->offset = ASYNC_OFFSET; | |
2473 | target->period = 0; | |
2474 | target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET); | |
2475 | target->ackwidth = 0; | |
2476 | target->sample_reg = 0; | |
2477 | ||
2478 | nsp32_dbg(NSP32_DEBUG_SYNC, "set async"); | |
2479 | } | |
2480 | ||
2481 | ||
2482 | /* | |
2483 | * target <-> initiator use maximum SYNC transfer | |
2484 | */ | |
2485 | static void nsp32_set_max_sync(nsp32_hw_data *data, | |
2486 | nsp32_target *target, | |
2487 | unsigned char *period, | |
2488 | unsigned char *offset) | |
2489 | { | |
2490 | unsigned char period_num, ackwidth; | |
2491 | ||
2492 | period_num = data->synct[target->limit_entry].period_num; | |
2493 | *period = data->synct[target->limit_entry].start_period; | |
2494 | ackwidth = data->synct[target->limit_entry].ackwidth; | |
2495 | *offset = SYNC_OFFSET; | |
2496 | ||
2497 | target->syncreg = TO_SYNCREG(period_num, *offset); | |
2498 | target->ackwidth = ackwidth; | |
2499 | target->offset = *offset; | |
2500 | target->sample_reg = 0; /* disable SREQ sampling */ | |
2501 | } | |
2502 | ||
2503 | ||
2504 | /* | |
2505 | * target <-> initiator use entry number speed | |
2506 | */ | |
2507 | static void nsp32_set_sync_entry(nsp32_hw_data *data, | |
2508 | nsp32_target *target, | |
2509 | int entry, | |
2510 | unsigned char offset) | |
2511 | { | |
2512 | unsigned char period, ackwidth, sample_rate; | |
2513 | ||
2514 | period = data->synct[entry].period_num; | |
2515 | ackwidth = data->synct[entry].ackwidth; | |
2516 | offset = offset; | |
2517 | sample_rate = data->synct[entry].sample_rate; | |
2518 | ||
2519 | target->syncreg = TO_SYNCREG(period, offset); | |
2520 | target->ackwidth = ackwidth; | |
2521 | target->offset = offset; | |
2522 | target->sample_reg = sample_rate | SAMPLING_ENABLE; | |
2523 | ||
2524 | nsp32_dbg(NSP32_DEBUG_SYNC, "set sync"); | |
2525 | } | |
2526 | ||
2527 | ||
2528 | /* | |
2529 | * It waits until SCSI REQ becomes assertion or negation state. | |
2530 | * | |
2531 | * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then | |
2532 | * connected target responds SCSI REQ negation. We have to wait | |
2533 | * SCSI REQ becomes negation in order to negate SCSI ACK signal for | |
2534 | * REQ-ACK handshake. | |
2535 | */ | |
2536 | static void nsp32_wait_req(nsp32_hw_data *data, int state) | |
2537 | { | |
2538 | unsigned int base = data->BaseAddress; | |
2539 | int wait_time = 0; | |
2540 | unsigned char bus, req_bit; | |
2541 | ||
2542 | if (!((state == ASSERT) || (state == NEGATE))) { | |
2543 | nsp32_msg(KERN_ERR, "unknown state designation"); | |
2544 | } | |
2545 | /* REQ is BIT(5) */ | |
2546 | req_bit = (state == ASSERT ? BUSMON_REQ : 0); | |
2547 | ||
2548 | do { | |
2549 | bus = nsp32_read1(base, SCSI_BUS_MONITOR); | |
2550 | if ((bus & BUSMON_REQ) == req_bit) { | |
2551 | nsp32_dbg(NSP32_DEBUG_WAIT, | |
2552 | "wait_time: %d", wait_time); | |
2553 | return; | |
2554 | } | |
2555 | udelay(1); | |
2556 | wait_time++; | |
2557 | } while (wait_time < REQSACK_TIMEOUT_TIME); | |
2558 | ||
2559 | nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit); | |
2560 | } | |
2561 | ||
2562 | /* | |
2563 | * It waits until SCSI SACK becomes assertion or negation state. | |
2564 | */ | |
2565 | static void nsp32_wait_sack(nsp32_hw_data *data, int state) | |
2566 | { | |
2567 | unsigned int base = data->BaseAddress; | |
2568 | int wait_time = 0; | |
2569 | unsigned char bus, ack_bit; | |
2570 | ||
2571 | if (!((state == ASSERT) || (state == NEGATE))) { | |
2572 | nsp32_msg(KERN_ERR, "unknown state designation"); | |
2573 | } | |
2574 | /* ACK is BIT(4) */ | |
2575 | ack_bit = (state == ASSERT ? BUSMON_ACK : 0); | |
2576 | ||
2577 | do { | |
2578 | bus = nsp32_read1(base, SCSI_BUS_MONITOR); | |
2579 | if ((bus & BUSMON_ACK) == ack_bit) { | |
2580 | nsp32_dbg(NSP32_DEBUG_WAIT, | |
2581 | "wait_time: %d", wait_time); | |
2582 | return; | |
2583 | } | |
2584 | udelay(1); | |
2585 | wait_time++; | |
2586 | } while (wait_time < REQSACK_TIMEOUT_TIME); | |
2587 | ||
2588 | nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit); | |
2589 | } | |
2590 | ||
2591 | /* | |
2592 | * assert SCSI ACK | |
2593 | * | |
2594 | * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1. | |
2595 | */ | |
2596 | static void nsp32_sack_assert(nsp32_hw_data *data) | |
2597 | { | |
2598 | unsigned int base = data->BaseAddress; | |
2599 | unsigned char busctrl; | |
2600 | ||
2601 | busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); | |
2602 | busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB); | |
2603 | nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); | |
2604 | } | |
2605 | ||
2606 | /* | |
2607 | * negate SCSI ACK | |
2608 | */ | |
2609 | static void nsp32_sack_negate(nsp32_hw_data *data) | |
2610 | { | |
2611 | unsigned int base = data->BaseAddress; | |
2612 | unsigned char busctrl; | |
2613 | ||
2614 | busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); | |
2615 | busctrl &= ~BUSCTL_ACK; | |
2616 | nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); | |
2617 | } | |
2618 | ||
2619 | ||
2620 | ||
2621 | /* | |
2622 | * Note: n_io_port is defined as 0x7f because I/O register port is | |
2623 | * assigned as: | |
2624 | * 0x800-0x8ff: memory mapped I/O port | |
2625 | * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly) | |
2626 | * 0xc00-0xfff: CardBus status registers | |
2627 | */ | |
1da177e4 | 2628 | static int nsp32_detect(struct pci_dev *pdev) |
1da177e4 LT |
2629 | { |
2630 | struct Scsi_Host *host; /* registered host structure */ | |
2631 | struct resource *res; | |
2632 | nsp32_hw_data *data; | |
2633 | int ret; | |
2634 | int i, j; | |
2635 | ||
2636 | nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); | |
2637 | ||
2638 | /* | |
2639 | * register this HBA as SCSI device | |
2640 | */ | |
1da177e4 | 2641 | host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data)); |
1da177e4 LT |
2642 | if (host == NULL) { |
2643 | nsp32_msg (KERN_ERR, "failed to scsi register"); | |
2644 | goto err; | |
2645 | } | |
2646 | ||
2647 | /* | |
2648 | * set nsp32_hw_data | |
2649 | */ | |
2650 | data = (nsp32_hw_data *)host->hostdata; | |
2651 | ||
2652 | memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data)); | |
2653 | ||
2654 | host->irq = data->IrqNumber; | |
2655 | host->io_port = data->BaseAddress; | |
2656 | host->unique_id = data->BaseAddress; | |
2657 | host->n_io_port = data->NumAddress; | |
2658 | host->base = (unsigned long)data->MmioAddress; | |
1da177e4 LT |
2659 | |
2660 | data->Host = host; | |
2661 | spin_lock_init(&(data->Lock)); | |
2662 | ||
2663 | data->cur_lunt = NULL; | |
2664 | data->cur_target = NULL; | |
2665 | ||
2666 | /* | |
2667 | * Bus master transfer mode is supported currently. | |
2668 | */ | |
2669 | data->trans_method = NSP32_TRANSFER_BUSMASTER; | |
2670 | ||
2671 | /* | |
2672 | * Set clock div, CLOCK_4 (HBA has own external clock, and | |
2673 | * dividing * 100ns/4). | |
2674 | * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet. | |
2675 | */ | |
2676 | data->clock = CLOCK_4; | |
2677 | ||
2678 | /* | |
2679 | * Select appropriate nsp32_sync_table and set I_CLOCKDIV. | |
2680 | */ | |
2681 | switch (data->clock) { | |
2682 | case CLOCK_4: | |
2683 | /* If data->clock is CLOCK_4, then select 40M sync table. */ | |
2684 | data->synct = nsp32_sync_table_40M; | |
2685 | data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); | |
2686 | break; | |
2687 | case CLOCK_2: | |
2688 | /* If data->clock is CLOCK_2, then select 20M sync table. */ | |
2689 | data->synct = nsp32_sync_table_20M; | |
2690 | data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M); | |
2691 | break; | |
2692 | case PCICLK: | |
2693 | /* If data->clock is PCICLK, then select pci sync table. */ | |
2694 | data->synct = nsp32_sync_table_pci; | |
2695 | data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci); | |
2696 | break; | |
2697 | default: | |
2698 | nsp32_msg(KERN_WARNING, | |
2699 | "Invalid clock div is selected, set CLOCK_4."); | |
2700 | /* Use default value CLOCK_4 */ | |
2701 | data->clock = CLOCK_4; | |
2702 | data->synct = nsp32_sync_table_40M; | |
2703 | data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); | |
2704 | } | |
2705 | ||
2706 | /* | |
2707 | * setup nsp32_lunt | |
2708 | */ | |
2709 | ||
2710 | /* | |
2711 | * setup DMA | |
2712 | */ | |
6a31a8a6 | 2713 | if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) { |
1da177e4 LT |
2714 | nsp32_msg (KERN_ERR, "failed to set PCI DMA mask"); |
2715 | goto scsi_unregister; | |
2716 | } | |
2717 | ||
2718 | /* | |
2719 | * allocate autoparam DMA resource. | |
2720 | */ | |
6a31a8a6 | 2721 | data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr)); |
1da177e4 LT |
2722 | if (data->autoparam == NULL) { |
2723 | nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); | |
2724 | goto scsi_unregister; | |
2725 | } | |
2726 | ||
2727 | /* | |
2728 | * allocate scatter-gather DMA resource. | |
2729 | */ | |
6a31a8a6 | 2730 | data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE, |
1da177e4 LT |
2731 | &(data->sg_paddr)); |
2732 | if (data->sg_list == NULL) { | |
2733 | nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); | |
2734 | goto free_autoparam; | |
2735 | } | |
2736 | ||
2737 | for (i = 0; i < ARRAY_SIZE(data->lunt); i++) { | |
2738 | for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) { | |
2739 | int offset = i * ARRAY_SIZE(data->lunt[0]) + j; | |
2740 | nsp32_lunt tmp = { | |
2741 | .SCpnt = NULL, | |
2742 | .save_datp = 0, | |
2743 | .msgin03 = FALSE, | |
2744 | .sg_num = 0, | |
2745 | .cur_entry = 0, | |
2746 | .sglun = &(data->sg_list[offset]), | |
2747 | .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)), | |
2748 | }; | |
2749 | ||
2750 | data->lunt[i][j] = tmp; | |
2751 | } | |
2752 | } | |
2753 | ||
2754 | /* | |
2755 | * setup target | |
2756 | */ | |
2757 | for (i = 0; i < ARRAY_SIZE(data->target); i++) { | |
2758 | nsp32_target *target = &(data->target[i]); | |
2759 | ||
2760 | target->limit_entry = 0; | |
2761 | target->sync_flag = 0; | |
2762 | nsp32_set_async(data, target); | |
2763 | } | |
2764 | ||
2765 | /* | |
2766 | * EEPROM check | |
2767 | */ | |
2768 | ret = nsp32_getprom_param(data); | |
2769 | if (ret == FALSE) { | |
2770 | data->resettime = 3; /* default 3 */ | |
2771 | } | |
2772 | ||
2773 | /* | |
2774 | * setup HBA | |
2775 | */ | |
2776 | nsp32hw_init(data); | |
2777 | ||
2778 | snprintf(data->info_str, sizeof(data->info_str), | |
2779 | "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x", | |
2780 | host->irq, host->io_port, host->n_io_port); | |
2781 | ||
2782 | /* | |
2783 | * SCSI bus reset | |
2784 | * | |
2785 | * Note: It's important to reset SCSI bus in initialization phase. | |
2786 | * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when | |
2787 | * system is coming up, so SCSI devices connected to HBA is set as | |
2788 | * un-asynchronous mode. It brings the merit that this HBA is | |
2789 | * ready to start synchronous transfer without any preparation, | |
2790 | * but we are difficult to control transfer speed. In addition, | |
2791 | * it prevents device transfer speed from effecting EEPROM start-up | |
2792 | * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as | |
2793 | * Auto Mode, then FAST-10M is selected when SCSI devices are | |
2794 | * connected same or more than 4 devices. It should be avoided | |
2795 | * depending on this specification. Thus, resetting the SCSI bus | |
2796 | * restores all connected SCSI devices to asynchronous mode, then | |
2797 | * this driver set SDTR safely later, and we can control all SCSI | |
2798 | * device transfer mode. | |
2799 | */ | |
2800 | nsp32_do_bus_reset(data); | |
2801 | ||
c4e00fac | 2802 | ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data); |
1da177e4 LT |
2803 | if (ret < 0) { |
2804 | nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 " | |
2805 | "SCSI PCI controller. Interrupt: %d", host->irq); | |
2806 | goto free_sg_list; | |
2807 | } | |
2808 | ||
2809 | /* | |
2810 | * PCI IO register | |
2811 | */ | |
2812 | res = request_region(host->io_port, host->n_io_port, "nsp32"); | |
2813 | if (res == NULL) { | |
2814 | nsp32_msg(KERN_ERR, | |
2815 | "I/O region 0x%lx+0x%lx is already used", | |
2816 | data->BaseAddress, data->NumAddress); | |
2817 | goto free_irq; | |
2818 | } | |
2819 | ||
6a31a8a6 | 2820 | ret = scsi_add_host(host, &pdev->dev); |
3e7196cf GM |
2821 | if (ret) { |
2822 | nsp32_msg(KERN_ERR, "failed to add scsi host"); | |
2823 | goto free_region; | |
2824 | } | |
1da177e4 | 2825 | scsi_scan_host(host); |
6a31a8a6 AB |
2826 | pci_set_drvdata(pdev, host); |
2827 | return 0; | |
1da177e4 | 2828 | |
3e7196cf GM |
2829 | free_region: |
2830 | release_region(host->io_port, host->n_io_port); | |
2831 | ||
1da177e4 LT |
2832 | free_irq: |
2833 | free_irq(host->irq, data); | |
2834 | ||
2835 | free_sg_list: | |
6a31a8a6 | 2836 | pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE, |
1da177e4 LT |
2837 | data->sg_list, data->sg_paddr); |
2838 | ||
2839 | free_autoparam: | |
6a31a8a6 | 2840 | pci_free_consistent(pdev, sizeof(nsp32_autoparam), |
1da177e4 LT |
2841 | data->autoparam, data->auto_paddr); |
2842 | ||
2843 | scsi_unregister: | |
2844 | scsi_host_put(host); | |
2845 | ||
2846 | err: | |
6a31a8a6 | 2847 | return 1; |
1da177e4 | 2848 | } |
1da177e4 LT |
2849 | |
2850 | static int nsp32_release(struct Scsi_Host *host) | |
2851 | { | |
2852 | nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; | |
2853 | ||
2854 | if (data->autoparam) { | |
2855 | pci_free_consistent(data->Pci, sizeof(nsp32_autoparam), | |
2856 | data->autoparam, data->auto_paddr); | |
2857 | } | |
2858 | ||
2859 | if (data->sg_list) { | |
2860 | pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE, | |
2861 | data->sg_list, data->sg_paddr); | |
2862 | } | |
2863 | ||
2864 | if (host->irq) { | |
2865 | free_irq(host->irq, data); | |
2866 | } | |
2867 | ||
2868 | if (host->io_port && host->n_io_port) { | |
2869 | release_region(host->io_port, host->n_io_port); | |
2870 | } | |
2871 | ||
2872 | if (data->MmioAddress) { | |
2873 | iounmap(data->MmioAddress); | |
2874 | } | |
2875 | ||
2876 | return 0; | |
2877 | } | |
2878 | ||
2879 | static const char *nsp32_info(struct Scsi_Host *shpnt) | |
2880 | { | |
2881 | nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata; | |
2882 | ||
2883 | return data->info_str; | |
2884 | } | |
2885 | ||
2886 | ||
2887 | /**************************************************************************** | |
2888 | * error handler | |
2889 | */ | |
2890 | static int nsp32_eh_abort(struct scsi_cmnd *SCpnt) | |
2891 | { | |
2892 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
2893 | unsigned int base = SCpnt->device->host->io_port; | |
2894 | ||
2895 | nsp32_msg(KERN_WARNING, "abort"); | |
2896 | ||
2897 | if (data->cur_lunt->SCpnt == NULL) { | |
2898 | nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed"); | |
2899 | return FAILED; | |
2900 | } | |
2901 | ||
2902 | if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) { | |
2903 | /* reset SDTR negotiation */ | |
2904 | data->cur_target->sync_flag = 0; | |
2905 | nsp32_set_async(data, data->cur_target); | |
2906 | } | |
2907 | ||
2908 | nsp32_write2(base, TRANSFER_CONTROL, 0); | |
2909 | nsp32_write2(base, BM_CNT, 0); | |
2910 | ||
2911 | SCpnt->result = DID_ABORT << 16; | |
2912 | nsp32_scsi_done(SCpnt); | |
2913 | ||
2914 | nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success"); | |
2915 | return SUCCESS; | |
2916 | } | |
2917 | ||
2918 | static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt) | |
2919 | { | |
2920 | nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; | |
2921 | unsigned int base = SCpnt->device->host->io_port; | |
2922 | ||
68b3aa7c JG |
2923 | spin_lock_irq(SCpnt->device->host->host_lock); |
2924 | ||
1da177e4 LT |
2925 | nsp32_msg(KERN_INFO, "Bus Reset"); |
2926 | nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); | |
2927 | ||
2928 | nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); | |
2929 | nsp32_do_bus_reset(data); | |
2930 | nsp32_write2(base, IRQ_CONTROL, 0); | |
2931 | ||
68b3aa7c | 2932 | spin_unlock_irq(SCpnt->device->host->host_lock); |
1da177e4 LT |
2933 | return SUCCESS; /* SCSI bus reset is succeeded at any time. */ |
2934 | } | |
2935 | ||
2936 | static void nsp32_do_bus_reset(nsp32_hw_data *data) | |
2937 | { | |
2938 | unsigned int base = data->BaseAddress; | |
2939 | unsigned short intrdat; | |
2940 | int i; | |
2941 | ||
2942 | nsp32_dbg(NSP32_DEBUG_BUSRESET, "in"); | |
2943 | ||
2944 | /* | |
2945 | * stop all transfer | |
2946 | * clear TRANSFERCONTROL_BM_START | |
2947 | * clear counter | |
2948 | */ | |
2949 | nsp32_write2(base, TRANSFER_CONTROL, 0); | |
2950 | nsp32_write4(base, BM_CNT, 0); | |
2951 | nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); | |
2952 | ||
2953 | /* | |
2954 | * fall back to asynchronous transfer mode | |
2955 | * initialize SDTR negotiation flag | |
2956 | */ | |
2957 | for (i = 0; i < ARRAY_SIZE(data->target); i++) { | |
2958 | nsp32_target *target = &data->target[i]; | |
2959 | ||
2960 | target->sync_flag = 0; | |
2961 | nsp32_set_async(data, target); | |
2962 | } | |
2963 | ||
2964 | /* | |
2965 | * reset SCSI bus | |
2966 | */ | |
2967 | nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST); | |
2968 | udelay(RESET_HOLD_TIME); | |
2969 | nsp32_write1(base, SCSI_BUS_CONTROL, 0); | |
2970 | for(i = 0; i < 5; i++) { | |
2971 | intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */ | |
2972 | nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat); | |
2973 | } | |
2974 | ||
2975 | data->CurrentSC = NULL; | |
2976 | } | |
2977 | ||
2978 | static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt) | |
2979 | { | |
2980 | struct Scsi_Host *host = SCpnt->device->host; | |
2981 | unsigned int base = SCpnt->device->host->io_port; | |
2982 | nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; | |
2983 | ||
2984 | nsp32_msg(KERN_INFO, "Host Reset"); | |
2985 | nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); | |
2986 | ||
df0ae249 JG |
2987 | spin_lock_irq(SCpnt->device->host->host_lock); |
2988 | ||
1da177e4 LT |
2989 | nsp32hw_init(data); |
2990 | nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); | |
2991 | nsp32_do_bus_reset(data); | |
2992 | nsp32_write2(base, IRQ_CONTROL, 0); | |
2993 | ||
df0ae249 | 2994 | spin_unlock_irq(SCpnt->device->host->host_lock); |
1da177e4 LT |
2995 | return SUCCESS; /* Host reset is succeeded at any time. */ |
2996 | } | |
2997 | ||
2998 | ||
2999 | /************************************************************************** | |
3000 | * EEPROM handler | |
3001 | */ | |
3002 | ||
3003 | /* | |
3004 | * getting EEPROM parameter | |
3005 | */ | |
3006 | static int nsp32_getprom_param(nsp32_hw_data *data) | |
3007 | { | |
3008 | int vendor = data->pci_devid->vendor; | |
3009 | int device = data->pci_devid->device; | |
3010 | int ret, val, i; | |
3011 | ||
3012 | /* | |
3013 | * EEPROM checking. | |
3014 | */ | |
3015 | ret = nsp32_prom_read(data, 0x7e); | |
3016 | if (ret != 0x55) { | |
3017 | nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret); | |
3018 | return FALSE; | |
3019 | } | |
3020 | ret = nsp32_prom_read(data, 0x7f); | |
3021 | if (ret != 0xaa) { | |
3022 | nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret); | |
3023 | return FALSE; | |
3024 | } | |
3025 | ||
3026 | /* | |
3027 | * check EEPROM type | |
3028 | */ | |
3029 | if (vendor == PCI_VENDOR_ID_WORKBIT && | |
3030 | device == PCI_DEVICE_ID_WORKBIT_STANDARD) { | |
3031 | ret = nsp32_getprom_c16(data); | |
3032 | } else if (vendor == PCI_VENDOR_ID_WORKBIT && | |
3033 | device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) { | |
3034 | ret = nsp32_getprom_at24(data); | |
3035 | } else if (vendor == PCI_VENDOR_ID_WORKBIT && | |
3036 | device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) { | |
3037 | ret = nsp32_getprom_at24(data); | |
3038 | } else { | |
3039 | nsp32_msg(KERN_WARNING, "Unknown EEPROM"); | |
3040 | ret = FALSE; | |
3041 | } | |
3042 | ||
3043 | /* for debug : SPROM data full checking */ | |
3044 | for (i = 0; i <= 0x1f; i++) { | |
3045 | val = nsp32_prom_read(data, i); | |
3046 | nsp32_dbg(NSP32_DEBUG_EEPROM, | |
3047 | "rom address 0x%x : 0x%x", i, val); | |
3048 | } | |
3049 | ||
3050 | return ret; | |
3051 | } | |
3052 | ||
3053 | ||
3054 | /* | |
3055 | * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map: | |
3056 | * | |
3057 | * ROMADDR | |
3058 | * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) | |
3059 | * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M | |
3060 | * 0x07 : HBA Synchronous Transfer Period | |
3061 | * Value 0: AutoSync, 1: Manual Setting | |
3062 | * 0x08 - 0x0f : Not Used? (0x0) | |
3063 | * 0x10 : Bus Termination | |
3064 | * Value 0: Auto[ON], 1: ON, 2: OFF | |
3065 | * 0x11 : Not Used? (0) | |
3066 | * 0x12 : Bus Reset Delay Time (0x03) | |
3067 | * 0x13 : Bootable CD Support | |
3068 | * Value 0: Disable, 1: Enable | |
3069 | * 0x14 : Device Scan | |
3070 | * Bit 7 6 5 4 3 2 1 0 | |
3071 | * | <-----------------> | |
3072 | * | SCSI ID: Value 0: Skip, 1: YES | |
3073 | * |-> Value 0: ALL scan, Value 1: Manual | |
3074 | * 0x15 - 0x1b : Not Used? (0) | |
3075 | * 0x1c : Constant? (0x01) (clock div?) | |
3076 | * 0x1d - 0x7c : Not Used (0xff) | |
3077 | * 0x7d : Not Used? (0xff) | |
3078 | * 0x7e : Constant (0x55), Validity signature | |
3079 | * 0x7f : Constant (0xaa), Validity signature | |
3080 | */ | |
3081 | static int nsp32_getprom_at24(nsp32_hw_data *data) | |
3082 | { | |
3083 | int ret, i; | |
3084 | int auto_sync; | |
3085 | nsp32_target *target; | |
3086 | int entry; | |
3087 | ||
3088 | /* | |
3089 | * Reset time which is designated by EEPROM. | |
3090 | * | |
3091 | * TODO: Not used yet. | |
3092 | */ | |
3093 | data->resettime = nsp32_prom_read(data, 0x12); | |
3094 | ||
3095 | /* | |
3096 | * HBA Synchronous Transfer Period | |
3097 | * | |
3098 | * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says | |
3099 | * that if auto_sync is 0 (auto), and connected SCSI devices are | |
3100 | * same or lower than 3, then transfer speed is set as ULTRA-20M. | |
3101 | * On the contrary if connected SCSI devices are same or higher | |
3102 | * than 4, then transfer speed is set as FAST-10M. | |
3103 | * | |
3104 | * I break this rule. The number of connected SCSI devices are | |
3105 | * only ignored. If auto_sync is 0 (auto), then transfer speed is | |
3106 | * forced as ULTRA-20M. | |
3107 | */ | |
3108 | ret = nsp32_prom_read(data, 0x07); | |
3109 | switch (ret) { | |
3110 | case 0: | |
3111 | auto_sync = TRUE; | |
3112 | break; | |
3113 | case 1: | |
3114 | auto_sync = FALSE; | |
3115 | break; | |
3116 | default: | |
3117 | nsp32_msg(KERN_WARNING, | |
3118 | "Unsupported Auto Sync mode. Fall back to manual mode."); | |
3119 | auto_sync = TRUE; | |
3120 | } | |
3121 | ||
3122 | if (trans_mode == ULTRA20M_MODE) { | |
3123 | auto_sync = TRUE; | |
3124 | } | |
3125 | ||
3126 | /* | |
3127 | * each device Synchronous Transfer Period | |
3128 | */ | |
3129 | for (i = 0; i < NSP32_HOST_SCSIID; i++) { | |
3130 | target = &data->target[i]; | |
3131 | if (auto_sync == TRUE) { | |
3132 | target->limit_entry = 0; /* set as ULTRA20M */ | |
3133 | } else { | |
3134 | ret = nsp32_prom_read(data, i); | |
3135 | entry = nsp32_search_period_entry(data, target, ret); | |
3136 | if (entry < 0) { | |
3137 | /* search failed... set maximum speed */ | |
3138 | entry = 0; | |
3139 | } | |
3140 | target->limit_entry = entry; | |
3141 | } | |
3142 | } | |
3143 | ||
3144 | return TRUE; | |
3145 | } | |
3146 | ||
3147 | ||
3148 | /* | |
3149 | * C16 110 (I-O Data: SC-NBD) data map: | |
3150 | * | |
3151 | * ROMADDR | |
3152 | * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) | |
3153 | * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC | |
3154 | * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync) | |
3155 | * 0x08 - 0x0f : Not Used? (0x0) | |
3156 | * 0x10 : Transfer Mode | |
3157 | * Value 0: PIO, 1: Busmater | |
3158 | * 0x11 : Bus Reset Delay Time (0x00-0x20) | |
3159 | * 0x12 : Bus Termination | |
3160 | * Value 0: Disable, 1: Enable | |
3161 | * 0x13 - 0x19 : Disconnection | |
3162 | * Value 0: Disable, 1: Enable | |
3163 | * 0x1a - 0x7c : Not Used? (0) | |
3164 | * 0x7d : Not Used? (0xf8) | |
3165 | * 0x7e : Constant (0x55), Validity signature | |
3166 | * 0x7f : Constant (0xaa), Validity signature | |
3167 | */ | |
3168 | static int nsp32_getprom_c16(nsp32_hw_data *data) | |
3169 | { | |
3170 | int ret, i; | |
3171 | nsp32_target *target; | |
3172 | int entry, val; | |
3173 | ||
3174 | /* | |
3175 | * Reset time which is designated by EEPROM. | |
3176 | * | |
3177 | * TODO: Not used yet. | |
3178 | */ | |
3179 | data->resettime = nsp32_prom_read(data, 0x11); | |
3180 | ||
3181 | /* | |
3182 | * each device Synchronous Transfer Period | |
3183 | */ | |
3184 | for (i = 0; i < NSP32_HOST_SCSIID; i++) { | |
3185 | target = &data->target[i]; | |
3186 | ret = nsp32_prom_read(data, i); | |
3187 | switch (ret) { | |
3188 | case 0: /* 20MB/s */ | |
3189 | val = 0x0c; | |
3190 | break; | |
3191 | case 1: /* 10MB/s */ | |
3192 | val = 0x19; | |
3193 | break; | |
3194 | case 2: /* 5MB/s */ | |
3195 | val = 0x32; | |
3196 | break; | |
3197 | case 3: /* ASYNC */ | |
3198 | val = 0x00; | |
3199 | break; | |
3200 | default: /* default 20MB/s */ | |
3201 | val = 0x0c; | |
3202 | break; | |
3203 | } | |
3204 | entry = nsp32_search_period_entry(data, target, val); | |
3205 | if (entry < 0 || trans_mode == ULTRA20M_MODE) { | |
3206 | /* search failed... set maximum speed */ | |
3207 | entry = 0; | |
3208 | } | |
3209 | target->limit_entry = entry; | |
3210 | } | |
3211 | ||
3212 | return TRUE; | |
3213 | } | |
3214 | ||
3215 | ||
3216 | /* | |
3217 | * Atmel AT24C01A (drived in 5V) serial EEPROM routines | |
3218 | */ | |
3219 | static int nsp32_prom_read(nsp32_hw_data *data, int romaddr) | |
3220 | { | |
3221 | int i, val; | |
3222 | ||
3223 | /* start condition */ | |
3224 | nsp32_prom_start(data); | |
3225 | ||
3226 | /* device address */ | |
3227 | nsp32_prom_write_bit(data, 1); /* 1 */ | |
3228 | nsp32_prom_write_bit(data, 0); /* 0 */ | |
3229 | nsp32_prom_write_bit(data, 1); /* 1 */ | |
3230 | nsp32_prom_write_bit(data, 0); /* 0 */ | |
3231 | nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ | |
3232 | nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ | |
3233 | nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ | |
3234 | ||
3235 | /* R/W: W for dummy write */ | |
3236 | nsp32_prom_write_bit(data, 0); | |
3237 | ||
3238 | /* ack */ | |
3239 | nsp32_prom_write_bit(data, 0); | |
3240 | ||
3241 | /* word address */ | |
3242 | for (i = 7; i >= 0; i--) { | |
3243 | nsp32_prom_write_bit(data, ((romaddr >> i) & 1)); | |
3244 | } | |
3245 | ||
3246 | /* ack */ | |
3247 | nsp32_prom_write_bit(data, 0); | |
3248 | ||
3249 | /* start condition */ | |
3250 | nsp32_prom_start(data); | |
3251 | ||
3252 | /* device address */ | |
3253 | nsp32_prom_write_bit(data, 1); /* 1 */ | |
3254 | nsp32_prom_write_bit(data, 0); /* 0 */ | |
3255 | nsp32_prom_write_bit(data, 1); /* 1 */ | |
3256 | nsp32_prom_write_bit(data, 0); /* 0 */ | |
3257 | nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ | |
3258 | nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ | |
3259 | nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ | |
3260 | ||
3261 | /* R/W: R */ | |
3262 | nsp32_prom_write_bit(data, 1); | |
3263 | ||
3264 | /* ack */ | |
3265 | nsp32_prom_write_bit(data, 0); | |
3266 | ||
3267 | /* data... */ | |
3268 | val = 0; | |
3269 | for (i = 7; i >= 0; i--) { | |
3270 | val += (nsp32_prom_read_bit(data) << i); | |
3271 | } | |
3272 | ||
3273 | /* no ack */ | |
3274 | nsp32_prom_write_bit(data, 1); | |
3275 | ||
3276 | /* stop condition */ | |
3277 | nsp32_prom_stop(data); | |
3278 | ||
3279 | return val; | |
3280 | } | |
3281 | ||
3282 | static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val) | |
3283 | { | |
3284 | int base = data->BaseAddress; | |
3285 | int tmp; | |
3286 | ||
3287 | tmp = nsp32_index_read1(base, SERIAL_ROM_CTL); | |
3288 | ||
3289 | if (val == 0) { | |
3290 | tmp &= ~bit; | |
3291 | } else { | |
3292 | tmp |= bit; | |
3293 | } | |
3294 | ||
3295 | nsp32_index_write1(base, SERIAL_ROM_CTL, tmp); | |
3296 | ||
3297 | udelay(10); | |
3298 | } | |
3299 | ||
3300 | static int nsp32_prom_get(nsp32_hw_data *data, int bit) | |
3301 | { | |
3302 | int base = data->BaseAddress; | |
3303 | int tmp, ret; | |
3304 | ||
3305 | if (bit != SDA) { | |
3306 | nsp32_msg(KERN_ERR, "return value is not appropriate"); | |
3307 | return 0; | |
3308 | } | |
3309 | ||
3310 | ||
3311 | tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit; | |
3312 | ||
3313 | if (tmp == 0) { | |
3314 | ret = 0; | |
3315 | } else { | |
3316 | ret = 1; | |
3317 | } | |
3318 | ||
3319 | udelay(10); | |
3320 | ||
3321 | return ret; | |
3322 | } | |
3323 | ||
3324 | static void nsp32_prom_start (nsp32_hw_data *data) | |
3325 | { | |
3326 | /* start condition */ | |
3327 | nsp32_prom_set(data, SCL, 1); | |
3328 | nsp32_prom_set(data, SDA, 1); | |
3329 | nsp32_prom_set(data, ENA, 1); /* output mode */ | |
3330 | nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting | |
3331 | * SDA 1->0 is start condition */ | |
3332 | nsp32_prom_set(data, SCL, 0); | |
3333 | } | |
3334 | ||
3335 | static void nsp32_prom_stop (nsp32_hw_data *data) | |
3336 | { | |
3337 | /* stop condition */ | |
3338 | nsp32_prom_set(data, SCL, 1); | |
3339 | nsp32_prom_set(data, SDA, 0); | |
3340 | nsp32_prom_set(data, ENA, 1); /* output mode */ | |
3341 | nsp32_prom_set(data, SDA, 1); | |
3342 | nsp32_prom_set(data, SCL, 0); | |
3343 | } | |
3344 | ||
3345 | static void nsp32_prom_write_bit(nsp32_hw_data *data, int val) | |
3346 | { | |
3347 | /* write */ | |
3348 | nsp32_prom_set(data, SDA, val); | |
3349 | nsp32_prom_set(data, SCL, 1 ); | |
3350 | nsp32_prom_set(data, SCL, 0 ); | |
3351 | } | |
3352 | ||
3353 | static int nsp32_prom_read_bit(nsp32_hw_data *data) | |
3354 | { | |
3355 | int val; | |
3356 | ||
3357 | /* read */ | |
3358 | nsp32_prom_set(data, ENA, 0); /* input mode */ | |
3359 | nsp32_prom_set(data, SCL, 1); | |
3360 | ||
3361 | val = nsp32_prom_get(data, SDA); | |
3362 | ||
3363 | nsp32_prom_set(data, SCL, 0); | |
3364 | nsp32_prom_set(data, ENA, 1); /* output mode */ | |
3365 | ||
3366 | return val; | |
3367 | } | |
3368 | ||
3369 | ||
3370 | /************************************************************************** | |
3371 | * Power Management | |
3372 | */ | |
3373 | #ifdef CONFIG_PM | |
3374 | ||
3375 | /* Device suspended */ | |
e5378ca8 | 3376 | static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state) |
1da177e4 LT |
3377 | { |
3378 | struct Scsi_Host *host = pci_get_drvdata(pdev); | |
3379 | ||
3380 | nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host); | |
3381 | ||
3382 | pci_save_state (pdev); | |
3383 | pci_disable_device (pdev); | |
e5378ca8 | 3384 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
1da177e4 LT |
3385 | |
3386 | return 0; | |
3387 | } | |
3388 | ||
3389 | /* Device woken up */ | |
3390 | static int nsp32_resume(struct pci_dev *pdev) | |
3391 | { | |
3392 | struct Scsi_Host *host = pci_get_drvdata(pdev); | |
3393 | nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; | |
3394 | unsigned short reg; | |
3395 | ||
3396 | nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host); | |
3397 | ||
e5378ca8 PM |
3398 | pci_set_power_state(pdev, PCI_D0); |
3399 | pci_enable_wake (pdev, PCI_D0, 0); | |
1da177e4 LT |
3400 | pci_restore_state (pdev); |
3401 | ||
3402 | reg = nsp32_read2(data->BaseAddress, INDEX_REG); | |
3403 | ||
3404 | nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg); | |
3405 | ||
3406 | if (reg == 0xffff) { | |
3407 | nsp32_msg(KERN_INFO, "missing device. abort resume."); | |
3408 | return 0; | |
3409 | } | |
3410 | ||
3411 | nsp32hw_init (data); | |
3412 | nsp32_do_bus_reset(data); | |
3413 | ||
3414 | nsp32_msg(KERN_INFO, "resume success"); | |
3415 | ||
3416 | return 0; | |
3417 | } | |
3418 | ||
3419 | /* Enable wake event */ | |
e5378ca8 | 3420 | static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable) |
1da177e4 LT |
3421 | { |
3422 | struct Scsi_Host *host = pci_get_drvdata(pdev); | |
3423 | ||
3424 | nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host); | |
3425 | ||
3426 | return 0; | |
3427 | } | |
3428 | #endif | |
3429 | ||
3430 | /************************************************************************ | |
3431 | * PCI/Cardbus probe/remove routine | |
3432 | */ | |
3433 | static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
3434 | { | |
3435 | int ret; | |
3436 | nsp32_hw_data *data = &nsp32_data_base; | |
3437 | ||
3438 | nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); | |
3439 | ||
3440 | ret = pci_enable_device(pdev); | |
3441 | if (ret) { | |
3442 | nsp32_msg(KERN_ERR, "failed to enable pci device"); | |
3443 | return ret; | |
3444 | } | |
3445 | ||
3446 | data->Pci = pdev; | |
3447 | data->pci_devid = id; | |
3448 | data->IrqNumber = pdev->irq; | |
3449 | data->BaseAddress = pci_resource_start(pdev, 0); | |
3450 | data->NumAddress = pci_resource_len (pdev, 0); | |
3451 | data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1), | |
3452 | pci_resource_len (pdev, 1)); | |
3453 | data->MmioLength = pci_resource_len (pdev, 1); | |
3454 | ||
3455 | pci_set_master(pdev); | |
3456 | ||
1da177e4 | 3457 | ret = nsp32_detect(pdev); |
1da177e4 LT |
3458 | |
3459 | nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s", | |
3460 | pdev->irq, | |
3461 | data->MmioAddress, data->MmioLength, | |
3462 | pci_name(pdev), | |
3463 | nsp32_model[id->driver_data]); | |
3464 | ||
3465 | nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret); | |
3466 | ||
3467 | return ret; | |
3468 | } | |
3469 | ||
3470 | static void __devexit nsp32_remove(struct pci_dev *pdev) | |
3471 | { | |
1da177e4 | 3472 | struct Scsi_Host *host = pci_get_drvdata(pdev); |
1da177e4 LT |
3473 | |
3474 | nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); | |
3475 | ||
1da177e4 LT |
3476 | scsi_remove_host(host); |
3477 | ||
3478 | nsp32_release(host); | |
3479 | ||
3480 | scsi_host_put(host); | |
1da177e4 LT |
3481 | } |
3482 | ||
1da177e4 LT |
3483 | static struct pci_driver nsp32_driver = { |
3484 | .name = "nsp32", | |
3485 | .id_table = nsp32_pci_table, | |
3486 | .probe = nsp32_probe, | |
3487 | .remove = __devexit_p(nsp32_remove), | |
3488 | #ifdef CONFIG_PM | |
3489 | .suspend = nsp32_suspend, | |
3490 | .resume = nsp32_resume, | |
3491 | .enable_wake = nsp32_enable_wake, | |
3492 | #endif | |
3493 | }; | |
3494 | ||
3495 | /********************************************************************* | |
3496 | * Moule entry point | |
3497 | */ | |
3498 | static int __init init_nsp32(void) { | |
3499 | nsp32_msg(KERN_INFO, "loading..."); | |
dcbccbde | 3500 | return pci_register_driver(&nsp32_driver); |
1da177e4 LT |
3501 | } |
3502 | ||
3503 | static void __exit exit_nsp32(void) { | |
3504 | nsp32_msg(KERN_INFO, "unloading..."); | |
3505 | pci_unregister_driver(&nsp32_driver); | |
3506 | } | |
3507 | ||
3508 | module_init(init_nsp32); | |
3509 | module_exit(exit_nsp32); | |
3510 | ||
3511 | /* end */ |