Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * SCSI low-level driver for the 53c94 SCSI bus adaptor found | |
3 | * on Power Macintosh computers, controlling the external SCSI chain. | |
4 | * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA) | |
5 | * controller. | |
6 | * | |
7 | * Paul Mackerras, August 1996. | |
8 | * Copyright (C) 1996 Paul Mackerras. | |
9 | */ | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/delay.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/string.h> | |
14 | #include <linux/slab.h> | |
15 | #include <linux/blkdev.h> | |
16 | #include <linux/proc_fs.h> | |
17 | #include <linux/stat.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <asm/dbdma.h> | |
21 | #include <asm/io.h> | |
22 | #include <asm/pgtable.h> | |
23 | #include <asm/prom.h> | |
24 | #include <asm/system.h> | |
25 | #include <asm/pci-bridge.h> | |
26 | #include <asm/macio.h> | |
27 | ||
28 | #include <scsi/scsi.h> | |
29 | #include <scsi/scsi_cmnd.h> | |
30 | #include <scsi/scsi_device.h> | |
31 | #include <scsi/scsi_host.h> | |
32 | ||
33 | #include "mac53c94.h" | |
34 | ||
35 | enum fsc_phase { | |
36 | idle, | |
37 | selecting, | |
38 | dataing, | |
39 | completing, | |
40 | busfreeing, | |
41 | }; | |
42 | ||
43 | struct fsc_state { | |
44 | struct mac53c94_regs __iomem *regs; | |
45 | int intr; | |
46 | struct dbdma_regs __iomem *dma; | |
47 | int dmaintr; | |
48 | int clk_freq; | |
49 | struct Scsi_Host *host; | |
50 | struct scsi_cmnd *request_q; | |
51 | struct scsi_cmnd *request_qtail; | |
52 | struct scsi_cmnd *current_req; /* req we're currently working on */ | |
53 | enum fsc_phase phase; /* what we're currently trying to do */ | |
54 | struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */ | |
55 | void *dma_cmd_space; | |
56 | struct pci_dev *pdev; | |
57 | dma_addr_t dma_addr; | |
58 | struct macio_dev *mdev; | |
59 | }; | |
60 | ||
61 | static void mac53c94_init(struct fsc_state *); | |
62 | static void mac53c94_start(struct fsc_state *); | |
7d12e780 DH |
63 | static void mac53c94_interrupt(int, void *); |
64 | static irqreturn_t do_mac53c94_interrupt(int, void *); | |
1da177e4 LT |
65 | static void cmd_done(struct fsc_state *, int result); |
66 | static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *); | |
67 | ||
68 | ||
69 | static int mac53c94_queue(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)) | |
70 | { | |
71 | struct fsc_state *state; | |
72 | ||
73 | #if 0 | |
74 | if (cmd->sc_data_direction == DMA_TO_DEVICE) { | |
75 | int i; | |
76 | printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd); | |
77 | for (i = 0; i < cmd->cmd_len; ++i) | |
78 | printk(" %.2x", cmd->cmnd[i]); | |
79 | printk("\n" KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n", | |
646158c2 | 80 | scsi_sg_count(cmd), scsi_bufflen(cmd), scsi_sglist(cmd)); |
1da177e4 LT |
81 | } |
82 | #endif | |
83 | ||
84 | cmd->scsi_done = done; | |
85 | cmd->host_scribble = NULL; | |
86 | ||
87 | state = (struct fsc_state *) cmd->device->host->hostdata; | |
88 | ||
89 | if (state->request_q == NULL) | |
90 | state->request_q = cmd; | |
91 | else | |
92 | state->request_qtail->host_scribble = (void *) cmd; | |
93 | state->request_qtail = cmd; | |
94 | ||
95 | if (state->phase == idle) | |
96 | mac53c94_start(state); | |
97 | ||
98 | return 0; | |
99 | } | |
100 | ||
1da177e4 LT |
101 | static int mac53c94_host_reset(struct scsi_cmnd *cmd) |
102 | { | |
103 | struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata; | |
104 | struct mac53c94_regs __iomem *regs = state->regs; | |
105 | struct dbdma_regs __iomem *dma = state->dma; | |
df0ae249 JG |
106 | unsigned long flags; |
107 | ||
108 | spin_lock_irqsave(cmd->device->host->host_lock, flags); | |
1da177e4 LT |
109 | |
110 | writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); | |
111 | writeb(CMD_SCSI_RESET, ®s->command); /* assert RST */ | |
112 | udelay(100); /* leave it on for a while (>= 25us) */ | |
113 | writeb(CMD_RESET, ®s->command); | |
114 | udelay(20); | |
115 | mac53c94_init(state); | |
116 | writeb(CMD_NOP, ®s->command); | |
df0ae249 JG |
117 | |
118 | spin_unlock_irqrestore(cmd->device->host->host_lock, flags); | |
1da177e4 LT |
119 | return SUCCESS; |
120 | } | |
121 | ||
122 | static void mac53c94_init(struct fsc_state *state) | |
123 | { | |
124 | struct mac53c94_regs __iomem *regs = state->regs; | |
125 | struct dbdma_regs __iomem *dma = state->dma; | |
126 | int x; | |
127 | ||
128 | writeb(state->host->this_id | CF1_PAR_ENABLE, ®s->config1); | |
129 | writeb(TIMO_VAL(250), ®s->sel_timeout); /* 250ms */ | |
130 | writeb(CLKF_VAL(state->clk_freq), ®s->clk_factor); | |
131 | writeb(CF2_FEATURE_EN, ®s->config2); | |
132 | writeb(0, ®s->config3); | |
133 | writeb(0, ®s->sync_period); | |
134 | writeb(0, ®s->sync_offset); | |
135 | x = readb(®s->interrupt); | |
136 | writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); | |
137 | } | |
138 | ||
139 | /* | |
140 | * Start the next command for a 53C94. | |
141 | * Should be called with interrupts disabled. | |
142 | */ | |
143 | static void mac53c94_start(struct fsc_state *state) | |
144 | { | |
145 | struct scsi_cmnd *cmd; | |
146 | struct mac53c94_regs __iomem *regs = state->regs; | |
147 | int i; | |
148 | ||
149 | if (state->phase != idle || state->current_req != NULL) | |
150 | panic("inappropriate mac53c94_start (state=%p)", state); | |
151 | if (state->request_q == NULL) | |
152 | return; | |
153 | state->current_req = cmd = state->request_q; | |
154 | state->request_q = (struct scsi_cmnd *) cmd->host_scribble; | |
155 | ||
156 | /* Off we go */ | |
157 | writeb(0, ®s->count_lo); | |
158 | writeb(0, ®s->count_mid); | |
159 | writeb(0, ®s->count_hi); | |
160 | writeb(CMD_NOP + CMD_DMA_MODE, ®s->command); | |
161 | udelay(1); | |
162 | writeb(CMD_FLUSH, ®s->command); | |
163 | udelay(1); | |
164 | writeb(cmd->device->id, ®s->dest_id); | |
165 | writeb(0, ®s->sync_period); | |
166 | writeb(0, ®s->sync_offset); | |
167 | ||
168 | /* load the command into the FIFO */ | |
169 | for (i = 0; i < cmd->cmd_len; ++i) | |
170 | writeb(cmd->cmnd[i], ®s->fifo); | |
171 | ||
172 | /* do select without ATN XXX */ | |
173 | writeb(CMD_SELECT, ®s->command); | |
174 | state->phase = selecting; | |
175 | ||
646158c2 | 176 | set_dma_cmds(state, cmd); |
1da177e4 LT |
177 | } |
178 | ||
7d12e780 | 179 | static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id) |
1da177e4 LT |
180 | { |
181 | unsigned long flags; | |
182 | struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host; | |
183 | ||
184 | spin_lock_irqsave(dev->host_lock, flags); | |
7d12e780 | 185 | mac53c94_interrupt(irq, dev_id); |
1da177e4 LT |
186 | spin_unlock_irqrestore(dev->host_lock, flags); |
187 | return IRQ_HANDLED; | |
188 | } | |
189 | ||
7d12e780 | 190 | static void mac53c94_interrupt(int irq, void *dev_id) |
1da177e4 LT |
191 | { |
192 | struct fsc_state *state = (struct fsc_state *) dev_id; | |
193 | struct mac53c94_regs __iomem *regs = state->regs; | |
194 | struct dbdma_regs __iomem *dma = state->dma; | |
195 | struct scsi_cmnd *cmd = state->current_req; | |
196 | int nb, stat, seq, intr; | |
197 | static int mac53c94_errors; | |
198 | ||
199 | /* | |
200 | * Apparently, reading the interrupt register unlatches | |
201 | * the status and sequence step registers. | |
202 | */ | |
203 | seq = readb(®s->seqstep); | |
204 | stat = readb(®s->status); | |
205 | intr = readb(®s->interrupt); | |
206 | ||
207 | #if 0 | |
208 | printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n", | |
209 | intr, stat, seq, state->phase); | |
210 | #endif | |
211 | ||
212 | if (intr & INTR_RESET) { | |
213 | /* SCSI bus was reset */ | |
214 | printk(KERN_INFO "external SCSI bus reset detected\n"); | |
215 | writeb(CMD_NOP, ®s->command); | |
216 | writel(RUN << 16, &dma->control); /* stop dma */ | |
217 | cmd_done(state, DID_RESET << 16); | |
218 | return; | |
219 | } | |
220 | if (intr & INTR_ILL_CMD) { | |
221 | printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n", | |
222 | intr, stat, seq, state->phase); | |
223 | cmd_done(state, DID_ERROR << 16); | |
224 | return; | |
225 | } | |
226 | if (stat & STAT_ERROR) { | |
227 | #if 0 | |
228 | /* XXX these seem to be harmless? */ | |
229 | printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n", | |
230 | intr, stat, seq, state->phase); | |
231 | #endif | |
232 | ++mac53c94_errors; | |
233 | writeb(CMD_NOP + CMD_DMA_MODE, ®s->command); | |
234 | } | |
235 | if (cmd == 0) { | |
236 | printk(KERN_DEBUG "53c94: interrupt with no command active?\n"); | |
237 | return; | |
238 | } | |
239 | if (stat & STAT_PARITY) { | |
240 | printk(KERN_ERR "mac53c94: parity error\n"); | |
241 | cmd_done(state, DID_PARITY << 16); | |
242 | return; | |
243 | } | |
244 | switch (state->phase) { | |
245 | case selecting: | |
246 | if (intr & INTR_DISCONNECT) { | |
247 | /* selection timed out */ | |
248 | cmd_done(state, DID_BAD_TARGET << 16); | |
249 | return; | |
250 | } | |
251 | if (intr != INTR_BUS_SERV + INTR_DONE) { | |
252 | printk(KERN_DEBUG "got intr %x during selection\n", intr); | |
253 | cmd_done(state, DID_ERROR << 16); | |
254 | return; | |
255 | } | |
256 | if ((seq & SS_MASK) != SS_DONE) { | |
257 | printk(KERN_DEBUG "seq step %x after command\n", seq); | |
258 | cmd_done(state, DID_ERROR << 16); | |
259 | return; | |
260 | } | |
261 | writeb(CMD_NOP, ®s->command); | |
262 | /* set DMA controller going if any data to transfer */ | |
263 | if ((stat & (STAT_MSG|STAT_CD)) == 0 | |
646158c2 | 264 | && (scsi_sg_count(cmd) > 0 || scsi_bufflen(cmd))) { |
1da177e4 LT |
265 | nb = cmd->SCp.this_residual; |
266 | if (nb > 0xfff0) | |
267 | nb = 0xfff0; | |
268 | cmd->SCp.this_residual -= nb; | |
269 | writeb(nb, ®s->count_lo); | |
270 | writeb(nb >> 8, ®s->count_mid); | |
271 | writeb(CMD_DMA_MODE + CMD_NOP, ®s->command); | |
272 | writel(virt_to_phys(state->dma_cmds), &dma->cmdptr); | |
273 | writel((RUN << 16) | RUN, &dma->control); | |
274 | writeb(CMD_DMA_MODE + CMD_XFER_DATA, ®s->command); | |
275 | state->phase = dataing; | |
276 | break; | |
277 | } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) { | |
278 | /* up to status phase already */ | |
279 | writeb(CMD_I_COMPLETE, ®s->command); | |
280 | state->phase = completing; | |
281 | } else { | |
282 | printk(KERN_DEBUG "in unexpected phase %x after cmd\n", | |
283 | stat & STAT_PHASE); | |
284 | cmd_done(state, DID_ERROR << 16); | |
285 | return; | |
286 | } | |
287 | break; | |
288 | ||
289 | case dataing: | |
290 | if (intr != INTR_BUS_SERV) { | |
291 | printk(KERN_DEBUG "got intr %x before status\n", intr); | |
292 | cmd_done(state, DID_ERROR << 16); | |
293 | return; | |
294 | } | |
295 | if (cmd->SCp.this_residual != 0 | |
296 | && (stat & (STAT_MSG|STAT_CD)) == 0) { | |
297 | /* Set up the count regs to transfer more */ | |
298 | nb = cmd->SCp.this_residual; | |
299 | if (nb > 0xfff0) | |
300 | nb = 0xfff0; | |
301 | cmd->SCp.this_residual -= nb; | |
302 | writeb(nb, ®s->count_lo); | |
303 | writeb(nb >> 8, ®s->count_mid); | |
304 | writeb(CMD_DMA_MODE + CMD_NOP, ®s->command); | |
305 | writeb(CMD_DMA_MODE + CMD_XFER_DATA, ®s->command); | |
306 | break; | |
307 | } | |
308 | if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) { | |
309 | printk(KERN_DEBUG "intr %x before data xfer complete\n", intr); | |
310 | } | |
311 | writel(RUN << 16, &dma->control); /* stop dma */ | |
646158c2 | 312 | scsi_dma_unmap(cmd); |
1da177e4 LT |
313 | /* should check dma status */ |
314 | writeb(CMD_I_COMPLETE, ®s->command); | |
315 | state->phase = completing; | |
316 | break; | |
317 | case completing: | |
318 | if (intr != INTR_DONE) { | |
319 | printk(KERN_DEBUG "got intr %x on completion\n", intr); | |
320 | cmd_done(state, DID_ERROR << 16); | |
321 | return; | |
322 | } | |
323 | cmd->SCp.Status = readb(®s->fifo); | |
324 | cmd->SCp.Message = readb(®s->fifo); | |
325 | cmd->result = CMD_ACCEPT_MSG; | |
326 | writeb(CMD_ACCEPT_MSG, ®s->command); | |
327 | state->phase = busfreeing; | |
328 | break; | |
329 | case busfreeing: | |
330 | if (intr != INTR_DISCONNECT) { | |
331 | printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr); | |
332 | } | |
333 | cmd_done(state, (DID_OK << 16) + (cmd->SCp.Message << 8) | |
334 | + cmd->SCp.Status); | |
335 | break; | |
336 | default: | |
337 | printk(KERN_DEBUG "don't know about phase %d\n", state->phase); | |
338 | } | |
339 | } | |
340 | ||
341 | static void cmd_done(struct fsc_state *state, int result) | |
342 | { | |
343 | struct scsi_cmnd *cmd; | |
344 | ||
345 | cmd = state->current_req; | |
346 | if (cmd != 0) { | |
347 | cmd->result = result; | |
348 | (*cmd->scsi_done)(cmd); | |
349 | state->current_req = NULL; | |
350 | } | |
351 | state->phase = idle; | |
352 | mac53c94_start(state); | |
353 | } | |
354 | ||
355 | /* | |
356 | * Set up DMA commands for transferring data. | |
357 | */ | |
358 | static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd) | |
359 | { | |
646158c2 | 360 | int i, dma_cmd, total, nseg; |
1da177e4 LT |
361 | struct scatterlist *scl; |
362 | struct dbdma_cmd *dcmds; | |
363 | dma_addr_t dma_addr; | |
364 | u32 dma_len; | |
365 | ||
646158c2 FT |
366 | nseg = scsi_dma_map(cmd); |
367 | BUG_ON(nseg < 0); | |
368 | if (!nseg) | |
369 | return; | |
370 | ||
1da177e4 LT |
371 | dma_cmd = cmd->sc_data_direction == DMA_TO_DEVICE ? |
372 | OUTPUT_MORE : INPUT_MORE; | |
373 | dcmds = state->dma_cmds; | |
646158c2 FT |
374 | total = 0; |
375 | ||
376 | scsi_for_each_sg(cmd, scl, nseg, i) { | |
377 | dma_addr = sg_dma_address(scl); | |
378 | dma_len = sg_dma_len(scl); | |
379 | if (dma_len > 0xffff) | |
380 | panic("mac53c94: scatterlist element >= 64k"); | |
381 | total += dma_len; | |
382 | st_le16(&dcmds->req_count, dma_len); | |
383 | st_le16(&dcmds->command, dma_cmd); | |
1da177e4 LT |
384 | st_le32(&dcmds->phy_addr, dma_addr); |
385 | dcmds->xfer_status = 0; | |
386 | ++dcmds; | |
387 | } | |
646158c2 | 388 | |
1da177e4 LT |
389 | dma_cmd += OUTPUT_LAST - OUTPUT_MORE; |
390 | st_le16(&dcmds[-1].command, dma_cmd); | |
391 | st_le16(&dcmds->command, DBDMA_STOP); | |
392 | cmd->SCp.this_residual = total; | |
393 | } | |
394 | ||
395 | static struct scsi_host_template mac53c94_template = { | |
396 | .proc_name = "53c94", | |
397 | .name = "53C94", | |
398 | .queuecommand = mac53c94_queue, | |
1da177e4 LT |
399 | .eh_host_reset_handler = mac53c94_host_reset, |
400 | .can_queue = 1, | |
401 | .this_id = 7, | |
402 | .sg_tablesize = SG_ALL, | |
403 | .cmd_per_lun = 1, | |
404 | .use_clustering = DISABLE_CLUSTERING, | |
405 | }; | |
406 | ||
5e655772 | 407 | static int mac53c94_probe(struct macio_dev *mdev, const struct of_device_id *match) |
1da177e4 LT |
408 | { |
409 | struct device_node *node = macio_get_of_node(mdev); | |
410 | struct pci_dev *pdev = macio_get_pci_dev(mdev); | |
411 | struct fsc_state *state; | |
412 | struct Scsi_Host *host; | |
413 | void *dma_cmd_space; | |
294ef16a | 414 | const unsigned char *clkprop; |
cc5d0189 | 415 | int proplen, rc = -ENODEV; |
1da177e4 LT |
416 | |
417 | if (macio_resource_count(mdev) != 2 || macio_irq_count(mdev) != 2) { | |
cc5d0189 BH |
418 | printk(KERN_ERR "mac53c94: expected 2 addrs and intrs" |
419 | " (got %d/%d)\n", | |
420 | macio_resource_count(mdev), macio_irq_count(mdev)); | |
1da177e4 LT |
421 | return -ENODEV; |
422 | } | |
423 | ||
424 | if (macio_request_resources(mdev, "mac53c94") != 0) { | |
425 | printk(KERN_ERR "mac53c94: unable to request memory resources"); | |
426 | return -EBUSY; | |
427 | } | |
428 | ||
429 | host = scsi_host_alloc(&mac53c94_template, sizeof(struct fsc_state)); | |
430 | if (host == NULL) { | |
431 | printk(KERN_ERR "mac53c94: couldn't register host"); | |
cc5d0189 | 432 | rc = -ENOMEM; |
1da177e4 LT |
433 | goto out_release; |
434 | } | |
435 | ||
436 | state = (struct fsc_state *) host->hostdata; | |
437 | macio_set_drvdata(mdev, state); | |
438 | state->host = host; | |
439 | state->pdev = pdev; | |
440 | state->mdev = mdev; | |
441 | ||
442 | state->regs = (struct mac53c94_regs __iomem *) | |
443 | ioremap(macio_resource_start(mdev, 0), 0x1000); | |
444 | state->intr = macio_irq(mdev, 0); | |
445 | state->dma = (struct dbdma_regs __iomem *) | |
446 | ioremap(macio_resource_start(mdev, 1), 0x1000); | |
447 | state->dmaintr = macio_irq(mdev, 1); | |
448 | if (state->regs == NULL || state->dma == NULL) { | |
449 | printk(KERN_ERR "mac53c94: ioremap failed for %s\n", | |
450 | node->full_name); | |
451 | goto out_free; | |
452 | } | |
453 | ||
40cd3a45 | 454 | clkprop = of_get_property(node, "clock-frequency", &proplen); |
1da177e4 LT |
455 | if (clkprop == NULL || proplen != sizeof(int)) { |
456 | printk(KERN_ERR "%s: can't get clock frequency, " | |
457 | "assuming 25MHz\n", node->full_name); | |
458 | state->clk_freq = 25000000; | |
459 | } else | |
460 | state->clk_freq = *(int *)clkprop; | |
461 | ||
462 | /* Space for dma command list: +1 for stop command, | |
463 | * +1 to allow for aligning. | |
464 | * XXX FIXME: Use DMA consistent routines | |
465 | */ | |
466 | dma_cmd_space = kmalloc((host->sg_tablesize + 2) * | |
467 | sizeof(struct dbdma_cmd), GFP_KERNEL); | |
468 | if (dma_cmd_space == 0) { | |
469 | printk(KERN_ERR "mac53c94: couldn't allocate dma " | |
470 | "command space for %s\n", node->full_name); | |
cc5d0189 | 471 | rc = -ENOMEM; |
1da177e4 LT |
472 | goto out_free; |
473 | } | |
474 | state->dma_cmds = (struct dbdma_cmd *)DBDMA_ALIGN(dma_cmd_space); | |
475 | memset(state->dma_cmds, 0, (host->sg_tablesize + 1) | |
476 | * sizeof(struct dbdma_cmd)); | |
477 | state->dma_cmd_space = dma_cmd_space; | |
478 | ||
479 | mac53c94_init(state); | |
480 | ||
cc5d0189 | 481 | if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) { |
1da177e4 LT |
482 | printk(KERN_ERR "mac53C94: can't get irq %d for %s\n", |
483 | state->intr, node->full_name); | |
484 | goto out_free_dma; | |
485 | } | |
486 | ||
cc5d0189 BH |
487 | rc = scsi_add_host(host, &mdev->ofdev.dev); |
488 | if (rc != 0) | |
489 | goto out_release_irq; | |
1da177e4 | 490 | |
cc5d0189 | 491 | scsi_scan_host(host); |
1da177e4 LT |
492 | return 0; |
493 | ||
cc5d0189 BH |
494 | out_release_irq: |
495 | free_irq(state->intr, state); | |
1da177e4 LT |
496 | out_free_dma: |
497 | kfree(state->dma_cmd_space); | |
498 | out_free: | |
499 | if (state->dma != NULL) | |
500 | iounmap(state->dma); | |
501 | if (state->regs != NULL) | |
502 | iounmap(state->regs); | |
503 | scsi_host_put(host); | |
504 | out_release: | |
505 | macio_release_resources(mdev); | |
506 | ||
cc5d0189 | 507 | return rc; |
1da177e4 LT |
508 | } |
509 | ||
510 | static int mac53c94_remove(struct macio_dev *mdev) | |
511 | { | |
512 | struct fsc_state *fp = (struct fsc_state *)macio_get_drvdata(mdev); | |
513 | struct Scsi_Host *host = fp->host; | |
514 | ||
515 | scsi_remove_host(host); | |
516 | ||
517 | free_irq(fp->intr, fp); | |
518 | ||
519 | if (fp->regs) | |
7be7cbf6 | 520 | iounmap(fp->regs); |
1da177e4 | 521 | if (fp->dma) |
7be7cbf6 | 522 | iounmap(fp->dma); |
1da177e4 LT |
523 | kfree(fp->dma_cmd_space); |
524 | ||
525 | scsi_host_put(host); | |
526 | ||
527 | macio_release_resources(mdev); | |
528 | ||
529 | return 0; | |
530 | } | |
531 | ||
532 | ||
5e655772 | 533 | static struct of_device_id mac53c94_match[] = |
1da177e4 LT |
534 | { |
535 | { | |
536 | .name = "53c94", | |
1da177e4 LT |
537 | }, |
538 | {}, | |
539 | }; | |
5e655772 | 540 | MODULE_DEVICE_TABLE (of, mac53c94_match); |
1da177e4 LT |
541 | |
542 | static struct macio_driver mac53c94_driver = | |
543 | { | |
544 | .name = "mac53c94", | |
545 | .match_table = mac53c94_match, | |
546 | .probe = mac53c94_probe, | |
547 | .remove = mac53c94_remove, | |
548 | }; | |
549 | ||
550 | ||
551 | static int __init init_mac53c94(void) | |
552 | { | |
553 | return macio_register_driver(&mac53c94_driver); | |
554 | } | |
555 | ||
556 | static void __exit exit_mac53c94(void) | |
557 | { | |
558 | return macio_unregister_driver(&mac53c94_driver); | |
559 | } | |
560 | ||
561 | module_init(init_mac53c94); | |
562 | module_exit(exit_mac53c94); | |
563 | ||
564 | MODULE_DESCRIPTION("PowerMac 53c94 SCSI driver"); | |
565 | MODULE_AUTHOR("Paul Mackerras <paulus@samba.org>"); | |
566 | MODULE_LICENSE("GPL"); |