[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / lpfc / lpfc_mbox.c

/*******************************************************************
 * This file is part of the Emulex Linux Device Driver for         *
 * Fibre Channel Host Bus Adapters.                                *
 * Copyright (C) 2004-2006 Emulex.  All rights reserved.           *
 * EMULEX and SLI are trademarks of Emulex.                        *
 * www.emulex.com                                                  *
 * Portions Copyright (C) 2004-2005 Christoph Hellwig              *
 *                                                                 *
 * This program is free software; you can redistribute it and/or   *
 * modify it under the terms of version 2 of the GNU General       *
 * Public License as published by the Free Software Foundation.    *
 * This program is distributed in the hope that it will be useful. *
 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
 * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
 * more details, a copy of which can be found in the file COPYING  *
 * included with this package.                                     *
 *******************************************************************/

#include <linux/blkdev.h>
#include <linux/pci.h>
#include <linux/interrupt.h>

#include <scsi/scsi_device.h>
#include <scsi/scsi_transport_fc.h>

#include <scsi/scsi.h>

#include "lpfc_hw.h"
#include "lpfc_sli.h"
#include "lpfc_disc.h"
#include "lpfc_scsi.h"
#include "lpfc.h"
#include "lpfc_logmsg.h"
#include "lpfc_crtn.h"
#include "lpfc_compat.h"

/**********************************************/

/*                mailbox command             */
/**********************************************/
void
lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
{
	MAILBOX_t *mb;
	void *ctx;

	mb = &pmb->mb;
	ctx = pmb->context2;

	/* Setup to dump VPD region */
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	mb->mbxCommand = MBX_DUMP_MEMORY;
	mb->un.varDmp.cv = 1;
	mb->un.varDmp.type = DMP_NV_PARAMS;
	mb->un.varDmp.entry_index = offset;
	mb->un.varDmp.region_id = DMP_REGION_VPD;
	mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
	mb->un.varDmp.co = 0;
	mb->un.varDmp.resp_offset = 0;
	pmb->context2 = ctx;
	mb->mbxOwner = OWN_HOST;
	return;
}

/**********************************************/
/*  lpfc_read_nv  Issue a READ NVPARAM        */
/*                mailbox command             */
/**********************************************/
void
lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	mb->mbxCommand = MBX_READ_NV;
	mb->mbxOwner = OWN_HOST;
	return;
}

/**********************************************/
/*  lpfc_read_la  Issue a READ LA             */
/*                mailbox command             */
/**********************************************/
int
lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
{
	MAILBOX_t *mb;
	struct lpfc_sli *psli;

	psli = &phba->sli;
	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	INIT_LIST_HEAD(&mp->list);
	mb->mbxCommand = MBX_READ_LA64;
	mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
	mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
	mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);

	/* Save address for later completion and set the owner to host so that
	 * the FW knows this mailbox is available for processing.
	 */
	pmb->context1 = (uint8_t *) mp;
	mb->mbxOwner = OWN_HOST;
	return (0);
}

/**********************************************/
/*  lpfc_clear_la  Issue a CLEAR LA           */
/*                 mailbox command            */
/**********************************************/
void
lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->un.varClearLA.eventTag = phba->fc_eventTag;
	mb->mbxCommand = MBX_CLEAR_LA;
	mb->mbxOwner = OWN_HOST;
	return;
}

/**************************************************/
/*  lpfc_config_link  Issue a CONFIG LINK         */
/*                    mailbox command             */
/**************************************************/
void
lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	/* NEW_FEATURE
	 * SLI-2, Coalescing Response Feature.
	 */
	if (phba->cfg_cr_delay) {
		mb->un.varCfgLnk.cr = 1;
		mb->un.varCfgLnk.ci = 1;
		mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
		mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
	}

	mb->un.varCfgLnk.myId = phba->fc_myDID;
	mb->un.varCfgLnk.edtov = phba->fc_edtov;
	mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
	mb->un.varCfgLnk.ratov = phba->fc_ratov;
	mb->un.varCfgLnk.rttov = phba->fc_rttov;
	mb->un.varCfgLnk.altov = phba->fc_altov;
	mb->un.varCfgLnk.crtov = phba->fc_crtov;
	mb->un.varCfgLnk.citov = phba->fc_citov;

	if (phba->cfg_ack0)
		mb->un.varCfgLnk.ack0_enable = 1;

	mb->mbxCommand = MBX_CONFIG_LINK;
	mb->mbxOwner = OWN_HOST;
	return;
}

/**********************************************/
/*  lpfc_init_link  Issue an INIT LINK        */
/*                  mailbox command           */
/**********************************************/
void
lpfc_init_link(struct lpfc_hba * phba,
	       LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
{
	lpfc_vpd_t *vpd;
	struct lpfc_sli *psli;
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	psli = &phba->sli;
	switch (topology) {
	case FLAGS_TOPOLOGY_MODE_LOOP_PT:
		mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
		mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
		break;
	case FLAGS_TOPOLOGY_MODE_PT_PT:
		mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
		break;
	case FLAGS_TOPOLOGY_MODE_LOOP:
		mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
		break;
	case FLAGS_TOPOLOGY_MODE_PT_LOOP:
		mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
		mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
		break;
	case FLAGS_LOCAL_LB:
		mb->un.varInitLnk.link_flags = FLAGS_LOCAL_LB;
		break;
	}

	/* Enable asynchronous ABTS responses from firmware */
	mb->un.varInitLnk.link_flags |= FLAGS_IMED_ABORT;

	/* NEW_FEATURE
	 * Setting up the link speed
	 */
	vpd = &phba->vpd;
	if (vpd->rev.feaLevelHigh >= 0x02){
		switch(linkspeed){
			case LINK_SPEED_1G:
			case LINK_SPEED_2G:
			case LINK_SPEED_4G:
				mb->un.varInitLnk.link_flags |=
							FLAGS_LINK_SPEED;
				mb->un.varInitLnk.link_speed = linkspeed;
			break;
			case LINK_SPEED_AUTO:
			default:
				mb->un.varInitLnk.link_speed =
							LINK_SPEED_AUTO;
			break;
		}

	}
	else
		mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;

	mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
	mb->mbxOwner = OWN_HOST;
	mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
	return;
}

/**********************************************/
/*  lpfc_read_sparam  Issue a READ SPARAM     */
/*                    mailbox command         */
/**********************************************/
int
lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	struct lpfc_dmabuf *mp;
	MAILBOX_t *mb;
	struct lpfc_sli *psli;

	psli = &phba->sli;
	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->mbxOwner = OWN_HOST;

	/* Get a buffer to hold the HBAs Service Parameters */

	if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
	    ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
		kfree(mp);
		mb->mbxCommand = MBX_READ_SPARM64;
		/* READ_SPARAM: no buffers */
		lpfc_printf_log(phba,
			        KERN_WARNING,
			        LOG_MBOX,
			        "%d:0301 READ_SPARAM: no buffers\n",
			        phba->brd_no);
		return (1);
	}
	INIT_LIST_HEAD(&mp->list);
	mb->mbxCommand = MBX_READ_SPARM64;
	mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
	mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
	mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);

	/* save address for completion */
	pmb->context1 = mp;

	return (0);
}

/********************************************/
/*  lpfc_unreg_did  Issue a UNREG_DID       */
/*                  mailbox command         */
/********************************************/
void
lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->un.varUnregDID.did = did;

	mb->mbxCommand = MBX_UNREG_D_ID;
	mb->mbxOwner = OWN_HOST;
	return;
}

/**********************************************/
/*  lpfc_read_nv  Issue a READ CONFIG         */
/*                mailbox command             */
/**********************************************/
void
lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->mbxCommand = MBX_READ_CONFIG;
	mb->mbxOwner = OWN_HOST;
	return;
}

/*************************************************/
/*  lpfc_read_lnk_stat  Issue a READ LINK STATUS */
/*                mailbox command                */
/*************************************************/
void
lpfc_read_lnk_stat(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->mbxCommand = MBX_READ_LNK_STAT;
	mb->mbxOwner = OWN_HOST;
	return;
}

/********************************************/
/*  lpfc_reg_login  Issue a REG_LOGIN       */
/*                  mailbox command         */
/********************************************/
int
lpfc_reg_login(struct lpfc_hba * phba,
	       uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
{
	uint8_t *sparam;
	struct lpfc_dmabuf *mp;
	MAILBOX_t *mb;
	struct lpfc_sli *psli;

	psli = &phba->sli;
	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->un.varRegLogin.rpi = 0;
	mb->un.varRegLogin.did = did;
	mb->un.varWords[30] = flag;	/* Set flag to issue action on cmpl */

	mb->mbxOwner = OWN_HOST;

	/* Get a buffer to hold NPorts Service Parameters */
	if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
	    ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
		kfree(mp);
		mb->mbxCommand = MBX_REG_LOGIN64;
		/* REG_LOGIN: no buffers */
		lpfc_printf_log(phba,
			       KERN_WARNING,
			       LOG_MBOX,
			       "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
			       phba->brd_no,
			       (uint32_t) did, (uint32_t) flag);
		return (1);
	}
	INIT_LIST_HEAD(&mp->list);
	sparam = mp->virt;

	/* Copy param's into a new buffer */
	memcpy(sparam, param, sizeof (struct serv_parm));

	/* save address for completion */
	pmb->context1 = (uint8_t *) mp;

	mb->mbxCommand = MBX_REG_LOGIN64;
	mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
	mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
	mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);

	return (0);
}

/**********************************************/
/*  lpfc_unreg_login  Issue a UNREG_LOGIN     */
/*                    mailbox command         */
/**********************************************/
void
lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->un.varUnregLogin.rpi = (uint16_t) rpi;
	mb->un.varUnregLogin.rsvd1 = 0;

	mb->mbxCommand = MBX_UNREG_LOGIN;
	mb->mbxOwner = OWN_HOST;
	return;
}

static void
lpfc_config_pcb_setup(struct lpfc_hba * phba)
{
	struct lpfc_sli *psli = &phba->sli;
	struct lpfc_sli_ring *pring;
	PCB_t *pcbp = &phba->slim2p->pcb;
	dma_addr_t pdma_addr;
	uint32_t offset;
	uint32_t iocbCnt;
	int i;

	pcbp->maxRing = (psli->num_rings - 1);

	iocbCnt = 0;
	for (i = 0; i < psli->num_rings; i++) {
		pring = &psli->ring[i];
		/* A ring MUST have both cmd and rsp entries defined to be
		   valid */
		if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
			pcbp->rdsc[i].cmdEntries = 0;
			pcbp->rdsc[i].rspEntries = 0;
			pcbp->rdsc[i].cmdAddrHigh = 0;
			pcbp->rdsc[i].rspAddrHigh = 0;
			pcbp->rdsc[i].cmdAddrLow = 0;
			pcbp->rdsc[i].rspAddrLow = 0;
			pring->cmdringaddr = NULL;
			pring->rspringaddr = NULL;
			continue;
		}
		/* Command ring setup for ring */
		pring->cmdringaddr =
		    (void *)&phba->slim2p->IOCBs[iocbCnt];
		pcbp->rdsc[i].cmdEntries = pring->numCiocb;

		offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
			 (uint8_t *)phba->slim2p;
		pdma_addr = phba->slim2p_mapping + offset;
		pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
		pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
		iocbCnt += pring->numCiocb;

		/* Response ring setup for ring */
		pring->rspringaddr =
		    (void *)&phba->slim2p->IOCBs[iocbCnt];

		pcbp->rdsc[i].rspEntries = pring->numRiocb;
		offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
			 (uint8_t *)phba->slim2p;
		pdma_addr = phba->slim2p_mapping + offset;
		pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
		pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
		iocbCnt += pring->numRiocb;
	}
}

void
lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb;

	mb = &pmb->mb;
	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	mb->un.varRdRev.cv = 1;
	mb->mbxCommand = MBX_READ_REV;
	mb->mbxOwner = OWN_HOST;
	return;
}

void
lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
{
	int i;
	MAILBOX_t *mb = &pmb->mb;
	struct lpfc_sli *psli;
	struct lpfc_sli_ring *pring;

	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));

	mb->un.varCfgRing.ring = ring;
	mb->un.varCfgRing.maxOrigXchg = 0;
	mb->un.varCfgRing.maxRespXchg = 0;
	mb->un.varCfgRing.recvNotify = 1;

	psli = &phba->sli;
	pring = &psli->ring[ring];
	mb->un.varCfgRing.numMask = pring->num_mask;
	mb->mbxCommand = MBX_CONFIG_RING;
	mb->mbxOwner = OWN_HOST;

	/* Is this ring configured for a specific profile */
	if (pring->prt[0].profile) {
		mb->un.varCfgRing.profile = pring->prt[0].profile;
		return;
	}

	/* Otherwise we setup specific rctl / type masks for this ring */
	for (i = 0; i < pring->num_mask; i++) {
		mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
		if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
			mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
		else
			mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
		mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
		mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
	}

	return;
}

void
lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb = &pmb->mb;
	dma_addr_t pdma_addr;
	uint32_t bar_low, bar_high;
	size_t offset;
	struct lpfc_hgp hgp;
	void __iomem *to_slim;
	int i;

	memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
	mb->mbxCommand = MBX_CONFIG_PORT;
	mb->mbxOwner = OWN_HOST;

	mb->un.varCfgPort.pcbLen = sizeof(PCB_t);

	offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
	pdma_addr = phba->slim2p_mapping + offset;
	mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
	mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);

	/* Now setup pcb */
	phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
	phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;

	/* Setup Mailbox pointers */
	phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
	offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
	pdma_addr = phba->slim2p_mapping + offset;
	phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
	phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);

	/*
	 * Setup Host Group ring pointer.
	 *
	 * For efficiency reasons, the ring get/put pointers can be
	 * placed in adapter memory (SLIM) rather than in host memory.
	 * This allows firmware to avoid PCI reads/writes when updating
	 * and checking pointers.
	 *
	 * The firmware recognizes the use of SLIM memory by comparing
	 * the address of the get/put pointers structure with that of
	 * the SLIM BAR (BAR0).
	 *
	 * Caution: be sure to use the PCI config space value of BAR0/BAR1
	 * (the hardware's view of the base address), not the OS's
	 * value of pci_resource_start() as the OS value may be a cookie
	 * for ioremap/iomap.
	 */


	pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
	pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);


	/* mask off BAR0's flag bits 0 - 3 */
	phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
					(SLIMOFF*sizeof(uint32_t));
	if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
		phba->slim2p->pcb.hgpAddrHigh = bar_high;
	else
		phba->slim2p->pcb.hgpAddrHigh = 0;
	/* write HGP data to SLIM at the required longword offset */
	memset(&hgp, 0, sizeof(struct lpfc_hgp));
	to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));

	for (i=0; i < phba->sli.num_rings; i++) {
		lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
		to_slim += sizeof (struct lpfc_hgp);
	}

	/* Setup Port Group ring pointer */
	offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
		 (uint8_t *)phba->slim2p;
	pdma_addr = phba->slim2p_mapping + offset;
	phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
	phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);

	/* Use callback routine to setp rings in the pcb */
	lpfc_config_pcb_setup(phba);

	/* special handling for LC HBAs */
	if (lpfc_is_LC_HBA(phba->pcidev->device)) {
		uint32_t hbainit[5];

		lpfc_hba_init(phba, hbainit);

		memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
	}

	/* Swap PCB if needed */
	lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
								sizeof (PCB_t));

	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
		        "%d:0405 Service Level Interface (SLI) 2 selected\n",
		        phba->brd_no);
}

void
lpfc_kill_board(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
{
	MAILBOX_t *mb = &pmb->mb;

	memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
	mb->mbxCommand = MBX_KILL_BOARD;
	mb->mbxOwner = OWN_HOST;
	return;
}

void
lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
{
	struct lpfc_sli *psli;

	psli = &phba->sli;

	list_add_tail(&mbq->list, &psli->mboxq);

	psli->mboxq_cnt++;

	return;
}

LPFC_MBOXQ_t *
lpfc_mbox_get(struct lpfc_hba * phba)
{
	LPFC_MBOXQ_t *mbq = NULL;
	struct lpfc_sli *psli = &phba->sli;

	list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
			 list);
	if (mbq) {
		psli->mboxq_cnt--;
	}

	return mbq;
}

int
lpfc_mbox_tmo_val(struct lpfc_hba *phba, int cmd)
{
	switch (cmd) {
	case MBX_WRITE_NV:	/* 0x03 */
	case MBX_UPDATE_CFG:	/* 0x1B */
	case MBX_DOWN_LOAD:	/* 0x1C */
	case MBX_DEL_LD_ENTRY:	/* 0x1D */
	case MBX_LOAD_AREA:	/* 0x81 */
	case MBX_FLASH_WR_ULA:  /* 0x98 */
	case MBX_LOAD_EXP_ROM:	/* 0x9C */
		return LPFC_MBOX_TMO_FLASH_CMD;
	}
	return LPFC_MBOX_TMO;
}
Commit	Line	Data
dea3101e JB	1	/*******************************************************************
dea3101e JB	2	* This file is part of the Emulex Linux Device Driver for *
c44ce173	3	* Fibre Channel Host Bus Adapters. *
41415862	4	* Copyright (C) 2004-2006 Emulex. All rights reserved. *
c44ce173	5	* EMULEX and SLI are trademarks of Emulex. *
dea3101e	6	* www.emulex.com *
c44ce173	7	* Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e JB	8	* *
dea3101e JB	9	* This program is free software; you can redistribute it and/or *
c44ce173 JSEC	10	* modify it under the terms of version 2 of the GNU General *
	11	* Public License as published by the Free Software Foundation. *
	12	* This program is distributed in the hope that it will be useful. *
	13	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
	14	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
	15	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
	16	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
	17	* TO BE LEGALLY INVALID. See the GNU General Public License for *
	18	* more details, a copy of which can be found in the file COPYING *
	19	* included with this package. *
dea3101e JB	20	*******************************************************************/
dea3101e JB	21
dea3101e JB	22	#include <linux/blkdev.h>
	23	#include <linux/pci.h>
	24	#include <linux/interrupt.h>
	25
f888ba3c JSEC	26	#include <scsi/scsi_device.h>
	27	#include <scsi/scsi_transport_fc.h>
	28
91886523 JSEC	29	#include <scsi/scsi.h>
91886523 JSEC	30
dea3101e JB	31	#include "lpfc_hw.h"
	32	#include "lpfc_sli.h"
	33	#include "lpfc_disc.h"
	34	#include "lpfc_scsi.h"
	35	#include "lpfc.h"
	36	#include "lpfc_logmsg.h"
	37	#include "lpfc_crtn.h"
	38	#include "lpfc_compat.h"
	39
	40	/**********************************************/
	41
	42	/* mailbox command */
	43	/**********************************************/
	44	void
	45	lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
	46	{
	47	MAILBOX_t *mb;
	48	void *ctx;
	49
	50	mb = &pmb->mb;
	51	ctx = pmb->context2;
	52
	53	/* Setup to dump VPD region */
	54	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	55	mb->mbxCommand = MBX_DUMP_MEMORY;
	56	mb->un.varDmp.cv = 1;
	57	mb->un.varDmp.type = DMP_NV_PARAMS;
	58	mb->un.varDmp.entry_index = offset;
	59	mb->un.varDmp.region_id = DMP_REGION_VPD;
	60	mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
	61	mb->un.varDmp.co = 0;
	62	mb->un.varDmp.resp_offset = 0;
	63	pmb->context2 = ctx;
	64	mb->mbxOwner = OWN_HOST;
	65	return;
	66	}
	67
	68	/**********************************************/
	69	/* lpfc_read_nv Issue a READ NVPARAM */
	70	/* mailbox command */
	71	/**********************************************/
	72	void
	73	lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
	74	{
	75	MAILBOX_t *mb;
	76
	77	mb = &pmb->mb;
	78	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	79	mb->mbxCommand = MBX_READ_NV;
	80	mb->mbxOwner = OWN_HOST;
	81	return;
	82	}
	83
	84	/**********************************************/
	85	/* lpfc_read_la Issue a READ LA */
	86	/* mailbox command */
	87	/**********************************************/
	88	int
	89	lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
	90	{
	91	MAILBOX_t *mb;
	92	struct lpfc_sli *psli;
	93
	94	psli = &phba->sli;
95	mb = &pmb->mb;
96	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
97
98	INIT_LIST_HEAD(&mp->list);
99	mb->mbxCommand = MBX_READ_LA64;
100	mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
101	mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
102	mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
103
104	/* Save address for later completion and set the owner to host so that
105	* the FW knows this mailbox is available for processing.
106	*/
107	pmb->context1 = (uint8_t *) mp;
108	mb->mbxOwner = OWN_HOST;
109	return (0);
110	}
111
112	/**********************************************/
113	/* lpfc_clear_la Issue a CLEAR LA */
114	/* mailbox command */
115	/**********************************************/
116	void
117	lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
118	{
119	MAILBOX_t *mb;
120
121	mb = &pmb->mb;
122	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
123
124	mb->un.varClearLA.eventTag = phba->fc_eventTag;
125	mb->mbxCommand = MBX_CLEAR_LA;
126	mb->mbxOwner = OWN_HOST;
127	return;
128	}
129
130	/**************************************************/
131	/* lpfc_config_link Issue a CONFIG LINK */
132	/* mailbox command */
133	/**************************************************/
134	void
135	lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
136	{
137	MAILBOX_t *mb = &pmb->mb;
138	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
139
140	/* NEW_FEATURE
141	* SLI-2, Coalescing Response Feature.
142	*/
143	if (phba->cfg_cr_delay) {
144	mb->un.varCfgLnk.cr = 1;
145	mb->un.varCfgLnk.ci = 1;
146	mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
147	mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
148	}
149
150	mb->un.varCfgLnk.myId = phba->fc_myDID;
151	mb->un.varCfgLnk.edtov = phba->fc_edtov;
152	mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
153	mb->un.varCfgLnk.ratov = phba->fc_ratov;
154	mb->un.varCfgLnk.rttov = phba->fc_rttov;
155	mb->un.varCfgLnk.altov = phba->fc_altov;
156	mb->un.varCfgLnk.crtov = phba->fc_crtov;
157	mb->un.varCfgLnk.citov = phba->fc_citov;
158
159	if (phba->cfg_ack0)
160	mb->un.varCfgLnk.ack0_enable = 1;
161
162	mb->mbxCommand = MBX_CONFIG_LINK;
163	mb->mbxOwner = OWN_HOST;
164	return;
165	}
166
167	/**********************************************/
168	/* lpfc_init_link Issue an INIT LINK */
169	/* mailbox command */
170	/**********************************************/
171	void
172	lpfc_init_link(struct lpfc_hba * phba,
173	LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
174	{
175	lpfc_vpd_t *vpd;
176	struct lpfc_sli *psli;
177	MAILBOX_t *mb;
178
179	mb = &pmb->mb;
180	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
181
182	psli = &phba->sli;
183	switch (topology) {
184	case FLAGS_TOPOLOGY_MODE_LOOP_PT:
185	mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
186	mb->un.varInitLnk.link_flags \|= FLAGS_TOPOLOGY_FAILOVER;
187	break;
188	case FLAGS_TOPOLOGY_MODE_PT_PT:
189	mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
190	break;
191	case FLAGS_TOPOLOGY_MODE_LOOP:
192	mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
193	break;
194	case FLAGS_TOPOLOGY_MODE_PT_LOOP:
195	mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
196	mb->un.varInitLnk.link_flags \|= FLAGS_TOPOLOGY_FAILOVER;
197	break;
367c2713 JW	198	case FLAGS_LOCAL_LB:
	199	mb->un.varInitLnk.link_flags = FLAGS_LOCAL_LB;
	200	break;
dea3101e JB	201	}
dea3101e JB	202
4b0b91d4 JS	203	/* Enable asynchronous ABTS responses from firmware */
	204	mb->un.varInitLnk.link_flags \|= FLAGS_IMED_ABORT;
	205
dea3101e JB	206	/* NEW_FEATURE
	207	* Setting up the link speed
	208	*/
	209	vpd = &phba->vpd;
	210	if (vpd->rev.feaLevelHigh >= 0x02){
	211	switch(linkspeed){
	212	case LINK_SPEED_1G:
	213	case LINK_SPEED_2G:
	214	case LINK_SPEED_4G:
	215	mb->un.varInitLnk.link_flags \|=
	216	FLAGS_LINK_SPEED;
	217	mb->un.varInitLnk.link_speed = linkspeed;
	218	break;
	219	case LINK_SPEED_AUTO:
	220	default:
	221	mb->un.varInitLnk.link_speed =
	222	LINK_SPEED_AUTO;
	223	break;
	224	}
	225
	226	}
	227	else
	228	mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
	229
	230	mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
	231	mb->mbxOwner = OWN_HOST;
	232	mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
	233	return;
	234	}
	235
	236	/**********************************************/
	237	/* lpfc_read_sparam Issue a READ SPARAM */
	238	/* mailbox command */
	239	/**********************************************/
	240	int
	241	lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
	242	{
	243	struct lpfc_dmabuf *mp;
	244	MAILBOX_t *mb;
	245	struct lpfc_sli *psli;
	246
	247	psli = &phba->sli;
	248	mb = &pmb->mb;
	249	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	250
	251	mb->mbxOwner = OWN_HOST;
	252
	253	/* Get a buffer to hold the HBAs Service Parameters */
	254
	255	if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) \|\|
	256	((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
c9475cb0	257	kfree(mp);
dea3101e JB	258	mb->mbxCommand = MBX_READ_SPARM64;
	259	/* READ_SPARAM: no buffers */
	260	lpfc_printf_log(phba,
	261	KERN_WARNING,
	262	LOG_MBOX,
	263	"%d:0301 READ_SPARAM: no buffers\n",
	264	phba->brd_no);
	265	return (1);
	266	}
	267	INIT_LIST_HEAD(&mp->list);
	268	mb->mbxCommand = MBX_READ_SPARM64;
	269	mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
	270	mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
	271	mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
	272
	273	/* save address for completion */
	274	pmb->context1 = mp;
	275
	276	return (0);
	277	}
	278
	279	/********************************************/
	280	/* lpfc_unreg_did Issue a UNREG_DID */
	281	/* mailbox command */
	282	/********************************************/
	283	void
	284	lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
	285	{
	286	MAILBOX_t *mb;
	287
	288	mb = &pmb->mb;
	289	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	290
	291	mb->un.varUnregDID.did = did;
	292
	293	mb->mbxCommand = MBX_UNREG_D_ID;
	294	mb->mbxOwner = OWN_HOST;
	295	return;
	296	}
	297
dea3101e JB	298	/**********************************************/
	299	/* lpfc_read_nv Issue a READ CONFIG */
	300	/* mailbox command */
	301	/**********************************************/
	302	void
	303	lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
	304	{
	305	MAILBOX_t *mb;
	306
	307	mb = &pmb->mb;
	308	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	309
	310	mb->mbxCommand = MBX_READ_CONFIG;
	311	mb->mbxOwner = OWN_HOST;
	312	return;
	313	}
	314
7bb3b137 JW	315	/*************************************************/
	316	/* lpfc_read_lnk_stat Issue a READ LINK STATUS */
	317	/* mailbox command */
	318	/*************************************************/
	319	void
	320	lpfc_read_lnk_stat(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
	321	{
	322	MAILBOX_t *mb;
	323
	324	mb = &pmb->mb;
	325	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	326
	327	mb->mbxCommand = MBX_READ_LNK_STAT;
	328	mb->mbxOwner = OWN_HOST;
	329	return;
	330	}
	331
dea3101e JB	332	/********************************************/
	333	/* lpfc_reg_login Issue a REG_LOGIN */
	334	/* mailbox command */
	335	/********************************************/
	336	int
	337	lpfc_reg_login(struct lpfc_hba * phba,
	338	uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
	339	{
	340	uint8_t *sparam;
	341	struct lpfc_dmabuf *mp;
	342	MAILBOX_t *mb;
	343	struct lpfc_sli *psli;
	344
	345	psli = &phba->sli;
	346	mb = &pmb->mb;
	347	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	348
	349	mb->un.varRegLogin.rpi = 0;
	350	mb->un.varRegLogin.did = did;
	351	mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
	352
	353	mb->mbxOwner = OWN_HOST;
	354
	355	/* Get a buffer to hold NPorts Service Parameters */
	356	if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) \|\|
	357	((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
c9475cb0	358	kfree(mp);
dea3101e JB	359	mb->mbxCommand = MBX_REG_LOGIN64;
	360	/* REG_LOGIN: no buffers */
	361	lpfc_printf_log(phba,
	362	KERN_WARNING,
	363	LOG_MBOX,
	364	"%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
	365	phba->brd_no,
	366	(uint32_t) did, (uint32_t) flag);
	367	return (1);
	368	}
	369	INIT_LIST_HEAD(&mp->list);
	370	sparam = mp->virt;
	371
	372	/* Copy param's into a new buffer */
	373	memcpy(sparam, param, sizeof (struct serv_parm));
	374
	375	/* save address for completion */
	376	pmb->context1 = (uint8_t *) mp;
	377
	378	mb->mbxCommand = MBX_REG_LOGIN64;
	379	mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
	380	mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
	381	mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
	382
	383	return (0);
	384	}
	385
	386	/**********************************************/
	387	/* lpfc_unreg_login Issue a UNREG_LOGIN */
	388	/* mailbox command */
	389	/**********************************************/
	390	void
	391	lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
	392	{
	393	MAILBOX_t *mb;
	394
	395	mb = &pmb->mb;
	396	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	397
	398	mb->un.varUnregLogin.rpi = (uint16_t) rpi;
	399	mb->un.varUnregLogin.rsvd1 = 0;
	400
	401	mb->mbxCommand = MBX_UNREG_LOGIN;
	402	mb->mbxOwner = OWN_HOST;
	403	return;
	404	}
	405
	406	static void
	407	lpfc_config_pcb_setup(struct lpfc_hba * phba)
	408	{
	409	struct lpfc_sli *psli = &phba->sli;
	410	struct lpfc_sli_ring *pring;
	411	PCB_t *pcbp = &phba->slim2p->pcb;
	412	dma_addr_t pdma_addr;
	413	uint32_t offset;
	414	uint32_t iocbCnt;
	415	int i;
	416
dea3101e JB	417	pcbp->maxRing = (psli->num_rings - 1);
	418
	419	iocbCnt = 0;
	420	for (i = 0; i < psli->num_rings; i++) {
	421	pring = &psli->ring[i];
	422	/* A ring MUST have both cmd and rsp entries defined to be
	423	valid */
	424	if ((pring->numCiocb == 0) \|\| (pring->numRiocb == 0)) {
	425	pcbp->rdsc[i].cmdEntries = 0;
	426	pcbp->rdsc[i].rspEntries = 0;
	427	pcbp->rdsc[i].cmdAddrHigh = 0;
	428	pcbp->rdsc[i].rspAddrHigh = 0;
	429	pcbp->rdsc[i].cmdAddrLow = 0;
	430	pcbp->rdsc[i].rspAddrLow = 0;
	431	pring->cmdringaddr = NULL;
	432	pring->rspringaddr = NULL;
	433	continue;
	434	}
	435	/* Command ring setup for ring */
	436	pring->cmdringaddr =
	437	(void *)&phba->slim2p->IOCBs[iocbCnt];
	438	pcbp->rdsc[i].cmdEntries = pring->numCiocb;
	439
	440	offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
	441	(uint8_t *)phba->slim2p;
	442	pdma_addr = phba->slim2p_mapping + offset;
	443	pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
	444	pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
	445	iocbCnt += pring->numCiocb;
	446
	447	/* Response ring setup for ring */
	448	pring->rspringaddr =
	449	(void *)&phba->slim2p->IOCBs[iocbCnt];
	450
	451	pcbp->rdsc[i].rspEntries = pring->numRiocb;
	452	offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
	453	(uint8_t *)phba->slim2p;
	454	pdma_addr = phba->slim2p_mapping + offset;
	455	pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
	456	pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
	457	iocbCnt += pring->numRiocb;
	458	}
	459	}
	460
	461	void
	462	lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
	463	{
	464	MAILBOX_t *mb;
	465
	466	mb = &pmb->mb;
	467	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
	468	mb->un.varRdRev.cv = 1;
	469	mb->mbxCommand = MBX_READ_REV;
	470	mb->mbxOwner = OWN_HOST;
	471	return;
	472	}
	473
	474	void
	475	lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
	476	{
	477	int i;
	478	MAILBOX_t *mb = &pmb->mb;
	479	struct lpfc_sli *psli;
	480	struct lpfc_sli_ring *pring;
481
482	memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
483
484	mb->un.varCfgRing.ring = ring;
485	mb->un.varCfgRing.maxOrigXchg = 0;
486	mb->un.varCfgRing.maxRespXchg = 0;
487	mb->un.varCfgRing.recvNotify = 1;
488
489	psli = &phba->sli;
490	pring = &psli->ring[ring];
491	mb->un.varCfgRing.numMask = pring->num_mask;
492	mb->mbxCommand = MBX_CONFIG_RING;
493	mb->mbxOwner = OWN_HOST;
494
495	/* Is this ring configured for a specific profile */
496	if (pring->prt[0].profile) {
497	mb->un.varCfgRing.profile = pring->prt[0].profile;
498	return;
499	}
500
501	/* Otherwise we setup specific rctl / type masks for this ring */
502	for (i = 0; i < pring->num_mask; i++) {
503	mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
504	if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
505	mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
506	else
507	mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
508	mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
509	mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
510	}
511
512	return;
513	}
514
515	void
516	lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
517	{
518	MAILBOX_t *mb = &pmb->mb;
519	dma_addr_t pdma_addr;
520	uint32_t bar_low, bar_high;
521	size_t offset;
4cc2da1d	522	struct lpfc_hgp hgp;
dea3101e	523	void __iomem *to_slim;
f91b392c	524	int i;
dea3101e JB	525
	526	memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
	527	mb->mbxCommand = MBX_CONFIG_PORT;
	528	mb->mbxOwner = OWN_HOST;
	529
	530	mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
	531
	532	offset = (uint8_t )&phba->slim2p->pcb - (uint8_t )phba->slim2p;
	533	pdma_addr = phba->slim2p_mapping + offset;
	534	mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
	535	mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
	536
	537	/* Now setup pcb */
	538	phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
	539	phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
	540
	541	/* Setup Mailbox pointers */
	542	phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
	543	offset = (uint8_t )&phba->slim2p->mbx - (uint8_t )phba->slim2p;
	544	pdma_addr = phba->slim2p_mapping + offset;
	545	phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
	546	phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
	547
	548	/*
	549	* Setup Host Group ring pointer.
	550	*
	551	* For efficiency reasons, the ring get/put pointers can be
	552	* placed in adapter memory (SLIM) rather than in host memory.
	553	* This allows firmware to avoid PCI reads/writes when updating
	554	* and checking pointers.
	555	*
	556	* The firmware recognizes the use of SLIM memory by comparing
	557	* the address of the get/put pointers structure with that of
	558	* the SLIM BAR (BAR0).
	559	*
	560	* Caution: be sure to use the PCI config space value of BAR0/BAR1
	561	* (the hardware's view of the base address), not the OS's
	562	* value of pci_resource_start() as the OS value may be a cookie
	563	* for ioremap/iomap.
	564	*/
	565
	566
	567	pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
	568	pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
	569
	570
	571	/* mask off BAR0's flag bits 0 - 3 */
	572	phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
	573	(SLIMOFF*sizeof(uint32_t));
	574	if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
	575	phba->slim2p->pcb.hgpAddrHigh = bar_high;
	576	else
	577	phba->slim2p->pcb.hgpAddrHigh = 0;
	578	/* write HGP data to SLIM at the required longword offset */
4cc2da1d	579	memset(&hgp, 0, sizeof(struct lpfc_hgp));
dea3101e	580	to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
f91b392c JSEC	581
	582	for (i=0; i < phba->sli.num_rings; i++) {
	583	lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
	584	to_slim += sizeof (struct lpfc_hgp);
	585	}
dea3101e JB	586
	587	/* Setup Port Group ring pointer */
	588	offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
	589	(uint8_t *)phba->slim2p;
	590	pdma_addr = phba->slim2p_mapping + offset;
	591	phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
	592	phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
	593
	594	/* Use callback routine to setp rings in the pcb */
	595	lpfc_config_pcb_setup(phba);
	596
	597	/* special handling for LC HBAs */
	598	if (lpfc_is_LC_HBA(phba->pcidev->device)) {
	599	uint32_t hbainit[5];
	600
	601	lpfc_hba_init(phba, hbainit);
	602
	603	memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
	604	}
	605
	606	/* Swap PCB if needed */
	607	lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
	608	sizeof (PCB_t));
	609
	610	lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
	611	"%d:0405 Service Level Interface (SLI) 2 selected\n",
	612	phba->brd_no);
	613	}
	614
41415862 JW	615	void
	616	lpfc_kill_board(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
	617	{
	618	MAILBOX_t *mb = &pmb->mb;
	619
	620	memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
	621	mb->mbxCommand = MBX_KILL_BOARD;
	622	mb->mbxOwner = OWN_HOST;
	623	return;
	624	}
	625
dea3101e JB	626	void
	627	lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
	628	{
	629	struct lpfc_sli *psli;
	630
	631	psli = &phba->sli;
	632
	633	list_add_tail(&mbq->list, &psli->mboxq);
	634
	635	psli->mboxq_cnt++;
	636
	637	return;
	638	}
	639
	640	LPFC_MBOXQ_t *
	641	lpfc_mbox_get(struct lpfc_hba * phba)
	642	{
	643	LPFC_MBOXQ_t *mbq = NULL;
	644	struct lpfc_sli *psli = &phba->sli;
	645
	646	list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
	647	list);
	648	if (mbq) {
	649	psli->mboxq_cnt--;
	650	}
	651
	652	return mbq;
	653	}
a309a6b6 JS	654
	655	int
	656	lpfc_mbox_tmo_val(struct lpfc_hba *phba, int cmd)
	657	{
	658	switch (cmd) {
	659	case MBX_WRITE_NV: /* 0x03 */
	660	case MBX_UPDATE_CFG: /* 0x1B */
	661	case MBX_DOWN_LOAD: /* 0x1C */
	662	case MBX_DEL_LD_ENTRY: /* 0x1D */
	663	case MBX_LOAD_AREA: /* 0x81 */
	664	case MBX_FLASH_WR_ULA: /* 0x98 */
	665	case MBX_LOAD_EXP_ROM: /* 0x9C */
	666	return LPFC_MBOX_TMO_FLASH_CMD;
	667	}
	668	return LPFC_MBOX_TMO;
	669	}