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[PATCH] libata: implement ata_dev_absent()
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
e82cbdb9 68static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
83206a29
TH		 69static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
70 struct ata_device *dev);
acf356b1 71static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 72
73static unsigned int ata_unique_id = 1;
74static struct workqueue_struct *ata_wq;
75
418dc1f5 76int atapi_enabled = 1;
1623c81e
JG		 77module_param(atapi_enabled, int, 0444);
78MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
79
c3c013a2
JG		 80int libata_fua = 0;
81module_param_named(fua, libata_fua, int, 0444);
82MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
83
1da177e4
LT		 84MODULE_AUTHOR("Jeff Garzik");
85MODULE_DESCRIPTION("Library module for ATA devices");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(DRV_VERSION);
88
0baab86b 89
1da177e4
LT		 90/**
91 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
92 * @tf: Taskfile to convert
93 * @fis: Buffer into which data will output
94 * @pmp: Port multiplier port
95 *
96 * Converts a standard ATA taskfile to a Serial ATA
97 * FIS structure (Register - Host to Device).
98 *
99 * LOCKING:
100 * Inherited from caller.
101 */
102
057ace5e 103void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 104{
105 fis[0] = 0x27; /* Register - Host to Device FIS */
106 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
107 bit 7 indicates Command FIS */
108 fis[2] = tf->command;
109 fis[3] = tf->feature;
110
111 fis[4] = tf->lbal;
112 fis[5] = tf->lbam;
113 fis[6] = tf->lbah;
114 fis[7] = tf->device;
115
116 fis[8] = tf->hob_lbal;
117 fis[9] = tf->hob_lbam;
118 fis[10] = tf->hob_lbah;
119 fis[11] = tf->hob_feature;
120
121 fis[12] = tf->nsect;
122 fis[13] = tf->hob_nsect;
123 fis[14] = 0;
124 fis[15] = tf->ctl;
125
126 fis[16] = 0;
127 fis[17] = 0;
128 fis[18] = 0;
129 fis[19] = 0;
130}
131
132/**
133 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
134 * @fis: Buffer from which data will be input
135 * @tf: Taskfile to output
136 *
e12a1be6 137 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 138 *
139 * LOCKING:
140 * Inherited from caller.
141 */
142
057ace5e 143void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 144{
145 tf->command = fis[2]; /* status */
146 tf->feature = fis[3]; /* error */
147
148 tf->lbal = fis[4];
149 tf->lbam = fis[5];
150 tf->lbah = fis[6];
151 tf->device = fis[7];
152
153 tf->hob_lbal = fis[8];
154 tf->hob_lbam = fis[9];
155 tf->hob_lbah = fis[10];
156
157 tf->nsect = fis[12];
158 tf->hob_nsect = fis[13];
159}
160
8cbd6df1
AL		 161static const u8 ata_rw_cmds[] = {
162 /* pio multi */
163 ATA_CMD_READ_MULTI,
164 ATA_CMD_WRITE_MULTI,
165 ATA_CMD_READ_MULTI_EXT,
166 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 167 0,
168 0,
169 0,
170 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 171 /* pio */
172 ATA_CMD_PIO_READ,
173 ATA_CMD_PIO_WRITE,
174 ATA_CMD_PIO_READ_EXT,
175 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 176 0,
177 0,
178 0,
179 0,
8cbd6df1
AL		 180 /* dma */
181 ATA_CMD_READ,
182 ATA_CMD_WRITE,
183 ATA_CMD_READ_EXT,
9a3dccc4
TH		 184 ATA_CMD_WRITE_EXT,
185 0,
186 0,
187 0,
188 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 189};
1da177e4
LT		 190
191/**
8cbd6df1
AL		 192 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
193 * @qc: command to examine and configure
1da177e4 194 *
2e9edbf8 195 * Examine the device configuration and tf->flags to calculate
8cbd6df1 196 * the proper read/write commands and protocol to use.
1da177e4
LT		 197 *
198 * LOCKING:
199 * caller.
200 */
9a3dccc4 201int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 202{
8cbd6df1
AL		 203 struct ata_taskfile *tf = &qc->tf;
204 struct ata_device *dev = qc->dev;
9a3dccc4 205 u8 cmd;
1da177e4 206
9a3dccc4 207 int index, fua, lba48, write;
2e9edbf8 208
9a3dccc4 209 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 210 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
211 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 212
8cbd6df1
AL		 213 if (dev->flags & ATA_DFLAG_PIO) {
214 tf->protocol = ATA_PROT_PIO;
9a3dccc4 215 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 216 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
217 /* Unable to use DMA due to host limitation */
218 tf->protocol = ATA_PROT_PIO;
0565c26d 219 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 220 } else {
221 tf->protocol = ATA_PROT_DMA;
9a3dccc4 222 index = 16;
8cbd6df1 223 }
1da177e4 224
9a3dccc4
TH		 225 cmd = ata_rw_cmds[index + fua + lba48 + write];
226 if (cmd) {
227 tf->command = cmd;
228 return 0;
229 }
230 return -1;
1da177e4
LT		 231}
232
cb95d562
TH		 233/**
234 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
235 * @pio_mask: pio_mask
236 * @mwdma_mask: mwdma_mask
237 * @udma_mask: udma_mask
238 *
239 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
240 * unsigned int xfer_mask.
241 *
242 * LOCKING:
243 * None.
244 *
245 * RETURNS:
246 * Packed xfer_mask.
247 */
248static unsigned int ata_pack_xfermask(unsigned int pio_mask,
249 unsigned int mwdma_mask,
250 unsigned int udma_mask)
251{
252 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
253 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
254 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
255}
256
c0489e4e
TH		 257/**
258 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
259 * @xfer_mask: xfer_mask to unpack
260 * @pio_mask: resulting pio_mask
261 * @mwdma_mask: resulting mwdma_mask
262 * @udma_mask: resulting udma_mask
263 *
264 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
265 * Any NULL distination masks will be ignored.
266 */
267static void ata_unpack_xfermask(unsigned int xfer_mask,
268 unsigned int *pio_mask,
269 unsigned int *mwdma_mask,
270 unsigned int *udma_mask)
271{
272 if (pio_mask)
273 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
274 if (mwdma_mask)
275 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
276 if (udma_mask)
277 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
278}
279
cb95d562 280static const struct ata_xfer_ent {
be9a50c8 281 int shift, bits;
cb95d562
TH		 282 u8 base;
283} ata_xfer_tbl[] = {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
285 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
286 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
287 { -1, },
288};
289
290/**
291 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
292 * @xfer_mask: xfer_mask of interest
293 *
294 * Return matching XFER_* value for @xfer_mask. Only the highest
295 * bit of @xfer_mask is considered.
296 *
297 * LOCKING:
298 * None.
299 *
300 * RETURNS:
301 * Matching XFER_* value, 0 if no match found.
302 */
303static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
304{
305 int highbit = fls(xfer_mask) - 1;
306 const struct ata_xfer_ent *ent;
307
308 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
309 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
310 return ent->base + highbit - ent->shift;
311 return 0;
312}
313
314/**
315 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
316 * @xfer_mode: XFER_* of interest
317 *
318 * Return matching xfer_mask for @xfer_mode.
319 *
320 * LOCKING:
321 * None.
322 *
323 * RETURNS:
324 * Matching xfer_mask, 0 if no match found.
325 */
326static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
327{
328 const struct ata_xfer_ent *ent;
329
330 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
331 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
332 return 1 << (ent->shift + xfer_mode - ent->base);
333 return 0;
334}
335
336/**
337 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
338 * @xfer_mode: XFER_* of interest
339 *
340 * Return matching xfer_shift for @xfer_mode.
341 *
342 * LOCKING:
343 * None.
344 *
345 * RETURNS:
346 * Matching xfer_shift, -1 if no match found.
347 */
348static int ata_xfer_mode2shift(unsigned int xfer_mode)
349{
350 const struct ata_xfer_ent *ent;
351
352 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
353 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
354 return ent->shift;
355 return -1;
356}
357
1da177e4 358/**
1da7b0d0
TH		 359 * ata_mode_string - convert xfer_mask to string
360 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 361 *
362 * Determine string which represents the highest speed
1da7b0d0 363 * (highest bit in @modemask).
1da177e4
LT		 364 *
365 * LOCKING:
366 * None.
367 *
368 * RETURNS:
369 * Constant C string representing highest speed listed in
1da7b0d0 370 * @mode_mask, or the constant C string "<n/a>".
1da177e4 371 */
1da7b0d0 372static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 373{
75f554bc
TH		 374 static const char * const xfer_mode_str[] = {
375 "PIO0",
376 "PIO1",
377 "PIO2",
378 "PIO3",
379 "PIO4",
380 "MWDMA0",
381 "MWDMA1",
382 "MWDMA2",
383 "UDMA/16",
384 "UDMA/25",
385 "UDMA/33",
386 "UDMA/44",
387 "UDMA/66",
388 "UDMA/100",
389 "UDMA/133",
390 "UDMA7",
391 };
1da7b0d0 392 int highbit;
1da177e4 393
1da7b0d0
TH		 394 highbit = fls(xfer_mask) - 1;
395 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
396 return xfer_mode_str[highbit];
1da177e4 397 return "<n/a>";
1da177e4
LT		 398}
399
4c360c81
TH		 400static const char *sata_spd_string(unsigned int spd)
401{
402 static const char * const spd_str[] = {
403 "1.5 Gbps",
404 "3.0 Gbps",
405 };
406
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
408 return "<unknown>";
409 return spd_str[spd - 1];
410}
411
0b8efb0a
TH		 412static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
413{
e1211e3f 414 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 415 printk(KERN_WARNING "ata%u: dev %u disabled\n",
416 ap->id, dev->devno);
417 dev->class++;
418 }
419}
420
1da177e4
LT		 421/**
422 * ata_pio_devchk - PATA device presence detection
423 * @ap: ATA channel to examine
424 * @device: Device to examine (starting at zero)
425 *
426 * This technique was originally described in
427 * Hale Landis's ATADRVR (www.ata-atapi.com), and
428 * later found its way into the ATA/ATAPI spec.
429 *
430 * Write a pattern to the ATA shadow registers,
431 * and if a device is present, it will respond by
432 * correctly storing and echoing back the
433 * ATA shadow register contents.
434 *
435 * LOCKING:
436 * caller.
437 */
438
439static unsigned int ata_pio_devchk(struct ata_port *ap,
440 unsigned int device)
441{
442 struct ata_ioports *ioaddr = &ap->ioaddr;
443 u8 nsect, lbal;
444
445 ap->ops->dev_select(ap, device);
446
447 outb(0x55, ioaddr->nsect_addr);
448 outb(0xaa, ioaddr->lbal_addr);
449
450 outb(0xaa, ioaddr->nsect_addr);
451 outb(0x55, ioaddr->lbal_addr);
452
453 outb(0x55, ioaddr->nsect_addr);
454 outb(0xaa, ioaddr->lbal_addr);
455
456 nsect = inb(ioaddr->nsect_addr);
457 lbal = inb(ioaddr->lbal_addr);
458
459 if ((nsect == 0x55) && (lbal == 0xaa))
460 return 1; /* we found a device */
461
462 return 0; /* nothing found */
463}
464
465/**
466 * ata_mmio_devchk - PATA device presence detection
467 * @ap: ATA channel to examine
468 * @device: Device to examine (starting at zero)
469 *
470 * This technique was originally described in
471 * Hale Landis's ATADRVR (www.ata-atapi.com), and
472 * later found its way into the ATA/ATAPI spec.
473 *
474 * Write a pattern to the ATA shadow registers,
475 * and if a device is present, it will respond by
476 * correctly storing and echoing back the
477 * ATA shadow register contents.
478 *
479 * LOCKING:
480 * caller.
481 */
482
483static unsigned int ata_mmio_devchk(struct ata_port *ap,
484 unsigned int device)
485{
486 struct ata_ioports *ioaddr = &ap->ioaddr;
487 u8 nsect, lbal;
488
489 ap->ops->dev_select(ap, device);
490
491 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
492 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
493
494 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
499
500 nsect = readb((void __iomem *) ioaddr->nsect_addr);
501 lbal = readb((void __iomem *) ioaddr->lbal_addr);
502
503 if ((nsect == 0x55) && (lbal == 0xaa))
504 return 1; /* we found a device */
505
506 return 0; /* nothing found */
507}
508
509/**
510 * ata_devchk - PATA device presence detection
511 * @ap: ATA channel to examine
512 * @device: Device to examine (starting at zero)
513 *
514 * Dispatch ATA device presence detection, depending
515 * on whether we are using PIO or MMIO to talk to the
516 * ATA shadow registers.
517 *
518 * LOCKING:
519 * caller.
520 */
521
522static unsigned int ata_devchk(struct ata_port *ap,
523 unsigned int device)
524{
525 if (ap->flags & ATA_FLAG_MMIO)
526 return ata_mmio_devchk(ap, device);
527 return ata_pio_devchk(ap, device);
528}
529
530/**
531 * ata_dev_classify - determine device type based on ATA-spec signature
532 * @tf: ATA taskfile register set for device to be identified
533 *
534 * Determine from taskfile register contents whether a device is
535 * ATA or ATAPI, as per "Signature and persistence" section
536 * of ATA/PI spec (volume 1, sect 5.14).
537 *
538 * LOCKING:
539 * None.
540 *
541 * RETURNS:
542 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
543 * the event of failure.
544 */
545
057ace5e 546unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 547{
548 /* Apple's open source Darwin code hints that some devices only
549 * put a proper signature into the LBA mid/high registers,
550 * So, we only check those. It's sufficient for uniqueness.
551 */
552
553 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
554 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
555 DPRINTK("found ATA device by sig\n");
556 return ATA_DEV_ATA;
557 }
558
559 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
560 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
561 DPRINTK("found ATAPI device by sig\n");
562 return ATA_DEV_ATAPI;
563 }
564
565 DPRINTK("unknown device\n");
566 return ATA_DEV_UNKNOWN;
567}
568
569/**
570 * ata_dev_try_classify - Parse returned ATA device signature
571 * @ap: ATA channel to examine
572 * @device: Device to examine (starting at zero)
b4dc7623 573 * @r_err: Value of error register on completion
1da177e4
LT		 574 *
575 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
576 * an ATA/ATAPI-defined set of values is placed in the ATA
577 * shadow registers, indicating the results of device detection
578 * and diagnostics.
579 *
580 * Select the ATA device, and read the values from the ATA shadow
581 * registers. Then parse according to the Error register value,
582 * and the spec-defined values examined by ata_dev_classify().
583 *
584 * LOCKING:
585 * caller.
b4dc7623
TH		 586 *
587 * RETURNS:
588 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 589 */
590
b4dc7623
TH		 591static unsigned int
592ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 593{
1da177e4
LT		 594 struct ata_taskfile tf;
595 unsigned int class;
596 u8 err;
597
598 ap->ops->dev_select(ap, device);
599
600 memset(&tf, 0, sizeof(tf));
601
1da177e4 602 ap->ops->tf_read(ap, &tf);
0169e284 603 err = tf.feature;
b4dc7623
TH		 604 if (r_err)
605 *r_err = err;
1da177e4
LT		 606
607 /* see if device passed diags */
608 if (err == 1)
609 /* do nothing */ ;
610 else if ((device == 0) && (err == 0x81))
611 /* do nothing */ ;
612 else
b4dc7623 613 return ATA_DEV_NONE;
1da177e4 614
b4dc7623 615 /* determine if device is ATA or ATAPI */
1da177e4 616 class = ata_dev_classify(&tf);
b4dc7623 617
1da177e4 618 if (class == ATA_DEV_UNKNOWN)
b4dc7623 619 return ATA_DEV_NONE;
1da177e4 620 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 621 return ATA_DEV_NONE;
622 return class;
1da177e4
LT		 623}
624
625/**
6a62a04d 626 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 627 * @id: IDENTIFY DEVICE results we will examine
628 * @s: string into which data is output
629 * @ofs: offset into identify device page
630 * @len: length of string to return. must be an even number.
631 *
632 * The strings in the IDENTIFY DEVICE page are broken up into
633 * 16-bit chunks. Run through the string, and output each
634 * 8-bit chunk linearly, regardless of platform.
635 *
636 * LOCKING:
637 * caller.
638 */
639
6a62a04d
TH		 640void ata_id_string(const u16 *id, unsigned char *s,
641 unsigned int ofs, unsigned int len)
1da177e4
LT		 642{
643 unsigned int c;
644
645 while (len > 0) {
646 c = id[ofs] >> 8;
647 *s = c;
648 s++;
649
650 c = id[ofs] & 0xff;
651 *s = c;
652 s++;
653
654 ofs++;
655 len -= 2;
656 }
657}
658
0e949ff3 659/**
6a62a04d 660 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 661 * @id: IDENTIFY DEVICE results we will examine
662 * @s: string into which data is output
663 * @ofs: offset into identify device page
664 * @len: length of string to return. must be an odd number.
665 *
6a62a04d 666 * This function is identical to ata_id_string except that it
0e949ff3
TH		 667 * trims trailing spaces and terminates the resulting string with
668 * null. @len must be actual maximum length (even number) + 1.
669 *
670 * LOCKING:
671 * caller.
672 */
6a62a04d
TH		 673void ata_id_c_string(const u16 *id, unsigned char *s,
674 unsigned int ofs, unsigned int len)
0e949ff3
TH		 675{
676 unsigned char *p;
677
678 WARN_ON(!(len & 1));
679
6a62a04d 680 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 681
682 p = s + strnlen(s, len - 1);
683 while (p > s && p[-1] == ' ')
684 p--;
685 *p = '\0';
686}
0baab86b 687
2940740b
TH		 688static u64 ata_id_n_sectors(const u16 *id)
689{
690 if (ata_id_has_lba(id)) {
691 if (ata_id_has_lba48(id))
692 return ata_id_u64(id, 100);
693 else
694 return ata_id_u32(id, 60);
695 } else {
696 if (ata_id_current_chs_valid(id))
697 return ata_id_u32(id, 57);
698 else
699 return id[1] * id[3] * id[6];
700 }
701}
702
0baab86b
EF		 703/**
704 * ata_noop_dev_select - Select device 0/1 on ATA bus
705 * @ap: ATA channel to manipulate
706 * @device: ATA device (numbered from zero) to select
707 *
708 * This function performs no actual function.
709 *
710 * May be used as the dev_select() entry in ata_port_operations.
711 *
712 * LOCKING:
713 * caller.
714 */
1da177e4
LT		 715void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
716{
717}
718
0baab86b 719
1da177e4
LT		 720/**
721 * ata_std_dev_select - Select device 0/1 on ATA bus
722 * @ap: ATA channel to manipulate
723 * @device: ATA device (numbered from zero) to select
724 *
725 * Use the method defined in the ATA specification to
726 * make either device 0, or device 1, active on the
0baab86b
EF		 727 * ATA channel. Works with both PIO and MMIO.
728 *
729 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 730 *
731 * LOCKING:
732 * caller.
733 */
734
735void ata_std_dev_select (struct ata_port *ap, unsigned int device)
736{
737 u8 tmp;
738
739 if (device == 0)
740 tmp = ATA_DEVICE_OBS;
741 else
742 tmp = ATA_DEVICE_OBS | ATA_DEV1;
743
744 if (ap->flags & ATA_FLAG_MMIO) {
745 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
746 } else {
747 outb(tmp, ap->ioaddr.device_addr);
748 }
749 ata_pause(ap); /* needed; also flushes, for mmio */
750}
751
752/**
753 * ata_dev_select - Select device 0/1 on ATA bus
754 * @ap: ATA channel to manipulate
755 * @device: ATA device (numbered from zero) to select
756 * @wait: non-zero to wait for Status register BSY bit to clear
757 * @can_sleep: non-zero if context allows sleeping
758 *
759 * Use the method defined in the ATA specification to
760 * make either device 0, or device 1, active on the
761 * ATA channel.
762 *
763 * This is a high-level version of ata_std_dev_select(),
764 * which additionally provides the services of inserting
765 * the proper pauses and status polling, where needed.
766 *
767 * LOCKING:
768 * caller.
769 */
770
771void ata_dev_select(struct ata_port *ap, unsigned int device,
772 unsigned int wait, unsigned int can_sleep)
773{
774 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
775 ap->id, device, wait);
776
777 if (wait)
778 ata_wait_idle(ap);
779
780 ap->ops->dev_select(ap, device);
781
782 if (wait) {
783 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
784 msleep(150);
785 ata_wait_idle(ap);
786 }
787}
788
789/**
790 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 791 * @id: IDENTIFY DEVICE page to dump
1da177e4 792 *
0bd3300a
TH		 793 * Dump selected 16-bit words from the given IDENTIFY DEVICE
794 * page.
1da177e4
LT		 795 *
796 * LOCKING:
797 * caller.
798 */
799
0bd3300a 800static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 801{
802 DPRINTK("49==0x%04x "
803 "53==0x%04x "
804 "63==0x%04x "
805 "64==0x%04x "
806 "75==0x%04x \n",
0bd3300a
TH		 807 id[49],
808 id[53],
809 id[63],
810 id[64],
811 id[75]);
1da177e4
LT		 812 DPRINTK("80==0x%04x "
813 "81==0x%04x "
814 "82==0x%04x "
815 "83==0x%04x "
816 "84==0x%04x \n",
0bd3300a
TH		 817 id[80],
818 id[81],
819 id[82],
820 id[83],
821 id[84]);
1da177e4
LT		 822 DPRINTK("88==0x%04x "
823 "93==0x%04x\n",
0bd3300a
TH		 824 id[88],
825 id[93]);
1da177e4
LT		 826}
827
cb95d562
TH		 828/**
829 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
830 * @id: IDENTIFY data to compute xfer mask from
831 *
832 * Compute the xfermask for this device. This is not as trivial
833 * as it seems if we must consider early devices correctly.
834 *
835 * FIXME: pre IDE drive timing (do we care ?).
836 *
837 * LOCKING:
838 * None.
839 *
840 * RETURNS:
841 * Computed xfermask
842 */
843static unsigned int ata_id_xfermask(const u16 *id)
844{
845 unsigned int pio_mask, mwdma_mask, udma_mask;
846
847 /* Usual case. Word 53 indicates word 64 is valid */
848 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
849 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
850 pio_mask <<= 3;
851 pio_mask |= 0x7;
852 } else {
853 /* If word 64 isn't valid then Word 51 high byte holds
854 * the PIO timing number for the maximum. Turn it into
855 * a mask.
856 */
857 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
858
859 /* But wait.. there's more. Design your standards by
860 * committee and you too can get a free iordy field to
861 * process. However its the speeds not the modes that
862 * are supported... Note drivers using the timing API
863 * will get this right anyway
864 */
865 }
866
867 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 868
869 udma_mask = 0;
870 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
871 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 872
873 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
874}
875
86e45b6b
TH		 876/**
877 * ata_port_queue_task - Queue port_task
878 * @ap: The ata_port to queue port_task for
879 *
880 * Schedule @fn(@data) for execution after @delay jiffies using
881 * port_task. There is one port_task per port and it's the
882 * user(low level driver)'s responsibility to make sure that only
883 * one task is active at any given time.
884 *
885 * libata core layer takes care of synchronization between
886 * port_task and EH. ata_port_queue_task() may be ignored for EH
887 * synchronization.
888 *
889 * LOCKING:
890 * Inherited from caller.
891 */
892void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
893 unsigned long delay)
894{
895 int rc;
896
2e755f68 897 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 898 return;
899
900 PREPARE_WORK(&ap->port_task, fn, data);
901
902 if (!delay)
903 rc = queue_work(ata_wq, &ap->port_task);
904 else
905 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
906
907 /* rc == 0 means that another user is using port task */
908 WARN_ON(rc == 0);
909}
910
911/**
912 * ata_port_flush_task - Flush port_task
913 * @ap: The ata_port to flush port_task for
914 *
915 * After this function completes, port_task is guranteed not to
916 * be running or scheduled.
917 *
918 * LOCKING:
919 * Kernel thread context (may sleep)
920 */
921void ata_port_flush_task(struct ata_port *ap)
922{
923 unsigned long flags;
924
925 DPRINTK("ENTER\n");
926
927 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 928 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 929 spin_unlock_irqrestore(&ap->host_set->lock, flags);
930
931 DPRINTK("flush #1\n");
932 flush_workqueue(ata_wq);
933
934 /*
935 * At this point, if a task is running, it's guaranteed to see
936 * the FLUSH flag; thus, it will never queue pio tasks again.
937 * Cancel and flush.
938 */
939 if (!cancel_delayed_work(&ap->port_task)) {
940 DPRINTK("flush #2\n");
941 flush_workqueue(ata_wq);
942 }
943
944 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 945 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 946 spin_unlock_irqrestore(&ap->host_set->lock, flags);
947
948 DPRINTK("EXIT\n");
949}
950
77853bf2 951void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 952{
77853bf2 953 struct completion *waiting = qc->private_data;
a2a7a662 954
77853bf2 955 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 956 complete(waiting);
a2a7a662
TH		 957}
958
959/**
960 * ata_exec_internal - execute libata internal command
961 * @ap: Port to which the command is sent
962 * @dev: Device to which the command is sent
963 * @tf: Taskfile registers for the command and the result
964 * @dma_dir: Data tranfer direction of the command
965 * @buf: Data buffer of the command
966 * @buflen: Length of data buffer
967 *
968 * Executes libata internal command with timeout. @tf contains
969 * command on entry and result on return. Timeout and error
970 * conditions are reported via return value. No recovery action
971 * is taken after a command times out. It's caller's duty to
972 * clean up after timeout.
973 *
974 * LOCKING:
975 * None. Should be called with kernel context, might sleep.
976 */
977
978static unsigned
979ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
980 struct ata_taskfile *tf,
981 int dma_dir, void *buf, unsigned int buflen)
982{
983 u8 command = tf->command;
984 struct ata_queued_cmd *qc;
985 DECLARE_COMPLETION(wait);
986 unsigned long flags;
77853bf2 987 unsigned int err_mask;
a2a7a662
TH		 988
989 spin_lock_irqsave(&ap->host_set->lock, flags);
990
991 qc = ata_qc_new_init(ap, dev);
992 BUG_ON(qc == NULL);
993
994 qc->tf = *tf;
995 qc->dma_dir = dma_dir;
996 if (dma_dir != DMA_NONE) {
997 ata_sg_init_one(qc, buf, buflen);
998 qc->nsect = buflen / ATA_SECT_SIZE;
999 }
1000
77853bf2 1001 qc->private_data = &wait;
a2a7a662
TH		 1002 qc->complete_fn = ata_qc_complete_internal;
1003
8e0e694a 1004 ata_qc_issue(qc);
a2a7a662
TH		 1005
1006 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1007
1008 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1009 ata_port_flush_task(ap);
1010
a2a7a662
TH		 1011 spin_lock_irqsave(&ap->host_set->lock, flags);
1012
1013 /* We're racing with irq here. If we lose, the
1014 * following test prevents us from completing the qc
1015 * again. If completion irq occurs after here but
1016 * before the caller cleans up, it will result in a
1017 * spurious interrupt. We can live with that.
1018 */
77853bf2 1019 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1020 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1021 ata_qc_complete(qc);
1022 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1023 ap->id, command);
1024 }
1025
1026 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1027 }
1028
77853bf2
TH		 1029 *tf = qc->tf;
1030 err_mask = qc->err_mask;
1031
1032 ata_qc_free(qc);
1033
1f7dd3e9
TH		 1034 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1035 * Until those drivers are fixed, we detect the condition
1036 * here, fail the command with AC_ERR_SYSTEM and reenable the
1037 * port.
1038 *
1039 * Note that this doesn't change any behavior as internal
1040 * command failure results in disabling the device in the
1041 * higher layer for LLDDs without new reset/EH callbacks.
1042 *
1043 * Kill the following code as soon as those drivers are fixed.
1044 */
1045 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1046 err_mask |= AC_ERR_SYSTEM;
1047 ata_port_probe(ap);
1048 }
1049
77853bf2 1050 return err_mask;
a2a7a662
TH		 1051}
1052
1bc4ccff
AC		 1053/**
1054 * ata_pio_need_iordy - check if iordy needed
1055 * @adev: ATA device
1056 *
1057 * Check if the current speed of the device requires IORDY. Used
1058 * by various controllers for chip configuration.
1059 */
1060
1061unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1062{
1063 int pio;
1064 int speed = adev->pio_mode - XFER_PIO_0;
1065
1066 if (speed < 2)
1067 return 0;
1068 if (speed > 2)
1069 return 1;
2e9edbf8 1070
1bc4ccff
AC		 1071 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1072
1073 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1074 pio = adev->id[ATA_ID_EIDE_PIO];
1075 /* Is the speed faster than the drive allows non IORDY ? */
1076 if (pio) {
1077 /* This is cycle times not frequency - watch the logic! */
1078 if (pio > 240) /* PIO2 is 240nS per cycle */
1079 return 1;
1080 return 0;
1081 }
1082 }
1083 return 0;
1084}
1085
1da177e4 1086/**
49016aca
TH		 1087 * ata_dev_read_id - Read ID data from the specified device
1088 * @ap: port on which target device resides
1089 * @dev: target device
1090 * @p_class: pointer to class of the target device (may be changed)
1091 * @post_reset: is this read ID post-reset?
d9572b1d 1092 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1093 *
49016aca
TH		 1094 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1095 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1096 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1097 * for pre-ATA4 drives.
1da177e4
LT		 1098 *
1099 * LOCKING:
49016aca
TH		 1100 * Kernel thread context (may sleep)
1101 *
1102 * RETURNS:
1103 * 0 on success, -errno otherwise.
1da177e4 1104 */
49016aca 1105static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1106 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1107{
49016aca 1108 unsigned int class = *p_class;
a0123703 1109 struct ata_taskfile tf;
49016aca 1110 unsigned int err_mask = 0;
d9572b1d 1111 u16 *id;
49016aca
TH		 1112 const char *reason;
1113 int rc;
1da177e4 1114
49016aca 1115 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1116
49016aca 1117 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1118
d9572b1d
TH		 1119 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1120 if (id == NULL) {
1121 rc = -ENOMEM;
1122 reason = "out of memory";
1123 goto err_out;
1124 }
1125
49016aca
TH		 1126 retry:
1127 ata_tf_init(ap, &tf, dev->devno);
a0123703 1128
49016aca
TH		 1129 switch (class) {
1130 case ATA_DEV_ATA:
a0123703 1131 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1132 break;
1133 case ATA_DEV_ATAPI:
a0123703 1134 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1135 break;
1136 default:
1137 rc = -ENODEV;
1138 reason = "unsupported class";
1139 goto err_out;
1da177e4
LT		 1140 }
1141
a0123703 1142 tf.protocol = ATA_PROT_PIO;
1da177e4 1143
a0123703 1144 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1145 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1146 if (err_mask) {
49016aca
TH		 1147 rc = -EIO;
1148 reason = "I/O error";
1da177e4
LT		 1149 goto err_out;
1150 }
1151
49016aca 1152 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1153
49016aca 1154 /* sanity check */
692785e7 1155 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1156 rc = -EINVAL;
1157 reason = "device reports illegal type";
1158 goto err_out;
1159 }
1160
1161 if (post_reset && class == ATA_DEV_ATA) {
1162 /*
1163 * The exact sequence expected by certain pre-ATA4 drives is:
1164 * SRST RESET
1165 * IDENTIFY
1166 * INITIALIZE DEVICE PARAMETERS
1167 * anything else..
1168 * Some drives were very specific about that exact sequence.
1169 */
1170 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1171 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1172 if (err_mask) {
1173 rc = -EIO;
1174 reason = "INIT_DEV_PARAMS failed";
1175 goto err_out;
1176 }
1177
1178 /* current CHS translation info (id[53-58]) might be
1179 * changed. reread the identify device info.
1180 */
1181 post_reset = 0;
1182 goto retry;
1183 }
1184 }
1185
1186 *p_class = class;
d9572b1d 1187 *p_id = id;
49016aca
TH		 1188 return 0;
1189
1190 err_out:
1191 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1192 ap->id, dev->devno, reason);
d9572b1d 1193 kfree(id);
49016aca
TH		 1194 return rc;
1195}
1196
4b2f3ede
TH		 1197static inline u8 ata_dev_knobble(const struct ata_port *ap,
1198 struct ata_device *dev)
1199{
1200 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1201}
1202
49016aca 1203/**
ffeae418
TH		 1204 * ata_dev_configure - Configure the specified ATA/ATAPI device
1205 * @ap: Port on which target device resides
1206 * @dev: Target device to configure
4c2d721a 1207 * @print_info: Enable device info printout
ffeae418
TH		 1208 *
1209 * Configure @dev according to @dev->id. Generic and low-level
1210 * driver specific fixups are also applied.
49016aca
TH		 1211 *
1212 * LOCKING:
ffeae418
TH		 1213 * Kernel thread context (may sleep)
1214 *
1215 * RETURNS:
1216 * 0 on success, -errno otherwise
49016aca 1217 */
4c2d721a
TH		 1218static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1219 int print_info)
49016aca 1220{
1148c3a7 1221 const u16 *id = dev->id;
ff8854b2 1222 unsigned int xfer_mask;
49016aca
TH		 1223 int i, rc;
1224
e1211e3f 1225 if (!ata_dev_enabled(dev)) {
49016aca 1226 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1227 ap->id, dev->devno);
1228 return 0;
49016aca
TH		 1229 }
1230
ffeae418 1231 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1232
c39f5ebe
TH		 1233 /* print device capabilities */
1234 if (print_info)
1235 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1236 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1237 ap->id, dev->devno, id[49], id[82], id[83],
1238 id[84], id[85], id[86], id[87], id[88]);
1239
208a9933
TH		 1240 /* initialize to-be-configured parameters */
1241 dev->flags = 0;
1242 dev->max_sectors = 0;
1243 dev->cdb_len = 0;
1244 dev->n_sectors = 0;
1245 dev->cylinders = 0;
1246 dev->heads = 0;
1247 dev->sectors = 0;
1248
1da177e4
LT		 1249 /*
1250 * common ATA, ATAPI feature tests
1251 */
1252
ff8854b2 1253 /* find max transfer mode; for printk only */
1148c3a7 1254 xfer_mask = ata_id_xfermask(id);
1da177e4 1255
1148c3a7 1256 ata_dump_id(id);
1da177e4
LT		 1257
1258 /* ATA-specific feature tests */
1259 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1260 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1261
1148c3a7 1262 if (ata_id_has_lba(id)) {
4c2d721a 1263 const char *lba_desc;
8bf62ece 1264
4c2d721a
TH		 1265 lba_desc = "LBA";
1266 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1267 if (ata_id_has_lba48(id)) {
8bf62ece 1268 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1269 lba_desc = "LBA48";
1270 }
8bf62ece
AL		 1271
1272 /* print device info to dmesg */
4c2d721a
TH		 1273 if (print_info)
1274 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1275 "max %s, %Lu sectors: %s\n",
1276 ap->id, dev->devno,
1148c3a7 1277 ata_id_major_version(id),
ff8854b2 1278 ata_mode_string(xfer_mask),
4c2d721a
TH		 1279 (unsigned long long)dev->n_sectors,
1280 lba_desc);
ffeae418 1281 } else {
8bf62ece
AL		 1282 /* CHS */
1283
1284 /* Default translation */
1148c3a7
TH		 1285 dev->cylinders = id[1];
1286 dev->heads = id[3];
1287 dev->sectors = id[6];
8bf62ece 1288
1148c3a7 1289 if (ata_id_current_chs_valid(id)) {
8bf62ece 1290 /* Current CHS translation is valid. */
1148c3a7
TH		 1291 dev->cylinders = id[54];
1292 dev->heads = id[55];
1293 dev->sectors = id[56];
8bf62ece
AL		 1294 }
1295
1296 /* print device info to dmesg */
4c2d721a
TH		 1297 if (print_info)
1298 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1299 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1300 ap->id, dev->devno,
1148c3a7 1301 ata_id_major_version(id),
ff8854b2 1302 ata_mode_string(xfer_mask),
4c2d721a
TH		 1303 (unsigned long long)dev->n_sectors,
1304 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1305 }
1306
6e7846e9 1307 dev->cdb_len = 16;
1da177e4
LT		 1308 }
1309
1310 /* ATAPI-specific feature tests */
2c13b7ce 1311 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1312 rc = atapi_cdb_len(id);
1da177e4
LT		 1313 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1314 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1315 rc = -EINVAL;
1da177e4
LT		 1316 goto err_out_nosup;
1317 }
6e7846e9 1318 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1319
1320 /* print device info to dmesg */
4c2d721a
TH		 1321 if (print_info)
1322 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1323 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1324 }
1325
6e7846e9
TH		 1326 ap->host->max_cmd_len = 0;
1327 for (i = 0; i < ATA_MAX_DEVICES; i++)
1328 ap->host->max_cmd_len = max_t(unsigned int,
1329 ap->host->max_cmd_len,
1330 ap->device[i].cdb_len);
1331
4b2f3ede
TH		 1332 /* limit bridge transfers to udma5, 200 sectors */
1333 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1334 if (print_info)
1335 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1336 ap->id, dev->devno);
5a529139 1337 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1338 dev->max_sectors = ATA_MAX_SECTORS;
1339 }
1340
1341 if (ap->ops->dev_config)
1342 ap->ops->dev_config(ap, dev);
1343
1da177e4 1344 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1345 return 0;
1da177e4
LT		 1346
1347err_out_nosup:
1da177e4 1348 DPRINTK("EXIT, err\n");
ffeae418 1349 return rc;
1da177e4
LT		 1350}
1351
1352/**
1353 * ata_bus_probe - Reset and probe ATA bus
1354 * @ap: Bus to probe
1355 *
0cba632b
JG		 1356 * Master ATA bus probing function. Initiates a hardware-dependent
1357 * bus reset, then attempts to identify any devices found on
1358 * the bus.
1359 *
1da177e4 1360 * LOCKING:
0cba632b 1361 * PCI/etc. bus probe sem.
1da177e4
LT		 1362 *
1363 * RETURNS:
96072e69 1364 * Zero on success, negative errno otherwise.
1da177e4
LT		 1365 */
1366
1367static int ata_bus_probe(struct ata_port *ap)
1368{
28ca5c57 1369 unsigned int classes[ATA_MAX_DEVICES];
96072e69 1370 int i, rc, found = 0;
e82cbdb9 1371 struct ata_device *dev;
1da177e4 1372
28ca5c57 1373 ata_port_probe(ap);
c19ba8af 1374
2044470c
TH		 1375 /* reset and determine device classes */
1376 for (i = 0; i < ATA_MAX_DEVICES; i++)
1377 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1378
2044470c 1379 if (ap->ops->probe_reset) {
c19ba8af 1380 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1381 if (rc) {
1382 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1383 return rc;
c19ba8af 1384 }
28ca5c57 1385 } else {
c19ba8af
TH		 1386 ap->ops->phy_reset(ap);
1387
2044470c
TH		 1388 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1389 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1390 classes[i] = ap->device[i].class;
2044470c 1391
28ca5c57
TH		 1392 ata_port_probe(ap);
1393 }
1da177e4 1394
2044470c
TH		 1395 for (i = 0; i < ATA_MAX_DEVICES; i++)
1396 if (classes[i] == ATA_DEV_UNKNOWN)
1397 classes[i] = ATA_DEV_NONE;
1398
28ca5c57 1399 /* read IDENTIFY page and configure devices */
1da177e4 1400 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1401 dev = &ap->device[i];
28ca5c57
TH		 1402 dev->class = classes[i];
1403
e1211e3f 1404 if (!ata_dev_enabled(dev))
ffeae418
TH		 1405 continue;
1406
1407 WARN_ON(dev->id != NULL);
1408 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1409 dev->class = ATA_DEV_NONE;
1410 continue;
1411 }
1412
4c2d721a 1413 if (ata_dev_configure(ap, dev, 1)) {
fcef978f 1414 ata_dev_disable(ap, dev);
ffeae418 1415 continue;
1da177e4 1416 }
ffeae418 1417
ffeae418 1418 found = 1;
1da177e4
LT		 1419 }
1420
e82cbdb9
TH		 1421 /* configure transfer mode */
1422 if (ap->ops->set_mode) {
1423 /* FIXME: make ->set_mode handle no device case and
1424 * return error code and failing device on failure as
1425 * ata_set_mode() does.
1426 */
1427 if (found)
1428 ap->ops->set_mode(ap);
1429 rc = 0;
1430 } else {
1431 while (ata_set_mode(ap, &dev))
1432 ata_dev_disable(ap, dev);
1433 }
1da177e4 1434
e82cbdb9
TH		 1435 for (i = 0; i < ATA_MAX_DEVICES; i++)
1436 if (ata_dev_enabled(&ap->device[i]))
1437 return 0;
1da177e4 1438
e82cbdb9
TH		 1439 /* no device present, disable port */
1440 ata_port_disable(ap);
1da177e4 1441 ap->ops->port_disable(ap);
96072e69 1442 return -ENODEV;
1da177e4
LT		 1443}
1444
1445/**
0cba632b
JG		 1446 * ata_port_probe - Mark port as enabled
1447 * @ap: Port for which we indicate enablement
1da177e4 1448 *
0cba632b
JG		 1449 * Modify @ap data structure such that the system
1450 * thinks that the entire port is enabled.
1451 *
1452 * LOCKING: host_set lock, or some other form of
1453 * serialization.
1da177e4
LT		 1454 */
1455
1456void ata_port_probe(struct ata_port *ap)
1457{
1458 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1459}
1460
3be680b7
TH		 1461/**
1462 * sata_print_link_status - Print SATA link status
1463 * @ap: SATA port to printk link status about
1464 *
1465 * This function prints link speed and status of a SATA link.
1466 *
1467 * LOCKING:
1468 * None.
1469 */
1470static void sata_print_link_status(struct ata_port *ap)
1471{
1472 u32 sstatus, tmp;
3be680b7
TH		 1473
1474 if (!ap->ops->scr_read)
1475 return;
1476
1477 sstatus = scr_read(ap, SCR_STATUS);
1478
1479 if (sata_dev_present(ap)) {
1480 tmp = (sstatus >> 4) & 0xf;
4c360c81
TH		 1481 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1482 ap->id, sata_spd_string(tmp), sstatus);
3be680b7
TH		 1483 } else {
1484 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1485 ap->id, sstatus);
1486 }
1487}
1488
1da177e4 1489/**
780a87f7
JG		 1490 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1491 * @ap: SATA port associated with target SATA PHY.
1da177e4 1492 *
780a87f7
JG		 1493 * This function issues commands to standard SATA Sxxx
1494 * PHY registers, to wake up the phy (and device), and
1495 * clear any reset condition.
1da177e4
LT		 1496 *
1497 * LOCKING:
0cba632b 1498 * PCI/etc. bus probe sem.
1da177e4
LT		 1499 *
1500 */
1501void __sata_phy_reset(struct ata_port *ap)
1502{
1503 u32 sstatus;
1504 unsigned long timeout = jiffies + (HZ * 5);
1505
1506 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1507 /* issue phy wake/reset */
1508 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1509 /* Couldn't find anything in SATA I/II specs, but
1510 * AHCI-1.1 10.4.2 says at least 1 ms. */
1511 mdelay(1);
1da177e4 1512 }
cdcca89e 1513 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1514
1515 /* wait for phy to become ready, if necessary */
1516 do {
1517 msleep(200);
1518 sstatus = scr_read(ap, SCR_STATUS);
1519 if ((sstatus & 0xf) != 1)
1520 break;
1521 } while (time_before(jiffies, timeout));
1522
3be680b7
TH		 1523 /* print link status */
1524 sata_print_link_status(ap);
656563e3 1525
3be680b7
TH		 1526 /* TODO: phy layer with polling, timeouts, etc. */
1527 if (sata_dev_present(ap))
1da177e4 1528 ata_port_probe(ap);
3be680b7 1529 else
1da177e4 1530 ata_port_disable(ap);
1da177e4
LT		 1531
1532 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1533 return;
1534
1535 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1536 ata_port_disable(ap);
1537 return;
1538 }
1539
1540 ap->cbl = ATA_CBL_SATA;
1541}
1542
1543/**
780a87f7
JG		 1544 * sata_phy_reset - Reset SATA bus.
1545 * @ap: SATA port associated with target SATA PHY.
1da177e4 1546 *
780a87f7
JG		 1547 * This function resets the SATA bus, and then probes
1548 * the bus for devices.
1da177e4
LT		 1549 *
1550 * LOCKING:
0cba632b 1551 * PCI/etc. bus probe sem.
1da177e4
LT		 1552 *
1553 */
1554void sata_phy_reset(struct ata_port *ap)
1555{
1556 __sata_phy_reset(ap);
1557 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1558 return;
1559 ata_bus_reset(ap);
1560}
1561
ebdfca6e
AC		 1562/**
1563 * ata_dev_pair - return other device on cable
1564 * @ap: port
1565 * @adev: device
1566 *
1567 * Obtain the other device on the same cable, or if none is
1568 * present NULL is returned
1569 */
2e9edbf8 1570
ebdfca6e
AC		 1571struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1572{
1573 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1574 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1575 return NULL;
1576 return pair;
1577}
1578
1da177e4 1579/**
780a87f7
JG		 1580 * ata_port_disable - Disable port.
1581 * @ap: Port to be disabled.
1da177e4 1582 *
780a87f7
JG		 1583 * Modify @ap data structure such that the system
1584 * thinks that the entire port is disabled, and should
1585 * never attempt to probe or communicate with devices
1586 * on this port.
1587 *
1588 * LOCKING: host_set lock, or some other form of
1589 * serialization.
1da177e4
LT		 1590 */
1591
1592void ata_port_disable(struct ata_port *ap)
1593{
1594 ap->device[0].class = ATA_DEV_NONE;
1595 ap->device[1].class = ATA_DEV_NONE;
1596 ap->flags |= ATA_FLAG_PORT_DISABLED;
1597}
1598
452503f9
AC		 1599/*
1600 * This mode timing computation functionality is ported over from
1601 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1602 */
1603/*
1604 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1605 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1606 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1607 * is currently supported only by Maxtor drives.
452503f9
AC		 1608 */
1609
1610static const struct ata_timing ata_timing[] = {
1611
1612 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1613 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1614 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1615 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1616
1617 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1618 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1619 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1620
1621/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1622
452503f9
AC		 1623 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1624 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1625 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1626
452503f9
AC		 1627 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1628 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1629 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1630
1631/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1632 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1633 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1634
1635 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1636 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1637 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1638
1639/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1640
1641 { 0xFF }
1642};
1643
1644#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1645#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1646
1647static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1648{
1649 q->setup = EZ(t->setup * 1000, T);
1650 q->act8b = EZ(t->act8b * 1000, T);
1651 q->rec8b = EZ(t->rec8b * 1000, T);
1652 q->cyc8b = EZ(t->cyc8b * 1000, T);
1653 q->active = EZ(t->active * 1000, T);
1654 q->recover = EZ(t->recover * 1000, T);
1655 q->cycle = EZ(t->cycle * 1000, T);
1656 q->udma = EZ(t->udma * 1000, UT);
1657}
1658
1659void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1660 struct ata_timing *m, unsigned int what)
1661{
1662 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1663 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1664 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1665 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1666 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1667 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1668 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1669 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1670}
1671
1672static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1673{
1674 const struct ata_timing *t;
1675
1676 for (t = ata_timing; t->mode != speed; t++)
91190758 1677 if (t->mode == 0xFF)
452503f9 1678 return NULL;
2e9edbf8 1679 return t;
452503f9
AC		 1680}
1681
1682int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1683 struct ata_timing *t, int T, int UT)
1684{
1685 const struct ata_timing *s;
1686 struct ata_timing p;
1687
1688 /*
2e9edbf8 1689 * Find the mode.
75b1f2f8 1690 */
452503f9
AC		 1691
1692 if (!(s = ata_timing_find_mode(speed)))
1693 return -EINVAL;
1694
75b1f2f8
AL		 1695 memcpy(t, s, sizeof(*s));
1696
452503f9
AC		 1697 /*
1698 * If the drive is an EIDE drive, it can tell us it needs extended
1699 * PIO/MW_DMA cycle timing.
1700 */
1701
1702 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1703 memset(&p, 0, sizeof(p));
1704 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1705 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1706 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1707 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1708 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1709 }
1710 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1711 }
1712
1713 /*
1714 * Convert the timing to bus clock counts.
1715 */
1716
75b1f2f8 1717 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1718
1719 /*
c893a3ae
RD		 1720 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1721 * S.M.A.R.T * and some other commands. We have to ensure that the
1722 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1723 */
1724
1725 if (speed > XFER_PIO_4) {
1726 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1727 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1728 }
1729
1730 /*
c893a3ae 1731 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1732 */
1733
1734 if (t->act8b + t->rec8b < t->cyc8b) {
1735 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1736 t->rec8b = t->cyc8b - t->act8b;
1737 }
1738
1739 if (t->active + t->recover < t->cycle) {
1740 t->active += (t->cycle - (t->active + t->recover)) / 2;
1741 t->recover = t->cycle - t->active;
1742 }
1743
1744 return 0;
1745}
1746
83206a29 1747static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1748{
83206a29
TH		 1749 unsigned int err_mask;
1750 int rc;
1da177e4
LT		 1751
1752 if (dev->xfer_shift == ATA_SHIFT_PIO)
1753 dev->flags |= ATA_DFLAG_PIO;
1754
83206a29
TH		 1755 err_mask = ata_dev_set_xfermode(ap, dev);
1756 if (err_mask) {
1757 printk(KERN_ERR
1758 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1759 ap->id, err_mask);
1760 return -EIO;
1761 }
1da177e4 1762
83206a29
TH		 1763 rc = ata_dev_revalidate(ap, dev, 0);
1764 if (rc) {
1765 printk(KERN_ERR
1766 "ata%u: failed to revalidate after set xfermode\n",
1767 ap->id);
1768 return rc;
48a8a14f
TH		 1769 }
1770
23e71c3d
TH		 1771 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1772 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1773
1774 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1775 ap->id, dev->devno,
1776 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1777 return 0;
1da177e4
LT		 1778}
1779
1da177e4
LT		 1780/**
1781 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1782 * @ap: port on which timings will be programmed
e82cbdb9 1783 * @r_failed_dev: out paramter for failed device
1da177e4 1784 *
e82cbdb9
TH		 1785 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1786 * ata_set_mode() fails, pointer to the failing device is
1787 * returned in @r_failed_dev.
780a87f7 1788 *
1da177e4 1789 * LOCKING:
0cba632b 1790 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1791 *
1792 * RETURNS:
1793 * 0 on success, negative errno otherwise
1da177e4 1794 */
e82cbdb9 1795static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1796{
e8e0619f 1797 struct ata_device *dev;
e82cbdb9 1798 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1799
a6d5a51c
TH		 1800 /* step 1: calculate xfer_mask */
1801 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 1802 unsigned int pio_mask, dma_mask;
a6d5a51c 1803
e8e0619f
TH		 1804 dev = &ap->device[i];
1805
e1211e3f 1806 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 1807 continue;
1808
acf356b1 1809 ata_dev_xfermask(ap, dev);
1da177e4 1810
acf356b1
TH		 1811 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1812 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1813 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1814 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 1815
4f65977d 1816 found = 1;
5444a6f4
AC		 1817 if (dev->dma_mode)
1818 used_dma = 1;
a6d5a51c 1819 }
4f65977d 1820 if (!found)
e82cbdb9 1821 goto out;
a6d5a51c
TH		 1822
1823 /* step 2: always set host PIO timings */
e8e0619f
TH		 1824 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1825 dev = &ap->device[i];
1826 if (!ata_dev_enabled(dev))
1827 continue;
1828
1829 if (!dev->pio_mode) {
1830 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
1831 ap->id, dev->devno);
1832 rc = -EINVAL;
e82cbdb9 1833 goto out;
e8e0619f
TH		 1834 }
1835
1836 dev->xfer_mode = dev->pio_mode;
1837 dev->xfer_shift = ATA_SHIFT_PIO;
1838 if (ap->ops->set_piomode)
1839 ap->ops->set_piomode(ap, dev);
1840 }
1da177e4 1841
a6d5a51c 1842 /* step 3: set host DMA timings */
e8e0619f
TH		 1843 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1844 dev = &ap->device[i];
1845
1846 if (!ata_dev_enabled(dev) || !dev->dma_mode)
1847 continue;
1848
1849 dev->xfer_mode = dev->dma_mode;
1850 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1851 if (ap->ops->set_dmamode)
1852 ap->ops->set_dmamode(ap, dev);
1853 }
1da177e4
LT		 1854
1855 /* step 4: update devices' xfer mode */
83206a29 1856 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 1857 dev = &ap->device[i];
1da177e4 1858
e1211e3f 1859 if (!ata_dev_enabled(dev))
83206a29
TH		 1860 continue;
1861
5bbc53f4
TH		 1862 rc = ata_dev_set_mode(ap, dev);
1863 if (rc)
e82cbdb9 1864 goto out;
83206a29 1865 }
1da177e4 1866
e8e0619f
TH		 1867 /* Record simplex status. If we selected DMA then the other
1868 * host channels are not permitted to do so.
5444a6f4 1869 */
5444a6f4
AC		 1870 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
1871 ap->host_set->simplex_claimed = 1;
1872
e8e0619f 1873 /* step5: chip specific finalisation */
1da177e4
LT		 1874 if (ap->ops->post_set_mode)
1875 ap->ops->post_set_mode(ap);
1876
e82cbdb9
TH		 1877 out:
1878 if (rc)
1879 *r_failed_dev = dev;
1880 return rc;
1da177e4
LT		 1881}
1882
1fdffbce
JG		 1883/**
1884 * ata_tf_to_host - issue ATA taskfile to host controller
1885 * @ap: port to which command is being issued
1886 * @tf: ATA taskfile register set
1887 *
1888 * Issues ATA taskfile register set to ATA host controller,
1889 * with proper synchronization with interrupt handler and
1890 * other threads.
1891 *
1892 * LOCKING:
1893 * spin_lock_irqsave(host_set lock)
1894 */
1895
1896static inline void ata_tf_to_host(struct ata_port *ap,
1897 const struct ata_taskfile *tf)
1898{
1899 ap->ops->tf_load(ap, tf);
1900 ap->ops->exec_command(ap, tf);
1901}
1902
1da177e4
LT		 1903/**
1904 * ata_busy_sleep - sleep until BSY clears, or timeout
1905 * @ap: port containing status register to be polled
1906 * @tmout_pat: impatience timeout
1907 * @tmout: overall timeout
1908 *
780a87f7
JG		 1909 * Sleep until ATA Status register bit BSY clears,
1910 * or a timeout occurs.
1911 *
1912 * LOCKING: None.
1da177e4
LT		 1913 */
1914
6f8b9958
TH		 1915unsigned int ata_busy_sleep (struct ata_port *ap,
1916 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1917{
1918 unsigned long timer_start, timeout;
1919 u8 status;
1920
1921 status = ata_busy_wait(ap, ATA_BUSY, 300);
1922 timer_start = jiffies;
1923 timeout = timer_start + tmout_pat;
1924 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1925 msleep(50);
1926 status = ata_busy_wait(ap, ATA_BUSY, 3);
1927 }
1928
1929 if (status & ATA_BUSY)
1930 printk(KERN_WARNING "ata%u is slow to respond, "
1931 "please be patient\n", ap->id);
1932
1933 timeout = timer_start + tmout;
1934 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1935 msleep(50);
1936 status = ata_chk_status(ap);
1937 }
1938
1939 if (status & ATA_BUSY) {
1940 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1941 ap->id, tmout / HZ);
1942 return 1;
1943 }
1944
1945 return 0;
1946}
1947
1948static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1949{
1950 struct ata_ioports *ioaddr = &ap->ioaddr;
1951 unsigned int dev0 = devmask & (1 << 0);
1952 unsigned int dev1 = devmask & (1 << 1);
1953 unsigned long timeout;
1954
1955 /* if device 0 was found in ata_devchk, wait for its
1956 * BSY bit to clear
1957 */
1958 if (dev0)
1959 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1960
1961 /* if device 1 was found in ata_devchk, wait for
1962 * register access, then wait for BSY to clear
1963 */
1964 timeout = jiffies + ATA_TMOUT_BOOT;
1965 while (dev1) {
1966 u8 nsect, lbal;
1967
1968 ap->ops->dev_select(ap, 1);
1969 if (ap->flags & ATA_FLAG_MMIO) {
1970 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1971 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1972 } else {
1973 nsect = inb(ioaddr->nsect_addr);
1974 lbal = inb(ioaddr->lbal_addr);
1975 }
1976 if ((nsect == 1) && (lbal == 1))
1977 break;
1978 if (time_after(jiffies, timeout)) {
1979 dev1 = 0;
1980 break;
1981 }
1982 msleep(50); /* give drive a breather */
1983 }
1984 if (dev1)
1985 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1986
1987 /* is all this really necessary? */
1988 ap->ops->dev_select(ap, 0);
1989 if (dev1)
1990 ap->ops->dev_select(ap, 1);
1991 if (dev0)
1992 ap->ops->dev_select(ap, 0);
1993}
1994
1da177e4
LT		 1995static unsigned int ata_bus_softreset(struct ata_port *ap,
1996 unsigned int devmask)
1997{
1998 struct ata_ioports *ioaddr = &ap->ioaddr;
1999
2000 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2001
2002 /* software reset. causes dev0 to be selected */
2003 if (ap->flags & ATA_FLAG_MMIO) {
2004 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2005 udelay(20); /* FIXME: flush */
2006 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2007 udelay(20); /* FIXME: flush */
2008 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2009 } else {
2010 outb(ap->ctl, ioaddr->ctl_addr);
2011 udelay(10);
2012 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2013 udelay(10);
2014 outb(ap->ctl, ioaddr->ctl_addr);
2015 }
2016
2017 /* spec mandates ">= 2ms" before checking status.
2018 * We wait 150ms, because that was the magic delay used for
2019 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2020 * between when the ATA command register is written, and then
2021 * status is checked. Because waiting for "a while" before
2022 * checking status is fine, post SRST, we perform this magic
2023 * delay here as well.
09c7ad79
AC		 2024 *
2025 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2026 */
2027 msleep(150);
2028
2e9edbf8 2029 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2030 * the bus shows 0xFF because the odd clown forgets the D7
2031 * pulldown resistor.
2032 */
09c7ad79 2033 if (ata_check_status(ap) == 0xFF)
298a41ca 2034 return AC_ERR_OTHER;
09c7ad79 2035
1da177e4
LT		 2036 ata_bus_post_reset(ap, devmask);
2037
2038 return 0;
2039}
2040
2041/**
2042 * ata_bus_reset - reset host port and associated ATA channel
2043 * @ap: port to reset
2044 *
2045 * This is typically the first time we actually start issuing
2046 * commands to the ATA channel. We wait for BSY to clear, then
2047 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2048 * result. Determine what devices, if any, are on the channel
2049 * by looking at the device 0/1 error register. Look at the signature
2050 * stored in each device's taskfile registers, to determine if
2051 * the device is ATA or ATAPI.
2052 *
2053 * LOCKING:
0cba632b
JG		 2054 * PCI/etc. bus probe sem.
2055 * Obtains host_set lock.
1da177e4
LT		 2056 *
2057 * SIDE EFFECTS:
2058 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2059 */
2060
2061void ata_bus_reset(struct ata_port *ap)
2062{
2063 struct ata_ioports *ioaddr = &ap->ioaddr;
2064 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2065 u8 err;
aec5c3c1 2066 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2067
2068 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2069
2070 /* determine if device 0/1 are present */
2071 if (ap->flags & ATA_FLAG_SATA_RESET)
2072 dev0 = 1;
2073 else {
2074 dev0 = ata_devchk(ap, 0);
2075 if (slave_possible)
2076 dev1 = ata_devchk(ap, 1);
2077 }
2078
2079 if (dev0)
2080 devmask |= (1 << 0);
2081 if (dev1)
2082 devmask |= (1 << 1);
2083
2084 /* select device 0 again */
2085 ap->ops->dev_select(ap, 0);
2086
2087 /* issue bus reset */
2088 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2089 if (ata_bus_softreset(ap, devmask))
2090 goto err_out;
1da177e4
LT		 2091
2092 /*
2093 * determine by signature whether we have ATA or ATAPI devices
2094 */
b4dc7623 2095 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2096 if ((slave_possible) && (err != 0x81))
b4dc7623 2097 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2098
2099 /* re-enable interrupts */
2100 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2101 ata_irq_on(ap);
2102
2103 /* is double-select really necessary? */
2104 if (ap->device[1].class != ATA_DEV_NONE)
2105 ap->ops->dev_select(ap, 1);
2106 if (ap->device[0].class != ATA_DEV_NONE)
2107 ap->ops->dev_select(ap, 0);
2108
2109 /* if no devices were detected, disable this port */
2110 if ((ap->device[0].class == ATA_DEV_NONE) &&
2111 (ap->device[1].class == ATA_DEV_NONE))
2112 goto err_out;
2113
2114 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2115 /* set up device control for ATA_FLAG_SATA_RESET */
2116 if (ap->flags & ATA_FLAG_MMIO)
2117 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2118 else
2119 outb(ap->ctl, ioaddr->ctl_addr);
2120 }
2121
2122 DPRINTK("EXIT\n");
2123 return;
2124
2125err_out:
2126 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2127 ap->ops->port_disable(ap);
2128
2129 DPRINTK("EXIT\n");
2130}
2131
7a7921e8
TH		 2132static int sata_phy_resume(struct ata_port *ap)
2133{
2134 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2135 u32 scontrol, sstatus;
7a7921e8 2136
852ee16a
TH		 2137 scontrol = scr_read(ap, SCR_CONTROL);
2138 scontrol = (scontrol & 0x0f0) | 0x300;
2139 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2140
2141 /* Wait for phy to become ready, if necessary. */
2142 do {
2143 msleep(200);
2144 sstatus = scr_read(ap, SCR_STATUS);
2145 if ((sstatus & 0xf) != 1)
2146 return 0;
2147 } while (time_before(jiffies, timeout));
2148
2149 return -1;
2150}
2151
8a19ac89
TH		 2152/**
2153 * ata_std_probeinit - initialize probing
2154 * @ap: port to be probed
2155 *
2156 * @ap is about to be probed. Initialize it. This function is
2157 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2158 *
2159 * NOTE!!! Do not use this function as probeinit if a low level
2160 * driver implements only hardreset. Just pass NULL as probeinit
2161 * in that case. Using this function is probably okay but doing
2162 * so makes reset sequence different from the original
2163 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2164 */
17efc5f7 2165void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2166{
17efc5f7 2167 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
8a19ac89 2168 sata_phy_resume(ap);
3a39746a
TH		 2169 if (sata_dev_present(ap))
2170 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2171 }
8a19ac89
TH		 2172}
2173
c2bd5804
TH		 2174/**
2175 * ata_std_softreset - reset host port via ATA SRST
2176 * @ap: port to reset
2177 * @verbose: fail verbosely
2178 * @classes: resulting classes of attached devices
2179 *
2180 * Reset host port using ATA SRST. This function is to be used
2181 * as standard callback for ata_drive_*_reset() functions.
2182 *
2183 * LOCKING:
2184 * Kernel thread context (may sleep)
2185 *
2186 * RETURNS:
2187 * 0 on success, -errno otherwise.
2188 */
2189int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2190{
2191 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2192 unsigned int devmask = 0, err_mask;
2193 u8 err;
2194
2195 DPRINTK("ENTER\n");
2196
3a39746a
TH		 2197 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2198 classes[0] = ATA_DEV_NONE;
2199 goto out;
2200 }
2201
c2bd5804
TH		 2202 /* determine if device 0/1 are present */
2203 if (ata_devchk(ap, 0))
2204 devmask |= (1 << 0);
2205 if (slave_possible && ata_devchk(ap, 1))
2206 devmask |= (1 << 1);
2207
c2bd5804
TH		 2208 /* select device 0 again */
2209 ap->ops->dev_select(ap, 0);
2210
2211 /* issue bus reset */
2212 DPRINTK("about to softreset, devmask=%x\n", devmask);
2213 err_mask = ata_bus_softreset(ap, devmask);
2214 if (err_mask) {
2215 if (verbose)
2216 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2217 ap->id, err_mask);
2218 else
2219 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2220 err_mask);
2221 return -EIO;
2222 }
2223
2224 /* determine by signature whether we have ATA or ATAPI devices */
2225 classes[0] = ata_dev_try_classify(ap, 0, &err);
2226 if (slave_possible && err != 0x81)
2227 classes[1] = ata_dev_try_classify(ap, 1, &err);
2228
3a39746a 2229 out:
c2bd5804
TH		 2230 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2231 return 0;
2232}
2233
2234/**
2235 * sata_std_hardreset - reset host port via SATA phy reset
2236 * @ap: port to reset
2237 * @verbose: fail verbosely
2238 * @class: resulting class of attached device
2239 *
2240 * SATA phy-reset host port using DET bits of SControl register.
2241 * This function is to be used as standard callback for
2242 * ata_drive_*_reset().
2243 *
2244 * LOCKING:
2245 * Kernel thread context (may sleep)
2246 *
2247 * RETURNS:
2248 * 0 on success, -errno otherwise.
2249 */
2250int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2251{
852ee16a
TH		 2252 u32 scontrol;
2253
c2bd5804
TH		 2254 DPRINTK("ENTER\n");
2255
2256 /* Issue phy wake/reset */
852ee16a
TH		 2257 scontrol = scr_read(ap, SCR_CONTROL);
2258 scontrol = (scontrol & 0x0f0) | 0x301;
2259 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804
TH		 2260
2261 /*
2262 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2263 * 10.4.2 says at least 1 ms.
2264 */
2265 msleep(1);
2266
7a7921e8
TH		 2267 /* Bring phy back */
2268 sata_phy_resume(ap);
c2bd5804 2269
c2bd5804
TH		 2270 /* TODO: phy layer with polling, timeouts, etc. */
2271 if (!sata_dev_present(ap)) {
2272 *class = ATA_DEV_NONE;
2273 DPRINTK("EXIT, link offline\n");
2274 return 0;
2275 }
2276
2277 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2278 if (verbose)
2279 printk(KERN_ERR "ata%u: COMRESET failed "
2280 "(device not ready)\n", ap->id);
2281 else
2282 DPRINTK("EXIT, device not ready\n");
2283 return -EIO;
2284 }
2285
3a39746a
TH		 2286 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2287
c2bd5804
TH		 2288 *class = ata_dev_try_classify(ap, 0, NULL);
2289
2290 DPRINTK("EXIT, class=%u\n", *class);
2291 return 0;
2292}
2293
2294/**
2295 * ata_std_postreset - standard postreset callback
2296 * @ap: the target ata_port
2297 * @classes: classes of attached devices
2298 *
2299 * This function is invoked after a successful reset. Note that
2300 * the device might have been reset more than once using
2301 * different reset methods before postreset is invoked.
c2bd5804
TH		 2302 *
2303 * This function is to be used as standard callback for
2304 * ata_drive_*_reset().
2305 *
2306 * LOCKING:
2307 * Kernel thread context (may sleep)
2308 */
2309void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2310{
2311 DPRINTK("ENTER\n");
2312
56497bd5 2313 /* set cable type if it isn't already set */
c2bd5804
TH		 2314 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2315 ap->cbl = ATA_CBL_SATA;
2316
2317 /* print link status */
2318 if (ap->cbl == ATA_CBL_SATA)
2319 sata_print_link_status(ap);
2320
3a39746a
TH		 2321 /* re-enable interrupts */
2322 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2323 ata_irq_on(ap);
c2bd5804
TH		 2324
2325 /* is double-select really necessary? */
2326 if (classes[0] != ATA_DEV_NONE)
2327 ap->ops->dev_select(ap, 1);
2328 if (classes[1] != ATA_DEV_NONE)
2329 ap->ops->dev_select(ap, 0);
2330
3a39746a
TH		 2331 /* bail out if no device is present */
2332 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2333 DPRINTK("EXIT, no device\n");
2334 return;
2335 }
2336
2337 /* set up device control */
2338 if (ap->ioaddr.ctl_addr) {
2339 if (ap->flags & ATA_FLAG_MMIO)
2340 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2341 else
2342 outb(ap->ctl, ap->ioaddr.ctl_addr);
2343 }
c2bd5804
TH		 2344
2345 DPRINTK("EXIT\n");
2346}
2347
2348/**
2349 * ata_std_probe_reset - standard probe reset method
2350 * @ap: prot to perform probe-reset
2351 * @classes: resulting classes of attached devices
2352 *
2353 * The stock off-the-shelf ->probe_reset method.
2354 *
2355 * LOCKING:
2356 * Kernel thread context (may sleep)
2357 *
2358 * RETURNS:
2359 * 0 on success, -errno otherwise.
2360 */
2361int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2362{
2363 ata_reset_fn_t hardreset;
2364
2365 hardreset = NULL;
b911fc3a 2366 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2367 hardreset = sata_std_hardreset;
2368
8a19ac89 2369 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2370 ata_std_softreset, hardreset,
c2bd5804
TH		 2371 ata_std_postreset, classes);
2372}
2373
9974e7cc
TH		 2374static int ata_do_reset(struct ata_port *ap,
2375 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2376 int verbose, unsigned int *classes)
a62c0fc5
TH		 2377{
2378 int i, rc;
2379
2380 for (i = 0; i < ATA_MAX_DEVICES; i++)
2381 classes[i] = ATA_DEV_UNKNOWN;
2382
9974e7cc 2383 rc = reset(ap, verbose, classes);
a62c0fc5
TH		 2384 if (rc)
2385 return rc;
2386
2387 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2388 * is complete and convert all ATA_DEV_UNKNOWN to
2389 * ATA_DEV_NONE.
2390 */
2391 for (i = 0; i < ATA_MAX_DEVICES; i++)
2392 if (classes[i] != ATA_DEV_UNKNOWN)
2393 break;
2394
2395 if (i < ATA_MAX_DEVICES)
2396 for (i = 0; i < ATA_MAX_DEVICES; i++)
2397 if (classes[i] == ATA_DEV_UNKNOWN)
2398 classes[i] = ATA_DEV_NONE;
2399
2400 if (postreset)
2401 postreset(ap, classes);
2402
9974e7cc 2403 return 0;
a62c0fc5
TH		 2404}
2405
2406/**
2407 * ata_drive_probe_reset - Perform probe reset with given methods
2408 * @ap: port to reset
7944ea95 2409 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2410 * @softreset: softreset method (can be NULL)
2411 * @hardreset: hardreset method (can be NULL)
2412 * @postreset: postreset method (can be NULL)
2413 * @classes: resulting classes of attached devices
2414 *
2415 * Reset the specified port and classify attached devices using
2416 * given methods. This function prefers softreset but tries all
2417 * possible reset sequences to reset and classify devices. This
2418 * function is intended to be used for constructing ->probe_reset
2419 * callback by low level drivers.
2420 *
2421 * Reset methods should follow the following rules.
2422 *
2423 * - Return 0 on sucess, -errno on failure.
2424 * - If classification is supported, fill classes[] with
2425 * recognized class codes.
2426 * - If classification is not supported, leave classes[] alone.
2427 * - If verbose is non-zero, print error message on failure;
2428 * otherwise, shut up.
2429 *
2430 * LOCKING:
2431 * Kernel thread context (may sleep)
2432 *
2433 * RETURNS:
2434 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2435 * if classification fails, and any error code from reset
2436 * methods.
2437 */
7944ea95 2438int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2439 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2440 ata_postreset_fn_t postreset, unsigned int *classes)
2441{
2442 int rc = -EINVAL;
2443
7944ea95
TH		 2444 if (probeinit)
2445 probeinit(ap);
2446
a62c0fc5 2447 if (softreset) {
9974e7cc
TH		 2448 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2449 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2450 goto done;
a62c0fc5
TH		 2451 }
2452
2453 if (!hardreset)
9974e7cc 2454 goto done;
a62c0fc5 2455
9974e7cc
TH		 2456 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2457 if (rc || classes[0] != ATA_DEV_UNKNOWN)
2458 goto done;
a62c0fc5
TH		 2459
2460 if (softreset)
9974e7cc 2461 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
a62c0fc5 2462
9974e7cc
TH		 2463 done:
2464 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2465 rc = -ENODEV;
a62c0fc5
TH		 2466 return rc;
2467}
2468
623a3128
TH		 2469/**
2470 * ata_dev_same_device - Determine whether new ID matches configured device
2471 * @ap: port on which the device to compare against resides
2472 * @dev: device to compare against
2473 * @new_class: class of the new device
2474 * @new_id: IDENTIFY page of the new device
2475 *
2476 * Compare @new_class and @new_id against @dev and determine
2477 * whether @dev is the device indicated by @new_class and
2478 * @new_id.
2479 *
2480 * LOCKING:
2481 * None.
2482 *
2483 * RETURNS:
2484 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2485 */
2486static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2487 unsigned int new_class, const u16 *new_id)
2488{
2489 const u16 *old_id = dev->id;
2490 unsigned char model[2][41], serial[2][21];
2491 u64 new_n_sectors;
2492
2493 if (dev->class != new_class) {
2494 printk(KERN_INFO
2495 "ata%u: dev %u class mismatch %d != %d\n",
2496 ap->id, dev->devno, dev->class, new_class);
2497 return 0;
2498 }
2499
2500 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2501 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2502 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2503 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2504 new_n_sectors = ata_id_n_sectors(new_id);
2505
2506 if (strcmp(model[0], model[1])) {
2507 printk(KERN_INFO
2508 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2509 ap->id, dev->devno, model[0], model[1]);
2510 return 0;
2511 }
2512
2513 if (strcmp(serial[0], serial[1])) {
2514 printk(KERN_INFO
2515 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2516 ap->id, dev->devno, serial[0], serial[1]);
2517 return 0;
2518 }
2519
2520 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2521 printk(KERN_INFO
2522 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2523 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2524 (unsigned long long)new_n_sectors);
2525 return 0;
2526 }
2527
2528 return 1;
2529}
2530
2531/**
2532 * ata_dev_revalidate - Revalidate ATA device
2533 * @ap: port on which the device to revalidate resides
2534 * @dev: device to revalidate
2535 * @post_reset: is this revalidation after reset?
2536 *
2537 * Re-read IDENTIFY page and make sure @dev is still attached to
2538 * the port.
2539 *
2540 * LOCKING:
2541 * Kernel thread context (may sleep)
2542 *
2543 * RETURNS:
2544 * 0 on success, negative errno otherwise
2545 */
2546int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2547 int post_reset)
2548{
2549 unsigned int class;
2550 u16 *id;
2551 int rc;
2552
e1211e3f 2553 if (!ata_dev_enabled(dev))
623a3128
TH		 2554 return -ENODEV;
2555
2556 class = dev->class;
2557 id = NULL;
2558
2559 /* allocate & read ID data */
2560 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2561 if (rc)
2562 goto fail;
2563
2564 /* is the device still there? */
2565 if (!ata_dev_same_device(ap, dev, class, id)) {
2566 rc = -ENODEV;
2567 goto fail;
2568 }
2569
2570 kfree(dev->id);
2571 dev->id = id;
2572
2573 /* configure device according to the new ID */
2574 return ata_dev_configure(ap, dev, 0);
2575
2576 fail:
2577 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2578 ap->id, dev->devno, rc);
2579 kfree(id);
2580 return rc;
2581}
2582
98ac62de 2583static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2584 "WDC AC11000H", NULL,
2585 "WDC AC22100H", NULL,
2586 "WDC AC32500H", NULL,
2587 "WDC AC33100H", NULL,
2588 "WDC AC31600H", NULL,
2589 "WDC AC32100H", "24.09P07",
2590 "WDC AC23200L", "21.10N21",
2591 "Compaq CRD-8241B", NULL,
2592 "CRD-8400B", NULL,
2593 "CRD-8480B", NULL,
2594 "CRD-8482B", NULL,
2595 "CRD-84", NULL,
2596 "SanDisk SDP3B", NULL,
2597 "SanDisk SDP3B-64", NULL,
2598 "SANYO CD-ROM CRD", NULL,
2599 "HITACHI CDR-8", NULL,
2e9edbf8 2600 "HITACHI CDR-8335", NULL,
f4b15fef 2601 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2602 "Toshiba CD-ROM XM-6202B", NULL,
2603 "TOSHIBA CD-ROM XM-1702BC", NULL,
2604 "CD-532E-A", NULL,
2605 "E-IDE CD-ROM CR-840", NULL,
2606 "CD-ROM Drive/F5A", NULL,
2607 "WPI CDD-820", NULL,
f4b15fef 2608 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2609 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2610 "SanDisk SDP3B-64", NULL,
2611 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2612 "_NEC DV5800A", NULL,
2613 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2614};
2e9edbf8 2615
f4b15fef
AC		 2616static int ata_strim(char *s, size_t len)
2617{
2618 len = strnlen(s, len);
2619
2620 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2621 while ((len > 0) && (s[len - 1] == ' ')) {
2622 len--;
2623 s[len] = 0;
2624 }
2625 return len;
2626}
1da177e4 2627
057ace5e 2628static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2629{
f4b15fef
AC		 2630 unsigned char model_num[40];
2631 unsigned char model_rev[16];
2632 unsigned int nlen, rlen;
1da177e4
LT		 2633 int i;
2634
f4b15fef
AC		 2635 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2636 sizeof(model_num));
2637 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2638 sizeof(model_rev));
2639 nlen = ata_strim(model_num, sizeof(model_num));
2640 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2641
f4b15fef
AC		 2642 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2643 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2644 if (ata_dma_blacklist[i+1] == NULL)
2645 return 1;
2646 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2647 return 1;
2648 }
2649 }
1da177e4
LT		 2650 return 0;
2651}
2652
a6d5a51c
TH		 2653/**
2654 * ata_dev_xfermask - Compute supported xfermask of the given device
2655 * @ap: Port on which the device to compute xfermask for resides
2656 * @dev: Device to compute xfermask for
2657 *
acf356b1
TH		 2658 * Compute supported xfermask of @dev and store it in
2659 * dev->*_mask. This function is responsible for applying all
2660 * known limits including host controller limits, device
2661 * blacklist, etc...
a6d5a51c 2662 *
600511e8
TH		 2663 * FIXME: The current implementation limits all transfer modes to
2664 * the fastest of the lowested device on the port. This is not
05c8e0ac 2665 * required on most controllers.
600511e8 2666 *
a6d5a51c
TH		 2667 * LOCKING:
2668 * None.
a6d5a51c 2669 */
acf356b1 2670static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2671{
5444a6f4 2672 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2673 unsigned long xfer_mask;
2674 int i;
1da177e4 2675
a6d5a51c
TH		 2676 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2677 ap->udma_mask);
1da177e4 2678
5444a6f4 2679 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2680 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2681 struct ata_device *d = &ap->device[i];
e1211e3f 2682 if (!ata_dev_enabled(d))
a6d5a51c 2683 continue;
acf356b1
TH		 2684 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2685 d->udma_mask);
a6d5a51c
TH		 2686 xfer_mask &= ata_id_xfermask(d->id);
2687 if (ata_dma_blacklisted(d))
2688 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
5444a6f4
AC		 2689 /* Apply cable rule here. Don't apply it early because when
2690 we handle hot plug the cable type can itself change */
2691 if (ap->cbl == ATA_CBL_PATA40)
2692 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4
LT		 2693 }
2694
a6d5a51c
TH		 2695 if (ata_dma_blacklisted(dev))
2696 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2697 "disabling DMA\n", ap->id, dev->devno);
2698
5444a6f4
AC		 2699 if (hs->flags & ATA_HOST_SIMPLEX) {
2700 if (hs->simplex_claimed)
2701 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2702 }
2703 if (ap->ops->mode_filter)
2704 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2705
acf356b1
TH		 2706 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2707 &dev->udma_mask);
1da177e4
LT		 2708}
2709
1da177e4
LT		 2710/**
2711 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2712 * @ap: Port associated with device @dev
2713 * @dev: Device to which command will be sent
2714 *
780a87f7
JG		 2715 * Issue SET FEATURES - XFER MODE command to device @dev
2716 * on port @ap.
2717 *
1da177e4 2718 * LOCKING:
0cba632b 2719 * PCI/etc. bus probe sem.
83206a29
TH		 2720 *
2721 * RETURNS:
2722 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2723 */
2724
83206a29
TH		 2725static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2726 struct ata_device *dev)
1da177e4 2727{
a0123703 2728 struct ata_taskfile tf;
83206a29 2729 unsigned int err_mask;
1da177e4
LT		 2730
2731 /* set up set-features taskfile */
2732 DPRINTK("set features - xfer mode\n");
2733
a0123703
TH		 2734 ata_tf_init(ap, &tf, dev->devno);
2735 tf.command = ATA_CMD_SET_FEATURES;
2736 tf.feature = SETFEATURES_XFER;
2737 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2738 tf.protocol = ATA_PROT_NODATA;
2739 tf.nsect = dev->xfer_mode;
1da177e4 2740
83206a29 2741 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2742
83206a29
TH		 2743 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2744 return err_mask;
1da177e4
LT		 2745}
2746
8bf62ece
AL		 2747/**
2748 * ata_dev_init_params - Issue INIT DEV PARAMS command
2749 * @ap: Port associated with device @dev
2750 * @dev: Device to which command will be sent
2751 *
2752 * LOCKING:
6aff8f1f
TH		 2753 * Kernel thread context (may sleep)
2754 *
2755 * RETURNS:
2756 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2757 */
2758
6aff8f1f 2759static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 2760 struct ata_device *dev,
2761 u16 heads,
2762 u16 sectors)
8bf62ece 2763{
a0123703 2764 struct ata_taskfile tf;
6aff8f1f 2765 unsigned int err_mask;
8bf62ece
AL		 2766
2767 /* Number of sectors per track 1-255. Number of heads 1-16 */
2768 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 2769 return AC_ERR_INVALID;
8bf62ece
AL		 2770
2771 /* set up init dev params taskfile */
2772 DPRINTK("init dev params \n");
2773
a0123703
TH		 2774 ata_tf_init(ap, &tf, dev->devno);
2775 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2776 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2777 tf.protocol = ATA_PROT_NODATA;
2778 tf.nsect = sectors;
2779 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2780
6aff8f1f 2781 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2782
6aff8f1f
TH		 2783 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2784 return err_mask;
8bf62ece
AL		 2785}
2786
1da177e4 2787/**
0cba632b
JG		 2788 * ata_sg_clean - Unmap DMA memory associated with command
2789 * @qc: Command containing DMA memory to be released
2790 *
2791 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2792 *
2793 * LOCKING:
0cba632b 2794 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2795 */
2796
2797static void ata_sg_clean(struct ata_queued_cmd *qc)
2798{
2799 struct ata_port *ap = qc->ap;
cedc9a47 2800 struct scatterlist *sg = qc->__sg;
1da177e4 2801 int dir = qc->dma_dir;
cedc9a47 2802 void *pad_buf = NULL;
1da177e4 2803
a4631474
TH		 2804 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2805 WARN_ON(sg == NULL);
1da177e4
LT		 2806
2807 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2808 WARN_ON(qc->n_elem > 1);
1da177e4 2809
2c13b7ce 2810 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2811
cedc9a47
JG		 2812 /* if we padded the buffer out to 32-bit bound, and data
2813 * xfer direction is from-device, we must copy from the
2814 * pad buffer back into the supplied buffer
2815 */
2816 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2817 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2818
2819 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 2820 if (qc->n_elem)
2f1f610b 2821 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2822 /* restore last sg */
2823 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2824 if (pad_buf) {
2825 struct scatterlist *psg = &qc->pad_sgent;
2826 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2827 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2828 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2829 }
2830 } else {
2e242fa9 2831 if (qc->n_elem)
2f1f610b 2832 dma_unmap_single(ap->dev,
e1410f2d
JG		 2833 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2834 dir);
cedc9a47
JG		 2835 /* restore sg */
2836 sg->length += qc->pad_len;
2837 if (pad_buf)
2838 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2839 pad_buf, qc->pad_len);
2840 }
1da177e4
LT		 2841
2842 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2843 qc->__sg = NULL;
1da177e4
LT		 2844}
2845
2846/**
2847 * ata_fill_sg - Fill PCI IDE PRD table
2848 * @qc: Metadata associated with taskfile to be transferred
2849 *
780a87f7
JG		 2850 * Fill PCI IDE PRD (scatter-gather) table with segments
2851 * associated with the current disk command.
2852 *
1da177e4 2853 * LOCKING:
780a87f7 2854 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2855 *
2856 */
2857static void ata_fill_sg(struct ata_queued_cmd *qc)
2858{
1da177e4 2859 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2860 struct scatterlist *sg;
2861 unsigned int idx;
1da177e4 2862
a4631474 2863 WARN_ON(qc->__sg == NULL);
f131883e 2864 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2865
2866 idx = 0;
cedc9a47 2867 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2868 u32 addr, offset;
2869 u32 sg_len, len;
2870
2871 /* determine if physical DMA addr spans 64K boundary.
2872 * Note h/w doesn't support 64-bit, so we unconditionally
2873 * truncate dma_addr_t to u32.
2874 */
2875 addr = (u32) sg_dma_address(sg);
2876 sg_len = sg_dma_len(sg);
2877
2878 while (sg_len) {
2879 offset = addr & 0xffff;
2880 len = sg_len;
2881 if ((offset + sg_len) > 0x10000)
2882 len = 0x10000 - offset;
2883
2884 ap->prd[idx].addr = cpu_to_le32(addr);
2885 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2886 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2887
2888 idx++;
2889 sg_len -= len;
2890 addr += len;
2891 }
2892 }
2893
2894 if (idx)
2895 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2896}
2897/**
2898 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2899 * @qc: Metadata associated with taskfile to check
2900 *
780a87f7
JG		 2901 * Allow low-level driver to filter ATA PACKET commands, returning
2902 * a status indicating whether or not it is OK to use DMA for the
2903 * supplied PACKET command.
2904 *
1da177e4 2905 * LOCKING:
0cba632b
JG		 2906 * spin_lock_irqsave(host_set lock)
2907 *
1da177e4
LT		 2908 * RETURNS: 0 when ATAPI DMA can be used
2909 * nonzero otherwise
2910 */
2911int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2912{
2913 struct ata_port *ap = qc->ap;
2914 int rc = 0; /* Assume ATAPI DMA is OK by default */
2915
2916 if (ap->ops->check_atapi_dma)
2917 rc = ap->ops->check_atapi_dma(qc);
2918
2919 return rc;
2920}
2921/**
2922 * ata_qc_prep - Prepare taskfile for submission
2923 * @qc: Metadata associated with taskfile to be prepared
2924 *
780a87f7
JG		 2925 * Prepare ATA taskfile for submission.
2926 *
1da177e4
LT		 2927 * LOCKING:
2928 * spin_lock_irqsave(host_set lock)
2929 */
2930void ata_qc_prep(struct ata_queued_cmd *qc)
2931{
2932 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2933 return;
2934
2935 ata_fill_sg(qc);
2936}
2937
e46834cd
BK		 2938void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2939
0cba632b
JG		 2940/**
2941 * ata_sg_init_one - Associate command with memory buffer
2942 * @qc: Command to be associated
2943 * @buf: Memory buffer
2944 * @buflen: Length of memory buffer, in bytes.
2945 *
2946 * Initialize the data-related elements of queued_cmd @qc
2947 * to point to a single memory buffer, @buf of byte length @buflen.
2948 *
2949 * LOCKING:
2950 * spin_lock_irqsave(host_set lock)
2951 */
2952
1da177e4
LT		 2953void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2954{
2955 struct scatterlist *sg;
2956
2957 qc->flags |= ATA_QCFLAG_SINGLE;
2958
2959 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2960 qc->__sg = &qc->sgent;
1da177e4 2961 qc->n_elem = 1;
cedc9a47 2962 qc->orig_n_elem = 1;
1da177e4
LT		 2963 qc->buf_virt = buf;
2964
cedc9a47 2965 sg = qc->__sg;
f0612bbc 2966 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2967}
2968
0cba632b
JG		 2969/**
2970 * ata_sg_init - Associate command with scatter-gather table.
2971 * @qc: Command to be associated
2972 * @sg: Scatter-gather table.
2973 * @n_elem: Number of elements in s/g table.
2974 *
2975 * Initialize the data-related elements of queued_cmd @qc
2976 * to point to a scatter-gather table @sg, containing @n_elem
2977 * elements.
2978 *
2979 * LOCKING:
2980 * spin_lock_irqsave(host_set lock)
2981 */
2982
1da177e4
LT		 2983void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2984 unsigned int n_elem)
2985{
2986 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2987 qc->__sg = sg;
1da177e4 2988 qc->n_elem = n_elem;
cedc9a47 2989 qc->orig_n_elem = n_elem;
1da177e4
LT		 2990}
2991
2992/**
0cba632b
JG		 2993 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2994 * @qc: Command with memory buffer to be mapped.
2995 *
2996 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2997 *
2998 * LOCKING:
2999 * spin_lock_irqsave(host_set lock)
3000 *
3001 * RETURNS:
0cba632b 3002 * Zero on success, negative on error.
1da177e4
LT		 3003 */
3004
3005static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3006{
3007 struct ata_port *ap = qc->ap;
3008 int dir = qc->dma_dir;
cedc9a47 3009 struct scatterlist *sg = qc->__sg;
1da177e4 3010 dma_addr_t dma_address;
2e242fa9 3011 int trim_sg = 0;
1da177e4 3012
cedc9a47
JG		 3013 /* we must lengthen transfers to end on a 32-bit boundary */
3014 qc->pad_len = sg->length & 3;
3015 if (qc->pad_len) {
3016 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3017 struct scatterlist *psg = &qc->pad_sgent;
3018
a4631474 3019 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3020
3021 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3022
3023 if (qc->tf.flags & ATA_TFLAG_WRITE)
3024 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3025 qc->pad_len);
3026
3027 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3028 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3029 /* trim sg */
3030 sg->length -= qc->pad_len;
2e242fa9
TH		 3031 if (sg->length == 0)
3032 trim_sg = 1;
cedc9a47
JG		 3033
3034 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3035 sg->length, qc->pad_len);
3036 }
3037
2e242fa9
TH		 3038 if (trim_sg) {
3039 qc->n_elem--;
e1410f2d
JG		 3040 goto skip_map;
3041 }
3042
2f1f610b 3043 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3044 sg->length, dir);
537a95d9
TH		 3045 if (dma_mapping_error(dma_address)) {
3046 /* restore sg */
3047 sg->length += qc->pad_len;
1da177e4 3048 return -1;
537a95d9 3049 }
1da177e4
LT		 3050
3051 sg_dma_address(sg) = dma_address;
32529e01 3052 sg_dma_len(sg) = sg->length;
1da177e4 3053
2e242fa9 3054skip_map:
1da177e4
LT		 3055 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3056 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3057
3058 return 0;
3059}
3060
3061/**
0cba632b
JG		 3062 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3063 * @qc: Command with scatter-gather table to be mapped.
3064 *
3065 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3066 *
3067 * LOCKING:
3068 * spin_lock_irqsave(host_set lock)
3069 *
3070 * RETURNS:
0cba632b 3071 * Zero on success, negative on error.
1da177e4
LT		 3072 *
3073 */
3074
3075static int ata_sg_setup(struct ata_queued_cmd *qc)
3076{
3077 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3078 struct scatterlist *sg = qc->__sg;
3079 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3080 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3081
3082 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3083 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3084
cedc9a47
JG		 3085 /* we must lengthen transfers to end on a 32-bit boundary */
3086 qc->pad_len = lsg->length & 3;
3087 if (qc->pad_len) {
3088 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3089 struct scatterlist *psg = &qc->pad_sgent;
3090 unsigned int offset;
3091
a4631474 3092 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3093
3094 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3095
3096 /*
3097 * psg->page/offset are used to copy to-be-written
3098 * data in this function or read data in ata_sg_clean.
3099 */
3100 offset = lsg->offset + lsg->length - qc->pad_len;
3101 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3102 psg->offset = offset_in_page(offset);
3103
3104 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3105 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3106 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3107 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3108 }
3109
3110 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3111 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3112 /* trim last sg */
3113 lsg->length -= qc->pad_len;
e1410f2d
JG		 3114 if (lsg->length == 0)
3115 trim_sg = 1;
cedc9a47
JG		 3116
3117 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3118 qc->n_elem - 1, lsg->length, qc->pad_len);
3119 }
3120
e1410f2d
JG		 3121 pre_n_elem = qc->n_elem;
3122 if (trim_sg && pre_n_elem)
3123 pre_n_elem--;
3124
3125 if (!pre_n_elem) {
3126 n_elem = 0;
3127 goto skip_map;
3128 }
3129
1da177e4 3130 dir = qc->dma_dir;
2f1f610b 3131 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3132 if (n_elem < 1) {
3133 /* restore last sg */
3134 lsg->length += qc->pad_len;
1da177e4 3135 return -1;
537a95d9 3136 }
1da177e4
LT		 3137
3138 DPRINTK("%d sg elements mapped\n", n_elem);
3139
e1410f2d 3140skip_map:
1da177e4
LT		 3141 qc->n_elem = n_elem;
3142
3143 return 0;
3144}
3145
40e8c82c
TH		 3146/**
3147 * ata_poll_qc_complete - turn irq back on and finish qc
3148 * @qc: Command to complete
8e8b77dd 3149 * @err_mask: ATA status register content
40e8c82c
TH		 3150 *
3151 * LOCKING:
3152 * None. (grabs host lock)
3153 */
3154
a22e2eb0 3155void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3156{
3157 struct ata_port *ap = qc->ap;
b8f6153e 3158 unsigned long flags;
40e8c82c 3159
b8f6153e 3160 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3161 ap->flags &= ~ATA_FLAG_NOINTR;
3162 ata_irq_on(ap);
a22e2eb0 3163 ata_qc_complete(qc);
b8f6153e 3164 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3165}
3166
1da177e4 3167/**
c893a3ae 3168 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3169 * @ap: the target ata_port
1da177e4
LT		 3170 *
3171 * LOCKING:
0cba632b 3172 * None. (executing in kernel thread context)
1da177e4
LT		 3173 *
3174 * RETURNS:
6f0ef4fa 3175 * timeout value to use
1da177e4
LT		 3176 */
3177
3178static unsigned long ata_pio_poll(struct ata_port *ap)
3179{
c14b8331 3180 struct ata_queued_cmd *qc;
1da177e4 3181 u8 status;
14be71f4
AL		 3182 unsigned int poll_state = HSM_ST_UNKNOWN;
3183 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3184
c14b8331 3185 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3186 WARN_ON(qc == NULL);
c14b8331 3187
14be71f4
AL		 3188 switch (ap->hsm_task_state) {
3189 case HSM_ST:
3190 case HSM_ST_POLL:
3191 poll_state = HSM_ST_POLL;
3192 reg_state = HSM_ST;
1da177e4 3193 break;
14be71f4
AL		 3194 case HSM_ST_LAST:
3195 case HSM_ST_LAST_POLL:
3196 poll_state = HSM_ST_LAST_POLL;
3197 reg_state = HSM_ST_LAST;
1da177e4
LT		 3198 break;
3199 default:
3200 BUG();
3201 break;
3202 }
3203
3204 status = ata_chk_status(ap);
3205 if (status & ATA_BUSY) {
3206 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3207 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3208 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3209 return 0;
3210 }
14be71f4 3211 ap->hsm_task_state = poll_state;
1da177e4
LT		 3212 return ATA_SHORT_PAUSE;
3213 }
3214
14be71f4 3215 ap->hsm_task_state = reg_state;
1da177e4
LT		 3216 return 0;
3217}
3218
3219/**
6f0ef4fa
RD		 3220 * ata_pio_complete - check if drive is busy or idle
3221 * @ap: the target ata_port
1da177e4
LT		 3222 *
3223 * LOCKING:
0cba632b 3224 * None. (executing in kernel thread context)
7fb6ec28
JG		 3225 *
3226 * RETURNS:
3227 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3228 */
3229
7fb6ec28 3230static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3231{
3232 struct ata_queued_cmd *qc;
3233 u8 drv_stat;
3234
3235 /*
31433ea3
AC		 3236 * This is purely heuristic. This is a fast path. Sometimes when
3237 * we enter, BSY will be cleared in a chk-status or two. If not,
3238 * the drive is probably seeking or something. Snooze for a couple
3239 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3240 * HSM_ST_POLL state.
1da177e4 3241 */
fe79e683
AL		 3242 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3243 if (drv_stat & ATA_BUSY) {
1da177e4 3244 msleep(2);
fe79e683
AL		 3245 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3246 if (drv_stat & ATA_BUSY) {
14be71f4 3247 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3248 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3249 return 0;
1da177e4
LT		 3250 }
3251 }
3252
c14b8331 3253 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3254 WARN_ON(qc == NULL);
c14b8331 3255
1da177e4
LT		 3256 drv_stat = ata_wait_idle(ap);
3257 if (!ata_ok(drv_stat)) {
1c848984 3258 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3259 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3260 return 0;
1da177e4
LT		 3261 }
3262
14be71f4 3263 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3264
a4631474 3265 WARN_ON(qc->err_mask);
a22e2eb0 3266 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3267
3268 /* another command may start at this point */
3269
3270 return 1;
1da177e4
LT		 3271}
3272
0baab86b
EF		 3273
3274/**
c893a3ae 3275 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3276 * @buf: Buffer to swap
3277 * @buf_words: Number of 16-bit words in buffer.
3278 *
3279 * Swap halves of 16-bit words if needed to convert from
3280 * little-endian byte order to native cpu byte order, or
3281 * vice-versa.
3282 *
3283 * LOCKING:
6f0ef4fa 3284 * Inherited from caller.
0baab86b 3285 */
1da177e4
LT		 3286void swap_buf_le16(u16 *buf, unsigned int buf_words)
3287{
3288#ifdef __BIG_ENDIAN
3289 unsigned int i;
3290
3291 for (i = 0; i < buf_words; i++)
3292 buf[i] = le16_to_cpu(buf[i]);
3293#endif /* __BIG_ENDIAN */
3294}
3295
6ae4cfb5
AL		 3296/**
3297 * ata_mmio_data_xfer - Transfer data by MMIO
3298 * @ap: port to read/write
3299 * @buf: data buffer
3300 * @buflen: buffer length
344babaa 3301 * @write_data: read/write
6ae4cfb5
AL		 3302 *
3303 * Transfer data from/to the device data register by MMIO.
3304 *
3305 * LOCKING:
3306 * Inherited from caller.
6ae4cfb5
AL		 3307 */
3308
1da177e4
LT		 3309static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3310 unsigned int buflen, int write_data)
3311{
3312 unsigned int i;
3313 unsigned int words = buflen >> 1;
3314 u16 *buf16 = (u16 *) buf;
3315 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3316
6ae4cfb5 3317 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3318 if (write_data) {
3319 for (i = 0; i < words; i++)
3320 writew(le16_to_cpu(buf16[i]), mmio);
3321 } else {
3322 for (i = 0; i < words; i++)
3323 buf16[i] = cpu_to_le16(readw(mmio));
3324 }
6ae4cfb5
AL		 3325
3326 /* Transfer trailing 1 byte, if any. */
3327 if (unlikely(buflen & 0x01)) {
3328 u16 align_buf[1] = { 0 };
3329 unsigned char *trailing_buf = buf + buflen - 1;
3330
3331 if (write_data) {
3332 memcpy(align_buf, trailing_buf, 1);
3333 writew(le16_to_cpu(align_buf[0]), mmio);
3334 } else {
3335 align_buf[0] = cpu_to_le16(readw(mmio));
3336 memcpy(trailing_buf, align_buf, 1);
3337 }
3338 }
1da177e4
LT		 3339}
3340
6ae4cfb5
AL		 3341/**
3342 * ata_pio_data_xfer - Transfer data by PIO
3343 * @ap: port to read/write
3344 * @buf: data buffer
3345 * @buflen: buffer length
344babaa 3346 * @write_data: read/write
6ae4cfb5
AL		 3347 *
3348 * Transfer data from/to the device data register by PIO.
3349 *
3350 * LOCKING:
3351 * Inherited from caller.
6ae4cfb5
AL		 3352 */
3353
1da177e4
LT		 3354static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3355 unsigned int buflen, int write_data)
3356{
6ae4cfb5 3357 unsigned int words = buflen >> 1;
1da177e4 3358
6ae4cfb5 3359 /* Transfer multiple of 2 bytes */
1da177e4 3360 if (write_data)
6ae4cfb5 3361 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3362 else
6ae4cfb5
AL		 3363 insw(ap->ioaddr.data_addr, buf, words);
3364
3365 /* Transfer trailing 1 byte, if any. */
3366 if (unlikely(buflen & 0x01)) {
3367 u16 align_buf[1] = { 0 };
3368 unsigned char *trailing_buf = buf + buflen - 1;
3369
3370 if (write_data) {
3371 memcpy(align_buf, trailing_buf, 1);
3372 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3373 } else {
3374 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3375 memcpy(trailing_buf, align_buf, 1);
3376 }
3377 }
1da177e4
LT		 3378}
3379
6ae4cfb5
AL		 3380/**
3381 * ata_data_xfer - Transfer data from/to the data register.
3382 * @ap: port to read/write
3383 * @buf: data buffer
3384 * @buflen: buffer length
3385 * @do_write: read/write
3386 *
3387 * Transfer data from/to the device data register.
3388 *
3389 * LOCKING:
3390 * Inherited from caller.
6ae4cfb5
AL		 3391 */
3392
1da177e4
LT		 3393static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3394 unsigned int buflen, int do_write)
3395{
a1bd9e68
AC		 3396 /* Make the crap hardware pay the costs not the good stuff */
3397 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3398 unsigned long flags;
3399 local_irq_save(flags);
3400 if (ap->flags & ATA_FLAG_MMIO)
3401 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3402 else
3403 ata_pio_data_xfer(ap, buf, buflen, do_write);
3404 local_irq_restore(flags);
3405 } else {
3406 if (ap->flags & ATA_FLAG_MMIO)
3407 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3408 else
3409 ata_pio_data_xfer(ap, buf, buflen, do_write);
3410 }
1da177e4
LT		 3411}
3412
6ae4cfb5
AL		 3413/**
3414 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3415 * @qc: Command on going
3416 *
3417 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3418 *
3419 * LOCKING:
3420 * Inherited from caller.
3421 */
3422
1da177e4
LT		 3423static void ata_pio_sector(struct ata_queued_cmd *qc)
3424{
3425 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3426 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3427 struct ata_port *ap = qc->ap;
3428 struct page *page;
3429 unsigned int offset;
3430 unsigned char *buf;
3431
3432 if (qc->cursect == (qc->nsect - 1))
14be71f4 3433 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3434
3435 page = sg[qc->cursg].page;
3436 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3437
3438 /* get the current page and offset */
3439 page = nth_page(page, (offset >> PAGE_SHIFT));
3440 offset %= PAGE_SIZE;
3441
3442 buf = kmap(page) + offset;
3443
3444 qc->cursect++;
3445 qc->cursg_ofs++;
3446
32529e01 3447 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3448 qc->cursg++;
3449 qc->cursg_ofs = 0;
3450 }
3451
3452 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3453
3454 /* do the actual data transfer */
3455 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3456 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3457
3458 kunmap(page);
3459}
3460
6ae4cfb5
AL		 3461/**
3462 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3463 * @qc: Command on going
3464 * @bytes: number of bytes
3465 *
3466 * Transfer Transfer data from/to the ATAPI device.
3467 *
3468 * LOCKING:
3469 * Inherited from caller.
3470 *
3471 */
3472
1da177e4
LT		 3473static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3474{
3475 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3476 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3477 struct ata_port *ap = qc->ap;
3478 struct page *page;
3479 unsigned char *buf;
3480 unsigned int offset, count;
3481
563a6e1f 3482 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3483 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3484
3485next_sg:
563a6e1f 3486 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3487 /*
563a6e1f
AL		 3488 * The end of qc->sg is reached and the device expects
3489 * more data to transfer. In order not to overrun qc->sg
3490 * and fulfill length specified in the byte count register,
3491 * - for read case, discard trailing data from the device
3492 * - for write case, padding zero data to the device
3493 */
3494 u16 pad_buf[1] = { 0 };
3495 unsigned int words = bytes >> 1;
3496 unsigned int i;
3497
3498 if (words) /* warning if bytes > 1 */
7fb6ec28 3499 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3500 ap->id, bytes);
3501
3502 for (i = 0; i < words; i++)
3503 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3504
14be71f4 3505 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3506 return;
3507 }
3508
cedc9a47 3509 sg = &qc->__sg[qc->cursg];
1da177e4 3510
1da177e4
LT		 3511 page = sg->page;
3512 offset = sg->offset + qc->cursg_ofs;
3513
3514 /* get the current page and offset */
3515 page = nth_page(page, (offset >> PAGE_SHIFT));
3516 offset %= PAGE_SIZE;
3517
6952df03 3518 /* don't overrun current sg */
32529e01 3519 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3520
3521 /* don't cross page boundaries */
3522 count = min(count, (unsigned int)PAGE_SIZE - offset);
3523
3524 buf = kmap(page) + offset;
3525
3526 bytes -= count;
3527 qc->curbytes += count;
3528 qc->cursg_ofs += count;
3529
32529e01 3530 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3531 qc->cursg++;
3532 qc->cursg_ofs = 0;
3533 }
3534
3535 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3536
3537 /* do the actual data transfer */
3538 ata_data_xfer(ap, buf, count, do_write);
3539
3540 kunmap(page);
3541
563a6e1f 3542 if (bytes)
1da177e4 3543 goto next_sg;
1da177e4
LT		 3544}
3545
6ae4cfb5
AL		 3546/**
3547 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3548 * @qc: Command on going
3549 *
3550 * Transfer Transfer data from/to the ATAPI device.
3551 *
3552 * LOCKING:
3553 * Inherited from caller.
6ae4cfb5
AL		 3554 */
3555
1da177e4
LT		 3556static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3557{
3558 struct ata_port *ap = qc->ap;
3559 struct ata_device *dev = qc->dev;
3560 unsigned int ireason, bc_lo, bc_hi, bytes;
3561 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3562
3563 ap->ops->tf_read(ap, &qc->tf);
3564 ireason = qc->tf.nsect;
3565 bc_lo = qc->tf.lbam;
3566 bc_hi = qc->tf.lbah;
3567 bytes = (bc_hi << 8) | bc_lo;
3568
3569 /* shall be cleared to zero, indicating xfer of data */
3570 if (ireason & (1 << 0))
3571 goto err_out;
3572
3573 /* make sure transfer direction matches expected */
3574 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3575 if (do_write != i_write)
3576 goto err_out;
3577
3578 __atapi_pio_bytes(qc, bytes);
3579
3580 return;
3581
3582err_out:
3583 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3584 ap->id, dev->devno);
11a56d24 3585 qc->err_mask |= AC_ERR_HSM;
14be71f4 3586 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3587}
3588
3589/**
6f0ef4fa
RD		 3590 * ata_pio_block - start PIO on a block
3591 * @ap: the target ata_port
1da177e4
LT		 3592 *
3593 * LOCKING:
0cba632b 3594 * None. (executing in kernel thread context)
1da177e4
LT		 3595 */
3596
3597static void ata_pio_block(struct ata_port *ap)
3598{
3599 struct ata_queued_cmd *qc;
3600 u8 status;
3601
3602 /*
6f0ef4fa 3603 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3604 * Sometimes when we enter, BSY will be cleared in
3605 * a chk-status or two. If not, the drive is probably seeking
3606 * or something. Snooze for a couple msecs, then
3607 * chk-status again. If still busy, fall back to
14be71f4 3608 * HSM_ST_POLL state.
1da177e4
LT		 3609 */
3610 status = ata_busy_wait(ap, ATA_BUSY, 5);
3611 if (status & ATA_BUSY) {
3612 msleep(2);
3613 status = ata_busy_wait(ap, ATA_BUSY, 10);
3614 if (status & ATA_BUSY) {
14be71f4 3615 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3616 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3617 return;
3618 }
3619 }
3620
3621 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3622 WARN_ON(qc == NULL);
1da177e4 3623
fe79e683
AL		 3624 /* check error */
3625 if (status & (ATA_ERR | ATA_DF)) {
3626 qc->err_mask |= AC_ERR_DEV;
3627 ap->hsm_task_state = HSM_ST_ERR;
3628 return;
3629 }
3630
3631 /* transfer data if any */
1da177e4 3632 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3633 /* DRQ=0 means no more data to transfer */
1da177e4 3634 if ((status & ATA_DRQ) == 0) {
14be71f4 3635 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3636 return;
3637 }
3638
3639 atapi_pio_bytes(qc);
3640 } else {
3641 /* handle BSY=0, DRQ=0 as error */
3642 if ((status & ATA_DRQ) == 0) {
11a56d24 3643 qc->err_mask |= AC_ERR_HSM;
14be71f4 3644 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3645 return;
3646 }
3647
3648 ata_pio_sector(qc);
3649 }
3650}
3651
3652static void ata_pio_error(struct ata_port *ap)
3653{
3654 struct ata_queued_cmd *qc;
a7dac447 3655
1da177e4 3656 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3657 WARN_ON(qc == NULL);
1da177e4 3658
0565c26d
AL		 3659 if (qc->tf.command != ATA_CMD_PACKET)
3660 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3661
2e9edbf8 3662 /* make sure qc->err_mask is available to
1c848984
AL		 3663 * know what's wrong and recover
3664 */
a4631474 3665 WARN_ON(qc->err_mask == 0);
1c848984 3666
14be71f4 3667 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3668
a22e2eb0 3669 ata_poll_qc_complete(qc);
1da177e4
LT		 3670}
3671
3672static void ata_pio_task(void *_data)
3673{
3674 struct ata_port *ap = _data;
7fb6ec28
JG		 3675 unsigned long timeout;
3676 int qc_completed;
3677
3678fsm_start:
3679 timeout = 0;
3680 qc_completed = 0;
1da177e4 3681
14be71f4
AL		 3682 switch (ap->hsm_task_state) {
3683 case HSM_ST_IDLE:
1da177e4
LT		 3684 return;
3685
14be71f4 3686 case HSM_ST:
1da177e4
LT		 3687 ata_pio_block(ap);
3688 break;
3689
14be71f4 3690 case HSM_ST_LAST:
7fb6ec28 3691 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3692 break;
3693
14be71f4
AL		 3694 case HSM_ST_POLL:
3695 case HSM_ST_LAST_POLL:
1da177e4
LT		 3696 timeout = ata_pio_poll(ap);
3697 break;
3698
14be71f4
AL		 3699 case HSM_ST_TMOUT:
3700 case HSM_ST_ERR:
1da177e4
LT		 3701 ata_pio_error(ap);
3702 return;
3703 }
3704
3705 if (timeout)
8061f5f0 3706 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3707 else if (!qc_completed)
3708 goto fsm_start;
1da177e4
LT		 3709}
3710
8061f5f0
TH		 3711/**
3712 * atapi_packet_task - Write CDB bytes to hardware
3713 * @_data: Port to which ATAPI device is attached.
3714 *
3715 * When device has indicated its readiness to accept
3716 * a CDB, this function is called. Send the CDB.
3717 * If DMA is to be performed, exit immediately.
3718 * Otherwise, we are in polling mode, so poll
3719 * status under operation succeeds or fails.
3720 *
3721 * LOCKING:
3722 * Kernel thread context (may sleep)
3723 */
3724
3725static void atapi_packet_task(void *_data)
3726{
3727 struct ata_port *ap = _data;
3728 struct ata_queued_cmd *qc;
3729 u8 status;
3730
3731 qc = ata_qc_from_tag(ap, ap->active_tag);
3732 WARN_ON(qc == NULL);
3733 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3734
3735 /* sleep-wait for BSY to clear */
3736 DPRINTK("busy wait\n");
3737 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3738 qc->err_mask |= AC_ERR_TIMEOUT;
3739 goto err_out;
3740 }
3741
3742 /* make sure DRQ is set */
3743 status = ata_chk_status(ap);
3744 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3745 qc->err_mask |= AC_ERR_HSM;
3746 goto err_out;
3747 }
3748
3749 /* send SCSI cdb */
3750 DPRINTK("send cdb\n");
3751 WARN_ON(qc->dev->cdb_len < 12);
3752
3753 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3754 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3755 unsigned long flags;
3756
3757 /* Once we're done issuing command and kicking bmdma,
3758 * irq handler takes over. To not lose irq, we need
3759 * to clear NOINTR flag before sending cdb, but
3760 * interrupt handler shouldn't be invoked before we're
3761 * finished. Hence, the following locking.
3762 */
3763 spin_lock_irqsave(&ap->host_set->lock, flags);
3764 ap->flags &= ~ATA_FLAG_NOINTR;
3765 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3766 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3767 ap->ops->bmdma_start(qc); /* initiate bmdma */
3768 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3769 } else {
3770 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3771
3772 /* PIO commands are handled by polling */
3773 ap->hsm_task_state = HSM_ST;
3774 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3775 }
3776
3777 return;
3778
3779err_out:
3780 ata_poll_qc_complete(qc);
3781}
3782
1da177e4
LT		 3783/**
3784 * ata_qc_timeout - Handle timeout of queued command
3785 * @qc: Command that timed out
3786 *
3787 * Some part of the kernel (currently, only the SCSI layer)
3788 * has noticed that the active command on port @ap has not
3789 * completed after a specified length of time. Handle this
3790 * condition by disabling DMA (if necessary) and completing
3791 * transactions, with error if necessary.
3792 *
3793 * This also handles the case of the "lost interrupt", where
3794 * for some reason (possibly hardware bug, possibly driver bug)
3795 * an interrupt was not delivered to the driver, even though the
3796 * transaction completed successfully.
3797 *
3798 * LOCKING:
0cba632b 3799 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3800 */
3801
3802static void ata_qc_timeout(struct ata_queued_cmd *qc)
3803{
3804 struct ata_port *ap = qc->ap;
b8f6153e 3805 struct ata_host_set *host_set = ap->host_set;
1da177e4 3806 u8 host_stat = 0, drv_stat;
b8f6153e 3807 unsigned long flags;
1da177e4
LT		 3808
3809 DPRINTK("ENTER\n");
3810
c18d06f8
TH		 3811 ap->hsm_task_state = HSM_ST_IDLE;
3812
b8f6153e
JG		 3813 spin_lock_irqsave(&host_set->lock, flags);
3814
1da177e4
LT		 3815 switch (qc->tf.protocol) {
3816
3817 case ATA_PROT_DMA:
3818 case ATA_PROT_ATAPI_DMA:
3819 host_stat = ap->ops->bmdma_status(ap);
3820
3821 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3822 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3823
3824 /* fall through */
3825
3826 default:
3827 ata_altstatus(ap);
3828 drv_stat = ata_chk_status(ap);
3829
3830 /* ack bmdma irq events */
3831 ap->ops->irq_clear(ap);
3832
3833 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3834 ap->id, qc->tf.command, drv_stat, host_stat);
3835
3836 /* complete taskfile transaction */
a22e2eb0 3837 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3838 break;
3839 }
b8f6153e
JG		 3840
3841 spin_unlock_irqrestore(&host_set->lock, flags);
3842
a72ec4ce
TH		 3843 ata_eh_qc_complete(qc);
3844
1da177e4
LT		 3845 DPRINTK("EXIT\n");
3846}
3847
3848/**
3849 * ata_eng_timeout - Handle timeout of queued command
3850 * @ap: Port on which timed-out command is active
3851 *
3852 * Some part of the kernel (currently, only the SCSI layer)
3853 * has noticed that the active command on port @ap has not
3854 * completed after a specified length of time. Handle this
3855 * condition by disabling DMA (if necessary) and completing
3856 * transactions, with error if necessary.
3857 *
3858 * This also handles the case of the "lost interrupt", where
3859 * for some reason (possibly hardware bug, possibly driver bug)
3860 * an interrupt was not delivered to the driver, even though the
3861 * transaction completed successfully.
3862 *
3863 * LOCKING:
3864 * Inherited from SCSI layer (none, can sleep)
3865 */
3866
3867void ata_eng_timeout(struct ata_port *ap)
3868{
1da177e4
LT		 3869 DPRINTK("ENTER\n");
3870
f6379020 3871 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3872
1da177e4
LT		 3873 DPRINTK("EXIT\n");
3874}
3875
3876/**
3877 * ata_qc_new - Request an available ATA command, for queueing
3878 * @ap: Port associated with device @dev
3879 * @dev: Device from whom we request an available command structure
3880 *
3881 * LOCKING:
0cba632b 3882 * None.
1da177e4
LT		 3883 */
3884
3885static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3886{
3887 struct ata_queued_cmd *qc = NULL;
3888 unsigned int i;
3889
3890 for (i = 0; i < ATA_MAX_QUEUE; i++)
3891 if (!test_and_set_bit(i, &ap->qactive)) {
3892 qc = ata_qc_from_tag(ap, i);
3893 break;
3894 }
3895
3896 if (qc)
3897 qc->tag = i;
3898
3899 return qc;
3900}
3901
3902/**
3903 * ata_qc_new_init - Request an available ATA command, and initialize it
3904 * @ap: Port associated with device @dev
3905 * @dev: Device from whom we request an available command structure
3906 *
3907 * LOCKING:
0cba632b 3908 * None.
1da177e4
LT		 3909 */
3910
3911struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3912 struct ata_device *dev)
3913{
3914 struct ata_queued_cmd *qc;
3915
3916 qc = ata_qc_new(ap);
3917 if (qc) {
1da177e4
LT		 3918 qc->scsicmd = NULL;
3919 qc->ap = ap;
3920 qc->dev = dev;
1da177e4 3921
2c13b7ce 3922 ata_qc_reinit(qc);
1da177e4
LT		 3923 }
3924
3925 return qc;
3926}
3927
1da177e4
LT		 3928/**
3929 * ata_qc_free - free unused ata_queued_cmd
3930 * @qc: Command to complete
3931 *
3932 * Designed to free unused ata_queued_cmd object
3933 * in case something prevents using it.
3934 *
3935 * LOCKING:
0cba632b 3936 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3937 */
3938void ata_qc_free(struct ata_queued_cmd *qc)
3939{
4ba946e9
TH		 3940 struct ata_port *ap = qc->ap;
3941 unsigned int tag;
3942
a4631474 3943 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3944
4ba946e9
TH		 3945 qc->flags = 0;
3946 tag = qc->tag;
3947 if (likely(ata_tag_valid(tag))) {
3948 if (tag == ap->active_tag)
3949 ap->active_tag = ATA_TAG_POISON;
3950 qc->tag = ATA_TAG_POISON;
3951 clear_bit(tag, &ap->qactive);
3952 }
1da177e4
LT		 3953}
3954
76014427 3955void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3956{
a4631474
TH		 3957 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3958 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3959
3960 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3961 ata_sg_clean(qc);
3962
3f3791d3
AL		 3963 /* atapi: mark qc as inactive to prevent the interrupt handler
3964 * from completing the command twice later, before the error handler
3965 * is called. (when rc != 0 and atapi request sense is needed)
3966 */
3967 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3968
1da177e4 3969 /* call completion callback */
77853bf2 3970 qc->complete_fn(qc);
1da177e4
LT		 3971}
3972
3973static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3974{
3975 struct ata_port *ap = qc->ap;
3976
3977 switch (qc->tf.protocol) {
3978 case ATA_PROT_DMA:
3979 case ATA_PROT_ATAPI_DMA:
3980 return 1;
3981
3982 case ATA_PROT_ATAPI:
3983 case ATA_PROT_PIO:
1da177e4
LT		 3984 if (ap->flags & ATA_FLAG_PIO_DMA)
3985 return 1;
3986
3987 /* fall through */
3988
3989 default:
3990 return 0;
3991 }
3992
3993 /* never reached */
3994}
3995
3996/**
3997 * ata_qc_issue - issue taskfile to device
3998 * @qc: command to issue to device
3999 *
4000 * Prepare an ATA command to submission to device.
4001 * This includes mapping the data into a DMA-able
4002 * area, filling in the S/G table, and finally
4003 * writing the taskfile to hardware, starting the command.
4004 *
4005 * LOCKING:
4006 * spin_lock_irqsave(host_set lock)
1da177e4 4007 */
8e0e694a 4008void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4009{
4010 struct ata_port *ap = qc->ap;
4011
e4a70e76
TH		 4012 qc->ap->active_tag = qc->tag;
4013 qc->flags |= ATA_QCFLAG_ACTIVE;
4014
1da177e4
LT		 4015 if (ata_should_dma_map(qc)) {
4016 if (qc->flags & ATA_QCFLAG_SG) {
4017 if (ata_sg_setup(qc))
8e436af9 4018 goto sg_err;
1da177e4
LT		 4019 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4020 if (ata_sg_setup_one(qc))
8e436af9 4021 goto sg_err;
1da177e4
LT		 4022 }
4023 } else {
4024 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4025 }
4026
4027 ap->ops->qc_prep(qc);
4028
8e0e694a
TH		 4029 qc->err_mask |= ap->ops->qc_issue(qc);
4030 if (unlikely(qc->err_mask))
4031 goto err;
4032 return;
1da177e4 4033
8e436af9
TH		 4034sg_err:
4035 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4036 qc->err_mask |= AC_ERR_SYSTEM;
4037err:
4038 ata_qc_complete(qc);
1da177e4
LT		 4039}
4040
4041/**
4042 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4043 * @qc: command to issue to device
4044 *
4045 * Using various libata functions and hooks, this function
4046 * starts an ATA command. ATA commands are grouped into
4047 * classes called "protocols", and issuing each type of protocol
4048 * is slightly different.
4049 *
0baab86b
EF		 4050 * May be used as the qc_issue() entry in ata_port_operations.
4051 *
1da177e4
LT		 4052 * LOCKING:
4053 * spin_lock_irqsave(host_set lock)
4054 *
4055 * RETURNS:
9a3d9eb0 4056 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4057 */
4058
9a3d9eb0 4059unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4060{
4061 struct ata_port *ap = qc->ap;
4062
4063 ata_dev_select(ap, qc->dev->devno, 1, 0);
4064
4065 switch (qc->tf.protocol) {
4066 case ATA_PROT_NODATA:
e5338254 4067 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4068 break;
4069
4070 case ATA_PROT_DMA:
4071 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4072 ap->ops->bmdma_setup(qc); /* set up bmdma */
4073 ap->ops->bmdma_start(qc); /* initiate bmdma */
4074 break;
4075
4076 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4077 ata_qc_set_polling(qc);
e5338254 4078 ata_tf_to_host(ap, &qc->tf);
14be71f4 4079 ap->hsm_task_state = HSM_ST;
8061f5f0 4080 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4081 break;
4082
4083 case ATA_PROT_ATAPI:
4084 ata_qc_set_polling(qc);
e5338254 4085 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4086 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4087 break;
4088
4089 case ATA_PROT_ATAPI_NODATA:
c1389503 4090 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4091 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4092 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4093 break;
4094
4095 case ATA_PROT_ATAPI_DMA:
c1389503 4096 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4097 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4098 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4099 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4100 break;
4101
4102 default:
4103 WARN_ON(1);
9a3d9eb0 4104 return AC_ERR_SYSTEM;
1da177e4
LT		 4105 }
4106
4107 return 0;
4108}
4109
1da177e4
LT		 4110/**
4111 * ata_host_intr - Handle host interrupt for given (port, task)
4112 * @ap: Port on which interrupt arrived (possibly...)
4113 * @qc: Taskfile currently active in engine
4114 *
4115 * Handle host interrupt for given queued command. Currently,
4116 * only DMA interrupts are handled. All other commands are
4117 * handled via polling with interrupts disabled (nIEN bit).
4118 *
4119 * LOCKING:
4120 * spin_lock_irqsave(host_set lock)
4121 *
4122 * RETURNS:
4123 * One if interrupt was handled, zero if not (shared irq).
4124 */
4125
4126inline unsigned int ata_host_intr (struct ata_port *ap,
4127 struct ata_queued_cmd *qc)
4128{
4129 u8 status, host_stat;
4130
4131 switch (qc->tf.protocol) {
4132
4133 case ATA_PROT_DMA:
4134 case ATA_PROT_ATAPI_DMA:
4135 case ATA_PROT_ATAPI:
4136 /* check status of DMA engine */
4137 host_stat = ap->ops->bmdma_status(ap);
4138 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4139
4140 /* if it's not our irq... */
4141 if (!(host_stat & ATA_DMA_INTR))
4142 goto idle_irq;
4143
4144 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4145 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4146
4147 /* fall through */
4148
4149 case ATA_PROT_ATAPI_NODATA:
4150 case ATA_PROT_NODATA:
4151 /* check altstatus */
4152 status = ata_altstatus(ap);
4153 if (status & ATA_BUSY)
4154 goto idle_irq;
4155
4156 /* check main status, clearing INTRQ */
4157 status = ata_chk_status(ap);
4158 if (unlikely(status & ATA_BUSY))
4159 goto idle_irq;
4160 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4161 ap->id, qc->tf.protocol, status);
4162
4163 /* ack bmdma irq events */
4164 ap->ops->irq_clear(ap);
4165
4166 /* complete taskfile transaction */
a22e2eb0
AL		 4167 qc->err_mask |= ac_err_mask(status);
4168 ata_qc_complete(qc);
1da177e4
LT		 4169 break;
4170
4171 default:
4172 goto idle_irq;
4173 }
4174
4175 return 1; /* irq handled */
4176
4177idle_irq:
4178 ap->stats.idle_irq++;
4179
4180#ifdef ATA_IRQ_TRAP
4181 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4182 ata_irq_ack(ap, 0); /* debug trap */
4183 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4184 return 1;
1da177e4
LT		 4185 }
4186#endif
4187 return 0; /* irq not handled */
4188}
4189
4190/**
4191 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4192 * @irq: irq line (unused)
4193 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4194 * @regs: unused
4195 *
0cba632b
JG		 4196 * Default interrupt handler for PCI IDE devices. Calls
4197 * ata_host_intr() for each port that is not disabled.
4198 *
1da177e4 4199 * LOCKING:
0cba632b 4200 * Obtains host_set lock during operation.
1da177e4
LT		 4201 *
4202 * RETURNS:
0cba632b 4203 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4204 */
4205
4206irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4207{
4208 struct ata_host_set *host_set = dev_instance;
4209 unsigned int i;
4210 unsigned int handled = 0;
4211 unsigned long flags;
4212
4213 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4214 spin_lock_irqsave(&host_set->lock, flags);
4215
4216 for (i = 0; i < host_set->n_ports; i++) {
4217 struct ata_port *ap;
4218
4219 ap = host_set->ports[i];
c1389503
TH		 4220 if (ap &&
4221 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4222 struct ata_queued_cmd *qc;
4223
4224 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4225 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4226 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4227 handled |= ata_host_intr(ap, qc);
4228 }
4229 }
4230
4231 spin_unlock_irqrestore(&host_set->lock, flags);
4232
4233 return IRQ_RETVAL(handled);
4234}
4235
0baab86b 4236
9b847548
JA		 4237/*
4238 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4239 * without filling any other registers
4240 */
4241static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4242 u8 cmd)
4243{
4244 struct ata_taskfile tf;
4245 int err;
4246
4247 ata_tf_init(ap, &tf, dev->devno);
4248
4249 tf.command = cmd;
4250 tf.flags |= ATA_TFLAG_DEVICE;
4251 tf.protocol = ATA_PROT_NODATA;
4252
4253 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4254 if (err)
4255 printk(KERN_ERR "%s: ata command failed: %d\n",
4256 __FUNCTION__, err);
4257
4258 return err;
4259}
4260
4261static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4262{
4263 u8 cmd;
4264
4265 if (!ata_try_flush_cache(dev))
4266 return 0;
4267
4268 if (ata_id_has_flush_ext(dev->id))
4269 cmd = ATA_CMD_FLUSH_EXT;
4270 else
4271 cmd = ATA_CMD_FLUSH;
4272
4273 return ata_do_simple_cmd(ap, dev, cmd);
4274}
4275
4276static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4277{
4278 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4279}
4280
4281static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4282{
4283 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4284}
4285
4286/**
4287 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4288 * @ap: port the device is connected to
4289 * @dev: the device to resume
9b847548
JA		 4290 *
4291 * Kick the drive back into action, by sending it an idle immediate
4292 * command and making sure its transfer mode matches between drive
4293 * and host.
4294 *
4295 */
4296int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4297{
4298 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4299 struct ata_device *failed_dev;
9b847548 4300 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4301 while (ata_set_mode(ap, &failed_dev))
4302 ata_dev_disable(ap, failed_dev);
9b847548 4303 }
e1211e3f 4304 if (!ata_dev_enabled(dev))
9b847548
JA		 4305 return 0;
4306 if (dev->class == ATA_DEV_ATA)
4307 ata_start_drive(ap, dev);
4308
4309 return 0;
4310}
4311
4312/**
4313 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4314 * @ap: port the device is connected to
4315 * @dev: the device to suspend
9b847548
JA		 4316 *
4317 * Flush the cache on the drive, if appropriate, then issue a
4318 * standbynow command.
9b847548 4319 */
082776e4 4320int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4321{
e1211e3f 4322 if (!ata_dev_enabled(dev))
9b847548
JA		 4323 return 0;
4324 if (dev->class == ATA_DEV_ATA)
4325 ata_flush_cache(ap, dev);
4326
082776e4
NC		 4327 if (state.event != PM_EVENT_FREEZE)
4328 ata_standby_drive(ap, dev);
9b847548
JA		 4329 ap->flags |= ATA_FLAG_SUSPENDED;
4330 return 0;
4331}
4332
c893a3ae
RD		 4333/**
4334 * ata_port_start - Set port up for dma.
4335 * @ap: Port to initialize
4336 *
4337 * Called just after data structures for each port are
4338 * initialized. Allocates space for PRD table.
4339 *
4340 * May be used as the port_start() entry in ata_port_operations.
4341 *
4342 * LOCKING:
4343 * Inherited from caller.
4344 */
4345
1da177e4
LT		 4346int ata_port_start (struct ata_port *ap)
4347{
2f1f610b 4348 struct device *dev = ap->dev;
6037d6bb 4349 int rc;
1da177e4
LT		 4350
4351 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4352 if (!ap->prd)
4353 return -ENOMEM;
4354
6037d6bb
JG		 4355 rc = ata_pad_alloc(ap, dev);
4356 if (rc) {
cedc9a47 4357 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4358 return rc;
cedc9a47
JG		 4359 }
4360
1da177e4
LT		 4361 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4362
4363 return 0;
4364}
4365
0baab86b
EF		 4366
4367/**
4368 * ata_port_stop - Undo ata_port_start()
4369 * @ap: Port to shut down
4370 *
4371 * Frees the PRD table.
4372 *
4373 * May be used as the port_stop() entry in ata_port_operations.
4374 *
4375 * LOCKING:
6f0ef4fa 4376 * Inherited from caller.
0baab86b
EF		 4377 */
4378
1da177e4
LT		 4379void ata_port_stop (struct ata_port *ap)
4380{
2f1f610b 4381 struct device *dev = ap->dev;
1da177e4
LT		 4382
4383 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4384 ata_pad_free(ap, dev);
1da177e4
LT		 4385}
4386
aa8f0dc6
JG		 4387void ata_host_stop (struct ata_host_set *host_set)
4388{
4389 if (host_set->mmio_base)
4390 iounmap(host_set->mmio_base);
4391}
4392
4393
1da177e4
LT		 4394/**
4395 * ata_host_remove - Unregister SCSI host structure with upper layers
4396 * @ap: Port to unregister
4397 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4398 *
4399 * LOCKING:
6f0ef4fa 4400 * Inherited from caller.
1da177e4
LT		 4401 */
4402
4403static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4404{
4405 struct Scsi_Host *sh = ap->host;
4406
4407 DPRINTK("ENTER\n");
4408
4409 if (do_unregister)
4410 scsi_remove_host(sh);
4411
4412 ap->ops->port_stop(ap);
4413}
4414
4415/**
4416 * ata_host_init - Initialize an ata_port structure
4417 * @ap: Structure to initialize
4418 * @host: associated SCSI mid-layer structure
4419 * @host_set: Collection of hosts to which @ap belongs
4420 * @ent: Probe information provided by low-level driver
4421 * @port_no: Port number associated with this ata_port
4422 *
0cba632b
JG		 4423 * Initialize a new ata_port structure, and its associated
4424 * scsi_host.
4425 *
1da177e4 4426 * LOCKING:
0cba632b 4427 * Inherited from caller.
1da177e4
LT		 4428 */
4429
4430static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4431 struct ata_host_set *host_set,
057ace5e 4432 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4433{
4434 unsigned int i;
4435
4436 host->max_id = 16;
4437 host->max_lun = 1;
4438 host->max_channel = 1;
4439 host->unique_id = ata_unique_id++;
4440 host->max_cmd_len = 12;
12413197 4441
1da177e4
LT		 4442 ap->flags = ATA_FLAG_PORT_DISABLED;
4443 ap->id = host->unique_id;
4444 ap->host = host;
4445 ap->ctl = ATA_DEVCTL_OBS;
4446 ap->host_set = host_set;
2f1f610b 4447 ap->dev = ent->dev;
1da177e4
LT		 4448 ap->port_no = port_no;
4449 ap->hard_port_no =
4450 ent->legacy_mode ? ent->hard_port_no : port_no;
4451 ap->pio_mask = ent->pio_mask;
4452 ap->mwdma_mask = ent->mwdma_mask;
4453 ap->udma_mask = ent->udma_mask;
4454 ap->flags |= ent->host_flags;
4455 ap->ops = ent->port_ops;
4456 ap->cbl = ATA_CBL_NONE;
4457 ap->active_tag = ATA_TAG_POISON;
4458 ap->last_ctl = 0xFF;
4459
86e45b6b 4460 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4461 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4462
acf356b1
TH		 4463 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4464 struct ata_device *dev = &ap->device[i];
4465 dev->devno = i;
4466 dev->pio_mask = UINT_MAX;
4467 dev->mwdma_mask = UINT_MAX;
4468 dev->udma_mask = UINT_MAX;
4469 }
1da177e4
LT		 4470
4471#ifdef ATA_IRQ_TRAP
4472 ap->stats.unhandled_irq = 1;
4473 ap->stats.idle_irq = 1;
4474#endif
4475
4476 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4477}
4478
4479/**
4480 * ata_host_add - Attach low-level ATA driver to system
4481 * @ent: Information provided by low-level driver
4482 * @host_set: Collections of ports to which we add
4483 * @port_no: Port number associated with this host
4484 *
0cba632b
JG		 4485 * Attach low-level ATA driver to system.
4486 *
1da177e4 4487 * LOCKING:
0cba632b 4488 * PCI/etc. bus probe sem.
1da177e4
LT		 4489 *
4490 * RETURNS:
0cba632b 4491 * New ata_port on success, for NULL on error.
1da177e4
LT		 4492 */
4493
057ace5e 4494static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4495 struct ata_host_set *host_set,
4496 unsigned int port_no)
4497{
4498 struct Scsi_Host *host;
4499 struct ata_port *ap;
4500 int rc;
4501
4502 DPRINTK("ENTER\n");
aec5c3c1
TH		 4503
4504 if (!ent->port_ops->probe_reset &&
4505 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4506 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4507 port_no);
4508 return NULL;
4509 }
4510
1da177e4
LT		 4511 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4512 if (!host)
4513 return NULL;
4514
30afc84c
TH		 4515 host->transportt = &ata_scsi_transport_template;
4516
1da177e4
LT		 4517 ap = (struct ata_port *) &host->hostdata[0];
4518
4519 ata_host_init(ap, host, host_set, ent, port_no);
4520
4521 rc = ap->ops->port_start(ap);
4522 if (rc)
4523 goto err_out;
4524
4525 return ap;
4526
4527err_out:
4528 scsi_host_put(host);
4529 return NULL;
4530}
4531
4532/**
0cba632b
JG		 4533 * ata_device_add - Register hardware device with ATA and SCSI layers
4534 * @ent: Probe information describing hardware device to be registered
4535 *
4536 * This function processes the information provided in the probe
4537 * information struct @ent, allocates the necessary ATA and SCSI
4538 * host information structures, initializes them, and registers
4539 * everything with requisite kernel subsystems.
4540 *
4541 * This function requests irqs, probes the ATA bus, and probes
4542 * the SCSI bus.
1da177e4
LT		 4543 *
4544 * LOCKING:
0cba632b 4545 * PCI/etc. bus probe sem.
1da177e4
LT		 4546 *
4547 * RETURNS:
0cba632b 4548 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4549 */
4550
057ace5e 4551int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4552{
4553 unsigned int count = 0, i;
4554 struct device *dev = ent->dev;
4555 struct ata_host_set *host_set;
4556
4557 DPRINTK("ENTER\n");
4558 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4559 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4560 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4561 if (!host_set)
4562 return 0;
1da177e4
LT		 4563 spin_lock_init(&host_set->lock);
4564
4565 host_set->dev = dev;
4566 host_set->n_ports = ent->n_ports;
4567 host_set->irq = ent->irq;
4568 host_set->mmio_base = ent->mmio_base;
4569 host_set->private_data = ent->private_data;
4570 host_set->ops = ent->port_ops;
5444a6f4 4571 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4572
4573 /* register each port bound to this device */
4574 for (i = 0; i < ent->n_ports; i++) {
4575 struct ata_port *ap;
4576 unsigned long xfer_mode_mask;
4577
4578 ap = ata_host_add(ent, host_set, i);
4579 if (!ap)
4580 goto err_out;
4581
4582 host_set->ports[i] = ap;
4583 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4584 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4585 (ap->pio_mask << ATA_SHIFT_PIO);
4586
4587 /* print per-port info to dmesg */
4588 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4589 "bmdma 0x%lX irq %lu\n",
4590 ap->id,
4591 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4592 ata_mode_string(xfer_mode_mask),
4593 ap->ioaddr.cmd_addr,
4594 ap->ioaddr.ctl_addr,
4595 ap->ioaddr.bmdma_addr,
4596 ent->irq);
4597
4598 ata_chk_status(ap);
4599 host_set->ops->irq_clear(ap);
4600 count++;
4601 }
4602
57f3bda8
RD		 4603 if (!count)
4604 goto err_free_ret;
1da177e4
LT		 4605
4606 /* obtain irq, that is shared between channels */
4607 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4608 DRV_NAME, host_set))
4609 goto err_out;
4610
4611 /* perform each probe synchronously */
4612 DPRINTK("probe begin\n");
4613 for (i = 0; i < count; i++) {
4614 struct ata_port *ap;
4615 int rc;
4616
4617 ap = host_set->ports[i];
4618
c893a3ae 4619 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4620 rc = ata_bus_probe(ap);
c893a3ae 4621 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4622
4623 if (rc) {
4624 /* FIXME: do something useful here?
4625 * Current libata behavior will
4626 * tear down everything when
4627 * the module is removed
4628 * or the h/w is unplugged.
4629 */
4630 }
4631
4632 rc = scsi_add_host(ap->host, dev);
4633 if (rc) {
4634 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4635 ap->id);
4636 /* FIXME: do something useful here */
4637 /* FIXME: handle unconditional calls to
4638 * scsi_scan_host and ata_host_remove, below,
4639 * at the very least
4640 */
4641 }
4642 }
4643
4644 /* probes are done, now scan each port's disk(s) */
c893a3ae 4645 DPRINTK("host probe begin\n");
1da177e4
LT		 4646 for (i = 0; i < count; i++) {
4647 struct ata_port *ap = host_set->ports[i];
4648
644dd0cc 4649 ata_scsi_scan_host(ap);
1da177e4
LT		 4650 }
4651
4652 dev_set_drvdata(dev, host_set);
4653
4654 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4655 return ent->n_ports; /* success */
4656
4657err_out:
4658 for (i = 0; i < count; i++) {
4659 ata_host_remove(host_set->ports[i], 1);
4660 scsi_host_put(host_set->ports[i]->host);
4661 }
57f3bda8 4662err_free_ret:
1da177e4
LT		 4663 kfree(host_set);
4664 VPRINTK("EXIT, returning 0\n");
4665 return 0;
4666}
4667
17b14451
AC		 4668/**
4669 * ata_host_set_remove - PCI layer callback for device removal
4670 * @host_set: ATA host set that was removed
4671 *
2e9edbf8 4672 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4673 * objects.
4674 *
4675 * LOCKING:
4676 * Inherited from calling layer (may sleep).
4677 */
4678
17b14451
AC		 4679void ata_host_set_remove(struct ata_host_set *host_set)
4680{
4681 struct ata_port *ap;
4682 unsigned int i;
4683
4684 for (i = 0; i < host_set->n_ports; i++) {
4685 ap = host_set->ports[i];
4686 scsi_remove_host(ap->host);
4687 }
4688
4689 free_irq(host_set->irq, host_set);
4690
4691 for (i = 0; i < host_set->n_ports; i++) {
4692 ap = host_set->ports[i];
4693
4694 ata_scsi_release(ap->host);
4695
4696 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4697 struct ata_ioports *ioaddr = &ap->ioaddr;
4698
4699 if (ioaddr->cmd_addr == 0x1f0)
4700 release_region(0x1f0, 8);
4701 else if (ioaddr->cmd_addr == 0x170)
4702 release_region(0x170, 8);
4703 }
4704
4705 scsi_host_put(ap->host);
4706 }
4707
4708 if (host_set->ops->host_stop)
4709 host_set->ops->host_stop(host_set);
4710
4711 kfree(host_set);
4712}
4713
1da177e4
LT		 4714/**
4715 * ata_scsi_release - SCSI layer callback hook for host unload
4716 * @host: libata host to be unloaded
4717 *
4718 * Performs all duties necessary to shut down a libata port...
4719 * Kill port kthread, disable port, and release resources.
4720 *
4721 * LOCKING:
4722 * Inherited from SCSI layer.
4723 *
4724 * RETURNS:
4725 * One.
4726 */
4727
4728int ata_scsi_release(struct Scsi_Host *host)
4729{
4730 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4731 int i;
1da177e4
LT		 4732
4733 DPRINTK("ENTER\n");
4734
4735 ap->ops->port_disable(ap);
4736 ata_host_remove(ap, 0);
d9572b1d
TH		 4737 for (i = 0; i < ATA_MAX_DEVICES; i++)
4738 kfree(ap->device[i].id);
1da177e4
LT		 4739
4740 DPRINTK("EXIT\n");
4741 return 1;
4742}
4743
4744/**
4745 * ata_std_ports - initialize ioaddr with standard port offsets.
4746 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4747 *
4748 * Utility function which initializes data_addr, error_addr,
4749 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4750 * device_addr, status_addr, and command_addr to standard offsets
4751 * relative to cmd_addr.
4752 *
4753 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4754 */
0baab86b 4755
1da177e4
LT		 4756void ata_std_ports(struct ata_ioports *ioaddr)
4757{
4758 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4759 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4760 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4761 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4762 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4763 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4764 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4765 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4766 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4767 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4768}
4769
0baab86b 4770
374b1873
JG		 4771#ifdef CONFIG_PCI
4772
4773void ata_pci_host_stop (struct ata_host_set *host_set)
4774{
4775 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4776
4777 pci_iounmap(pdev, host_set->mmio_base);
4778}
4779
1da177e4
LT		 4780/**
4781 * ata_pci_remove_one - PCI layer callback for device removal
4782 * @pdev: PCI device that was removed
4783 *
4784 * PCI layer indicates to libata via this hook that
6f0ef4fa 4785 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4786 * Handle this by unregistering all objects associated
4787 * with this PCI device. Free those objects. Then finally
4788 * release PCI resources and disable device.
4789 *
4790 * LOCKING:
4791 * Inherited from PCI layer (may sleep).
4792 */
4793
4794void ata_pci_remove_one (struct pci_dev *pdev)
4795{
4796 struct device *dev = pci_dev_to_dev(pdev);
4797 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4798
17b14451 4799 ata_host_set_remove(host_set);
1da177e4
LT		 4800 pci_release_regions(pdev);
4801 pci_disable_device(pdev);
4802 dev_set_drvdata(dev, NULL);
4803}
4804
4805/* move to PCI subsystem */
057ace5e 4806int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4807{
4808 unsigned long tmp = 0;
4809
4810 switch (bits->width) {
4811 case 1: {
4812 u8 tmp8 = 0;
4813 pci_read_config_byte(pdev, bits->reg, &tmp8);
4814 tmp = tmp8;
4815 break;
4816 }
4817 case 2: {
4818 u16 tmp16 = 0;
4819 pci_read_config_word(pdev, bits->reg, &tmp16);
4820 tmp = tmp16;
4821 break;
4822 }
4823 case 4: {
4824 u32 tmp32 = 0;
4825 pci_read_config_dword(pdev, bits->reg, &tmp32);
4826 tmp = tmp32;
4827 break;
4828 }
4829
4830 default:
4831 return -EINVAL;
4832 }
4833
4834 tmp &= bits->mask;
4835
4836 return (tmp == bits->val) ? 1 : 0;
4837}
9b847548
JA		 4838
4839int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4840{
4841 pci_save_state(pdev);
4842 pci_disable_device(pdev);
4843 pci_set_power_state(pdev, PCI_D3hot);
4844 return 0;
4845}
4846
4847int ata_pci_device_resume(struct pci_dev *pdev)
4848{
4849 pci_set_power_state(pdev, PCI_D0);
4850 pci_restore_state(pdev);
4851 pci_enable_device(pdev);
4852 pci_set_master(pdev);
4853 return 0;
4854}
1da177e4
LT		 4855#endif /* CONFIG_PCI */
4856
4857
1da177e4
LT		 4858static int __init ata_init(void)
4859{
4860 ata_wq = create_workqueue("ata");
4861 if (!ata_wq)
4862 return -ENOMEM;
4863
4864 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4865 return 0;
4866}
4867
4868static void __exit ata_exit(void)
4869{
4870 destroy_workqueue(ata_wq);
4871}
4872
4873module_init(ata_init);
4874module_exit(ata_exit);
4875
67846b30
JG		 4876static unsigned long ratelimit_time;
4877static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4878
4879int ata_ratelimit(void)
4880{
4881 int rc;
4882 unsigned long flags;
4883
4884 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4885
4886 if (time_after(jiffies, ratelimit_time)) {
4887 rc = 1;
4888 ratelimit_time = jiffies + (HZ/5);
4889 } else
4890 rc = 0;
4891
4892 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4893
4894 return rc;
4895}
4896
1da177e4
LT		 4897/*
4898 * libata is essentially a library of internal helper functions for
4899 * low-level ATA host controller drivers. As such, the API/ABI is
4900 * likely to change as new drivers are added and updated.
4901 * Do not depend on ABI/API stability.
4902 */
4903
4904EXPORT_SYMBOL_GPL(ata_std_bios_param);
4905EXPORT_SYMBOL_GPL(ata_std_ports);
4906EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4907EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4908EXPORT_SYMBOL_GPL(ata_sg_init);
4909EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 4910EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 4911EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4912EXPORT_SYMBOL_GPL(ata_eng_timeout);
4913EXPORT_SYMBOL_GPL(ata_tf_load);
4914EXPORT_SYMBOL_GPL(ata_tf_read);
4915EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4916EXPORT_SYMBOL_GPL(ata_std_dev_select);
4917EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4918EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4919EXPORT_SYMBOL_GPL(ata_check_status);
4920EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 4921EXPORT_SYMBOL_GPL(ata_exec_command);
4922EXPORT_SYMBOL_GPL(ata_port_start);
4923EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4924EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4925EXPORT_SYMBOL_GPL(ata_interrupt);
4926EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 4927EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 4928EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4929EXPORT_SYMBOL_GPL(ata_bmdma_start);
4930EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4931EXPORT_SYMBOL_GPL(ata_bmdma_status);
4932EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4933EXPORT_SYMBOL_GPL(ata_port_probe);
4934EXPORT_SYMBOL_GPL(sata_phy_reset);
4935EXPORT_SYMBOL_GPL(__sata_phy_reset);
4936EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 4937EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 4938EXPORT_SYMBOL_GPL(ata_std_softreset);
4939EXPORT_SYMBOL_GPL(sata_std_hardreset);
4940EXPORT_SYMBOL_GPL(ata_std_postreset);
4941EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 4942EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 4943EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 4944EXPORT_SYMBOL_GPL(ata_dev_classify);
4945EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 4946EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4947EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 4948EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 4949EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 4950EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4951EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4952EXPORT_SYMBOL_GPL(ata_scsi_error);
4953EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4954EXPORT_SYMBOL_GPL(ata_scsi_release);
4955EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 4956EXPORT_SYMBOL_GPL(ata_id_string);
4957EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 4958EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 4959EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4960EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 4961
1bc4ccff 4962EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 4963EXPORT_SYMBOL_GPL(ata_timing_compute);
4964EXPORT_SYMBOL_GPL(ata_timing_merge);
4965
1da177e4
LT		 4966#ifdef CONFIG_PCI
4967EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4968EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4969EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4970EXPORT_SYMBOL_GPL(ata_pci_init_one);
4971EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 4972EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
4973EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 4974EXPORT_SYMBOL_GPL(ata_pci_default_filter);
4975EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 4976#endif /* CONFIG_PCI */
9b847548
JA		 4977
4978EXPORT_SYMBOL_GPL(ata_device_suspend);
4979EXPORT_SYMBOL_GPL(ata_device_resume);
4980EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
4981EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
kernel source for telekom puls (alcatel/mediatek)