[SCSI] isci: kill isci_port->status
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / drivers / scsi / isci / port.c
CommitLineData
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1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
6f231dda 56#include "isci.h"
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57#include "port.h"
58#include "request.h"
e2f8db50
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59
60#define SCIC_SDS_PORT_HARD_RESET_TIMEOUT (1000)
61#define SCU_DUMMY_INDEX (0xFFFF)
6f231dda 62
c132f692
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63static struct device *sciport_to_dev(struct isci_port *iport)
64{
65 int i = iport->physical_port_index;
66 struct isci_port *table;
67 struct isci_host *ihost;
68
69 if (i == SCIC_SDS_DUMMY_PORT)
70 i = SCI_MAX_PORTS+1;
71
72 table = iport - i;
73 ihost = container_of(table, typeof(*ihost), ports[0]);
74
75 return &ihost->pdev->dev;
76}
77
89a7301f 78static void sci_port_get_protocols(struct isci_port *iport, struct sci_phy_proto *proto)
6f231dda 79{
e2f8db50
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80 u8 index;
81
89a7301f 82 proto->all = 0;
e2f8db50 83 for (index = 0; index < SCI_MAX_PHYS; index++) {
89a7301f
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84 struct isci_phy *iphy = iport->phy_table[index];
85
86 if (!iphy)
87 continue;
88 sci_phy_get_protocols(iphy, proto);
e2f8db50 89 }
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90}
91
89a7301f 92static u32 sci_port_get_phys(struct isci_port *iport)
6f231dda 93{
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94 u32 index;
95 u32 mask;
96
97 mask = 0;
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98 for (index = 0; index < SCI_MAX_PHYS; index++)
99 if (iport->phy_table[index])
e2f8db50 100 mask |= (1 << index);
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101
102 return mask;
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103}
104
e2f8db50 105/**
89a7301f 106 * sci_port_get_properties() - This method simply returns the properties
e2f8db50
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107 * regarding the port, such as: physical index, protocols, sas address, etc.
108 * @port: this parameter specifies the port for which to retrieve the physical
109 * index.
110 * @properties: This parameter specifies the properties structure into which to
111 * copy the requested information.
112 *
113 * Indicate if the user specified a valid port. SCI_SUCCESS This value is
114 * returned if the specified port was valid. SCI_FAILURE_INVALID_PORT This
115 * value is returned if the specified port is not valid. When this value is
116 * returned, no data is copied to the properties output parameter.
117 */
7e629841 118enum sci_status sci_port_get_properties(struct isci_port *iport,
89a7301f 119 struct sci_port_properties *prop)
6f231dda 120{
ffe191c9 121 if (!iport || iport->logical_port_index == SCIC_SDS_DUMMY_PORT)
e2f8db50 122 return SCI_FAILURE_INVALID_PORT;
6f231dda 123
89a7301f
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124 prop->index = iport->logical_port_index;
125 prop->phy_mask = sci_port_get_phys(iport);
126 sci_port_get_sas_address(iport, &prop->local.sas_address);
127 sci_port_get_protocols(iport, &prop->local.protocols);
128 sci_port_get_attached_sas_address(iport, &prop->remote.sas_address);
6f231dda 129
e2f8db50 130 return SCI_SUCCESS;
6f231dda
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131}
132
89a7301f 133static void sci_port_bcn_enable(struct isci_port *iport)
61aaff49 134{
85280955 135 struct isci_phy *iphy;
61aaff49
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136 u32 val;
137 int i;
138
ffe191c9
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139 for (i = 0; i < ARRAY_SIZE(iport->phy_table); i++) {
140 iphy = iport->phy_table[i];
85280955 141 if (!iphy)
61aaff49 142 continue;
85280955 143 val = readl(&iphy->link_layer_registers->link_layer_control);
61aaff49 144 /* clear the bit by writing 1. */
85280955 145 writel(val, &iphy->link_layer_registers->link_layer_control);
61aaff49
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146 }
147}
148
ffe191c9
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149static void isci_port_bc_change_received(struct isci_host *ihost,
150 struct isci_port *iport,
151 struct isci_phy *iphy)
61aaff49 152{
52d74634
DW
153 dev_dbg(&ihost->pdev->dev,
154 "%s: isci_phy = %p, sas_phy = %p\n",
155 __func__, iphy, &iphy->sas_phy);
61aaff49 156
52d74634 157 ihost->sas_ha.notify_port_event(&iphy->sas_phy, PORTE_BROADCAST_RCVD);
89a7301f 158 sci_port_bcn_enable(iport);
61aaff49
JS
159}
160
e2f8db50 161static void isci_port_link_up(struct isci_host *isci_host,
ffe191c9 162 struct isci_port *iport,
85280955 163 struct isci_phy *iphy)
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164{
165 unsigned long flags;
89a7301f 166 struct sci_port_properties properties;
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167 unsigned long success = true;
168
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169 dev_dbg(&isci_host->pdev->dev,
170 "%s: isci_port = %p\n",
ffe191c9 171 __func__, iport);
6f231dda 172
85280955 173 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
6f231dda 174
89a7301f 175 sci_port_get_properties(iport, &properties);
6f231dda 176
85280955 177 if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SATA) {
150fc6fc 178 u64 attached_sas_address;
6f231dda 179
85280955
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180 iphy->sas_phy.oob_mode = SATA_OOB_MODE;
181 iphy->sas_phy.frame_rcvd_size = sizeof(struct dev_to_host_fis);
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182
183 /*
184 * For direct-attached SATA devices, the SCI core will
185 * automagically assign a SAS address to the end device
186 * for the purpose of creating a port. This SAS address
187 * will not be the same as assigned to the PHY and needs
89a7301f 188 * to be obtained from struct sci_port_properties properties.
6f231dda 189 */
150fc6fc
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190 attached_sas_address = properties.remote.sas_address.high;
191 attached_sas_address <<= 32;
192 attached_sas_address |= properties.remote.sas_address.low;
193 swab64s(&attached_sas_address);
6f231dda 194
85280955 195 memcpy(&iphy->sas_phy.attached_sas_addr,
150fc6fc 196 &attached_sas_address, sizeof(attached_sas_address));
85280955
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197 } else if (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SAS) {
198 iphy->sas_phy.oob_mode = SAS_OOB_MODE;
199 iphy->sas_phy.frame_rcvd_size = sizeof(struct sas_identify_frame);
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200
201 /* Copy the attached SAS address from the IAF */
85280955
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202 memcpy(iphy->sas_phy.attached_sas_addr,
203 iphy->frame_rcvd.iaf.sas_addr, SAS_ADDR_SIZE);
6f231dda
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204 } else {
205 dev_err(&isci_host->pdev->dev, "%s: unkown target\n", __func__);
206 success = false;
207 }
208
85280955 209 iphy->sas_phy.phy->negotiated_linkrate = sci_phy_linkrate(iphy);
83e51430 210
85280955 211 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
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212
213 /* Notify libsas that we have an address frame, if indeed
214 * we've found an SSP, SMP, or STP target */
215 if (success)
85280955 216 isci_host->sas_ha.notify_port_event(&iphy->sas_phy,
6f231dda
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217 PORTE_BYTES_DMAED);
218}
219
220
221/**
222 * isci_port_link_down() - This function is called by the sci core when a link
223 * becomes inactive.
224 * @isci_host: This parameter specifies the isci host object.
225 * @phy: This parameter specifies the isci phy with the active link.
226 * @port: This parameter specifies the isci port with the active link.
227 *
228 */
e2f8db50
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229static void isci_port_link_down(struct isci_host *isci_host,
230 struct isci_phy *isci_phy,
231 struct isci_port *isci_port)
6f231dda
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232{
233 struct isci_remote_device *isci_device;
234
235 dev_dbg(&isci_host->pdev->dev,
236 "%s: isci_port = %p\n", __func__, isci_port);
237
238 if (isci_port) {
239
240 /* check to see if this is the last phy on this port. */
61aaff49
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241 if (isci_phy->sas_phy.port &&
242 isci_phy->sas_phy.port->num_phys == 1) {
61aaff49
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243 /* change the state for all devices on this port. The
244 * next task sent to this device will be returned as
245 * SAS_TASK_UNDELIVERED, and the scsi mid layer will
246 * remove the target
6f231dda
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247 */
248 list_for_each_entry(isci_device,
249 &isci_port->remote_dev_list,
250 node) {
251 dev_dbg(&isci_host->pdev->dev,
252 "%s: isci_device = %p\n",
253 __func__, isci_device);
209fae14 254 set_bit(IDEV_GONE, &isci_device->flags);
6f231dda
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255 }
256 }
6f231dda
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257 }
258
259 /* Notify libsas of the borken link, this will trigger calls to our
260 * isci_port_deformed and isci_dev_gone functions.
261 */
262 sas_phy_disconnected(&isci_phy->sas_phy);
263 isci_host->sas_ha.notify_phy_event(&isci_phy->sas_phy,
264 PHYE_LOSS_OF_SIGNAL);
265
6f231dda
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266 dev_dbg(&isci_host->pdev->dev,
267 "%s: isci_port = %p - Done\n", __func__, isci_port);
268}
269
8e35a139
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270static bool is_port_ready_state(enum sci_port_states state)
271{
272 switch (state) {
273 case SCI_PORT_READY:
274 case SCI_PORT_SUB_WAITING:
275 case SCI_PORT_SUB_OPERATIONAL:
276 case SCI_PORT_SUB_CONFIGURING:
277 return true;
278 default:
279 return false;
280 }
281}
282
283/* flag dummy rnc hanling when exiting a ready state */
284static void port_state_machine_change(struct isci_port *iport,
285 enum sci_port_states state)
286{
287 struct sci_base_state_machine *sm = &iport->sm;
288 enum sci_port_states old_state = sm->current_state_id;
289
290 if (is_port_ready_state(old_state) && !is_port_ready_state(state))
291 iport->ready_exit = true;
292
293 sci_change_state(sm, state);
294 iport->ready_exit = false;
295}
296
6f231dda
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297/**
298 * isci_port_hard_reset_complete() - This function is called by the sci core
299 * when the hard reset complete notification has been received.
300 * @port: This parameter specifies the sci port with the active link.
301 * @completion_status: This parameter specifies the core status for the reset
302 * process.
303 *
304 */
e2f8db50
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305static void isci_port_hard_reset_complete(struct isci_port *isci_port,
306 enum sci_status completion_status)
6f231dda
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307{
308 dev_dbg(&isci_port->isci_host->pdev->dev,
309 "%s: isci_port = %p, completion_status=%x\n",
310 __func__, isci_port, completion_status);
311
312 /* Save the status of the hard reset from the port. */
313 isci_port->hard_reset_status = completion_status;
314
8e35a139
JS
315 if (completion_status != SCI_SUCCESS) {
316
317 /* The reset failed. The port state is now SCI_PORT_FAILED. */
318 if (isci_port->active_phy_mask == 0) {
319
320 /* Generate the link down now to the host, since it
321 * was intercepted by the hard reset state machine when
322 * it really happened.
323 */
324 isci_port_link_down(isci_port->isci_host,
325 &isci_port->isci_host->phys[
326 isci_port->last_active_phy],
327 isci_port);
328 }
329 /* Advance the port state so that link state changes will be
330 * noticed.
331 */
332 port_state_machine_change(isci_port, SCI_PORT_SUB_WAITING);
333
334 }
6f231dda
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335 complete_all(&isci_port->hard_reset_complete);
336}
4393aa4e 337
e2f8db50
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338/* This method will return a true value if the specified phy can be assigned to
339 * this port The following is a list of phys for each port that are allowed: -
340 * Port 0 - 3 2 1 0 - Port 1 - 1 - Port 2 - 3 2 - Port 3 - 3 This method
341 * doesn't preclude all configurations. It merely ensures that a phy is part
342 * of the allowable set of phy identifiers for that port. For example, one
343 * could assign phy 3 to port 0 and no other phys. Please refer to
89a7301f 344 * sci_port_is_phy_mask_valid() for information regarding whether the
e2f8db50
DW
345 * phy_mask for a port can be supported. bool true if this is a valid phy
346 * assignment for the port false if this is not a valid phy assignment for the
347 * port
348 */
89a7301f 349bool sci_port_is_valid_phy_assignment(struct isci_port *iport, u32 phy_index)
6f231dda 350{
89a7301f
DW
351 struct isci_host *ihost = iport->owning_controller;
352 struct sci_user_parameters *user = &ihost->user_parameters;
353
e2f8db50
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354 /* Initialize to invalid value. */
355 u32 existing_phy_index = SCI_MAX_PHYS;
356 u32 index;
6f231dda 357
89a7301f 358 if ((iport->physical_port_index == 1) && (phy_index != 1))
e2f8db50 359 return false;
6f231dda 360
89a7301f 361 if (iport->physical_port_index == 3 && phy_index != 3)
e2f8db50 362 return false;
6f231dda 363
89a7301f
DW
364 if (iport->physical_port_index == 2 &&
365 (phy_index == 0 || phy_index == 1))
e2f8db50 366 return false;
6f231dda 367
89a7301f
DW
368 for (index = 0; index < SCI_MAX_PHYS; index++)
369 if (iport->phy_table[index] && index != phy_index)
e2f8db50 370 existing_phy_index = index;
6f231dda 371
89a7301f
DW
372 /* Ensure that all of the phys in the port are capable of
373 * operating at the same maximum link rate.
374 */
375 if (existing_phy_index < SCI_MAX_PHYS &&
376 user->phys[phy_index].max_speed_generation !=
377 user->phys[existing_phy_index].max_speed_generation)
e2f8db50 378 return false;
6f231dda 379
e2f8db50
DW
380 return true;
381}
6f231dda 382
e2f8db50
DW
383/**
384 *
385 * @sci_port: This is the port object for which to determine if the phy mask
386 * can be supported.
387 *
388 * This method will return a true value if the port's phy mask can be supported
389 * by the SCU. The following is a list of valid PHY mask configurations for
390 * each port: - Port 0 - [[3 2] 1] 0 - Port 1 - [1] - Port 2 - [[3] 2]
391 * - Port 3 - [3] This method returns a boolean indication specifying if the
392 * phy mask can be supported. true if this is a valid phy assignment for the
393 * port false if this is not a valid phy assignment for the port
394 */
89a7301f 395static bool sci_port_is_phy_mask_valid(
ffe191c9 396 struct isci_port *iport,
e2f8db50
DW
397 u32 phy_mask)
398{
ffe191c9 399 if (iport->physical_port_index == 0) {
e2f8db50
DW
400 if (((phy_mask & 0x0F) == 0x0F)
401 || ((phy_mask & 0x03) == 0x03)
402 || ((phy_mask & 0x01) == 0x01)
403 || (phy_mask == 0))
404 return true;
ffe191c9 405 } else if (iport->physical_port_index == 1) {
e2f8db50
DW
406 if (((phy_mask & 0x02) == 0x02)
407 || (phy_mask == 0))
408 return true;
ffe191c9 409 } else if (iport->physical_port_index == 2) {
e2f8db50
DW
410 if (((phy_mask & 0x0C) == 0x0C)
411 || ((phy_mask & 0x04) == 0x04)
412 || (phy_mask == 0))
413 return true;
ffe191c9 414 } else if (iport->physical_port_index == 3) {
e2f8db50
DW
415 if (((phy_mask & 0x08) == 0x08)
416 || (phy_mask == 0))
417 return true;
418 }
6f231dda 419
e2f8db50
DW
420 return false;
421}
6f231dda 422
85280955 423/*
e2f8db50
DW
424 * This method retrieves a currently active (i.e. connected) phy contained in
425 * the port. Currently, the lowest order phy that is connected is returned.
426 * This method returns a pointer to a SCIS_SDS_PHY object. NULL This value is
427 * returned if there are no currently active (i.e. connected to a remote end
89a7301f 428 * point) phys contained in the port. All other values specify a struct sci_phy
e2f8db50
DW
429 * object that is active in the port.
430 */
89a7301f 431static struct isci_phy *sci_port_get_a_connected_phy(struct isci_port *iport)
85280955 432{
e2f8db50 433 u32 index;
85280955 434 struct isci_phy *iphy;
6f231dda 435
e2f8db50 436 for (index = 0; index < SCI_MAX_PHYS; index++) {
85280955
DW
437 /* Ensure that the phy is both part of the port and currently
438 * connected to the remote end-point.
439 */
ffe191c9 440 iphy = iport->phy_table[index];
89a7301f 441 if (iphy && sci_port_active_phy(iport, iphy))
85280955 442 return iphy;
6f231dda
DW
443 }
444
e2f8db50
DW
445 return NULL;
446}
447
89a7301f 448static enum sci_status sci_port_set_phy(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 449{
85280955 450 /* Check to see if we can add this phy to a port
e2f8db50 451 * that means that the phy is not part of a port and that the port does
85280955
DW
452 * not already have a phy assinged to the phy index.
453 */
ffe191c9 454 if (!iport->phy_table[iphy->phy_index] &&
85280955 455 !phy_get_non_dummy_port(iphy) &&
89a7301f 456 sci_port_is_valid_phy_assignment(iport, iphy->phy_index)) {
85280955
DW
457 /* Phy is being added in the stopped state so we are in MPC mode
458 * make logical port index = physical port index
459 */
ffe191c9
DW
460 iport->logical_port_index = iport->physical_port_index;
461 iport->phy_table[iphy->phy_index] = iphy;
89a7301f 462 sci_phy_set_port(iphy, iport);
e2f8db50
DW
463
464 return SCI_SUCCESS;
465 }
466
467 return SCI_FAILURE;
468}
469
89a7301f 470static enum sci_status sci_port_clear_phy(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50
DW
471{
472 /* Make sure that this phy is part of this port */
ffe191c9
DW
473 if (iport->phy_table[iphy->phy_index] == iphy &&
474 phy_get_non_dummy_port(iphy) == iport) {
d9dcb4ba 475 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
476
477 /* Yep it is assigned to this port so remove it */
89a7301f 478 sci_phy_set_port(iphy, &ihost->ports[SCI_MAX_PORTS]);
ffe191c9 479 iport->phy_table[iphy->phy_index] = NULL;
e2f8db50
DW
480 return SCI_SUCCESS;
481 }
482
483 return SCI_FAILURE;
484}
485
89a7301f 486void sci_port_get_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
e2f8db50
DW
487{
488 u32 index;
489
89a7301f
DW
490 sas->high = 0;
491 sas->low = 0;
492 for (index = 0; index < SCI_MAX_PHYS; index++)
493 if (iport->phy_table[index])
494 sci_phy_get_sas_address(iport->phy_table[index], sas);
e2f8db50
DW
495}
496
89a7301f 497void sci_port_get_attached_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
e2f8db50 498{
85280955 499 struct isci_phy *iphy;
e2f8db50
DW
500
501 /*
502 * Ensure that the phy is both part of the port and currently
503 * connected to the remote end-point.
6f231dda 504 */
89a7301f 505 iphy = sci_port_get_a_connected_phy(iport);
85280955
DW
506 if (iphy) {
507 if (iphy->protocol != SCIC_SDS_PHY_PROTOCOL_SATA) {
89a7301f 508 sci_phy_get_attached_sas_address(iphy, sas);
e2f8db50 509 } else {
89a7301f
DW
510 sci_phy_get_sas_address(iphy, sas);
511 sas->low += iphy->phy_index;
e2f8db50
DW
512 }
513 } else {
89a7301f
DW
514 sas->high = 0;
515 sas->low = 0;
e2f8db50
DW
516 }
517}
4393aa4e 518
e2f8db50 519/**
89a7301f 520 * sci_port_construct_dummy_rnc() - create dummy rnc for si workaround
e2f8db50
DW
521 *
522 * @sci_port: logical port on which we need to create the remote node context
523 * @rni: remote node index for this remote node context.
524 *
525 * This routine will construct a dummy remote node context data structure
526 * This structure will be posted to the hardware to work around a scheduler
527 * error in the hardware.
528 */
89a7301f 529static void sci_port_construct_dummy_rnc(struct isci_port *iport, u16 rni)
e2f8db50
DW
530{
531 union scu_remote_node_context *rnc;
532
ffe191c9 533 rnc = &iport->owning_controller->remote_node_context_table[rni];
e2f8db50
DW
534
535 memset(rnc, 0, sizeof(union scu_remote_node_context));
536
537 rnc->ssp.remote_sas_address_hi = 0;
538 rnc->ssp.remote_sas_address_lo = 0;
539
540 rnc->ssp.remote_node_index = rni;
541 rnc->ssp.remote_node_port_width = 1;
ffe191c9 542 rnc->ssp.logical_port_index = iport->physical_port_index;
e2f8db50
DW
543
544 rnc->ssp.nexus_loss_timer_enable = false;
545 rnc->ssp.check_bit = false;
546 rnc->ssp.is_valid = true;
547 rnc->ssp.is_remote_node_context = true;
548 rnc->ssp.function_number = 0;
549 rnc->ssp.arbitration_wait_time = 0;
550}
551
dd047c8e
DW
552/*
553 * construct a dummy task context data structure. This
e2f8db50
DW
554 * structure will be posted to the hardwre to work around a scheduler error
555 * in the hardware.
e2f8db50 556 */
89a7301f 557static void sci_port_construct_dummy_task(struct isci_port *iport, u16 tag)
e2f8db50 558{
d9dcb4ba 559 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
560 struct scu_task_context *task_context;
561
d9dcb4ba 562 task_context = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
e2f8db50
DW
563 memset(task_context, 0, sizeof(struct scu_task_context));
564
e2f8db50
DW
565 task_context->initiator_request = 1;
566 task_context->connection_rate = 1;
ffe191c9 567 task_context->logical_port_index = iport->physical_port_index;
e2f8db50 568 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP;
dd047c8e 569 task_context->task_index = ISCI_TAG_TCI(tag);
e2f8db50
DW
570 task_context->valid = SCU_TASK_CONTEXT_VALID;
571 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
ffe191c9 572 task_context->remote_node_index = iport->reserved_rni;
e2f8db50 573 task_context->do_not_dma_ssp_good_response = 1;
e2f8db50
DW
574 task_context->task_phase = 0x01;
575}
576
89a7301f 577static void sci_port_destroy_dummy_resources(struct isci_port *iport)
e2f8db50 578{
d9dcb4ba 579 struct isci_host *ihost = iport->owning_controller;
e2f8db50 580
ffe191c9 581 if (iport->reserved_tag != SCI_CONTROLLER_INVALID_IO_TAG)
d9dcb4ba 582 isci_free_tag(ihost, iport->reserved_tag);
e2f8db50 583
ffe191c9 584 if (iport->reserved_rni != SCU_DUMMY_INDEX)
89a7301f 585 sci_remote_node_table_release_remote_node_index(&ihost->available_remote_nodes,
ffe191c9 586 1, iport->reserved_rni);
e2f8db50 587
ffe191c9
DW
588 iport->reserved_rni = SCU_DUMMY_INDEX;
589 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
e2f8db50
DW
590}
591
89a7301f 592void sci_port_setup_transports(struct isci_port *iport, u32 device_id)
e2f8db50
DW
593{
594 u8 index;
595
596 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9 597 if (iport->active_phy_mask & (1 << index))
89a7301f 598 sci_phy_setup_transport(iport->phy_table[index], device_id);
6f231dda 599 }
e2f8db50 600}
6f231dda 601
05b080fc
MT
602static void sci_port_resume_phy(struct isci_port *iport, struct isci_phy *iphy)
603{
604 sci_phy_resume(iphy);
605 iport->enabled_phy_mask |= 1 << iphy->phy_index;
606}
607
608static void sci_port_activate_phy(struct isci_port *iport,
609 struct isci_phy *iphy,
610 u8 flags)
e2f8db50 611{
d9dcb4ba 612 struct isci_host *ihost = iport->owning_controller;
e2f8db50 613
05b080fc 614 if (iphy->protocol != SCIC_SDS_PHY_PROTOCOL_SATA && (flags & PF_RESUME))
89a7301f 615 sci_phy_resume(iphy);
e2f8db50 616
ffe191c9 617 iport->active_phy_mask |= 1 << iphy->phy_index;
e2f8db50 618
89a7301f 619 sci_controller_clear_invalid_phy(ihost, iphy);
e2f8db50 620
05b080fc 621 if (flags & PF_NOTIFY)
ffe191c9 622 isci_port_link_up(ihost, iport, iphy);
6f231dda 623}
09d7da13 624
89a7301f
DW
625void sci_port_deactivate_phy(struct isci_port *iport, struct isci_phy *iphy,
626 bool do_notify_user)
09d7da13 627{
34a99158 628 struct isci_host *ihost = iport->owning_controller;
e2f8db50 629
ffe191c9 630 iport->active_phy_mask &= ~(1 << iphy->phy_index);
05b080fc 631 iport->enabled_phy_mask &= ~(1 << iphy->phy_index);
8e35a139
JS
632 if (!iport->active_phy_mask)
633 iport->last_active_phy = iphy->phy_index;
e2f8db50 634
85280955 635 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
e2f8db50 636
d4ec1cf6
MT
637 /* Re-assign the phy back to the LP as if it were a narrow port for APC
638 * mode. For MPC mode, the phy will remain in the port.
639 */
640 if (iport->owning_controller->oem_parameters.controller.mode_type ==
641 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE)
642 writel(iphy->phy_index,
643 &iport->port_pe_configuration_register[iphy->phy_index]);
e2f8db50
DW
644
645 if (do_notify_user == true)
646 isci_port_link_down(ihost, iphy, iport);
647}
648
89a7301f 649static void sci_port_invalid_link_up(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 650{
d9dcb4ba 651 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
652
653 /*
654 * Check to see if we have alreay reported this link as bad and if
655 * not go ahead and tell the SCI_USER that we have discovered an
656 * invalid link.
657 */
d9dcb4ba 658 if ((ihost->invalid_phy_mask & (1 << iphy->phy_index)) == 0) {
34a99158 659 ihost->invalid_phy_mask |= 1 << iphy->phy_index;
d9dcb4ba 660 dev_warn(&ihost->pdev->dev, "Invalid link up!\n");
e2f8db50
DW
661 }
662}
663
664/**
89a7301f
DW
665 * sci_port_general_link_up_handler - phy can be assigned to port?
666 * @sci_port: sci_port object for which has a phy that has gone link up.
85280955 667 * @sci_phy: This is the struct isci_phy object that has gone link up.
05b080fc 668 * @flags: PF_RESUME, PF_NOTIFY to sci_port_activate_phy
e2f8db50 669 *
05b080fc
MT
670 * Determine if this phy can be assigned to this port . If the phy is
671 * not a valid PHY for this port then the function will notify the user.
672 * A PHY can only be part of a port if it's attached SAS ADDRESS is the
673 * same as all other PHYs in the same port.
e2f8db50 674 */
89a7301f 675static void sci_port_general_link_up_handler(struct isci_port *iport,
05b080fc
MT
676 struct isci_phy *iphy,
677 u8 flags)
e2f8db50
DW
678{
679 struct sci_sas_address port_sas_address;
680 struct sci_sas_address phy_sas_address;
681
89a7301f
DW
682 sci_port_get_attached_sas_address(iport, &port_sas_address);
683 sci_phy_get_attached_sas_address(iphy, &phy_sas_address);
e2f8db50
DW
684
685 /* If the SAS address of the new phy matches the SAS address of
686 * other phys in the port OR this is the first phy in the port,
687 * then activate the phy and allow it to be used for operations
688 * in this port.
689 */
690 if ((phy_sas_address.high == port_sas_address.high &&
691 phy_sas_address.low == port_sas_address.low) ||
ffe191c9
DW
692 iport->active_phy_mask == 0) {
693 struct sci_base_state_machine *sm = &iport->sm;
e2f8db50 694
05b080fc 695 sci_port_activate_phy(iport, iphy, flags);
e301370a 696 if (sm->current_state_id == SCI_PORT_RESETTING)
ffe191c9 697 port_state_machine_change(iport, SCI_PORT_READY);
e2f8db50 698 } else
89a7301f 699 sci_port_invalid_link_up(iport, iphy);
e2f8db50
DW
700}
701
702
703
704/**
705 * This method returns false if the port only has a single phy object assigned.
706 * If there are no phys or more than one phy then the method will return
707 * true.
708 * @sci_port: The port for which the wide port condition is to be checked.
709 *
710 * bool true Is returned if this is a wide ported port. false Is returned if
711 * this is a narrow port.
712 */
89a7301f 713static bool sci_port_is_wide(struct isci_port *iport)
e2f8db50
DW
714{
715 u32 index;
716 u32 phy_count = 0;
717
718 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9 719 if (iport->phy_table[index] != NULL) {
e2f8db50
DW
720 phy_count++;
721 }
722 }
723
724 return phy_count != 1;
725}
726
727/**
728 * This method is called by the PHY object when the link is detected. if the
729 * port wants the PHY to continue on to the link up state then the port
730 * layer must return true. If the port object returns false the phy object
731 * must halt its attempt to go link up.
732 * @sci_port: The port associated with the phy object.
733 * @sci_phy: The phy object that is trying to go link up.
734 *
735 * true if the phy object can continue to the link up condition. true Is
736 * returned if this phy can continue to the ready state. false Is returned if
737 * can not continue on to the ready state. This notification is in place for
738 * wide ports and direct attached phys. Since there are no wide ported SATA
739 * devices this could become an invalid port configuration.
740 */
89a7301f 741bool sci_port_link_detected(
ffe191c9 742 struct isci_port *iport,
85280955 743 struct isci_phy *iphy)
e2f8db50 744{
ffe191c9 745 if ((iport->logical_port_index != SCIC_SDS_DUMMY_PORT) &&
05b080fc
MT
746 (iphy->protocol == SCIC_SDS_PHY_PROTOCOL_SATA)) {
747 if (sci_port_is_wide(iport)) {
748 sci_port_invalid_link_up(iport, iphy);
749 return false;
750 } else {
751 struct isci_host *ihost = iport->owning_controller;
752 struct isci_port *dst_port = &(ihost->ports[iphy->phy_index]);
753 writel(iphy->phy_index,
754 &dst_port->port_pe_configuration_register[iphy->phy_index]);
755 }
e2f8db50
DW
756 }
757
758 return true;
759}
760
5553ba2b 761static void port_timeout(unsigned long data)
e2f8db50 762{
5553ba2b 763 struct sci_timer *tmr = (struct sci_timer *)data;
ffe191c9 764 struct isci_port *iport = container_of(tmr, typeof(*iport), timer);
d9dcb4ba 765 struct isci_host *ihost = iport->owning_controller;
5553ba2b 766 unsigned long flags;
e2f8db50
DW
767 u32 current_state;
768
5553ba2b
EN
769 spin_lock_irqsave(&ihost->scic_lock, flags);
770
771 if (tmr->cancel)
772 goto done;
773
ffe191c9 774 current_state = iport->sm.current_state_id;
e2f8db50 775
e301370a 776 if (current_state == SCI_PORT_RESETTING) {
e91f41ef
PS
777 /* if the port is still in the resetting state then the timeout
778 * fired before the reset completed.
e2f8db50 779 */
ffe191c9 780 port_state_machine_change(iport, SCI_PORT_FAILED);
e301370a 781 } else if (current_state == SCI_PORT_STOPPED) {
e91f41ef
PS
782 /* if the port is stopped then the start request failed In this
783 * case stay in the stopped state.
e2f8db50 784 */
ffe191c9 785 dev_err(sciport_to_dev(iport),
e2f8db50
DW
786 "%s: SCIC Port 0x%p failed to stop before tiemout.\n",
787 __func__,
ffe191c9 788 iport);
e301370a 789 } else if (current_state == SCI_PORT_STOPPING) {
fca4ecbd
DW
790 dev_dbg(sciport_to_dev(iport),
791 "%s: port%d: stop complete timeout\n",
792 __func__, iport->physical_port_index);
e2f8db50 793 } else {
e91f41ef 794 /* The port is in the ready state and we have a timer
e2f8db50
DW
795 * reporting a timeout this should not happen.
796 */
ffe191c9 797 dev_err(sciport_to_dev(iport),
e2f8db50 798 "%s: SCIC Port 0x%p is processing a timeout operation "
ffe191c9 799 "in state %d.\n", __func__, iport, current_state);
e2f8db50 800 }
5553ba2b
EN
801
802done:
803 spin_unlock_irqrestore(&ihost->scic_lock, flags);
e2f8db50
DW
804}
805
806/* --------------------------------------------------------------------------- */
807
808/**
809 * This function updates the hardwares VIIT entry for this port.
810 *
811 *
812 */
89a7301f 813static void sci_port_update_viit_entry(struct isci_port *iport)
e2f8db50
DW
814{
815 struct sci_sas_address sas_address;
816
89a7301f 817 sci_port_get_sas_address(iport, &sas_address);
e2f8db50
DW
818
819 writel(sas_address.high,
ffe191c9 820 &iport->viit_registers->initiator_sas_address_hi);
e2f8db50 821 writel(sas_address.low,
ffe191c9 822 &iport->viit_registers->initiator_sas_address_lo);
e2f8db50
DW
823
824 /* This value get cleared just in case its not already cleared */
ffe191c9 825 writel(0, &iport->viit_registers->reserved);
e2f8db50
DW
826
827 /* We are required to update the status register last */
828 writel(SCU_VIIT_ENTRY_ID_VIIT |
829 SCU_VIIT_IPPT_INITIATOR |
ffe191c9 830 ((1 << iport->physical_port_index) << SCU_VIIT_ENTRY_LPVIE_SHIFT) |
e2f8db50 831 SCU_VIIT_STATUS_ALL_VALID,
ffe191c9 832 &iport->viit_registers->status);
e2f8db50
DW
833}
834
89a7301f 835enum sas_linkrate sci_port_get_max_allowed_speed(struct isci_port *iport)
e2f8db50
DW
836{
837 u16 index;
85280955 838 struct isci_phy *iphy;
e2f8db50 839 enum sas_linkrate max_allowed_speed = SAS_LINK_RATE_6_0_GBPS;
e2f8db50
DW
840
841 /*
842 * Loop through all of the phys in this port and find the phy with the
843 * lowest maximum link rate. */
844 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9 845 iphy = iport->phy_table[index];
89a7301f 846 if (iphy && sci_port_active_phy(iport, iphy) &&
85280955
DW
847 iphy->max_negotiated_speed < max_allowed_speed)
848 max_allowed_speed = iphy->max_negotiated_speed;
e2f8db50
DW
849 }
850
851 return max_allowed_speed;
852}
853
89a7301f 854static void sci_port_suspend_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
855{
856 u32 pts_control_value;
857
ffe191c9 858 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50 859 pts_control_value |= SCU_PTSxCR_GEN_BIT(SUSPEND);
ffe191c9 860 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
861}
862
863/**
89a7301f 864 * sci_port_post_dummy_request() - post dummy/workaround request
e2f8db50
DW
865 * @sci_port: port to post task
866 *
867 * Prevent the hardware scheduler from posting new requests to the front
868 * of the scheduler queue causing a starvation problem for currently
869 * ongoing requests.
870 *
871 */
89a7301f 872static void sci_port_post_dummy_request(struct isci_port *iport)
e2f8db50 873{
d9dcb4ba 874 struct isci_host *ihost = iport->owning_controller;
ffe191c9 875 u16 tag = iport->reserved_tag;
312e0c24
DW
876 struct scu_task_context *tc;
877 u32 command;
e2f8db50 878
d9dcb4ba 879 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
312e0c24 880 tc->abort = 0;
e2f8db50
DW
881
882 command = SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
ffe191c9 883 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
312e0c24 884 ISCI_TAG_TCI(tag);
e2f8db50 885
89a7301f 886 sci_controller_post_request(ihost, command);
e2f8db50
DW
887}
888
889/**
890 * This routine will abort the dummy request. This will alow the hardware to
891 * power down parts of the silicon to save power.
892 *
893 * @sci_port: The port on which the task must be aborted.
894 *
895 */
89a7301f 896static void sci_port_abort_dummy_request(struct isci_port *iport)
e2f8db50 897{
d9dcb4ba 898 struct isci_host *ihost = iport->owning_controller;
ffe191c9 899 u16 tag = iport->reserved_tag;
e2f8db50
DW
900 struct scu_task_context *tc;
901 u32 command;
902
d9dcb4ba 903 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
e2f8db50
DW
904 tc->abort = 1;
905
906 command = SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT |
ffe191c9 907 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
312e0c24 908 ISCI_TAG_TCI(tag);
e2f8db50 909
89a7301f 910 sci_controller_post_request(ihost, command);
e2f8db50
DW
911}
912
913/**
914 *
ffe191c9 915 * @sci_port: This is the struct isci_port object to resume.
e2f8db50
DW
916 *
917 * This method will resume the port task scheduler for this port object. none
918 */
919static void
89a7301f 920sci_port_resume_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
921{
922 u32 pts_control_value;
923
ffe191c9 924 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50 925 pts_control_value &= ~SCU_PTSxCR_GEN_BIT(SUSPEND);
ffe191c9 926 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
927}
928
89a7301f 929static void sci_port_ready_substate_waiting_enter(struct sci_base_state_machine *sm)
e2f8db50 930{
ffe191c9 931 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 932
89a7301f 933 sci_port_suspend_port_task_scheduler(iport);
e2f8db50 934
ffe191c9 935 iport->not_ready_reason = SCIC_PORT_NOT_READY_NO_ACTIVE_PHYS;
e2f8db50 936
ffe191c9 937 if (iport->active_phy_mask != 0) {
e2f8db50 938 /* At least one of the phys on the port is ready */
ffe191c9 939 port_state_machine_change(iport,
e301370a 940 SCI_PORT_SUB_OPERATIONAL);
e2f8db50
DW
941 }
942}
943
05b080fc
MT
944static void scic_sds_port_ready_substate_waiting_exit(
945 struct sci_base_state_machine *sm)
946{
947 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
948 sci_port_resume_port_task_scheduler(iport);
949}
950
89a7301f 951static void sci_port_ready_substate_operational_enter(struct sci_base_state_machine *sm)
e2f8db50
DW
952{
953 u32 index;
ffe191c9 954 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 955 struct isci_host *ihost = iport->owning_controller;
e2f8db50 956
fca4ecbd
DW
957 dev_dbg(&ihost->pdev->dev, "%s: port%d ready\n",
958 __func__, iport->physical_port_index);
e2f8db50
DW
959
960 for (index = 0; index < SCI_MAX_PHYS; index++) {
ffe191c9
DW
961 if (iport->phy_table[index]) {
962 writel(iport->physical_port_index,
963 &iport->port_pe_configuration_register[
964 iport->phy_table[index]->phy_index]);
05b080fc
MT
965 if (((iport->active_phy_mask^iport->enabled_phy_mask) & (1 << index)) != 0)
966 sci_port_resume_phy(iport, iport->phy_table[index]);
e2f8db50
DW
967 }
968 }
969
89a7301f 970 sci_port_update_viit_entry(iport);
e2f8db50 971
e2f8db50
DW
972 /*
973 * Post the dummy task for the port so the hardware can schedule
974 * io correctly
975 */
89a7301f 976 sci_port_post_dummy_request(iport);
e2f8db50
DW
977}
978
89a7301f 979static void sci_port_invalidate_dummy_remote_node(struct isci_port *iport)
e91f41ef 980{
d9dcb4ba 981 struct isci_host *ihost = iport->owning_controller;
ffe191c9 982 u8 phys_index = iport->physical_port_index;
e91f41ef 983 union scu_remote_node_context *rnc;
ffe191c9 984 u16 rni = iport->reserved_rni;
e91f41ef
PS
985 u32 command;
986
d9dcb4ba 987 rnc = &ihost->remote_node_context_table[rni];
e91f41ef
PS
988
989 rnc->ssp.is_valid = false;
990
991 /* ensure the preceding tc abort request has reached the
992 * controller and give it ample time to act before posting the rnc
993 * invalidate
994 */
d9dcb4ba 995 readl(&ihost->smu_registers->interrupt_status); /* flush */
e91f41ef
PS
996 udelay(10);
997
998 command = SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE |
999 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1000
89a7301f 1001 sci_controller_post_request(ihost, command);
e91f41ef
PS
1002}
1003
e2f8db50
DW
1004/**
1005 *
ffe191c9 1006 * @object: This is the object which is cast to a struct isci_port object.
e2f8db50 1007 *
ffe191c9 1008 * This method will perform the actions required by the struct isci_port on
e301370a 1009 * exiting the SCI_PORT_SUB_OPERATIONAL. This function reports
e2f8db50
DW
1010 * the port not ready and suspends the port task scheduler. none
1011 */
89a7301f 1012static void sci_port_ready_substate_operational_exit(struct sci_base_state_machine *sm)
e2f8db50 1013{
ffe191c9 1014 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 1015 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
1016
1017 /*
1018 * Kill the dummy task for this port if it has not yet posted
1019 * the hardware will treat this as a NOP and just return abort
1020 * complete.
1021 */
89a7301f 1022 sci_port_abort_dummy_request(iport);
e2f8db50 1023
fca4ecbd
DW
1024 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1025 __func__, iport->physical_port_index);
e91f41ef 1026
ffe191c9 1027 if (iport->ready_exit)
89a7301f 1028 sci_port_invalidate_dummy_remote_node(iport);
e2f8db50
DW
1029}
1030
89a7301f 1031static void sci_port_ready_substate_configuring_enter(struct sci_base_state_machine *sm)
e2f8db50 1032{
ffe191c9 1033 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 1034 struct isci_host *ihost = iport->owning_controller;
e2f8db50 1035
ffe191c9 1036 if (iport->active_phy_mask == 0) {
fca4ecbd
DW
1037 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1038 __func__, iport->physical_port_index);
e2f8db50 1039
05b080fc
MT
1040 port_state_machine_change(iport, SCI_PORT_SUB_WAITING);
1041 } else
1042 port_state_machine_change(iport, SCI_PORT_SUB_OPERATIONAL);
e2f8db50
DW
1043}
1044
89a7301f 1045enum sci_status sci_port_start(struct isci_port *iport)
d76f71d9 1046{
d9dcb4ba 1047 struct isci_host *ihost = iport->owning_controller;
d76f71d9 1048 enum sci_status status = SCI_SUCCESS;
89a7301f 1049 enum sci_port_states state;
d76f71d9
PS
1050 u32 phy_mask;
1051
ffe191c9 1052 state = iport->sm.current_state_id;
e301370a 1053 if (state != SCI_PORT_STOPPED) {
ffe191c9 1054 dev_warn(sciport_to_dev(iport),
d76f71d9
PS
1055 "%s: in wrong state: %d\n", __func__, state);
1056 return SCI_FAILURE_INVALID_STATE;
1057 }
1058
ffe191c9 1059 if (iport->assigned_device_count > 0) {
d76f71d9
PS
1060 /* TODO This is a start failure operation because
1061 * there are still devices assigned to this port.
1062 * There must be no devices assigned to a port on a
1063 * start operation.
1064 */
1065 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1066 }
1067
ffe191c9 1068 if (iport->reserved_rni == SCU_DUMMY_INDEX) {
89a7301f 1069 u16 rni = sci_remote_node_table_allocate_remote_node(
d9dcb4ba 1070 &ihost->available_remote_nodes, 1);
d76f71d9
PS
1071
1072 if (rni != SCU_DUMMY_INDEX)
89a7301f 1073 sci_port_construct_dummy_rnc(iport, rni);
d76f71d9
PS
1074 else
1075 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
ffe191c9 1076 iport->reserved_rni = rni;
d76f71d9
PS
1077 }
1078
ffe191c9 1079 if (iport->reserved_tag == SCI_CONTROLLER_INVALID_IO_TAG) {
312e0c24 1080 u16 tag;
d76f71d9 1081
312e0c24
DW
1082 tag = isci_alloc_tag(ihost);
1083 if (tag == SCI_CONTROLLER_INVALID_IO_TAG)
d76f71d9 1084 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
312e0c24 1085 else
89a7301f 1086 sci_port_construct_dummy_task(iport, tag);
ffe191c9 1087 iport->reserved_tag = tag;
d76f71d9
PS
1088 }
1089
1090 if (status == SCI_SUCCESS) {
89a7301f 1091 phy_mask = sci_port_get_phys(iport);
d76f71d9
PS
1092
1093 /*
1094 * There are one or more phys assigned to this port. Make sure
1095 * the port's phy mask is in fact legal and supported by the
1096 * silicon.
1097 */
89a7301f 1098 if (sci_port_is_phy_mask_valid(iport, phy_mask) == true) {
ffe191c9 1099 port_state_machine_change(iport,
e301370a 1100 SCI_PORT_READY);
d76f71d9
PS
1101
1102 return SCI_SUCCESS;
1103 }
1104 status = SCI_FAILURE;
1105 }
1106
1107 if (status != SCI_SUCCESS)
89a7301f 1108 sci_port_destroy_dummy_resources(iport);
d76f71d9
PS
1109
1110 return status;
1111}
1112
89a7301f 1113enum sci_status sci_port_stop(struct isci_port *iport)
8bc80d30 1114{
89a7301f 1115 enum sci_port_states state;
8bc80d30 1116
ffe191c9 1117 state = iport->sm.current_state_id;
8bc80d30 1118 switch (state) {
e301370a 1119 case SCI_PORT_STOPPED:
8bc80d30 1120 return SCI_SUCCESS;
e301370a
EN
1121 case SCI_PORT_SUB_WAITING:
1122 case SCI_PORT_SUB_OPERATIONAL:
1123 case SCI_PORT_SUB_CONFIGURING:
1124 case SCI_PORT_RESETTING:
ffe191c9 1125 port_state_machine_change(iport,
e301370a 1126 SCI_PORT_STOPPING);
8bc80d30
PS
1127 return SCI_SUCCESS;
1128 default:
ffe191c9 1129 dev_warn(sciport_to_dev(iport),
8bc80d30
PS
1130 "%s: in wrong state: %d\n", __func__, state);
1131 return SCI_FAILURE_INVALID_STATE;
1132 }
1133}
1134
89a7301f 1135static enum sci_status sci_port_hard_reset(struct isci_port *iport, u32 timeout)
bd6713b4
PS
1136{
1137 enum sci_status status = SCI_FAILURE_INVALID_PHY;
85280955 1138 struct isci_phy *iphy = NULL;
89a7301f 1139 enum sci_port_states state;
bd6713b4
PS
1140 u32 phy_index;
1141
ffe191c9 1142 state = iport->sm.current_state_id;
e301370a 1143 if (state != SCI_PORT_SUB_OPERATIONAL) {
ffe191c9 1144 dev_warn(sciport_to_dev(iport),
bd6713b4
PS
1145 "%s: in wrong state: %d\n", __func__, state);
1146 return SCI_FAILURE_INVALID_STATE;
1147 }
1148
1149 /* Select a phy on which we can send the hard reset request. */
85280955 1150 for (phy_index = 0; phy_index < SCI_MAX_PHYS && !iphy; phy_index++) {
ffe191c9 1151 iphy = iport->phy_table[phy_index];
89a7301f 1152 if (iphy && !sci_port_active_phy(iport, iphy)) {
bd6713b4
PS
1153 /*
1154 * We found a phy but it is not ready select
1155 * different phy
1156 */
85280955 1157 iphy = NULL;
bd6713b4
PS
1158 }
1159 }
1160
1161 /* If we have a phy then go ahead and start the reset procedure */
85280955 1162 if (!iphy)
bd6713b4 1163 return status;
89a7301f 1164 status = sci_phy_reset(iphy);
bd6713b4
PS
1165
1166 if (status != SCI_SUCCESS)
1167 return status;
1168
ffe191c9
DW
1169 sci_mod_timer(&iport->timer, timeout);
1170 iport->not_ready_reason = SCIC_PORT_NOT_READY_HARD_RESET_REQUESTED;
bd6713b4 1171
ffe191c9 1172 port_state_machine_change(iport, SCI_PORT_RESETTING);
bd6713b4
PS
1173 return SCI_SUCCESS;
1174}
1175
1176/**
89a7301f 1177 * sci_port_add_phy() -
bd6713b4
PS
1178 * @sci_port: This parameter specifies the port in which the phy will be added.
1179 * @sci_phy: This parameter is the phy which is to be added to the port.
1180 *
1181 * This method will add a PHY to the selected port. This method returns an
1182 * enum sci_status. SCI_SUCCESS the phy has been added to the port. Any other
1183 * status is a failure to add the phy to the port.
1184 */
89a7301f 1185enum sci_status sci_port_add_phy(struct isci_port *iport,
85280955 1186 struct isci_phy *iphy)
bd6713b4
PS
1187{
1188 enum sci_status status;
89a7301f 1189 enum sci_port_states state;
bd6713b4 1190
ffe191c9 1191 state = iport->sm.current_state_id;
bd6713b4 1192 switch (state) {
e301370a 1193 case SCI_PORT_STOPPED: {
bd6713b4
PS
1194 struct sci_sas_address port_sas_address;
1195
1196 /* Read the port assigned SAS Address if there is one */
89a7301f 1197 sci_port_get_sas_address(iport, &port_sas_address);
bd6713b4
PS
1198
1199 if (port_sas_address.high != 0 && port_sas_address.low != 0) {
1200 struct sci_sas_address phy_sas_address;
1201
1202 /* Make sure that the PHY SAS Address matches the SAS Address
1203 * for this port
1204 */
89a7301f 1205 sci_phy_get_sas_address(iphy, &phy_sas_address);
bd6713b4
PS
1206
1207 if (port_sas_address.high != phy_sas_address.high ||
1208 port_sas_address.low != phy_sas_address.low)
1209 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1210 }
89a7301f 1211 return sci_port_set_phy(iport, iphy);
bd6713b4 1212 }
e301370a
EN
1213 case SCI_PORT_SUB_WAITING:
1214 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1215 status = sci_port_set_phy(iport, iphy);
bd6713b4
PS
1216
1217 if (status != SCI_SUCCESS)
1218 return status;
1219
05b080fc 1220 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
ffe191c9
DW
1221 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1222 port_state_machine_change(iport, SCI_PORT_SUB_CONFIGURING);
bd6713b4
PS
1223
1224 return status;
e301370a 1225 case SCI_PORT_SUB_CONFIGURING:
89a7301f 1226 status = sci_port_set_phy(iport, iphy);
bd6713b4
PS
1227
1228 if (status != SCI_SUCCESS)
1229 return status;
05b080fc 1230 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY);
bd6713b4
PS
1231
1232 /* Re-enter the configuring state since this may be the last phy in
1233 * the port.
1234 */
ffe191c9 1235 port_state_machine_change(iport,
e301370a 1236 SCI_PORT_SUB_CONFIGURING);
bd6713b4
PS
1237 return SCI_SUCCESS;
1238 default:
ffe191c9 1239 dev_warn(sciport_to_dev(iport),
bd6713b4
PS
1240 "%s: in wrong state: %d\n", __func__, state);
1241 return SCI_FAILURE_INVALID_STATE;
1242 }
1243}
1244
1245/**
89a7301f 1246 * sci_port_remove_phy() -
bd6713b4
PS
1247 * @sci_port: This parameter specifies the port in which the phy will be added.
1248 * @sci_phy: This parameter is the phy which is to be added to the port.
1249 *
1250 * This method will remove the PHY from the selected PORT. This method returns
1251 * an enum sci_status. SCI_SUCCESS the phy has been removed from the port. Any
1252 * other status is a failure to add the phy to the port.
1253 */
89a7301f 1254enum sci_status sci_port_remove_phy(struct isci_port *iport,
85280955 1255 struct isci_phy *iphy)
bd6713b4
PS
1256{
1257 enum sci_status status;
89a7301f 1258 enum sci_port_states state;
bd6713b4 1259
ffe191c9 1260 state = iport->sm.current_state_id;
bd6713b4
PS
1261
1262 switch (state) {
e301370a 1263 case SCI_PORT_STOPPED:
89a7301f 1264 return sci_port_clear_phy(iport, iphy);
e301370a 1265 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1266 status = sci_port_clear_phy(iport, iphy);
bd6713b4
PS
1267 if (status != SCI_SUCCESS)
1268 return status;
1269
89a7301f 1270 sci_port_deactivate_phy(iport, iphy, true);
ffe191c9
DW
1271 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1272 port_state_machine_change(iport,
e301370a 1273 SCI_PORT_SUB_CONFIGURING);
bd6713b4 1274 return SCI_SUCCESS;
e301370a 1275 case SCI_PORT_SUB_CONFIGURING:
89a7301f 1276 status = sci_port_clear_phy(iport, iphy);
bd6713b4
PS
1277
1278 if (status != SCI_SUCCESS)
1279 return status;
89a7301f 1280 sci_port_deactivate_phy(iport, iphy, true);
bd6713b4
PS
1281
1282 /* Re-enter the configuring state since this may be the last phy in
1283 * the port
1284 */
ffe191c9 1285 port_state_machine_change(iport,
e301370a 1286 SCI_PORT_SUB_CONFIGURING);
051266ca
PS
1287 return SCI_SUCCESS;
1288 default:
ffe191c9 1289 dev_warn(sciport_to_dev(iport),
051266ca
PS
1290 "%s: in wrong state: %d\n", __func__, state);
1291 return SCI_FAILURE_INVALID_STATE;
1292 }
1293}
bd6713b4 1294
89a7301f 1295enum sci_status sci_port_link_up(struct isci_port *iport,
85280955 1296 struct isci_phy *iphy)
051266ca 1297{
89a7301f 1298 enum sci_port_states state;
051266ca 1299
ffe191c9 1300 state = iport->sm.current_state_id;
051266ca 1301 switch (state) {
e301370a 1302 case SCI_PORT_SUB_WAITING:
051266ca
PS
1303 /* Since this is the first phy going link up for the port we
1304 * can just enable it and continue
1305 */
05b080fc 1306 sci_port_activate_phy(iport, iphy, PF_NOTIFY|PF_RESUME);
051266ca 1307
ffe191c9 1308 port_state_machine_change(iport,
e301370a 1309 SCI_PORT_SUB_OPERATIONAL);
051266ca 1310 return SCI_SUCCESS;
e301370a 1311 case SCI_PORT_SUB_OPERATIONAL:
05b080fc 1312 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
051266ca 1313 return SCI_SUCCESS;
e301370a 1314 case SCI_PORT_RESETTING:
051266ca
PS
1315 /* TODO We should make sure that the phy that has gone
1316 * link up is the same one on which we sent the reset. It is
1317 * possible that the phy on which we sent the reset is not the
1318 * one that has gone link up and we want to make sure that
1319 * phy being reset comes back. Consider the case where a
1320 * reset is sent but before the hardware processes the reset it
1321 * get a link up on the port because of a hot plug event.
1322 * because of the reset request this phy will go link down
1323 * almost immediately.
1324 */
1325
1326 /* In the resetting state we don't notify the user regarding
1327 * link up and link down notifications.
1328 */
05b080fc 1329 sci_port_general_link_up_handler(iport, iphy, PF_RESUME);
051266ca
PS
1330 return SCI_SUCCESS;
1331 default:
ffe191c9 1332 dev_warn(sciport_to_dev(iport),
051266ca
PS
1333 "%s: in wrong state: %d\n", __func__, state);
1334 return SCI_FAILURE_INVALID_STATE;
1335 }
1336}
1337
89a7301f 1338enum sci_status sci_port_link_down(struct isci_port *iport,
85280955 1339 struct isci_phy *iphy)
051266ca 1340{
89a7301f 1341 enum sci_port_states state;
051266ca 1342
ffe191c9 1343 state = iport->sm.current_state_id;
051266ca 1344 switch (state) {
e301370a 1345 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1346 sci_port_deactivate_phy(iport, iphy, true);
051266ca
PS
1347
1348 /* If there are no active phys left in the port, then
1349 * transition the port to the WAITING state until such time
1350 * as a phy goes link up
1351 */
ffe191c9
DW
1352 if (iport->active_phy_mask == 0)
1353 port_state_machine_change(iport,
e301370a 1354 SCI_PORT_SUB_WAITING);
051266ca 1355 return SCI_SUCCESS;
e301370a 1356 case SCI_PORT_RESETTING:
051266ca
PS
1357 /* In the resetting state we don't notify the user regarding
1358 * link up and link down notifications. */
89a7301f 1359 sci_port_deactivate_phy(iport, iphy, false);
bd6713b4
PS
1360 return SCI_SUCCESS;
1361 default:
ffe191c9 1362 dev_warn(sciport_to_dev(iport),
bd6713b4
PS
1363 "%s: in wrong state: %d\n", __func__, state);
1364 return SCI_FAILURE_INVALID_STATE;
1365 }
1366}
1367
89a7301f
DW
1368enum sci_status sci_port_start_io(struct isci_port *iport,
1369 struct isci_remote_device *idev,
1370 struct isci_request *ireq)
6813820c 1371{
89a7301f 1372 enum sci_port_states state;
6813820c 1373
ffe191c9 1374 state = iport->sm.current_state_id;
6813820c 1375 switch (state) {
e301370a 1376 case SCI_PORT_SUB_WAITING:
6813820c 1377 return SCI_FAILURE_INVALID_STATE;
e301370a 1378 case SCI_PORT_SUB_OPERATIONAL:
ffe191c9 1379 iport->started_request_count++;
6813820c
DW
1380 return SCI_SUCCESS;
1381 default:
ffe191c9 1382 dev_warn(sciport_to_dev(iport),
6813820c
DW
1383 "%s: in wrong state: %d\n", __func__, state);
1384 return SCI_FAILURE_INVALID_STATE;
e2f8db50 1385 }
6813820c 1386}
e2f8db50 1387
89a7301f
DW
1388enum sci_status sci_port_complete_io(struct isci_port *iport,
1389 struct isci_remote_device *idev,
1390 struct isci_request *ireq)
6813820c 1391{
89a7301f 1392 enum sci_port_states state;
6813820c 1393
ffe191c9 1394 state = iport->sm.current_state_id;
6813820c 1395 switch (state) {
e301370a 1396 case SCI_PORT_STOPPED:
ffe191c9 1397 dev_warn(sciport_to_dev(iport),
6813820c
DW
1398 "%s: in wrong state: %d\n", __func__, state);
1399 return SCI_FAILURE_INVALID_STATE;
e301370a 1400 case SCI_PORT_STOPPING:
89a7301f 1401 sci_port_decrement_request_count(iport);
6813820c 1402
ffe191c9
DW
1403 if (iport->started_request_count == 0)
1404 port_state_machine_change(iport,
e301370a 1405 SCI_PORT_STOPPED);
6813820c 1406 break;
e301370a
EN
1407 case SCI_PORT_READY:
1408 case SCI_PORT_RESETTING:
1409 case SCI_PORT_FAILED:
1410 case SCI_PORT_SUB_WAITING:
1411 case SCI_PORT_SUB_OPERATIONAL:
89a7301f 1412 sci_port_decrement_request_count(iport);
6813820c 1413 break;
e301370a 1414 case SCI_PORT_SUB_CONFIGURING:
89a7301f 1415 sci_port_decrement_request_count(iport);
ffe191c9
DW
1416 if (iport->started_request_count == 0) {
1417 port_state_machine_change(iport,
e301370a 1418 SCI_PORT_SUB_OPERATIONAL);
6813820c
DW
1419 }
1420 break;
1421 }
1422 return SCI_SUCCESS;
1423}
e2f8db50 1424
89a7301f 1425static void sci_port_enable_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
1426{
1427 u32 pts_control_value;
1428
89a7301f 1429 /* enable the port task scheduler in a suspended state */
ffe191c9 1430 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50 1431 pts_control_value |= SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND);
ffe191c9 1432 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
1433}
1434
89a7301f 1435static void sci_port_disable_port_task_scheduler(struct isci_port *iport)
e2f8db50
DW
1436{
1437 u32 pts_control_value;
1438
ffe191c9 1439 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
e2f8db50
DW
1440 pts_control_value &=
1441 ~(SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND));
ffe191c9 1442 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
e2f8db50
DW
1443}
1444
89a7301f 1445static void sci_port_post_dummy_remote_node(struct isci_port *iport)
e2f8db50 1446{
d9dcb4ba 1447 struct isci_host *ihost = iport->owning_controller;
ffe191c9 1448 u8 phys_index = iport->physical_port_index;
e2f8db50 1449 union scu_remote_node_context *rnc;
ffe191c9 1450 u16 rni = iport->reserved_rni;
e2f8db50
DW
1451 u32 command;
1452
d9dcb4ba 1453 rnc = &ihost->remote_node_context_table[rni];
e2f8db50
DW
1454 rnc->ssp.is_valid = true;
1455
1456 command = SCU_CONTEXT_COMMAND_POST_RNC_32 |
1457 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1458
89a7301f 1459 sci_controller_post_request(ihost, command);
e2f8db50
DW
1460
1461 /* ensure hardware has seen the post rnc command and give it
1462 * ample time to act before sending the suspend
1463 */
d9dcb4ba 1464 readl(&ihost->smu_registers->interrupt_status); /* flush */
e2f8db50
DW
1465 udelay(10);
1466
1467 command = SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX |
1468 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1469
89a7301f 1470 sci_controller_post_request(ihost, command);
e2f8db50
DW
1471}
1472
89a7301f 1473static void sci_port_stopped_state_enter(struct sci_base_state_machine *sm)
e2f8db50 1474{
ffe191c9 1475 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1476
ffe191c9 1477 if (iport->sm.previous_state_id == SCI_PORT_STOPPING) {
e2f8db50
DW
1478 /*
1479 * If we enter this state becasuse of a request to stop
1480 * the port then we want to disable the hardwares port
1481 * task scheduler. */
89a7301f 1482 sci_port_disable_port_task_scheduler(iport);
e2f8db50
DW
1483 }
1484}
1485
89a7301f 1486static void sci_port_stopped_state_exit(struct sci_base_state_machine *sm)
e2f8db50 1487{
ffe191c9 1488 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50
DW
1489
1490 /* Enable and suspend the port task scheduler */
89a7301f 1491 sci_port_enable_port_task_scheduler(iport);
e2f8db50
DW
1492}
1493
89a7301f 1494static void sci_port_ready_state_enter(struct sci_base_state_machine *sm)
e2f8db50 1495{
ffe191c9 1496 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
d9dcb4ba 1497 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
1498 u32 prev_state;
1499
ffe191c9 1500 prev_state = iport->sm.previous_state_id;
e301370a 1501 if (prev_state == SCI_PORT_RESETTING)
e2f8db50
DW
1502 isci_port_hard_reset_complete(iport, SCI_SUCCESS);
1503 else
fca4ecbd
DW
1504 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1505 __func__, iport->physical_port_index);
e2f8db50
DW
1506
1507 /* Post and suspend the dummy remote node context for this port. */
89a7301f 1508 sci_port_post_dummy_remote_node(iport);
e2f8db50
DW
1509
1510 /* Start the ready substate machine */
ffe191c9 1511 port_state_machine_change(iport,
e301370a 1512 SCI_PORT_SUB_WAITING);
e2f8db50
DW
1513}
1514
89a7301f 1515static void sci_port_resetting_state_exit(struct sci_base_state_machine *sm)
e2f8db50 1516{
ffe191c9 1517 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1518
ffe191c9 1519 sci_del_timer(&iport->timer);
e2f8db50
DW
1520}
1521
89a7301f 1522static void sci_port_stopping_state_exit(struct sci_base_state_machine *sm)
e2f8db50 1523{
ffe191c9 1524 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1525
ffe191c9 1526 sci_del_timer(&iport->timer);
e2f8db50 1527
89a7301f 1528 sci_port_destroy_dummy_resources(iport);
e2f8db50
DW
1529}
1530
89a7301f 1531static void sci_port_failed_state_enter(struct sci_base_state_machine *sm)
e2f8db50 1532{
ffe191c9 1533 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
e2f8db50 1534
e2f8db50
DW
1535 isci_port_hard_reset_complete(iport, SCI_FAILURE_TIMEOUT);
1536}
1537
1538/* --------------------------------------------------------------------------- */
1539
89a7301f 1540static const struct sci_base_state sci_port_state_table[] = {
e301370a 1541 [SCI_PORT_STOPPED] = {
89a7301f
DW
1542 .enter_state = sci_port_stopped_state_enter,
1543 .exit_state = sci_port_stopped_state_exit
e2f8db50 1544 },
e301370a 1545 [SCI_PORT_STOPPING] = {
89a7301f 1546 .exit_state = sci_port_stopping_state_exit
e2f8db50 1547 },
e301370a 1548 [SCI_PORT_READY] = {
89a7301f 1549 .enter_state = sci_port_ready_state_enter,
e91f41ef 1550 },
e301370a 1551 [SCI_PORT_SUB_WAITING] = {
89a7301f 1552 .enter_state = sci_port_ready_substate_waiting_enter,
05b080fc 1553 .exit_state = scic_sds_port_ready_substate_waiting_exit,
e91f41ef 1554 },
e301370a 1555 [SCI_PORT_SUB_OPERATIONAL] = {
89a7301f
DW
1556 .enter_state = sci_port_ready_substate_operational_enter,
1557 .exit_state = sci_port_ready_substate_operational_exit
e91f41ef 1558 },
e301370a 1559 [SCI_PORT_SUB_CONFIGURING] = {
05b080fc 1560 .enter_state = sci_port_ready_substate_configuring_enter
e2f8db50 1561 },
e301370a 1562 [SCI_PORT_RESETTING] = {
89a7301f 1563 .exit_state = sci_port_resetting_state_exit
e2f8db50 1564 },
e301370a 1565 [SCI_PORT_FAILED] = {
89a7301f 1566 .enter_state = sci_port_failed_state_enter,
e2f8db50
DW
1567 }
1568};
1569
89a7301f 1570void sci_port_construct(struct isci_port *iport, u8 index,
d9dcb4ba 1571 struct isci_host *ihost)
e2f8db50 1572{
89a7301f 1573 sci_init_sm(&iport->sm, sci_port_state_table, SCI_PORT_STOPPED);
e2f8db50 1574
ffe191c9
DW
1575 iport->logical_port_index = SCIC_SDS_DUMMY_PORT;
1576 iport->physical_port_index = index;
1577 iport->active_phy_mask = 0;
05b080fc 1578 iport->enabled_phy_mask = 0;
8e35a139
JS
1579 iport->last_active_phy = 0;
1580 iport->ready_exit = false;
e2f8db50 1581
d9dcb4ba 1582 iport->owning_controller = ihost;
e2f8db50 1583
ffe191c9
DW
1584 iport->started_request_count = 0;
1585 iport->assigned_device_count = 0;
e2f8db50 1586
ffe191c9
DW
1587 iport->reserved_rni = SCU_DUMMY_INDEX;
1588 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
e2f8db50 1589
ffe191c9 1590 sci_init_timer(&iport->timer, port_timeout);
5553ba2b 1591
ffe191c9 1592 iport->port_task_scheduler_registers = NULL;
e2f8db50
DW
1593
1594 for (index = 0; index < SCI_MAX_PHYS; index++)
ffe191c9 1595 iport->phy_table[index] = NULL;
e2f8db50
DW
1596}
1597
1598void isci_port_init(struct isci_port *iport, struct isci_host *ihost, int index)
1599{
1600 INIT_LIST_HEAD(&iport->remote_dev_list);
1601 INIT_LIST_HEAD(&iport->domain_dev_list);
e2f8db50 1602 iport->isci_host = ihost;
e2f8db50
DW
1603}
1604
89a7301f 1605void sci_port_broadcast_change_received(struct isci_port *iport, struct isci_phy *iphy)
e2f8db50 1606{
d9dcb4ba 1607 struct isci_host *ihost = iport->owning_controller;
e2f8db50
DW
1608
1609 /* notify the user. */
ffe191c9 1610 isci_port_bc_change_received(ihost, iport, iphy);
e2f8db50
DW
1611}
1612
1613int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,
1614 struct isci_phy *iphy)
1615{
1616 unsigned long flags;
1617 enum sci_status status;
8e35a139 1618 int ret = TMF_RESP_FUNC_COMPLETE;
e2f8db50
DW
1619
1620 dev_dbg(&ihost->pdev->dev, "%s: iport = %p\n",
1621 __func__, iport);
1622
1623 init_completion(&iport->hard_reset_complete);
1624
1625 spin_lock_irqsave(&ihost->scic_lock, flags);
1626
1627 #define ISCI_PORT_RESET_TIMEOUT SCIC_SDS_SIGNATURE_FIS_TIMEOUT
89a7301f 1628 status = sci_port_hard_reset(iport, ISCI_PORT_RESET_TIMEOUT);
e2f8db50
DW
1629
1630 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1631
1632 if (status == SCI_SUCCESS) {
1633 wait_for_completion(&iport->hard_reset_complete);
1634
1635 dev_dbg(&ihost->pdev->dev,
1636 "%s: iport = %p; hard reset completion\n",
1637 __func__, iport);
1638
8e35a139 1639 if (iport->hard_reset_status != SCI_SUCCESS) {
e2f8db50 1640 ret = TMF_RESP_FUNC_FAILED;
8e35a139
JS
1641
1642 dev_err(&ihost->pdev->dev,
1643 "%s: iport = %p; hard reset failed (0x%x)\n",
1644 __func__, iport, iport->hard_reset_status);
1645 }
e2f8db50
DW
1646 } else {
1647 ret = TMF_RESP_FUNC_FAILED;
1648
1649 dev_err(&ihost->pdev->dev,
89a7301f 1650 "%s: iport = %p; sci_port_hard_reset call"
e2f8db50
DW
1651 " failed 0x%x\n",
1652 __func__, iport, status);
1653
1654 }
1655
1656 /* If the hard reset for the port has failed, consider this
1657 * the same as link failures on all phys in the port.
1658 */
1659 if (ret != TMF_RESP_FUNC_COMPLETE) {
fd0527ab 1660
e2f8db50
DW
1661 dev_err(&ihost->pdev->dev,
1662 "%s: iport = %p; hard reset failed "
fd0527ab
JS
1663 "(0x%x) - driving explicit link fail for all phys\n",
1664 __func__, iport, iport->hard_reset_status);
fd0527ab 1665 }
e2f8db50
DW
1666 return ret;
1667}
1668
e2f8db50
DW
1669void isci_port_deformed(struct asd_sas_phy *phy)
1670{
c132f692
DW
1671 struct isci_host *ihost = phy->ha->lldd_ha;
1672 struct isci_port *iport = phy->port->lldd_port;
1673 unsigned long flags;
1674 int i;
1675
1676 /* we got a port notification on a port that was subsequently
1677 * torn down and libsas is just now catching up
1678 */
1679 if (!iport)
1680 return;
1681
1682 spin_lock_irqsave(&ihost->scic_lock, flags);
1683 for (i = 0; i < SCI_MAX_PHYS; i++) {
1684 if (iport->active_phy_mask & 1 << i)
1685 break;
1686 }
1687 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1688
1689 if (i >= SCI_MAX_PHYS)
1690 dev_dbg(&ihost->pdev->dev, "%s: port: %ld\n",
1691 __func__, (long) (iport - &ihost->ports[0]));
e2f8db50
DW
1692}
1693
e2f8db50
DW
1694void isci_port_formed(struct asd_sas_phy *phy)
1695{
c132f692
DW
1696 struct isci_host *ihost = phy->ha->lldd_ha;
1697 struct isci_phy *iphy = to_iphy(phy);
1698 struct asd_sas_port *port = phy->port;
1699 struct isci_port *iport;
1700 unsigned long flags;
1701 int i;
1702
1703 /* initial ports are formed as the driver is still initializing,
1704 * wait for that process to complete
1705 */
1706 wait_for_start(ihost);
1707
1708 spin_lock_irqsave(&ihost->scic_lock, flags);
1709 for (i = 0; i < SCI_MAX_PORTS; i++) {
1710 iport = &ihost->ports[i];
1711 if (iport->active_phy_mask & 1 << iphy->phy_index)
1712 break;
1713 }
1714 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1715
1716 if (i >= SCI_MAX_PORTS)
1717 iport = NULL;
1718
1719 port->lldd_port = iport;
09d7da13 1720}