[SCSI] hpsa: do not reset unknown boards on reset_devices
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / scsi / hpsa.c
CommitLineData
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1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
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34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
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46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
49#include <asm/atomic.h>
50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
31468401 55#define HPSA_DRIVER_VERSION "2.0.2-1"
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56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
77
78/* define the PCI info for the cards we can control */
79static const struct pci_device_id hpsa_pci_device_id[] = {
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80 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
81 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
82 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
83 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
f8b01eb9 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
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88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
7c03b870 93 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 94 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
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95 {0,}
96};
97
98MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
99
100/* board_id = Subsystem Device ID & Vendor ID
101 * product = Marketing Name for the board
102 * access = Address of the struct of function pointers
103 */
104static struct board_type products[] = {
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105 {0x3241103C, "Smart Array P212", &SA5_access},
106 {0x3243103C, "Smart Array P410", &SA5_access},
107 {0x3245103C, "Smart Array P410i", &SA5_access},
108 {0x3247103C, "Smart Array P411", &SA5_access},
109 {0x3249103C, "Smart Array P812", &SA5_access},
110 {0x324a103C, "Smart Array P712m", &SA5_access},
111 {0x324b103C, "Smart Array P711m", &SA5_access},
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112 {0x3250103C, "Smart Array", &SA5_access},
113 {0x3250113C, "Smart Array", &SA5_access},
114 {0x3250123C, "Smart Array", &SA5_access},
115 {0x3250133C, "Smart Array", &SA5_access},
116 {0x3250143C, "Smart Array", &SA5_access},
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117 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
118};
119
120static int number_of_controllers;
121
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122static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
123static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
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124static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
125static void start_io(struct ctlr_info *h);
126
127#ifdef CONFIG_COMPAT
128static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
129#endif
130
131static void cmd_free(struct ctlr_info *h, struct CommandList *c);
132static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
133static struct CommandList *cmd_alloc(struct ctlr_info *h);
134static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
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135static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
136 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
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137 int cmd_type);
138
f281233d 139static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
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140static void hpsa_scan_start(struct Scsi_Host *);
141static int hpsa_scan_finished(struct Scsi_Host *sh,
142 unsigned long elapsed_time);
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143static int hpsa_change_queue_depth(struct scsi_device *sdev,
144 int qdepth, int reason);
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145
146static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
147static int hpsa_slave_alloc(struct scsi_device *sdev);
148static void hpsa_slave_destroy(struct scsi_device *sdev);
149
150static ssize_t raid_level_show(struct device *dev,
151 struct device_attribute *attr, char *buf);
152static ssize_t lunid_show(struct device *dev,
153 struct device_attribute *attr, char *buf);
154static ssize_t unique_id_show(struct device *dev,
155 struct device_attribute *attr, char *buf);
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156static ssize_t host_show_firmware_revision(struct device *dev,
157 struct device_attribute *attr, char *buf);
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158static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
159static ssize_t host_store_rescan(struct device *dev,
160 struct device_attribute *attr, const char *buf, size_t count);
161static int check_for_unit_attention(struct ctlr_info *h,
162 struct CommandList *c);
163static void check_ioctl_unit_attention(struct ctlr_info *h,
164 struct CommandList *c);
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165/* performant mode helper functions */
166static void calc_bucket_map(int *bucket, int num_buckets,
167 int nsgs, int *bucket_map);
7136f9a7 168static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
303932fd 169static inline u32 next_command(struct ctlr_info *h);
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170static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
171 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
172 u64 *cfg_offset);
173static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
174 unsigned long *memory_bar);
18867659 175static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
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176static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
177 void __iomem *vaddr, int wait_for_ready);
178#define BOARD_NOT_READY 0
179#define BOARD_READY 1
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180
181static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
182static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
183static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
184static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
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185static DEVICE_ATTR(firmware_revision, S_IRUGO,
186 host_show_firmware_revision, NULL);
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187
188static struct device_attribute *hpsa_sdev_attrs[] = {
189 &dev_attr_raid_level,
190 &dev_attr_lunid,
191 &dev_attr_unique_id,
192 NULL,
193};
194
195static struct device_attribute *hpsa_shost_attrs[] = {
196 &dev_attr_rescan,
d28ce020 197 &dev_attr_firmware_revision,
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198 NULL,
199};
200
201static struct scsi_host_template hpsa_driver_template = {
202 .module = THIS_MODULE,
203 .name = "hpsa",
204 .proc_name = "hpsa",
205 .queuecommand = hpsa_scsi_queue_command,
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206 .scan_start = hpsa_scan_start,
207 .scan_finished = hpsa_scan_finished,
667e23d4 208 .change_queue_depth = hpsa_change_queue_depth,
edd16368 209 .this_id = -1,
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210 .use_clustering = ENABLE_CLUSTERING,
211 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
212 .ioctl = hpsa_ioctl,
213 .slave_alloc = hpsa_slave_alloc,
214 .slave_destroy = hpsa_slave_destroy,
215#ifdef CONFIG_COMPAT
216 .compat_ioctl = hpsa_compat_ioctl,
217#endif
218 .sdev_attrs = hpsa_sdev_attrs,
219 .shost_attrs = hpsa_shost_attrs,
220};
221
222static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
223{
224 unsigned long *priv = shost_priv(sdev->host);
225 return (struct ctlr_info *) *priv;
226}
227
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228static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
229{
230 unsigned long *priv = shost_priv(sh);
231 return (struct ctlr_info *) *priv;
232}
233
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234static int check_for_unit_attention(struct ctlr_info *h,
235 struct CommandList *c)
236{
237 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
238 return 0;
239
240 switch (c->err_info->SenseInfo[12]) {
241 case STATE_CHANGED:
242 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
243 "detected, command retried\n", h->ctlr);
244 break;
245 case LUN_FAILED:
246 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
247 "detected, action required\n", h->ctlr);
248 break;
249 case REPORT_LUNS_CHANGED:
250 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
31468401 251 "changed, action required\n", h->ctlr);
edd16368 252 /*
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253 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
254 */
255 break;
256 case POWER_OR_RESET:
257 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
258 "or device reset detected\n", h->ctlr);
259 break;
260 case UNIT_ATTENTION_CLEARED:
261 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
262 "cleared by another initiator\n", h->ctlr);
263 break;
264 default:
265 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
266 "unit attention detected\n", h->ctlr);
267 break;
268 }
269 return 1;
270}
271
272static ssize_t host_store_rescan(struct device *dev,
273 struct device_attribute *attr,
274 const char *buf, size_t count)
275{
276 struct ctlr_info *h;
277 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 278 h = shost_to_hba(shost);
31468401 279 hpsa_scan_start(h->scsi_host);
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280 return count;
281}
282
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283static ssize_t host_show_firmware_revision(struct device *dev,
284 struct device_attribute *attr, char *buf)
285{
286 struct ctlr_info *h;
287 struct Scsi_Host *shost = class_to_shost(dev);
288 unsigned char *fwrev;
289
290 h = shost_to_hba(shost);
291 if (!h->hba_inquiry_data)
292 return 0;
293 fwrev = &h->hba_inquiry_data[32];
294 return snprintf(buf, 20, "%c%c%c%c\n",
295 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
296}
297
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298/* Enqueuing and dequeuing functions for cmdlists. */
299static inline void addQ(struct hlist_head *list, struct CommandList *c)
300{
301 hlist_add_head(&c->list, list);
302}
303
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304static inline u32 next_command(struct ctlr_info *h)
305{
306 u32 a;
307
308 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
309 return h->access.command_completed(h);
310
311 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
312 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
313 (h->reply_pool_head)++;
314 h->commands_outstanding--;
315 } else {
316 a = FIFO_EMPTY;
317 }
318 /* Check for wraparound */
319 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
320 h->reply_pool_head = h->reply_pool;
321 h->reply_pool_wraparound ^= 1;
322 }
323 return a;
324}
325
326/* set_performant_mode: Modify the tag for cciss performant
327 * set bit 0 for pull model, bits 3-1 for block fetch
328 * register number
329 */
330static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
331{
332 if (likely(h->transMethod == CFGTBL_Trans_Performant))
333 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
334}
335
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336static void enqueue_cmd_and_start_io(struct ctlr_info *h,
337 struct CommandList *c)
338{
339 unsigned long flags;
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DB
340
341 set_performant_mode(h, c);
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342 spin_lock_irqsave(&h->lock, flags);
343 addQ(&h->reqQ, c);
344 h->Qdepth++;
345 start_io(h);
346 spin_unlock_irqrestore(&h->lock, flags);
347}
348
349static inline void removeQ(struct CommandList *c)
350{
351 if (WARN_ON(hlist_unhashed(&c->list)))
352 return;
353 hlist_del_init(&c->list);
354}
355
356static inline int is_hba_lunid(unsigned char scsi3addr[])
357{
358 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
359}
360
361static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
362{
363 return (scsi3addr[3] & 0xC0) == 0x40;
364}
365
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366static inline int is_scsi_rev_5(struct ctlr_info *h)
367{
368 if (!h->hba_inquiry_data)
369 return 0;
370 if ((h->hba_inquiry_data[2] & 0x07) == 5)
371 return 1;
372 return 0;
373}
374
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375static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
376 "UNKNOWN"
377};
378#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
379
380static ssize_t raid_level_show(struct device *dev,
381 struct device_attribute *attr, char *buf)
382{
383 ssize_t l = 0;
82a72c0a 384 unsigned char rlevel;
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385 struct ctlr_info *h;
386 struct scsi_device *sdev;
387 struct hpsa_scsi_dev_t *hdev;
388 unsigned long flags;
389
390 sdev = to_scsi_device(dev);
391 h = sdev_to_hba(sdev);
392 spin_lock_irqsave(&h->lock, flags);
393 hdev = sdev->hostdata;
394 if (!hdev) {
395 spin_unlock_irqrestore(&h->lock, flags);
396 return -ENODEV;
397 }
398
399 /* Is this even a logical drive? */
400 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
401 spin_unlock_irqrestore(&h->lock, flags);
402 l = snprintf(buf, PAGE_SIZE, "N/A\n");
403 return l;
404 }
405
406 rlevel = hdev->raid_level;
407 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 408 if (rlevel > RAID_UNKNOWN)
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409 rlevel = RAID_UNKNOWN;
410 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
411 return l;
412}
413
414static ssize_t lunid_show(struct device *dev,
415 struct device_attribute *attr, char *buf)
416{
417 struct ctlr_info *h;
418 struct scsi_device *sdev;
419 struct hpsa_scsi_dev_t *hdev;
420 unsigned long flags;
421 unsigned char lunid[8];
422
423 sdev = to_scsi_device(dev);
424 h = sdev_to_hba(sdev);
425 spin_lock_irqsave(&h->lock, flags);
426 hdev = sdev->hostdata;
427 if (!hdev) {
428 spin_unlock_irqrestore(&h->lock, flags);
429 return -ENODEV;
430 }
431 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
432 spin_unlock_irqrestore(&h->lock, flags);
433 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
434 lunid[0], lunid[1], lunid[2], lunid[3],
435 lunid[4], lunid[5], lunid[6], lunid[7]);
436}
437
438static ssize_t unique_id_show(struct device *dev,
439 struct device_attribute *attr, char *buf)
440{
441 struct ctlr_info *h;
442 struct scsi_device *sdev;
443 struct hpsa_scsi_dev_t *hdev;
444 unsigned long flags;
445 unsigned char sn[16];
446
447 sdev = to_scsi_device(dev);
448 h = sdev_to_hba(sdev);
449 spin_lock_irqsave(&h->lock, flags);
450 hdev = sdev->hostdata;
451 if (!hdev) {
452 spin_unlock_irqrestore(&h->lock, flags);
453 return -ENODEV;
454 }
455 memcpy(sn, hdev->device_id, sizeof(sn));
456 spin_unlock_irqrestore(&h->lock, flags);
457 return snprintf(buf, 16 * 2 + 2,
458 "%02X%02X%02X%02X%02X%02X%02X%02X"
459 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
460 sn[0], sn[1], sn[2], sn[3],
461 sn[4], sn[5], sn[6], sn[7],
462 sn[8], sn[9], sn[10], sn[11],
463 sn[12], sn[13], sn[14], sn[15]);
464}
465
466static int hpsa_find_target_lun(struct ctlr_info *h,
467 unsigned char scsi3addr[], int bus, int *target, int *lun)
468{
469 /* finds an unused bus, target, lun for a new physical device
470 * assumes h->devlock is held
471 */
472 int i, found = 0;
473 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
474
475 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
476
477 for (i = 0; i < h->ndevices; i++) {
478 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
479 set_bit(h->dev[i]->target, lun_taken);
480 }
481
482 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
483 if (!test_bit(i, lun_taken)) {
484 /* *bus = 1; */
485 *target = i;
486 *lun = 0;
487 found = 1;
488 break;
489 }
490 }
491 return !found;
492}
493
494/* Add an entry into h->dev[] array. */
495static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
496 struct hpsa_scsi_dev_t *device,
497 struct hpsa_scsi_dev_t *added[], int *nadded)
498{
499 /* assumes h->devlock is held */
500 int n = h->ndevices;
501 int i;
502 unsigned char addr1[8], addr2[8];
503 struct hpsa_scsi_dev_t *sd;
504
505 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
506 dev_err(&h->pdev->dev, "too many devices, some will be "
507 "inaccessible.\n");
508 return -1;
509 }
510
511 /* physical devices do not have lun or target assigned until now. */
512 if (device->lun != -1)
513 /* Logical device, lun is already assigned. */
514 goto lun_assigned;
515
516 /* If this device a non-zero lun of a multi-lun device
517 * byte 4 of the 8-byte LUN addr will contain the logical
518 * unit no, zero otherise.
519 */
520 if (device->scsi3addr[4] == 0) {
521 /* This is not a non-zero lun of a multi-lun device */
522 if (hpsa_find_target_lun(h, device->scsi3addr,
523 device->bus, &device->target, &device->lun) != 0)
524 return -1;
525 goto lun_assigned;
526 }
527
528 /* This is a non-zero lun of a multi-lun device.
529 * Search through our list and find the device which
530 * has the same 8 byte LUN address, excepting byte 4.
531 * Assign the same bus and target for this new LUN.
532 * Use the logical unit number from the firmware.
533 */
534 memcpy(addr1, device->scsi3addr, 8);
535 addr1[4] = 0;
536 for (i = 0; i < n; i++) {
537 sd = h->dev[i];
538 memcpy(addr2, sd->scsi3addr, 8);
539 addr2[4] = 0;
540 /* differ only in byte 4? */
541 if (memcmp(addr1, addr2, 8) == 0) {
542 device->bus = sd->bus;
543 device->target = sd->target;
544 device->lun = device->scsi3addr[4];
545 break;
546 }
547 }
548 if (device->lun == -1) {
549 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
550 " suspect firmware bug or unsupported hardware "
551 "configuration.\n");
552 return -1;
553 }
554
555lun_assigned:
556
557 h->dev[n] = device;
558 h->ndevices++;
559 added[*nadded] = device;
560 (*nadded)++;
561
562 /* initially, (before registering with scsi layer) we don't
563 * know our hostno and we don't want to print anything first
564 * time anyway (the scsi layer's inquiries will show that info)
565 */
566 /* if (hostno != -1) */
567 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
568 scsi_device_type(device->devtype), hostno,
569 device->bus, device->target, device->lun);
570 return 0;
571}
572
2a8ccf31
SC
573/* Replace an entry from h->dev[] array. */
574static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
575 int entry, struct hpsa_scsi_dev_t *new_entry,
576 struct hpsa_scsi_dev_t *added[], int *nadded,
577 struct hpsa_scsi_dev_t *removed[], int *nremoved)
578{
579 /* assumes h->devlock is held */
580 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
581 removed[*nremoved] = h->dev[entry];
582 (*nremoved)++;
583 h->dev[entry] = new_entry;
584 added[*nadded] = new_entry;
585 (*nadded)++;
586 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
587 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
588 new_entry->target, new_entry->lun);
589}
590
edd16368
SC
591/* Remove an entry from h->dev[] array. */
592static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
593 struct hpsa_scsi_dev_t *removed[], int *nremoved)
594{
595 /* assumes h->devlock is held */
596 int i;
597 struct hpsa_scsi_dev_t *sd;
598
b2ed4f79 599 BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
edd16368
SC
600
601 sd = h->dev[entry];
602 removed[*nremoved] = h->dev[entry];
603 (*nremoved)++;
604
605 for (i = entry; i < h->ndevices-1; i++)
606 h->dev[i] = h->dev[i+1];
607 h->ndevices--;
608 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
609 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
610 sd->lun);
611}
612
613#define SCSI3ADDR_EQ(a, b) ( \
614 (a)[7] == (b)[7] && \
615 (a)[6] == (b)[6] && \
616 (a)[5] == (b)[5] && \
617 (a)[4] == (b)[4] && \
618 (a)[3] == (b)[3] && \
619 (a)[2] == (b)[2] && \
620 (a)[1] == (b)[1] && \
621 (a)[0] == (b)[0])
622
623static void fixup_botched_add(struct ctlr_info *h,
624 struct hpsa_scsi_dev_t *added)
625{
626 /* called when scsi_add_device fails in order to re-adjust
627 * h->dev[] to match the mid layer's view.
628 */
629 unsigned long flags;
630 int i, j;
631
632 spin_lock_irqsave(&h->lock, flags);
633 for (i = 0; i < h->ndevices; i++) {
634 if (h->dev[i] == added) {
635 for (j = i; j < h->ndevices-1; j++)
636 h->dev[j] = h->dev[j+1];
637 h->ndevices--;
638 break;
639 }
640 }
641 spin_unlock_irqrestore(&h->lock, flags);
642 kfree(added);
643}
644
645static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
646 struct hpsa_scsi_dev_t *dev2)
647{
edd16368
SC
648 /* we compare everything except lun and target as these
649 * are not yet assigned. Compare parts likely
650 * to differ first
651 */
652 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
653 sizeof(dev1->scsi3addr)) != 0)
654 return 0;
655 if (memcmp(dev1->device_id, dev2->device_id,
656 sizeof(dev1->device_id)) != 0)
657 return 0;
658 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
659 return 0;
660 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
661 return 0;
edd16368
SC
662 if (dev1->devtype != dev2->devtype)
663 return 0;
edd16368
SC
664 if (dev1->bus != dev2->bus)
665 return 0;
666 return 1;
667}
668
669/* Find needle in haystack. If exact match found, return DEVICE_SAME,
670 * and return needle location in *index. If scsi3addr matches, but not
671 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
672 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
673 */
674static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
675 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
676 int *index)
677{
678 int i;
679#define DEVICE_NOT_FOUND 0
680#define DEVICE_CHANGED 1
681#define DEVICE_SAME 2
682 for (i = 0; i < haystack_size; i++) {
23231048
SC
683 if (haystack[i] == NULL) /* previously removed. */
684 continue;
edd16368
SC
685 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
686 *index = i;
687 if (device_is_the_same(needle, haystack[i]))
688 return DEVICE_SAME;
689 else
690 return DEVICE_CHANGED;
691 }
692 }
693 *index = -1;
694 return DEVICE_NOT_FOUND;
695}
696
4967bd3e 697static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC
698 struct hpsa_scsi_dev_t *sd[], int nsds)
699{
700 /* sd contains scsi3 addresses and devtypes, and inquiry
701 * data. This function takes what's in sd to be the current
702 * reality and updates h->dev[] to reflect that reality.
703 */
704 int i, entry, device_change, changes = 0;
705 struct hpsa_scsi_dev_t *csd;
706 unsigned long flags;
707 struct hpsa_scsi_dev_t **added, **removed;
708 int nadded, nremoved;
709 struct Scsi_Host *sh = NULL;
710
711 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
712 GFP_KERNEL);
713 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
714 GFP_KERNEL);
715
716 if (!added || !removed) {
717 dev_warn(&h->pdev->dev, "out of memory in "
718 "adjust_hpsa_scsi_table\n");
719 goto free_and_out;
720 }
721
722 spin_lock_irqsave(&h->devlock, flags);
723
724 /* find any devices in h->dev[] that are not in
725 * sd[] and remove them from h->dev[], and for any
726 * devices which have changed, remove the old device
727 * info and add the new device info.
728 */
729 i = 0;
730 nremoved = 0;
731 nadded = 0;
732 while (i < h->ndevices) {
733 csd = h->dev[i];
734 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
735 if (device_change == DEVICE_NOT_FOUND) {
736 changes++;
737 hpsa_scsi_remove_entry(h, hostno, i,
738 removed, &nremoved);
739 continue; /* remove ^^^, hence i not incremented */
740 } else if (device_change == DEVICE_CHANGED) {
741 changes++;
2a8ccf31
SC
742 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
743 added, &nadded, removed, &nremoved);
c7f172dc
SC
744 /* Set it to NULL to prevent it from being freed
745 * at the bottom of hpsa_update_scsi_devices()
746 */
747 sd[entry] = NULL;
edd16368
SC
748 }
749 i++;
750 }
751
752 /* Now, make sure every device listed in sd[] is also
753 * listed in h->dev[], adding them if they aren't found
754 */
755
756 for (i = 0; i < nsds; i++) {
757 if (!sd[i]) /* if already added above. */
758 continue;
759 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
760 h->ndevices, &entry);
761 if (device_change == DEVICE_NOT_FOUND) {
762 changes++;
763 if (hpsa_scsi_add_entry(h, hostno, sd[i],
764 added, &nadded) != 0)
765 break;
766 sd[i] = NULL; /* prevent from being freed later. */
767 } else if (device_change == DEVICE_CHANGED) {
768 /* should never happen... */
769 changes++;
770 dev_warn(&h->pdev->dev,
771 "device unexpectedly changed.\n");
772 /* but if it does happen, we just ignore that device */
773 }
774 }
775 spin_unlock_irqrestore(&h->devlock, flags);
776
777 /* Don't notify scsi mid layer of any changes the first time through
778 * (or if there are no changes) scsi_scan_host will do it later the
779 * first time through.
780 */
781 if (hostno == -1 || !changes)
782 goto free_and_out;
783
784 sh = h->scsi_host;
785 /* Notify scsi mid layer of any removed devices */
786 for (i = 0; i < nremoved; i++) {
787 struct scsi_device *sdev =
788 scsi_device_lookup(sh, removed[i]->bus,
789 removed[i]->target, removed[i]->lun);
790 if (sdev != NULL) {
791 scsi_remove_device(sdev);
792 scsi_device_put(sdev);
793 } else {
794 /* We don't expect to get here.
795 * future cmds to this device will get selection
796 * timeout as if the device was gone.
797 */
798 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
799 " for removal.", hostno, removed[i]->bus,
800 removed[i]->target, removed[i]->lun);
801 }
802 kfree(removed[i]);
803 removed[i] = NULL;
804 }
805
806 /* Notify scsi mid layer of any added devices */
807 for (i = 0; i < nadded; i++) {
808 if (scsi_add_device(sh, added[i]->bus,
809 added[i]->target, added[i]->lun) == 0)
810 continue;
811 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
812 "device not added.\n", hostno, added[i]->bus,
813 added[i]->target, added[i]->lun);
814 /* now we have to remove it from h->dev,
815 * since it didn't get added to scsi mid layer
816 */
817 fixup_botched_add(h, added[i]);
818 }
819
820free_and_out:
821 kfree(added);
822 kfree(removed);
edd16368
SC
823}
824
825/*
826 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
827 * Assume's h->devlock is held.
828 */
829static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
830 int bus, int target, int lun)
831{
832 int i;
833 struct hpsa_scsi_dev_t *sd;
834
835 for (i = 0; i < h->ndevices; i++) {
836 sd = h->dev[i];
837 if (sd->bus == bus && sd->target == target && sd->lun == lun)
838 return sd;
839 }
840 return NULL;
841}
842
843/* link sdev->hostdata to our per-device structure. */
844static int hpsa_slave_alloc(struct scsi_device *sdev)
845{
846 struct hpsa_scsi_dev_t *sd;
847 unsigned long flags;
848 struct ctlr_info *h;
849
850 h = sdev_to_hba(sdev);
851 spin_lock_irqsave(&h->devlock, flags);
852 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
853 sdev_id(sdev), sdev->lun);
854 if (sd != NULL)
855 sdev->hostdata = sd;
856 spin_unlock_irqrestore(&h->devlock, flags);
857 return 0;
858}
859
860static void hpsa_slave_destroy(struct scsi_device *sdev)
861{
bcc44255 862 /* nothing to do. */
edd16368
SC
863}
864
865static void hpsa_scsi_setup(struct ctlr_info *h)
866{
867 h->ndevices = 0;
868 h->scsi_host = NULL;
869 spin_lock_init(&h->devlock);
edd16368
SC
870}
871
33a2ffce
SC
872static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
873{
874 int i;
875
876 if (!h->cmd_sg_list)
877 return;
878 for (i = 0; i < h->nr_cmds; i++) {
879 kfree(h->cmd_sg_list[i]);
880 h->cmd_sg_list[i] = NULL;
881 }
882 kfree(h->cmd_sg_list);
883 h->cmd_sg_list = NULL;
884}
885
886static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
887{
888 int i;
889
890 if (h->chainsize <= 0)
891 return 0;
892
893 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
894 GFP_KERNEL);
895 if (!h->cmd_sg_list)
896 return -ENOMEM;
897 for (i = 0; i < h->nr_cmds; i++) {
898 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
899 h->chainsize, GFP_KERNEL);
900 if (!h->cmd_sg_list[i])
901 goto clean;
902 }
903 return 0;
904
905clean:
906 hpsa_free_sg_chain_blocks(h);
907 return -ENOMEM;
908}
909
910static void hpsa_map_sg_chain_block(struct ctlr_info *h,
911 struct CommandList *c)
912{
913 struct SGDescriptor *chain_sg, *chain_block;
914 u64 temp64;
915
916 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
917 chain_block = h->cmd_sg_list[c->cmdindex];
918 chain_sg->Ext = HPSA_SG_CHAIN;
919 chain_sg->Len = sizeof(*chain_sg) *
920 (c->Header.SGTotal - h->max_cmd_sg_entries);
921 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
922 PCI_DMA_TODEVICE);
923 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
924 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
925}
926
927static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
928 struct CommandList *c)
929{
930 struct SGDescriptor *chain_sg;
931 union u64bit temp64;
932
933 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
934 return;
935
936 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
937 temp64.val32.lower = chain_sg->Addr.lower;
938 temp64.val32.upper = chain_sg->Addr.upper;
939 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
940}
941
edd16368 942static void complete_scsi_command(struct CommandList *cp,
01a02ffc 943 int timeout, u32 tag)
edd16368
SC
944{
945 struct scsi_cmnd *cmd;
946 struct ctlr_info *h;
947 struct ErrorInfo *ei;
948
949 unsigned char sense_key;
950 unsigned char asc; /* additional sense code */
951 unsigned char ascq; /* additional sense code qualifier */
952
953 ei = cp->err_info;
954 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
955 h = cp->h;
956
957 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC
958 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
959 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC
960
961 cmd->result = (DID_OK << 16); /* host byte */
962 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 963 cmd->result |= ei->ScsiStatus;
edd16368
SC
964
965 /* copy the sense data whether we need to or not. */
966 memcpy(cmd->sense_buffer, ei->SenseInfo,
967 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
968 SCSI_SENSE_BUFFERSIZE :
969 ei->SenseLen);
970 scsi_set_resid(cmd, ei->ResidualCnt);
971
972 if (ei->CommandStatus == 0) {
973 cmd->scsi_done(cmd);
974 cmd_free(h, cp);
975 return;
976 }
977
978 /* an error has occurred */
979 switch (ei->CommandStatus) {
980
981 case CMD_TARGET_STATUS:
982 if (ei->ScsiStatus) {
983 /* Get sense key */
984 sense_key = 0xf & ei->SenseInfo[2];
985 /* Get additional sense code */
986 asc = ei->SenseInfo[12];
987 /* Get addition sense code qualifier */
988 ascq = ei->SenseInfo[13];
989 }
990
991 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
992 if (check_for_unit_attention(h, cp)) {
993 cmd->result = DID_SOFT_ERROR << 16;
994 break;
995 }
996 if (sense_key == ILLEGAL_REQUEST) {
997 /*
998 * SCSI REPORT_LUNS is commonly unsupported on
999 * Smart Array. Suppress noisy complaint.
1000 */
1001 if (cp->Request.CDB[0] == REPORT_LUNS)
1002 break;
1003
1004 /* If ASC/ASCQ indicate Logical Unit
1005 * Not Supported condition,
1006 */
1007 if ((asc == 0x25) && (ascq == 0x0)) {
1008 dev_warn(&h->pdev->dev, "cp %p "
1009 "has check condition\n", cp);
1010 break;
1011 }
1012 }
1013
1014 if (sense_key == NOT_READY) {
1015 /* If Sense is Not Ready, Logical Unit
1016 * Not ready, Manual Intervention
1017 * required
1018 */
1019 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC
1020 dev_warn(&h->pdev->dev, "cp %p "
1021 "has check condition: unit "
1022 "not ready, manual "
1023 "intervention required\n", cp);
1024 break;
1025 }
1026 }
1d3b3609
MG
1027 if (sense_key == ABORTED_COMMAND) {
1028 /* Aborted command is retryable */
1029 dev_warn(&h->pdev->dev, "cp %p "
1030 "has check condition: aborted command: "
1031 "ASC: 0x%x, ASCQ: 0x%x\n",
1032 cp, asc, ascq);
1033 cmd->result = DID_SOFT_ERROR << 16;
1034 break;
1035 }
edd16368
SC
1036 /* Must be some other type of check condition */
1037 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1038 "unknown type: "
1039 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1040 "Returning result: 0x%x, "
1041 "cmd=[%02x %02x %02x %02x %02x "
807be732 1042 "%02x %02x %02x %02x %02x %02x "
edd16368
SC
1043 "%02x %02x %02x %02x %02x]\n",
1044 cp, sense_key, asc, ascq,
1045 cmd->result,
1046 cmd->cmnd[0], cmd->cmnd[1],
1047 cmd->cmnd[2], cmd->cmnd[3],
1048 cmd->cmnd[4], cmd->cmnd[5],
1049 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM
1050 cmd->cmnd[8], cmd->cmnd[9],
1051 cmd->cmnd[10], cmd->cmnd[11],
1052 cmd->cmnd[12], cmd->cmnd[13],
1053 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC
1054 break;
1055 }
1056
1057
1058 /* Problem was not a check condition
1059 * Pass it up to the upper layers...
1060 */
1061 if (ei->ScsiStatus) {
1062 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1063 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1064 "Returning result: 0x%x\n",
1065 cp, ei->ScsiStatus,
1066 sense_key, asc, ascq,
1067 cmd->result);
1068 } else { /* scsi status is zero??? How??? */
1069 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1070 "Returning no connection.\n", cp),
1071
1072 /* Ordinarily, this case should never happen,
1073 * but there is a bug in some released firmware
1074 * revisions that allows it to happen if, for
1075 * example, a 4100 backplane loses power and
1076 * the tape drive is in it. We assume that
1077 * it's a fatal error of some kind because we
1078 * can't show that it wasn't. We will make it
1079 * look like selection timeout since that is
1080 * the most common reason for this to occur,
1081 * and it's severe enough.
1082 */
1083
1084 cmd->result = DID_NO_CONNECT << 16;
1085 }
1086 break;
1087
1088 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1089 break;
1090 case CMD_DATA_OVERRUN:
1091 dev_warn(&h->pdev->dev, "cp %p has"
1092 " completed with data overrun "
1093 "reported\n", cp);
1094 break;
1095 case CMD_INVALID: {
1096 /* print_bytes(cp, sizeof(*cp), 1, 0);
1097 print_cmd(cp); */
1098 /* We get CMD_INVALID if you address a non-existent device
1099 * instead of a selection timeout (no response). You will
1100 * see this if you yank out a drive, then try to access it.
1101 * This is kind of a shame because it means that any other
1102 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1103 * missing target. */
1104 cmd->result = DID_NO_CONNECT << 16;
1105 }
1106 break;
1107 case CMD_PROTOCOL_ERR:
1108 dev_warn(&h->pdev->dev, "cp %p has "
1109 "protocol error \n", cp);
1110 break;
1111 case CMD_HARDWARE_ERR:
1112 cmd->result = DID_ERROR << 16;
1113 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1114 break;
1115 case CMD_CONNECTION_LOST:
1116 cmd->result = DID_ERROR << 16;
1117 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1118 break;
1119 case CMD_ABORTED:
1120 cmd->result = DID_ABORT << 16;
1121 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1122 cp, ei->ScsiStatus);
1123 break;
1124 case CMD_ABORT_FAILED:
1125 cmd->result = DID_ERROR << 16;
1126 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1127 break;
1128 case CMD_UNSOLICITED_ABORT:
5f0325ab 1129 cmd->result = DID_RESET << 16;
edd16368
SC
1130 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1131 "abort\n", cp);
1132 break;
1133 case CMD_TIMEOUT:
1134 cmd->result = DID_TIME_OUT << 16;
1135 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1136 break;
1137 default:
1138 cmd->result = DID_ERROR << 16;
1139 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1140 cp, ei->CommandStatus);
1141 }
1142 cmd->scsi_done(cmd);
1143 cmd_free(h, cp);
1144}
1145
1146static int hpsa_scsi_detect(struct ctlr_info *h)
1147{
1148 struct Scsi_Host *sh;
1149 int error;
1150
1151 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1152 if (sh == NULL)
1153 goto fail;
1154
1155 sh->io_port = 0;
1156 sh->n_io_port = 0;
1157 sh->this_id = -1;
1158 sh->max_channel = 3;
1159 sh->max_cmd_len = MAX_COMMAND_SIZE;
1160 sh->max_lun = HPSA_MAX_LUN;
1161 sh->max_id = HPSA_MAX_LUN;
303932fd
DB
1162 sh->can_queue = h->nr_cmds;
1163 sh->cmd_per_lun = h->nr_cmds;
33a2ffce 1164 sh->sg_tablesize = h->maxsgentries;
edd16368
SC
1165 h->scsi_host = sh;
1166 sh->hostdata[0] = (unsigned long) h;
303932fd 1167 sh->irq = h->intr[PERF_MODE_INT];
edd16368
SC
1168 sh->unique_id = sh->irq;
1169 error = scsi_add_host(sh, &h->pdev->dev);
1170 if (error)
1171 goto fail_host_put;
1172 scsi_scan_host(sh);
1173 return 0;
1174
1175 fail_host_put:
1176 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1177 " failed for controller %d\n", h->ctlr);
1178 scsi_host_put(sh);
ecd9aad4 1179 return error;
edd16368
SC
1180 fail:
1181 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1182 " failed for controller %d\n", h->ctlr);
ecd9aad4 1183 return -ENOMEM;
edd16368
SC
1184}
1185
1186static void hpsa_pci_unmap(struct pci_dev *pdev,
1187 struct CommandList *c, int sg_used, int data_direction)
1188{
1189 int i;
1190 union u64bit addr64;
1191
1192 for (i = 0; i < sg_used; i++) {
1193 addr64.val32.lower = c->SG[i].Addr.lower;
1194 addr64.val32.upper = c->SG[i].Addr.upper;
1195 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1196 data_direction);
1197 }
1198}
1199
1200static void hpsa_map_one(struct pci_dev *pdev,
1201 struct CommandList *cp,
1202 unsigned char *buf,
1203 size_t buflen,
1204 int data_direction)
1205{
01a02ffc 1206 u64 addr64;
edd16368
SC
1207
1208 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1209 cp->Header.SGList = 0;
1210 cp->Header.SGTotal = 0;
1211 return;
1212 }
1213
01a02ffc 1214 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
edd16368 1215 cp->SG[0].Addr.lower =
01a02ffc 1216 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1217 cp->SG[0].Addr.upper =
01a02ffc 1218 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1219 cp->SG[0].Len = buflen;
01a02ffc
SC
1220 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1221 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
edd16368
SC
1222}
1223
1224static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1225 struct CommandList *c)
1226{
1227 DECLARE_COMPLETION_ONSTACK(wait);
1228
1229 c->waiting = &wait;
1230 enqueue_cmd_and_start_io(h, c);
1231 wait_for_completion(&wait);
1232}
1233
1234static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1235 struct CommandList *c, int data_direction)
1236{
1237 int retry_count = 0;
1238
1239 do {
1240 memset(c->err_info, 0, sizeof(c->err_info));
1241 hpsa_scsi_do_simple_cmd_core(h, c);
1242 retry_count++;
1243 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1244 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1245}
1246
1247static void hpsa_scsi_interpret_error(struct CommandList *cp)
1248{
1249 struct ErrorInfo *ei;
1250 struct device *d = &cp->h->pdev->dev;
1251
1252 ei = cp->err_info;
1253 switch (ei->CommandStatus) {
1254 case CMD_TARGET_STATUS:
1255 dev_warn(d, "cmd %p has completed with errors\n", cp);
1256 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1257 ei->ScsiStatus);
1258 if (ei->ScsiStatus == 0)
1259 dev_warn(d, "SCSI status is abnormally zero. "
1260 "(probably indicates selection timeout "
1261 "reported incorrectly due to a known "
1262 "firmware bug, circa July, 2001.)\n");
1263 break;
1264 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1265 dev_info(d, "UNDERRUN\n");
1266 break;
1267 case CMD_DATA_OVERRUN:
1268 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1269 break;
1270 case CMD_INVALID: {
1271 /* controller unfortunately reports SCSI passthru's
1272 * to non-existent targets as invalid commands.
1273 */
1274 dev_warn(d, "cp %p is reported invalid (probably means "
1275 "target device no longer present)\n", cp);
1276 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1277 print_cmd(cp); */
1278 }
1279 break;
1280 case CMD_PROTOCOL_ERR:
1281 dev_warn(d, "cp %p has protocol error \n", cp);
1282 break;
1283 case CMD_HARDWARE_ERR:
1284 /* cmd->result = DID_ERROR << 16; */
1285 dev_warn(d, "cp %p had hardware error\n", cp);
1286 break;
1287 case CMD_CONNECTION_LOST:
1288 dev_warn(d, "cp %p had connection lost\n", cp);
1289 break;
1290 case CMD_ABORTED:
1291 dev_warn(d, "cp %p was aborted\n", cp);
1292 break;
1293 case CMD_ABORT_FAILED:
1294 dev_warn(d, "cp %p reports abort failed\n", cp);
1295 break;
1296 case CMD_UNSOLICITED_ABORT:
1297 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1298 break;
1299 case CMD_TIMEOUT:
1300 dev_warn(d, "cp %p timed out\n", cp);
1301 break;
1302 default:
1303 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1304 ei->CommandStatus);
1305 }
1306}
1307
1308static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1309 unsigned char page, unsigned char *buf,
1310 unsigned char bufsize)
1311{
1312 int rc = IO_OK;
1313 struct CommandList *c;
1314 struct ErrorInfo *ei;
1315
1316 c = cmd_special_alloc(h);
1317
1318 if (c == NULL) { /* trouble... */
1319 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1320 return -ENOMEM;
edd16368
SC
1321 }
1322
1323 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1324 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1325 ei = c->err_info;
1326 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1327 hpsa_scsi_interpret_error(c);
1328 rc = -1;
1329 }
1330 cmd_special_free(h, c);
1331 return rc;
1332}
1333
1334static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1335{
1336 int rc = IO_OK;
1337 struct CommandList *c;
1338 struct ErrorInfo *ei;
1339
1340 c = cmd_special_alloc(h);
1341
1342 if (c == NULL) { /* trouble... */
1343 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1344 return -ENOMEM;
edd16368
SC
1345 }
1346
1347 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1348 hpsa_scsi_do_simple_cmd_core(h, c);
1349 /* no unmap needed here because no data xfer. */
1350
1351 ei = c->err_info;
1352 if (ei->CommandStatus != 0) {
1353 hpsa_scsi_interpret_error(c);
1354 rc = -1;
1355 }
1356 cmd_special_free(h, c);
1357 return rc;
1358}
1359
1360static void hpsa_get_raid_level(struct ctlr_info *h,
1361 unsigned char *scsi3addr, unsigned char *raid_level)
1362{
1363 int rc;
1364 unsigned char *buf;
1365
1366 *raid_level = RAID_UNKNOWN;
1367 buf = kzalloc(64, GFP_KERNEL);
1368 if (!buf)
1369 return;
1370 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1371 if (rc == 0)
1372 *raid_level = buf[8];
1373 if (*raid_level > RAID_UNKNOWN)
1374 *raid_level = RAID_UNKNOWN;
1375 kfree(buf);
1376 return;
1377}
1378
1379/* Get the device id from inquiry page 0x83 */
1380static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1381 unsigned char *device_id, int buflen)
1382{
1383 int rc;
1384 unsigned char *buf;
1385
1386 if (buflen > 16)
1387 buflen = 16;
1388 buf = kzalloc(64, GFP_KERNEL);
1389 if (!buf)
1390 return -1;
1391 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1392 if (rc == 0)
1393 memcpy(device_id, &buf[8], buflen);
1394 kfree(buf);
1395 return rc != 0;
1396}
1397
1398static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1399 struct ReportLUNdata *buf, int bufsize,
1400 int extended_response)
1401{
1402 int rc = IO_OK;
1403 struct CommandList *c;
1404 unsigned char scsi3addr[8];
1405 struct ErrorInfo *ei;
1406
1407 c = cmd_special_alloc(h);
1408 if (c == NULL) { /* trouble... */
1409 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1410 return -1;
1411 }
e89c0ae7
SC
1412 /* address the controller */
1413 memset(scsi3addr, 0, sizeof(scsi3addr));
edd16368
SC
1414 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1415 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1416 if (extended_response)
1417 c->Request.CDB[1] = extended_response;
1418 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1419 ei = c->err_info;
1420 if (ei->CommandStatus != 0 &&
1421 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1422 hpsa_scsi_interpret_error(c);
1423 rc = -1;
1424 }
1425 cmd_special_free(h, c);
1426 return rc;
1427}
1428
1429static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1430 struct ReportLUNdata *buf,
1431 int bufsize, int extended_response)
1432{
1433 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1434}
1435
1436static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1437 struct ReportLUNdata *buf, int bufsize)
1438{
1439 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1440}
1441
1442static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1443 int bus, int target, int lun)
1444{
1445 device->bus = bus;
1446 device->target = target;
1447 device->lun = lun;
1448}
1449
1450static int hpsa_update_device_info(struct ctlr_info *h,
1451 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1452{
1453#define OBDR_TAPE_INQ_SIZE 49
ea6d3bc3 1454 unsigned char *inq_buff;
edd16368 1455
ea6d3bc3 1456 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC
1457 if (!inq_buff)
1458 goto bail_out;
1459
edd16368
SC
1460 /* Do an inquiry to the device to see what it is. */
1461 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1462 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1463 /* Inquiry failed (msg printed already) */
1464 dev_err(&h->pdev->dev,
1465 "hpsa_update_device_info: inquiry failed\n");
1466 goto bail_out;
1467 }
1468
edd16368
SC
1469 this_device->devtype = (inq_buff[0] & 0x1f);
1470 memcpy(this_device->scsi3addr, scsi3addr, 8);
1471 memcpy(this_device->vendor, &inq_buff[8],
1472 sizeof(this_device->vendor));
1473 memcpy(this_device->model, &inq_buff[16],
1474 sizeof(this_device->model));
edd16368
SC
1475 memset(this_device->device_id, 0,
1476 sizeof(this_device->device_id));
1477 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1478 sizeof(this_device->device_id));
1479
1480 if (this_device->devtype == TYPE_DISK &&
1481 is_logical_dev_addr_mode(scsi3addr))
1482 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1483 else
1484 this_device->raid_level = RAID_UNKNOWN;
1485
1486 kfree(inq_buff);
1487 return 0;
1488
1489bail_out:
1490 kfree(inq_buff);
1491 return 1;
1492}
1493
1494static unsigned char *msa2xxx_model[] = {
1495 "MSA2012",
1496 "MSA2024",
1497 "MSA2312",
1498 "MSA2324",
1499 NULL,
1500};
1501
1502static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1503{
1504 int i;
1505
1506 for (i = 0; msa2xxx_model[i]; i++)
1507 if (strncmp(device->model, msa2xxx_model[i],
1508 strlen(msa2xxx_model[i])) == 0)
1509 return 1;
1510 return 0;
1511}
1512
1513/* Helper function to assign bus, target, lun mapping of devices.
1514 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1515 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1516 * Logical drive target and lun are assigned at this time, but
1517 * physical device lun and target assignment are deferred (assigned
1518 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1519 */
1520static void figure_bus_target_lun(struct ctlr_info *h,
01a02ffc 1521 u8 *lunaddrbytes, int *bus, int *target, int *lun,
edd16368
SC
1522 struct hpsa_scsi_dev_t *device)
1523{
01a02ffc 1524 u32 lunid;
edd16368
SC
1525
1526 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1527 /* logical device */
339b2b14
SC
1528 if (unlikely(is_scsi_rev_5(h))) {
1529 /* p1210m, logical drives lun assignments
1530 * match SCSI REPORT LUNS data.
1531 */
1532 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
edd16368 1533 *bus = 0;
339b2b14
SC
1534 *target = 0;
1535 *lun = (lunid & 0x3fff) + 1;
1536 } else {
1537 /* not p1210m... */
1538 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1539 if (is_msa2xxx(h, device)) {
1540 /* msa2xxx way, put logicals on bus 1
1541 * and match target/lun numbers box
1542 * reports.
1543 */
1544 *bus = 1;
1545 *target = (lunid >> 16) & 0x3fff;
1546 *lun = lunid & 0x00ff;
1547 } else {
1548 /* Traditional smart array way. */
1549 *bus = 0;
1550 *lun = 0;
1551 *target = lunid & 0x3fff;
1552 }
edd16368
SC
1553 }
1554 } else {
1555 /* physical device */
1556 if (is_hba_lunid(lunaddrbytes))
339b2b14
SC
1557 if (unlikely(is_scsi_rev_5(h))) {
1558 *bus = 0; /* put p1210m ctlr at 0,0,0 */
1559 *target = 0;
1560 *lun = 0;
1561 return;
1562 } else
1563 *bus = 3; /* traditional smartarray */
edd16368 1564 else
339b2b14 1565 *bus = 2; /* physical disk */
edd16368
SC
1566 *target = -1;
1567 *lun = -1; /* we will fill these in later. */
1568 }
1569}
1570
1571/*
1572 * If there is no lun 0 on a target, linux won't find any devices.
1573 * For the MSA2xxx boxes, we have to manually detect the enclosure
1574 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1575 * it for some reason. *tmpdevice is the target we're adding,
1576 * this_device is a pointer into the current element of currentsd[]
1577 * that we're building up in update_scsi_devices(), below.
1578 * lunzerobits is a bitmap that tracks which targets already have a
1579 * lun 0 assigned.
1580 * Returns 1 if an enclosure was added, 0 if not.
1581 */
1582static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1583 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1584 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
edd16368
SC
1585 int bus, int target, int lun, unsigned long lunzerobits[],
1586 int *nmsa2xxx_enclosures)
1587{
1588 unsigned char scsi3addr[8];
1589
1590 if (test_bit(target, lunzerobits))
1591 return 0; /* There is already a lun 0 on this target. */
1592
1593 if (!is_logical_dev_addr_mode(lunaddrbytes))
1594 return 0; /* It's the logical targets that may lack lun 0. */
1595
1596 if (!is_msa2xxx(h, tmpdevice))
1597 return 0; /* It's only the MSA2xxx that have this problem. */
1598
1599 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1600 return 0;
1601
1602 if (is_hba_lunid(scsi3addr))
1603 return 0; /* Don't add the RAID controller here. */
1604
339b2b14
SC
1605 if (is_scsi_rev_5(h))
1606 return 0; /* p1210m doesn't need to do this. */
1607
edd16368
SC
1608#define MAX_MSA2XXX_ENCLOSURES 32
1609 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1610 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1611 "enclosures exceeded. Check your hardware "
1612 "configuration.");
1613 return 0;
1614 }
1615
1616 memset(scsi3addr, 0, 8);
1617 scsi3addr[3] = target;
1618 if (hpsa_update_device_info(h, scsi3addr, this_device))
1619 return 0;
1620 (*nmsa2xxx_enclosures)++;
1621 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1622 set_bit(target, lunzerobits);
1623 return 1;
1624}
1625
1626/*
1627 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1628 * logdev. The number of luns in physdev and logdev are returned in
1629 * *nphysicals and *nlogicals, respectively.
1630 * Returns 0 on success, -1 otherwise.
1631 */
1632static int hpsa_gather_lun_info(struct ctlr_info *h,
1633 int reportlunsize,
01a02ffc
SC
1634 struct ReportLUNdata *physdev, u32 *nphysicals,
1635 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC
1636{
1637 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1638 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1639 return -1;
1640 }
6df1e954 1641 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC
1642 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1643 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1644 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1645 *nphysicals - HPSA_MAX_PHYS_LUN);
1646 *nphysicals = HPSA_MAX_PHYS_LUN;
1647 }
1648 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1649 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1650 return -1;
1651 }
6df1e954 1652 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC
1653 /* Reject Logicals in excess of our max capability. */
1654 if (*nlogicals > HPSA_MAX_LUN) {
1655 dev_warn(&h->pdev->dev,
1656 "maximum logical LUNs (%d) exceeded. "
1657 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1658 *nlogicals - HPSA_MAX_LUN);
1659 *nlogicals = HPSA_MAX_LUN;
1660 }
1661 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1662 dev_warn(&h->pdev->dev,
1663 "maximum logical + physical LUNs (%d) exceeded. "
1664 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1665 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1666 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1667 }
1668 return 0;
1669}
1670
339b2b14
SC
1671u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1672 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1673 struct ReportLUNdata *logdev_list)
1674{
1675 /* Helper function, figure out where the LUN ID info is coming from
1676 * given index i, lists of physical and logical devices, where in
1677 * the list the raid controller is supposed to appear (first or last)
1678 */
1679
1680 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1681 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1682
1683 if (i == raid_ctlr_position)
1684 return RAID_CTLR_LUNID;
1685
1686 if (i < logicals_start)
1687 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1688
1689 if (i < last_device)
1690 return &logdev_list->LUN[i - nphysicals -
1691 (raid_ctlr_position == 0)][0];
1692 BUG();
1693 return NULL;
1694}
1695
edd16368
SC
1696static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1697{
1698 /* the idea here is we could get notified
1699 * that some devices have changed, so we do a report
1700 * physical luns and report logical luns cmd, and adjust
1701 * our list of devices accordingly.
1702 *
1703 * The scsi3addr's of devices won't change so long as the
1704 * adapter is not reset. That means we can rescan and
1705 * tell which devices we already know about, vs. new
1706 * devices, vs. disappearing devices.
1707 */
1708 struct ReportLUNdata *physdev_list = NULL;
1709 struct ReportLUNdata *logdev_list = NULL;
1710 unsigned char *inq_buff = NULL;
01a02ffc
SC
1711 u32 nphysicals = 0;
1712 u32 nlogicals = 0;
1713 u32 ndev_allocated = 0;
edd16368
SC
1714 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1715 int ncurrent = 0;
1716 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1717 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1718 int bus, target, lun;
339b2b14 1719 int raid_ctlr_position;
edd16368
SC
1720 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1721
1722 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1723 GFP_KERNEL);
1724 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1725 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1726 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1727 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1728
1729 if (!currentsd || !physdev_list || !logdev_list ||
1730 !inq_buff || !tmpdevice) {
1731 dev_err(&h->pdev->dev, "out of memory\n");
1732 goto out;
1733 }
1734 memset(lunzerobits, 0, sizeof(lunzerobits));
1735
1736 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1737 logdev_list, &nlogicals))
1738 goto out;
1739
1740 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1741 * but each of them 4 times through different paths. The plus 1
1742 * is for the RAID controller.
1743 */
1744 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1745
1746 /* Allocate the per device structures */
1747 for (i = 0; i < ndevs_to_allocate; i++) {
1748 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1749 if (!currentsd[i]) {
1750 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1751 __FILE__, __LINE__);
1752 goto out;
1753 }
1754 ndev_allocated++;
1755 }
1756
339b2b14
SC
1757 if (unlikely(is_scsi_rev_5(h)))
1758 raid_ctlr_position = 0;
1759 else
1760 raid_ctlr_position = nphysicals + nlogicals;
1761
edd16368
SC
1762 /* adjust our table of devices */
1763 nmsa2xxx_enclosures = 0;
1764 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
01a02ffc 1765 u8 *lunaddrbytes;
edd16368
SC
1766
1767 /* Figure out where the LUN ID info is coming from */
339b2b14
SC
1768 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1769 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 1770 /* skip masked physical devices. */
339b2b14
SC
1771 if (lunaddrbytes[3] & 0xC0 &&
1772 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC
1773 continue;
1774
1775 /* Get device type, vendor, model, device id */
1776 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
1777 continue; /* skip it if we can't talk to it. */
1778 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1779 tmpdevice);
1780 this_device = currentsd[ncurrent];
1781
1782 /*
1783 * For the msa2xxx boxes, we have to insert a LUN 0 which
1784 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1785 * is nonetheless an enclosure device there. We have to
1786 * present that otherwise linux won't find anything if
1787 * there is no lun 0.
1788 */
1789 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1790 lunaddrbytes, bus, target, lun, lunzerobits,
1791 &nmsa2xxx_enclosures)) {
1792 ncurrent++;
1793 this_device = currentsd[ncurrent];
1794 }
1795
1796 *this_device = *tmpdevice;
1797 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1798
1799 switch (this_device->devtype) {
1800 case TYPE_ROM: {
1801 /* We don't *really* support actual CD-ROM devices,
1802 * just "One Button Disaster Recovery" tape drive
1803 * which temporarily pretends to be a CD-ROM drive.
1804 * So we check that the device is really an OBDR tape
1805 * device by checking for "$DR-10" in bytes 43-48 of
1806 * the inquiry data.
1807 */
1808 char obdr_sig[7];
1809#define OBDR_TAPE_SIG "$DR-10"
1810 strncpy(obdr_sig, &inq_buff[43], 6);
1811 obdr_sig[6] = '\0';
1812 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
1813 /* Not OBDR device, ignore it. */
1814 break;
1815 }
1816 ncurrent++;
1817 break;
1818 case TYPE_DISK:
1819 if (i < nphysicals)
1820 break;
1821 ncurrent++;
1822 break;
1823 case TYPE_TAPE:
1824 case TYPE_MEDIUM_CHANGER:
1825 ncurrent++;
1826 break;
1827 case TYPE_RAID:
1828 /* Only present the Smartarray HBA as a RAID controller.
1829 * If it's a RAID controller other than the HBA itself
1830 * (an external RAID controller, MSA500 or similar)
1831 * don't present it.
1832 */
1833 if (!is_hba_lunid(lunaddrbytes))
1834 break;
1835 ncurrent++;
1836 break;
1837 default:
1838 break;
1839 }
1840 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1841 break;
1842 }
1843 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1844out:
1845 kfree(tmpdevice);
1846 for (i = 0; i < ndev_allocated; i++)
1847 kfree(currentsd[i]);
1848 kfree(currentsd);
1849 kfree(inq_buff);
1850 kfree(physdev_list);
1851 kfree(logdev_list);
edd16368
SC
1852}
1853
1854/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1855 * dma mapping and fills in the scatter gather entries of the
1856 * hpsa command, cp.
1857 */
33a2ffce 1858static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC
1859 struct CommandList *cp,
1860 struct scsi_cmnd *cmd)
1861{
1862 unsigned int len;
1863 struct scatterlist *sg;
01a02ffc 1864 u64 addr64;
33a2ffce
SC
1865 int use_sg, i, sg_index, chained;
1866 struct SGDescriptor *curr_sg;
edd16368 1867
33a2ffce 1868 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC
1869
1870 use_sg = scsi_dma_map(cmd);
1871 if (use_sg < 0)
1872 return use_sg;
1873
1874 if (!use_sg)
1875 goto sglist_finished;
1876
33a2ffce
SC
1877 curr_sg = cp->SG;
1878 chained = 0;
1879 sg_index = 0;
edd16368 1880 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC
1881 if (i == h->max_cmd_sg_entries - 1 &&
1882 use_sg > h->max_cmd_sg_entries) {
1883 chained = 1;
1884 curr_sg = h->cmd_sg_list[cp->cmdindex];
1885 sg_index = 0;
1886 }
01a02ffc 1887 addr64 = (u64) sg_dma_address(sg);
edd16368 1888 len = sg_dma_len(sg);
33a2ffce
SC
1889 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
1890 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
1891 curr_sg->Len = len;
1892 curr_sg->Ext = 0; /* we are not chaining */
1893 curr_sg++;
1894 }
1895
1896 if (use_sg + chained > h->maxSG)
1897 h->maxSG = use_sg + chained;
1898
1899 if (chained) {
1900 cp->Header.SGList = h->max_cmd_sg_entries;
1901 cp->Header.SGTotal = (u16) (use_sg + 1);
1902 hpsa_map_sg_chain_block(h, cp);
1903 return 0;
edd16368
SC
1904 }
1905
1906sglist_finished:
1907
01a02ffc
SC
1908 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
1909 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC
1910 return 0;
1911}
1912
1913
f281233d 1914static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC
1915 void (*done)(struct scsi_cmnd *))
1916{
1917 struct ctlr_info *h;
1918 struct hpsa_scsi_dev_t *dev;
1919 unsigned char scsi3addr[8];
1920 struct CommandList *c;
1921 unsigned long flags;
1922
1923 /* Get the ptr to our adapter structure out of cmd->host. */
1924 h = sdev_to_hba(cmd->device);
1925 dev = cmd->device->hostdata;
1926 if (!dev) {
1927 cmd->result = DID_NO_CONNECT << 16;
1928 done(cmd);
1929 return 0;
1930 }
1931 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
1932
1933 /* Need a lock as this is being allocated from the pool */
1934 spin_lock_irqsave(&h->lock, flags);
1935 c = cmd_alloc(h);
1936 spin_unlock_irqrestore(&h->lock, flags);
1937 if (c == NULL) { /* trouble... */
1938 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
1939 return SCSI_MLQUEUE_HOST_BUSY;
1940 }
1941
1942 /* Fill in the command list header */
1943
1944 cmd->scsi_done = done; /* save this for use by completion code */
1945
1946 /* save c in case we have to abort it */
1947 cmd->host_scribble = (unsigned char *) c;
1948
1949 c->cmd_type = CMD_SCSI;
1950 c->scsi_cmd = cmd;
1951 c->Header.ReplyQueue = 0; /* unused in simple mode */
1952 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB
1953 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
1954 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC
1955
1956 /* Fill in the request block... */
1957
1958 c->Request.Timeout = 0;
1959 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
1960 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
1961 c->Request.CDBLen = cmd->cmd_len;
1962 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
1963 c->Request.Type.Type = TYPE_CMD;
1964 c->Request.Type.Attribute = ATTR_SIMPLE;
1965 switch (cmd->sc_data_direction) {
1966 case DMA_TO_DEVICE:
1967 c->Request.Type.Direction = XFER_WRITE;
1968 break;
1969 case DMA_FROM_DEVICE:
1970 c->Request.Type.Direction = XFER_READ;
1971 break;
1972 case DMA_NONE:
1973 c->Request.Type.Direction = XFER_NONE;
1974 break;
1975 case DMA_BIDIRECTIONAL:
1976 /* This can happen if a buggy application does a scsi passthru
1977 * and sets both inlen and outlen to non-zero. ( see
1978 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
1979 */
1980
1981 c->Request.Type.Direction = XFER_RSVD;
1982 /* This is technically wrong, and hpsa controllers should
1983 * reject it with CMD_INVALID, which is the most correct
1984 * response, but non-fibre backends appear to let it
1985 * slide by, and give the same results as if this field
1986 * were set correctly. Either way is acceptable for
1987 * our purposes here.
1988 */
1989
1990 break;
1991
1992 default:
1993 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
1994 cmd->sc_data_direction);
1995 BUG();
1996 break;
1997 }
1998
33a2ffce 1999 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC
2000 cmd_free(h, c);
2001 return SCSI_MLQUEUE_HOST_BUSY;
2002 }
2003 enqueue_cmd_and_start_io(h, c);
2004 /* the cmd'll come back via intr handler in complete_scsi_command() */
2005 return 0;
2006}
2007
f281233d
JG
2008static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2009
a08a8471
SC
2010static void hpsa_scan_start(struct Scsi_Host *sh)
2011{
2012 struct ctlr_info *h = shost_to_hba(sh);
2013 unsigned long flags;
2014
2015 /* wait until any scan already in progress is finished. */
2016 while (1) {
2017 spin_lock_irqsave(&h->scan_lock, flags);
2018 if (h->scan_finished)
2019 break;
2020 spin_unlock_irqrestore(&h->scan_lock, flags);
2021 wait_event(h->scan_wait_queue, h->scan_finished);
2022 /* Note: We don't need to worry about a race between this
2023 * thread and driver unload because the midlayer will
2024 * have incremented the reference count, so unload won't
2025 * happen if we're in here.
2026 */
2027 }
2028 h->scan_finished = 0; /* mark scan as in progress */
2029 spin_unlock_irqrestore(&h->scan_lock, flags);
2030
2031 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2032
2033 spin_lock_irqsave(&h->scan_lock, flags);
2034 h->scan_finished = 1; /* mark scan as finished. */
2035 wake_up_all(&h->scan_wait_queue);
2036 spin_unlock_irqrestore(&h->scan_lock, flags);
2037}
2038
2039static int hpsa_scan_finished(struct Scsi_Host *sh,
2040 unsigned long elapsed_time)
2041{
2042 struct ctlr_info *h = shost_to_hba(sh);
2043 unsigned long flags;
2044 int finished;
2045
2046 spin_lock_irqsave(&h->scan_lock, flags);
2047 finished = h->scan_finished;
2048 spin_unlock_irqrestore(&h->scan_lock, flags);
2049 return finished;
2050}
2051
667e23d4
SC
2052static int hpsa_change_queue_depth(struct scsi_device *sdev,
2053 int qdepth, int reason)
2054{
2055 struct ctlr_info *h = sdev_to_hba(sdev);
2056
2057 if (reason != SCSI_QDEPTH_DEFAULT)
2058 return -ENOTSUPP;
2059
2060 if (qdepth < 1)
2061 qdepth = 1;
2062 else
2063 if (qdepth > h->nr_cmds)
2064 qdepth = h->nr_cmds;
2065 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2066 return sdev->queue_depth;
2067}
2068
edd16368
SC
2069static void hpsa_unregister_scsi(struct ctlr_info *h)
2070{
2071 /* we are being forcibly unloaded, and may not refuse. */
2072 scsi_remove_host(h->scsi_host);
2073 scsi_host_put(h->scsi_host);
2074 h->scsi_host = NULL;
2075}
2076
2077static int hpsa_register_scsi(struct ctlr_info *h)
2078{
2079 int rc;
2080
edd16368
SC
2081 rc = hpsa_scsi_detect(h);
2082 if (rc != 0)
2083 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
2084 " hpsa_scsi_detect(), rc is %d\n", rc);
2085 return rc;
2086}
2087
2088static int wait_for_device_to_become_ready(struct ctlr_info *h,
2089 unsigned char lunaddr[])
2090{
2091 int rc = 0;
2092 int count = 0;
2093 int waittime = 1; /* seconds */
2094 struct CommandList *c;
2095
2096 c = cmd_special_alloc(h);
2097 if (!c) {
2098 dev_warn(&h->pdev->dev, "out of memory in "
2099 "wait_for_device_to_become_ready.\n");
2100 return IO_ERROR;
2101 }
2102
2103 /* Send test unit ready until device ready, or give up. */
2104 while (count < HPSA_TUR_RETRY_LIMIT) {
2105
2106 /* Wait for a bit. do this first, because if we send
2107 * the TUR right away, the reset will just abort it.
2108 */
2109 msleep(1000 * waittime);
2110 count++;
2111
2112 /* Increase wait time with each try, up to a point. */
2113 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2114 waittime = waittime * 2;
2115
2116 /* Send the Test Unit Ready */
2117 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2118 hpsa_scsi_do_simple_cmd_core(h, c);
2119 /* no unmap needed here because no data xfer. */
2120
2121 if (c->err_info->CommandStatus == CMD_SUCCESS)
2122 break;
2123
2124 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2125 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2126 (c->err_info->SenseInfo[2] == NO_SENSE ||
2127 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2128 break;
2129
2130 dev_warn(&h->pdev->dev, "waiting %d secs "
2131 "for device to become ready.\n", waittime);
2132 rc = 1; /* device not ready. */
2133 }
2134
2135 if (rc)
2136 dev_warn(&h->pdev->dev, "giving up on device.\n");
2137 else
2138 dev_warn(&h->pdev->dev, "device is ready.\n");
2139
2140 cmd_special_free(h, c);
2141 return rc;
2142}
2143
2144/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2145 * complaining. Doing a host- or bus-reset can't do anything good here.
2146 */
2147static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2148{
2149 int rc;
2150 struct ctlr_info *h;
2151 struct hpsa_scsi_dev_t *dev;
2152
2153 /* find the controller to which the command to be aborted was sent */
2154 h = sdev_to_hba(scsicmd->device);
2155 if (h == NULL) /* paranoia */
2156 return FAILED;
edd16368
SC
2157 dev = scsicmd->device->hostdata;
2158 if (!dev) {
2159 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2160 "device lookup failed.\n");
2161 return FAILED;
2162 }
d416b0c7
SC
2163 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2164 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC
2165 /* send a reset to the SCSI LUN which the command was sent to */
2166 rc = hpsa_send_reset(h, dev->scsi3addr);
2167 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2168 return SUCCESS;
2169
2170 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2171 return FAILED;
2172}
2173
2174/*
2175 * For operations that cannot sleep, a command block is allocated at init,
2176 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2177 * which ones are free or in use. Lock must be held when calling this.
2178 * cmd_free() is the complement.
2179 */
2180static struct CommandList *cmd_alloc(struct ctlr_info *h)
2181{
2182 struct CommandList *c;
2183 int i;
2184 union u64bit temp64;
2185 dma_addr_t cmd_dma_handle, err_dma_handle;
2186
2187 do {
2188 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2189 if (i == h->nr_cmds)
2190 return NULL;
2191 } while (test_and_set_bit
2192 (i & (BITS_PER_LONG - 1),
2193 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2194 c = h->cmd_pool + i;
2195 memset(c, 0, sizeof(*c));
2196 cmd_dma_handle = h->cmd_pool_dhandle
2197 + i * sizeof(*c);
2198 c->err_info = h->errinfo_pool + i;
2199 memset(c->err_info, 0, sizeof(*c->err_info));
2200 err_dma_handle = h->errinfo_pool_dhandle
2201 + i * sizeof(*c->err_info);
2202 h->nr_allocs++;
2203
2204 c->cmdindex = i;
2205
2206 INIT_HLIST_NODE(&c->list);
01a02ffc
SC
2207 c->busaddr = (u32) cmd_dma_handle;
2208 temp64.val = (u64) err_dma_handle;
edd16368
SC
2209 c->ErrDesc.Addr.lower = temp64.val32.lower;
2210 c->ErrDesc.Addr.upper = temp64.val32.upper;
2211 c->ErrDesc.Len = sizeof(*c->err_info);
2212
2213 c->h = h;
2214 return c;
2215}
2216
2217/* For operations that can wait for kmalloc to possibly sleep,
2218 * this routine can be called. Lock need not be held to call
2219 * cmd_special_alloc. cmd_special_free() is the complement.
2220 */
2221static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2222{
2223 struct CommandList *c;
2224 union u64bit temp64;
2225 dma_addr_t cmd_dma_handle, err_dma_handle;
2226
2227 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2228 if (c == NULL)
2229 return NULL;
2230 memset(c, 0, sizeof(*c));
2231
2232 c->cmdindex = -1;
2233
2234 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2235 &err_dma_handle);
2236
2237 if (c->err_info == NULL) {
2238 pci_free_consistent(h->pdev,
2239 sizeof(*c), c, cmd_dma_handle);
2240 return NULL;
2241 }
2242 memset(c->err_info, 0, sizeof(*c->err_info));
2243
2244 INIT_HLIST_NODE(&c->list);
01a02ffc
SC
2245 c->busaddr = (u32) cmd_dma_handle;
2246 temp64.val = (u64) err_dma_handle;
edd16368
SC
2247 c->ErrDesc.Addr.lower = temp64.val32.lower;
2248 c->ErrDesc.Addr.upper = temp64.val32.upper;
2249 c->ErrDesc.Len = sizeof(*c->err_info);
2250
2251 c->h = h;
2252 return c;
2253}
2254
2255static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2256{
2257 int i;
2258
2259 i = c - h->cmd_pool;
2260 clear_bit(i & (BITS_PER_LONG - 1),
2261 h->cmd_pool_bits + (i / BITS_PER_LONG));
2262 h->nr_frees++;
2263}
2264
2265static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2266{
2267 union u64bit temp64;
2268
2269 temp64.val32.lower = c->ErrDesc.Addr.lower;
2270 temp64.val32.upper = c->ErrDesc.Addr.upper;
2271 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2272 c->err_info, (dma_addr_t) temp64.val);
2273 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2274 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC
2275}
2276
2277#ifdef CONFIG_COMPAT
2278
edd16368
SC
2279static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2280{
2281 IOCTL32_Command_struct __user *arg32 =
2282 (IOCTL32_Command_struct __user *) arg;
2283 IOCTL_Command_struct arg64;
2284 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2285 int err;
2286 u32 cp;
2287
2288 err = 0;
2289 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2290 sizeof(arg64.LUN_info));
2291 err |= copy_from_user(&arg64.Request, &arg32->Request,
2292 sizeof(arg64.Request));
2293 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2294 sizeof(arg64.error_info));
2295 err |= get_user(arg64.buf_size, &arg32->buf_size);
2296 err |= get_user(cp, &arg32->buf);
2297 arg64.buf = compat_ptr(cp);
2298 err |= copy_to_user(p, &arg64, sizeof(arg64));
2299
2300 if (err)
2301 return -EFAULT;
2302
e39eeaed 2303 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC
2304 if (err)
2305 return err;
2306 err |= copy_in_user(&arg32->error_info, &p->error_info,
2307 sizeof(arg32->error_info));
2308 if (err)
2309 return -EFAULT;
2310 return err;
2311}
2312
2313static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2314 int cmd, void *arg)
2315{
2316 BIG_IOCTL32_Command_struct __user *arg32 =
2317 (BIG_IOCTL32_Command_struct __user *) arg;
2318 BIG_IOCTL_Command_struct arg64;
2319 BIG_IOCTL_Command_struct __user *p =
2320 compat_alloc_user_space(sizeof(arg64));
2321 int err;
2322 u32 cp;
2323
2324 err = 0;
2325 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2326 sizeof(arg64.LUN_info));
2327 err |= copy_from_user(&arg64.Request, &arg32->Request,
2328 sizeof(arg64.Request));
2329 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2330 sizeof(arg64.error_info));
2331 err |= get_user(arg64.buf_size, &arg32->buf_size);
2332 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2333 err |= get_user(cp, &arg32->buf);
2334 arg64.buf = compat_ptr(cp);
2335 err |= copy_to_user(p, &arg64, sizeof(arg64));
2336
2337 if (err)
2338 return -EFAULT;
2339
e39eeaed 2340 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC
2341 if (err)
2342 return err;
2343 err |= copy_in_user(&arg32->error_info, &p->error_info,
2344 sizeof(arg32->error_info));
2345 if (err)
2346 return -EFAULT;
2347 return err;
2348}
71fe75a7
SC
2349
2350static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2351{
2352 switch (cmd) {
2353 case CCISS_GETPCIINFO:
2354 case CCISS_GETINTINFO:
2355 case CCISS_SETINTINFO:
2356 case CCISS_GETNODENAME:
2357 case CCISS_SETNODENAME:
2358 case CCISS_GETHEARTBEAT:
2359 case CCISS_GETBUSTYPES:
2360 case CCISS_GETFIRMVER:
2361 case CCISS_GETDRIVVER:
2362 case CCISS_REVALIDVOLS:
2363 case CCISS_DEREGDISK:
2364 case CCISS_REGNEWDISK:
2365 case CCISS_REGNEWD:
2366 case CCISS_RESCANDISK:
2367 case CCISS_GETLUNINFO:
2368 return hpsa_ioctl(dev, cmd, arg);
2369
2370 case CCISS_PASSTHRU32:
2371 return hpsa_ioctl32_passthru(dev, cmd, arg);
2372 case CCISS_BIG_PASSTHRU32:
2373 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2374
2375 default:
2376 return -ENOIOCTLCMD;
2377 }
2378}
edd16368
SC
2379#endif
2380
2381static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2382{
2383 struct hpsa_pci_info pciinfo;
2384
2385 if (!argp)
2386 return -EINVAL;
2387 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2388 pciinfo.bus = h->pdev->bus->number;
2389 pciinfo.dev_fn = h->pdev->devfn;
2390 pciinfo.board_id = h->board_id;
2391 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2392 return -EFAULT;
2393 return 0;
2394}
2395
2396static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2397{
2398 DriverVer_type DriverVer;
2399 unsigned char vmaj, vmin, vsubmin;
2400 int rc;
2401
2402 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2403 &vmaj, &vmin, &vsubmin);
2404 if (rc != 3) {
2405 dev_info(&h->pdev->dev, "driver version string '%s' "
2406 "unrecognized.", HPSA_DRIVER_VERSION);
2407 vmaj = 0;
2408 vmin = 0;
2409 vsubmin = 0;
2410 }
2411 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2412 if (!argp)
2413 return -EINVAL;
2414 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2415 return -EFAULT;
2416 return 0;
2417}
2418
2419static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2420{
2421 IOCTL_Command_struct iocommand;
2422 struct CommandList *c;
2423 char *buff = NULL;
2424 union u64bit temp64;
2425
2426 if (!argp)
2427 return -EINVAL;
2428 if (!capable(CAP_SYS_RAWIO))
2429 return -EPERM;
2430 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2431 return -EFAULT;
2432 if ((iocommand.buf_size < 1) &&
2433 (iocommand.Request.Type.Direction != XFER_NONE)) {
2434 return -EINVAL;
2435 }
2436 if (iocommand.buf_size > 0) {
2437 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2438 if (buff == NULL)
2439 return -EFAULT;
b03a7771
SC
2440 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2441 /* Copy the data into the buffer we created */
2442 if (copy_from_user(buff, iocommand.buf,
2443 iocommand.buf_size)) {
2444 kfree(buff);
2445 return -EFAULT;
2446 }
2447 } else {
2448 memset(buff, 0, iocommand.buf_size);
edd16368 2449 }
b03a7771 2450 }
edd16368
SC
2451 c = cmd_special_alloc(h);
2452 if (c == NULL) {
2453 kfree(buff);
2454 return -ENOMEM;
2455 }
2456 /* Fill in the command type */
2457 c->cmd_type = CMD_IOCTL_PEND;
2458 /* Fill in Command Header */
2459 c->Header.ReplyQueue = 0; /* unused in simple mode */
2460 if (iocommand.buf_size > 0) { /* buffer to fill */
2461 c->Header.SGList = 1;
2462 c->Header.SGTotal = 1;
2463 } else { /* no buffers to fill */
2464 c->Header.SGList = 0;
2465 c->Header.SGTotal = 0;
2466 }
2467 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2468 /* use the kernel address the cmd block for tag */
2469 c->Header.Tag.lower = c->busaddr;
2470
2471 /* Fill in Request block */
2472 memcpy(&c->Request, &iocommand.Request,
2473 sizeof(c->Request));
2474
2475 /* Fill in the scatter gather information */
2476 if (iocommand.buf_size > 0) {
2477 temp64.val = pci_map_single(h->pdev, buff,
2478 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2479 c->SG[0].Addr.lower = temp64.val32.lower;
2480 c->SG[0].Addr.upper = temp64.val32.upper;
2481 c->SG[0].Len = iocommand.buf_size;
2482 c->SG[0].Ext = 0; /* we are not chaining*/
2483 }
2484 hpsa_scsi_do_simple_cmd_core(h, c);
2485 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2486 check_ioctl_unit_attention(h, c);
2487
2488 /* Copy the error information out */
2489 memcpy(&iocommand.error_info, c->err_info,
2490 sizeof(iocommand.error_info));
2491 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2492 kfree(buff);
2493 cmd_special_free(h, c);
2494 return -EFAULT;
2495 }
b03a7771
SC
2496 if (iocommand.Request.Type.Direction == XFER_READ &&
2497 iocommand.buf_size > 0) {
edd16368
SC
2498 /* Copy the data out of the buffer we created */
2499 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2500 kfree(buff);
2501 cmd_special_free(h, c);
2502 return -EFAULT;
2503 }
2504 }
2505 kfree(buff);
2506 cmd_special_free(h, c);
2507 return 0;
2508}
2509
2510static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2511{
2512 BIG_IOCTL_Command_struct *ioc;
2513 struct CommandList *c;
2514 unsigned char **buff = NULL;
2515 int *buff_size = NULL;
2516 union u64bit temp64;
2517 BYTE sg_used = 0;
2518 int status = 0;
2519 int i;
01a02ffc
SC
2520 u32 left;
2521 u32 sz;
edd16368
SC
2522 BYTE __user *data_ptr;
2523
2524 if (!argp)
2525 return -EINVAL;
2526 if (!capable(CAP_SYS_RAWIO))
2527 return -EPERM;
2528 ioc = (BIG_IOCTL_Command_struct *)
2529 kmalloc(sizeof(*ioc), GFP_KERNEL);
2530 if (!ioc) {
2531 status = -ENOMEM;
2532 goto cleanup1;
2533 }
2534 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2535 status = -EFAULT;
2536 goto cleanup1;
2537 }
2538 if ((ioc->buf_size < 1) &&
2539 (ioc->Request.Type.Direction != XFER_NONE)) {
2540 status = -EINVAL;
2541 goto cleanup1;
2542 }
2543 /* Check kmalloc limits using all SGs */
2544 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2545 status = -EINVAL;
2546 goto cleanup1;
2547 }
2548 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2549 status = -EINVAL;
2550 goto cleanup1;
2551 }
2552 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2553 if (!buff) {
2554 status = -ENOMEM;
2555 goto cleanup1;
2556 }
2557 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2558 if (!buff_size) {
2559 status = -ENOMEM;
2560 goto cleanup1;
2561 }
2562 left = ioc->buf_size;
2563 data_ptr = ioc->buf;
2564 while (left) {
2565 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2566 buff_size[sg_used] = sz;
2567 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2568 if (buff[sg_used] == NULL) {
2569 status = -ENOMEM;
2570 goto cleanup1;
2571 }
2572 if (ioc->Request.Type.Direction == XFER_WRITE) {
2573 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2574 status = -ENOMEM;
2575 goto cleanup1;
2576 }
2577 } else
2578 memset(buff[sg_used], 0, sz);
2579 left -= sz;
2580 data_ptr += sz;
2581 sg_used++;
2582 }
2583 c = cmd_special_alloc(h);
2584 if (c == NULL) {
2585 status = -ENOMEM;
2586 goto cleanup1;
2587 }
2588 c->cmd_type = CMD_IOCTL_PEND;
2589 c->Header.ReplyQueue = 0;
b03a7771 2590 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC
2591 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2592 c->Header.Tag.lower = c->busaddr;
2593 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2594 if (ioc->buf_size > 0) {
2595 int i;
2596 for (i = 0; i < sg_used; i++) {
2597 temp64.val = pci_map_single(h->pdev, buff[i],
2598 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2599 c->SG[i].Addr.lower = temp64.val32.lower;
2600 c->SG[i].Addr.upper = temp64.val32.upper;
2601 c->SG[i].Len = buff_size[i];
2602 /* we are not chaining */
2603 c->SG[i].Ext = 0;
2604 }
2605 }
2606 hpsa_scsi_do_simple_cmd_core(h, c);
b03a7771
SC
2607 if (sg_used)
2608 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC
2609 check_ioctl_unit_attention(h, c);
2610 /* Copy the error information out */
2611 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2612 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2613 cmd_special_free(h, c);
2614 status = -EFAULT;
2615 goto cleanup1;
2616 }
b03a7771 2617 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC
2618 /* Copy the data out of the buffer we created */
2619 BYTE __user *ptr = ioc->buf;
2620 for (i = 0; i < sg_used; i++) {
2621 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2622 cmd_special_free(h, c);
2623 status = -EFAULT;
2624 goto cleanup1;
2625 }
2626 ptr += buff_size[i];
2627 }
2628 }
2629 cmd_special_free(h, c);
2630 status = 0;
2631cleanup1:
2632 if (buff) {
2633 for (i = 0; i < sg_used; i++)
2634 kfree(buff[i]);
2635 kfree(buff);
2636 }
2637 kfree(buff_size);
2638 kfree(ioc);
2639 return status;
2640}
2641
2642static void check_ioctl_unit_attention(struct ctlr_info *h,
2643 struct CommandList *c)
2644{
2645 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2646 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2647 (void) check_for_unit_attention(h, c);
2648}
2649/*
2650 * ioctl
2651 */
2652static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2653{
2654 struct ctlr_info *h;
2655 void __user *argp = (void __user *)arg;
2656
2657 h = sdev_to_hba(dev);
2658
2659 switch (cmd) {
2660 case CCISS_DEREGDISK:
2661 case CCISS_REGNEWDISK:
2662 case CCISS_REGNEWD:
a08a8471 2663 hpsa_scan_start(h->scsi_host);
edd16368
SC
2664 return 0;
2665 case CCISS_GETPCIINFO:
2666 return hpsa_getpciinfo_ioctl(h, argp);
2667 case CCISS_GETDRIVVER:
2668 return hpsa_getdrivver_ioctl(h, argp);
2669 case CCISS_PASSTHRU:
2670 return hpsa_passthru_ioctl(h, argp);
2671 case CCISS_BIG_PASSTHRU:
2672 return hpsa_big_passthru_ioctl(h, argp);
2673 default:
2674 return -ENOTTY;
2675 }
2676}
2677
01a02ffc
SC
2678static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
2679 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC
2680 int cmd_type)
2681{
2682 int pci_dir = XFER_NONE;
2683
2684 c->cmd_type = CMD_IOCTL_PEND;
2685 c->Header.ReplyQueue = 0;
2686 if (buff != NULL && size > 0) {
2687 c->Header.SGList = 1;
2688 c->Header.SGTotal = 1;
2689 } else {
2690 c->Header.SGList = 0;
2691 c->Header.SGTotal = 0;
2692 }
2693 c->Header.Tag.lower = c->busaddr;
2694 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2695
2696 c->Request.Type.Type = cmd_type;
2697 if (cmd_type == TYPE_CMD) {
2698 switch (cmd) {
2699 case HPSA_INQUIRY:
2700 /* are we trying to read a vital product page */
2701 if (page_code != 0) {
2702 c->Request.CDB[1] = 0x01;
2703 c->Request.CDB[2] = page_code;
2704 }
2705 c->Request.CDBLen = 6;
2706 c->Request.Type.Attribute = ATTR_SIMPLE;
2707 c->Request.Type.Direction = XFER_READ;
2708 c->Request.Timeout = 0;
2709 c->Request.CDB[0] = HPSA_INQUIRY;
2710 c->Request.CDB[4] = size & 0xFF;
2711 break;
2712 case HPSA_REPORT_LOG:
2713 case HPSA_REPORT_PHYS:
2714 /* Talking to controller so It's a physical command
2715 mode = 00 target = 0. Nothing to write.
2716 */
2717 c->Request.CDBLen = 12;
2718 c->Request.Type.Attribute = ATTR_SIMPLE;
2719 c->Request.Type.Direction = XFER_READ;
2720 c->Request.Timeout = 0;
2721 c->Request.CDB[0] = cmd;
2722 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2723 c->Request.CDB[7] = (size >> 16) & 0xFF;
2724 c->Request.CDB[8] = (size >> 8) & 0xFF;
2725 c->Request.CDB[9] = size & 0xFF;
2726 break;
edd16368
SC
2727 case HPSA_CACHE_FLUSH:
2728 c->Request.CDBLen = 12;
2729 c->Request.Type.Attribute = ATTR_SIMPLE;
2730 c->Request.Type.Direction = XFER_WRITE;
2731 c->Request.Timeout = 0;
2732 c->Request.CDB[0] = BMIC_WRITE;
2733 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2734 break;
2735 case TEST_UNIT_READY:
2736 c->Request.CDBLen = 6;
2737 c->Request.Type.Attribute = ATTR_SIMPLE;
2738 c->Request.Type.Direction = XFER_NONE;
2739 c->Request.Timeout = 0;
2740 break;
2741 default:
2742 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2743 BUG();
2744 return;
2745 }
2746 } else if (cmd_type == TYPE_MSG) {
2747 switch (cmd) {
2748
2749 case HPSA_DEVICE_RESET_MSG:
2750 c->Request.CDBLen = 16;
2751 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2752 c->Request.Type.Attribute = ATTR_SIMPLE;
2753 c->Request.Type.Direction = XFER_NONE;
2754 c->Request.Timeout = 0; /* Don't time out */
2755 c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
2756 c->Request.CDB[1] = 0x03; /* Reset target above */
2757 /* If bytes 4-7 are zero, it means reset the */
2758 /* LunID device */
2759 c->Request.CDB[4] = 0x00;
2760 c->Request.CDB[5] = 0x00;
2761 c->Request.CDB[6] = 0x00;
2762 c->Request.CDB[7] = 0x00;
2763 break;
2764
2765 default:
2766 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2767 cmd);
2768 BUG();
2769 }
2770 } else {
2771 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2772 BUG();
2773 }
2774
2775 switch (c->Request.Type.Direction) {
2776 case XFER_READ:
2777 pci_dir = PCI_DMA_FROMDEVICE;
2778 break;
2779 case XFER_WRITE:
2780 pci_dir = PCI_DMA_TODEVICE;
2781 break;
2782 case XFER_NONE:
2783 pci_dir = PCI_DMA_NONE;
2784 break;
2785 default:
2786 pci_dir = PCI_DMA_BIDIRECTIONAL;
2787 }
2788
2789 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2790
2791 return;
2792}
2793
2794/*
2795 * Map (physical) PCI mem into (virtual) kernel space
2796 */
2797static void __iomem *remap_pci_mem(ulong base, ulong size)
2798{
2799 ulong page_base = ((ulong) base) & PAGE_MASK;
2800 ulong page_offs = ((ulong) base) - page_base;
2801 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2802
2803 return page_remapped ? (page_remapped + page_offs) : NULL;
2804}
2805
2806/* Takes cmds off the submission queue and sends them to the hardware,
2807 * then puts them on the queue of cmds waiting for completion.
2808 */
2809static void start_io(struct ctlr_info *h)
2810{
2811 struct CommandList *c;
2812
2813 while (!hlist_empty(&h->reqQ)) {
2814 c = hlist_entry(h->reqQ.first, struct CommandList, list);
2815 /* can't do anything if fifo is full */
2816 if ((h->access.fifo_full(h))) {
2817 dev_warn(&h->pdev->dev, "fifo full\n");
2818 break;
2819 }
2820
2821 /* Get the first entry from the Request Q */
2822 removeQ(c);
2823 h->Qdepth--;
2824
2825 /* Tell the controller execute command */
2826 h->access.submit_command(h, c);
2827
2828 /* Put job onto the completed Q */
2829 addQ(&h->cmpQ, c);
2830 }
2831}
2832
2833static inline unsigned long get_next_completion(struct ctlr_info *h)
2834{
2835 return h->access.command_completed(h);
2836}
2837
900c5440 2838static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC
2839{
2840 return h->access.intr_pending(h);
2841}
2842
2843static inline long interrupt_not_for_us(struct ctlr_info *h)
2844{
10f66018
SC
2845 return (h->access.intr_pending(h) == 0) ||
2846 (h->interrupts_enabled == 0);
edd16368
SC
2847}
2848
01a02ffc
SC
2849static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
2850 u32 raw_tag)
edd16368
SC
2851{
2852 if (unlikely(tag_index >= h->nr_cmds)) {
2853 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2854 return 1;
2855 }
2856 return 0;
2857}
2858
01a02ffc 2859static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
edd16368
SC
2860{
2861 removeQ(c);
2862 if (likely(c->cmd_type == CMD_SCSI))
2863 complete_scsi_command(c, 0, raw_tag);
2864 else if (c->cmd_type == CMD_IOCTL_PEND)
2865 complete(c->waiting);
2866}
2867
a104c99f
SC
2868static inline u32 hpsa_tag_contains_index(u32 tag)
2869{
a104c99f
SC
2870 return tag & DIRECT_LOOKUP_BIT;
2871}
2872
2873static inline u32 hpsa_tag_to_index(u32 tag)
2874{
a104c99f
SC
2875 return tag >> DIRECT_LOOKUP_SHIFT;
2876}
2877
2878static inline u32 hpsa_tag_discard_error_bits(u32 tag)
2879{
2880#define HPSA_ERROR_BITS 0x03
2881 return tag & ~HPSA_ERROR_BITS;
2882}
2883
303932fd
DB
2884/* process completion of an indexed ("direct lookup") command */
2885static inline u32 process_indexed_cmd(struct ctlr_info *h,
2886 u32 raw_tag)
2887{
2888 u32 tag_index;
2889 struct CommandList *c;
2890
2891 tag_index = hpsa_tag_to_index(raw_tag);
2892 if (bad_tag(h, tag_index, raw_tag))
2893 return next_command(h);
2894 c = h->cmd_pool + tag_index;
2895 finish_cmd(c, raw_tag);
2896 return next_command(h);
2897}
2898
2899/* process completion of a non-indexed command */
2900static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
2901 u32 raw_tag)
2902{
2903 u32 tag;
2904 struct CommandList *c = NULL;
2905 struct hlist_node *tmp;
2906
2907 tag = hpsa_tag_discard_error_bits(raw_tag);
2908 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
2909 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
2910 finish_cmd(c, raw_tag);
2911 return next_command(h);
2912 }
2913 }
2914 bad_tag(h, h->nr_cmds + 1, raw_tag);
2915 return next_command(h);
2916}
2917
10f66018 2918static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
edd16368
SC
2919{
2920 struct ctlr_info *h = dev_id;
edd16368 2921 unsigned long flags;
303932fd 2922 u32 raw_tag;
edd16368
SC
2923
2924 if (interrupt_not_for_us(h))
2925 return IRQ_NONE;
10f66018
SC
2926 spin_lock_irqsave(&h->lock, flags);
2927 while (interrupt_pending(h)) {
2928 raw_tag = get_next_completion(h);
2929 while (raw_tag != FIFO_EMPTY) {
2930 if (hpsa_tag_contains_index(raw_tag))
2931 raw_tag = process_indexed_cmd(h, raw_tag);
2932 else
2933 raw_tag = process_nonindexed_cmd(h, raw_tag);
2934 }
2935 }
2936 spin_unlock_irqrestore(&h->lock, flags);
2937 return IRQ_HANDLED;
2938}
2939
2940static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
2941{
2942 struct ctlr_info *h = dev_id;
2943 unsigned long flags;
2944 u32 raw_tag;
2945
edd16368 2946 spin_lock_irqsave(&h->lock, flags);
303932fd
DB
2947 raw_tag = get_next_completion(h);
2948 while (raw_tag != FIFO_EMPTY) {
2949 if (hpsa_tag_contains_index(raw_tag))
2950 raw_tag = process_indexed_cmd(h, raw_tag);
2951 else
2952 raw_tag = process_nonindexed_cmd(h, raw_tag);
edd16368
SC
2953 }
2954 spin_unlock_irqrestore(&h->lock, flags);
2955 return IRQ_HANDLED;
2956}
2957
f0edafc6 2958/* Send a message CDB to the firmware. */
edd16368
SC
2959static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
2960 unsigned char type)
2961{
2962 struct Command {
2963 struct CommandListHeader CommandHeader;
2964 struct RequestBlock Request;
2965 struct ErrDescriptor ErrorDescriptor;
2966 };
2967 struct Command *cmd;
2968 static const size_t cmd_sz = sizeof(*cmd) +
2969 sizeof(cmd->ErrorDescriptor);
2970 dma_addr_t paddr64;
2971 uint32_t paddr32, tag;
2972 void __iomem *vaddr;
2973 int i, err;
2974
2975 vaddr = pci_ioremap_bar(pdev, 0);
2976 if (vaddr == NULL)
2977 return -ENOMEM;
2978
2979 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
2980 * CCISS commands, so they must be allocated from the lower 4GiB of
2981 * memory.
2982 */
2983 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2984 if (err) {
2985 iounmap(vaddr);
2986 return -ENOMEM;
2987 }
2988
2989 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
2990 if (cmd == NULL) {
2991 iounmap(vaddr);
2992 return -ENOMEM;
2993 }
2994
2995 /* This must fit, because of the 32-bit consistent DMA mask. Also,
2996 * although there's no guarantee, we assume that the address is at
2997 * least 4-byte aligned (most likely, it's page-aligned).
2998 */
2999 paddr32 = paddr64;
3000
3001 cmd->CommandHeader.ReplyQueue = 0;
3002 cmd->CommandHeader.SGList = 0;
3003 cmd->CommandHeader.SGTotal = 0;
3004 cmd->CommandHeader.Tag.lower = paddr32;
3005 cmd->CommandHeader.Tag.upper = 0;
3006 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3007
3008 cmd->Request.CDBLen = 16;
3009 cmd->Request.Type.Type = TYPE_MSG;
3010 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3011 cmd->Request.Type.Direction = XFER_NONE;
3012 cmd->Request.Timeout = 0; /* Don't time out */
3013 cmd->Request.CDB[0] = opcode;
3014 cmd->Request.CDB[1] = type;
3015 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3016 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3017 cmd->ErrorDescriptor.Addr.upper = 0;
3018 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3019
3020 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3021
3022 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3023 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a104c99f 3024 if (hpsa_tag_discard_error_bits(tag) == paddr32)
edd16368
SC
3025 break;
3026 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3027 }
3028
3029 iounmap(vaddr);
3030
3031 /* we leak the DMA buffer here ... no choice since the controller could
3032 * still complete the command.
3033 */
3034 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3035 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3036 opcode, type);
3037 return -ETIMEDOUT;
3038 }
3039
3040 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3041
3042 if (tag & HPSA_ERROR_BIT) {
3043 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3044 opcode, type);
3045 return -EIO;
3046 }
3047
3048 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3049 opcode, type);
3050 return 0;
3051}
3052
3053#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
3054#define hpsa_noop(p) hpsa_message(p, 3, 0)
3055
1df8552a
SC
3056static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3057 void * __iomem vaddr, bool use_doorbell)
3058{
3059 u16 pmcsr;
3060 int pos;
3061
3062 if (use_doorbell) {
3063 /* For everything after the P600, the PCI power state method
3064 * of resetting the controller doesn't work, so we have this
3065 * other way using the doorbell register.
3066 */
3067 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3068 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
3069 msleep(1000);
3070 } else { /* Try to do it the PCI power state way */
3071
3072 /* Quoting from the Open CISS Specification: "The Power
3073 * Management Control/Status Register (CSR) controls the power
3074 * state of the device. The normal operating state is D0,
3075 * CSR=00h. The software off state is D3, CSR=03h. To reset
3076 * the controller, place the interface device in D3 then to D0,
3077 * this causes a secondary PCI reset which will reset the
3078 * controller." */
3079
3080 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3081 if (pos == 0) {
3082 dev_err(&pdev->dev,
3083 "hpsa_reset_controller: "
3084 "PCI PM not supported\n");
3085 return -ENODEV;
3086 }
3087 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3088 /* enter the D3hot power management state */
3089 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3090 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3091 pmcsr |= PCI_D3hot;
3092 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3093
3094 msleep(500);
3095
3096 /* enter the D0 power management state */
3097 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3098 pmcsr |= PCI_D0;
3099 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3100
3101 msleep(500);
3102 }
3103 return 0;
3104}
3105
edd16368 3106/* This does a hard reset of the controller using PCI power management
1df8552a 3107 * states or the using the doorbell register.
edd16368 3108 */
1df8552a 3109static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3110{
1df8552a
SC
3111 u64 cfg_offset;
3112 u32 cfg_base_addr;
3113 u64 cfg_base_addr_index;
3114 void __iomem *vaddr;
3115 unsigned long paddr;
3116 u32 misc_fw_support, active_transport;
270d05de 3117 int rc;
1df8552a
SC
3118 struct CfgTable __iomem *cfgtable;
3119 bool use_doorbell;
18867659 3120 u32 board_id;
270d05de 3121 u16 command_register;
edd16368 3122
1df8552a
SC
3123 /* For controllers as old as the P600, this is very nearly
3124 * the same thing as
edd16368
SC
3125 *
3126 * pci_save_state(pci_dev);
3127 * pci_set_power_state(pci_dev, PCI_D3hot);
3128 * pci_set_power_state(pci_dev, PCI_D0);
3129 * pci_restore_state(pci_dev);
3130 *
1df8552a
SC
3131 * For controllers newer than the P600, the pci power state
3132 * method of resetting doesn't work so we have another way
3133 * using the doorbell register.
edd16368 3134 */
18867659
SC
3135
3136 /* Exclude 640x boards. These are two pci devices in one slot
3137 * which share a battery backed cache module. One controls the
3138 * cache, the other accesses the cache through the one that controls
3139 * it. If we reset the one controlling the cache, the other will
3140 * likely not be happy. Just forbid resetting this conjoined mess.
3141 * The 640x isn't really supported by hpsa anyway.
3142 */
25c1e56a
SC
3143 rc = hpsa_lookup_board_id(pdev, &board_id);
3144 if (rc < 0) {
3145 dev_warn(&pdev->dev, "Not resetting device.\n");
3146 return -ENODEV;
3147 }
18867659
SC
3148 if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
3149 return -ENOTSUPP;
3150
270d05de
SC
3151 /* Save the PCI command register */
3152 pci_read_config_word(pdev, 4, &command_register);
3153 /* Turn the board off. This is so that later pci_restore_state()
3154 * won't turn the board on before the rest of config space is ready.
3155 */
3156 pci_disable_device(pdev);
3157 pci_save_state(pdev);
edd16368 3158
1df8552a
SC
3159 /* find the first memory BAR, so we can find the cfg table */
3160 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3161 if (rc)
3162 return rc;
3163 vaddr = remap_pci_mem(paddr, 0x250);
3164 if (!vaddr)
3165 return -ENOMEM;
edd16368 3166
1df8552a
SC
3167 /* find cfgtable in order to check if reset via doorbell is supported */
3168 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3169 &cfg_base_addr_index, &cfg_offset);
3170 if (rc)
3171 goto unmap_vaddr;
3172 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3173 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3174 if (!cfgtable) {
3175 rc = -ENOMEM;
3176 goto unmap_vaddr;
3177 }
edd16368 3178
1df8552a
SC
3179 /* If reset via doorbell register is supported, use that. */
3180 misc_fw_support = readl(&cfgtable->misc_fw_support);
3181 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
edd16368 3182
1df8552a
SC
3183 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3184 if (rc)
3185 goto unmap_cfgtable;
edd16368 3186
270d05de
SC
3187 pci_restore_state(pdev);
3188 rc = pci_enable_device(pdev);
3189 if (rc) {
3190 dev_warn(&pdev->dev, "failed to enable device.\n");
3191 goto unmap_cfgtable;
edd16368 3192 }
270d05de 3193 pci_write_config_word(pdev, 4, command_register);
edd16368 3194
1df8552a
SC
3195 /* Some devices (notably the HP Smart Array 5i Controller)
3196 need a little pause here */
3197 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3198
fe5389c8
SC
3199 /* Wait for board to become not ready, then ready. */
3200 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
3201 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3202 if (rc)
3203 dev_warn(&pdev->dev,
3204 "failed waiting for board to become not ready\n");
3205 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3206 if (rc) {
3207 dev_warn(&pdev->dev,
3208 "failed waiting for board to become ready\n");
3209 goto unmap_cfgtable;
3210 }
3211 dev_info(&pdev->dev, "board ready.\n");
3212
1df8552a
SC
3213 /* Controller should be in simple mode at this point. If it's not,
3214 * It means we're on one of those controllers which doesn't support
3215 * the doorbell reset method and on which the PCI power management reset
3216 * method doesn't work (P800, for example.)
3217 * In those cases, pretend the reset worked and hope for the best.
3218 */
3219 active_transport = readl(&cfgtable->TransportActive);
3220 if (active_transport & PERFORMANT_MODE) {
3221 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
3222 " proceeding anyway.\n");
3223 rc = -ENOTSUPP;
3224 }
3225
3226unmap_cfgtable:
3227 iounmap(cfgtable);
3228
3229unmap_vaddr:
3230 iounmap(vaddr);
3231 return rc;
edd16368
SC
3232}
3233
3234/*
3235 * We cannot read the structure directly, for portability we must use
3236 * the io functions.
3237 * This is for debug only.
3238 */
edd16368
SC
3239static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3240{
58f8665c 3241#ifdef HPSA_DEBUG
edd16368
SC
3242 int i;
3243 char temp_name[17];
3244
3245 dev_info(dev, "Controller Configuration information\n");
3246 dev_info(dev, "------------------------------------\n");
3247 for (i = 0; i < 4; i++)
3248 temp_name[i] = readb(&(tb->Signature[i]));
3249 temp_name[4] = '\0';
3250 dev_info(dev, " Signature = %s\n", temp_name);
3251 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3252 dev_info(dev, " Transport methods supported = 0x%x\n",
3253 readl(&(tb->TransportSupport)));
3254 dev_info(dev, " Transport methods active = 0x%x\n",
3255 readl(&(tb->TransportActive)));
3256 dev_info(dev, " Requested transport Method = 0x%x\n",
3257 readl(&(tb->HostWrite.TransportRequest)));
3258 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3259 readl(&(tb->HostWrite.CoalIntDelay)));
3260 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3261 readl(&(tb->HostWrite.CoalIntCount)));
3262 dev_info(dev, " Max outstanding commands = 0x%d\n",
3263 readl(&(tb->CmdsOutMax)));
3264 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3265 for (i = 0; i < 16; i++)
3266 temp_name[i] = readb(&(tb->ServerName[i]));
3267 temp_name[16] = '\0';
3268 dev_info(dev, " Server Name = %s\n", temp_name);
3269 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3270 readl(&(tb->HeartBeat)));
edd16368 3271#endif /* HPSA_DEBUG */
58f8665c 3272}
edd16368
SC
3273
3274static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3275{
3276 int i, offset, mem_type, bar_type;
3277
3278 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3279 return 0;
3280 offset = 0;
3281 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3282 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3283 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3284 offset += 4;
3285 else {
3286 mem_type = pci_resource_flags(pdev, i) &
3287 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3288 switch (mem_type) {
3289 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3290 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3291 offset += 4; /* 32 bit */
3292 break;
3293 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3294 offset += 8;
3295 break;
3296 default: /* reserved in PCI 2.2 */
3297 dev_warn(&pdev->dev,
3298 "base address is invalid\n");
3299 return -1;
3300 break;
3301 }
3302 }
3303 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3304 return i + 1;
3305 }
3306 return -1;
3307}
3308
3309/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3310 * controllers that are capable. If not, we use IO-APIC mode.
3311 */
3312
6b3f4c52 3313static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC
3314{
3315#ifdef CONFIG_PCI_MSI
3316 int err;
3317 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3318 {0, 2}, {0, 3}
3319 };
3320
3321 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC
3322 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3323 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 3324 goto default_int_mode;
55c06c71
SC
3325 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3326 dev_info(&h->pdev->dev, "MSIX\n");
3327 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
edd16368
SC
3328 if (!err) {
3329 h->intr[0] = hpsa_msix_entries[0].vector;
3330 h->intr[1] = hpsa_msix_entries[1].vector;
3331 h->intr[2] = hpsa_msix_entries[2].vector;
3332 h->intr[3] = hpsa_msix_entries[3].vector;
3333 h->msix_vector = 1;
3334 return;
3335 }
3336 if (err > 0) {
55c06c71 3337 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC
3338 "available\n", err);
3339 goto default_int_mode;
3340 } else {
55c06c71 3341 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC
3342 err);
3343 goto default_int_mode;
3344 }
3345 }
55c06c71
SC
3346 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3347 dev_info(&h->pdev->dev, "MSI\n");
3348 if (!pci_enable_msi(h->pdev))
edd16368
SC
3349 h->msi_vector = 1;
3350 else
55c06c71 3351 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC
3352 }
3353default_int_mode:
3354#endif /* CONFIG_PCI_MSI */
3355 /* if we get here we're going to use the default interrupt mode */
55c06c71 3356 h->intr[PERF_MODE_INT] = h->pdev->irq;
edd16368
SC
3357}
3358
e5c880d1
SC
3359static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
3360{
3361 int i;
3362 u32 subsystem_vendor_id, subsystem_device_id;
3363
3364 subsystem_vendor_id = pdev->subsystem_vendor;
3365 subsystem_device_id = pdev->subsystem_device;
3366 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3367 subsystem_vendor_id;
3368
3369 for (i = 0; i < ARRAY_SIZE(products); i++)
3370 if (*board_id == products[i].board_id)
3371 return i;
3372
6798cc0a
SC
3373 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
3374 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
3375 !hpsa_allow_any) {
e5c880d1
SC
3376 dev_warn(&pdev->dev, "unrecognized board ID: "
3377 "0x%08x, ignoring.\n", *board_id);
3378 return -ENODEV;
3379 }
3380 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
3381}
3382
85bdbabb
SC
3383static inline bool hpsa_board_disabled(struct pci_dev *pdev)
3384{
3385 u16 command;
3386
3387 (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
3388 return ((command & PCI_COMMAND_MEMORY) == 0);
3389}
3390
12d2cd47 3391static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
3a7774ce
SC
3392 unsigned long *memory_bar)
3393{
3394 int i;
3395
3396 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 3397 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 3398 /* addressing mode bits already removed */
12d2cd47
SC
3399 *memory_bar = pci_resource_start(pdev, i);
3400 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC
3401 *memory_bar);
3402 return 0;
3403 }
12d2cd47 3404 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC
3405 return -ENODEV;
3406}
3407
fe5389c8
SC
3408static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
3409 void __iomem *vaddr, int wait_for_ready)
2c4c8c8b 3410{
fe5389c8 3411 int i, iterations;
2c4c8c8b 3412 u32 scratchpad;
fe5389c8
SC
3413 if (wait_for_ready)
3414 iterations = HPSA_BOARD_READY_ITERATIONS;
3415 else
3416 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 3417
fe5389c8
SC
3418 for (i = 0; i < iterations; i++) {
3419 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3420 if (wait_for_ready) {
3421 if (scratchpad == HPSA_FIRMWARE_READY)
3422 return 0;
3423 } else {
3424 if (scratchpad != HPSA_FIRMWARE_READY)
3425 return 0;
3426 }
2c4c8c8b
SC
3427 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3428 }
fe5389c8 3429 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC
3430 return -ENODEV;
3431}
3432
a51fd47f
SC
3433static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
3434 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
3435 u64 *cfg_offset)
3436{
3437 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
3438 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
3439 *cfg_base_addr &= (u32) 0x0000ffff;
3440 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
3441 if (*cfg_base_addr_index == -1) {
3442 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3443 return -ENODEV;
3444 }
3445 return 0;
3446}
3447
77c4495c 3448static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 3449{
01a02ffc
SC
3450 u64 cfg_offset;
3451 u32 cfg_base_addr;
3452 u64 cfg_base_addr_index;
303932fd 3453 u32 trans_offset;
a51fd47f 3454 int rc;
77c4495c 3455
a51fd47f
SC
3456 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
3457 &cfg_base_addr_index, &cfg_offset);
3458 if (rc)
3459 return rc;
77c4495c 3460 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 3461 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC
3462 if (!h->cfgtable)
3463 return -ENOMEM;
3464 /* Find performant mode table. */
a51fd47f 3465 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC
3466 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
3467 cfg_base_addr_index)+cfg_offset+trans_offset,
3468 sizeof(*h->transtable));
3469 if (!h->transtable)
3470 return -ENOMEM;
3471 return 0;
3472}
3473
cba3d38b
SC
3474static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
3475{
3476 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC
3477
3478 /* Limit commands in memory limited kdump scenario. */
3479 if (reset_devices && h->max_commands > 32)
3480 h->max_commands = 32;
3481
cba3d38b
SC
3482 if (h->max_commands < 16) {
3483 dev_warn(&h->pdev->dev, "Controller reports "
3484 "max supported commands of %d, an obvious lie. "
3485 "Using 16. Ensure that firmware is up to date.\n",
3486 h->max_commands);
3487 h->max_commands = 16;
3488 }
3489}
3490
b93d7536
SC
3491/* Interrogate the hardware for some limits:
3492 * max commands, max SG elements without chaining, and with chaining,
3493 * SG chain block size, etc.
3494 */
3495static void __devinit hpsa_find_board_params(struct ctlr_info *h)
3496{
cba3d38b 3497 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC
3498 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
3499 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
3500 /*
3501 * Limit in-command s/g elements to 32 save dma'able memory.
3502 * Howvever spec says if 0, use 31
3503 */
3504 h->max_cmd_sg_entries = 31;
3505 if (h->maxsgentries > 512) {
3506 h->max_cmd_sg_entries = 32;
3507 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
3508 h->maxsgentries--; /* save one for chain pointer */
3509 } else {
3510 h->maxsgentries = 31; /* default to traditional values */
3511 h->chainsize = 0;
3512 }
3513}
3514
76c46e49
SC
3515static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
3516{
3517 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3518 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3519 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3520 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3521 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
3522 return false;
3523 }
3524 return true;
3525}
3526
f7c39101
SC
3527/* Need to enable prefetch in the SCSI core for 6400 in x86 */
3528static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
3529{
3530#ifdef CONFIG_X86
3531 u32 prefetch;
3532
3533 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3534 prefetch |= 0x100;
3535 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3536#endif
3537}
3538
3d0eab67
SC
3539/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
3540 * in a prefetch beyond physical memory.
3541 */
3542static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
3543{
3544 u32 dma_prefetch;
3545
3546 if (h->board_id != 0x3225103C)
3547 return;
3548 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3549 dma_prefetch |= 0x8000;
3550 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3551}
3552
3f4336f3 3553static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC
3554{
3555 int i;
eb6b2ae9
SC
3556
3557 /* under certain very rare conditions, this can take awhile.
3558 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3559 * as we enter this code.)
3560 */
3561 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3562 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3563 break;
3564 /* delay and try again */
3565 msleep(10);
3566 }
3f4336f3
SC
3567}
3568
3569static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
3570{
3571 u32 trans_support;
3572
3573 trans_support = readl(&(h->cfgtable->TransportSupport));
3574 if (!(trans_support & SIMPLE_MODE))
3575 return -ENOTSUPP;
3576
3577 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3578 /* Update the field, and then ring the doorbell */
3579 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3580 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3581 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 3582 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC
3583 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3584 dev_warn(&h->pdev->dev,
3585 "unable to get board into simple mode\n");
3586 return -ENODEV;
3587 }
3588 return 0;
3589}
3590
77c4495c
SC
3591static int __devinit hpsa_pci_init(struct ctlr_info *h)
3592{
eb6b2ae9 3593 int prod_index, err;
edd16368 3594
e5c880d1
SC
3595 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
3596 if (prod_index < 0)
3597 return -ENODEV;
3598 h->product_name = products[prod_index].product_name;
3599 h->access = *(products[prod_index].access);
edd16368 3600
85bdbabb 3601 if (hpsa_board_disabled(h->pdev)) {
55c06c71 3602 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
edd16368
SC
3603 return -ENODEV;
3604 }
55c06c71 3605 err = pci_enable_device(h->pdev);
edd16368 3606 if (err) {
55c06c71 3607 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC
3608 return err;
3609 }
3610
55c06c71 3611 err = pci_request_regions(h->pdev, "hpsa");
edd16368 3612 if (err) {
55c06c71
SC
3613 dev_err(&h->pdev->dev,
3614 "cannot obtain PCI resources, aborting\n");
edd16368
SC
3615 return err;
3616 }
6b3f4c52 3617 hpsa_interrupt_mode(h);
12d2cd47 3618 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 3619 if (err)
edd16368 3620 goto err_out_free_res;
edd16368 3621 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC
3622 if (!h->vaddr) {
3623 err = -ENOMEM;
3624 goto err_out_free_res;
3625 }
fe5389c8 3626 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 3627 if (err)
edd16368 3628 goto err_out_free_res;
77c4495c
SC
3629 err = hpsa_find_cfgtables(h);
3630 if (err)
edd16368 3631 goto err_out_free_res;
b93d7536 3632 hpsa_find_board_params(h);
edd16368 3633
76c46e49 3634 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC
3635 err = -ENODEV;
3636 goto err_out_free_res;
3637 }
f7c39101 3638 hpsa_enable_scsi_prefetch(h);
3d0eab67 3639 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC
3640 err = hpsa_enter_simple_mode(h);
3641 if (err)
edd16368 3642 goto err_out_free_res;
edd16368
SC
3643 return 0;
3644
3645err_out_free_res:
204892e9
SC
3646 if (h->transtable)
3647 iounmap(h->transtable);
3648 if (h->cfgtable)
3649 iounmap(h->cfgtable);
3650 if (h->vaddr)
3651 iounmap(h->vaddr);
edd16368
SC
3652 /*
3653 * Deliberately omit pci_disable_device(): it does something nasty to
3654 * Smart Array controllers that pci_enable_device does not undo
3655 */
55c06c71 3656 pci_release_regions(h->pdev);
edd16368
SC
3657 return err;
3658}
3659
339b2b14
SC
3660static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
3661{
3662 int rc;
3663
3664#define HBA_INQUIRY_BYTE_COUNT 64
3665 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
3666 if (!h->hba_inquiry_data)
3667 return;
3668 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
3669 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
3670 if (rc != 0) {
3671 kfree(h->hba_inquiry_data);
3672 h->hba_inquiry_data = NULL;
3673 }
3674}
3675
4c2a8c40
SC
3676static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
3677{
1df8552a 3678 int rc, i;
4c2a8c40
SC
3679
3680 if (!reset_devices)
3681 return 0;
3682
1df8552a
SC
3683 /* Reset the controller with a PCI power-cycle or via doorbell */
3684 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 3685
1df8552a
SC
3686 /* -ENOTSUPP here means we cannot reset the controller
3687 * but it's already (and still) up and running in
18867659
SC
3688 * "performant mode". Or, it might be 640x, which can't reset
3689 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC
3690 */
3691 if (rc == -ENOTSUPP)
3692 return 0; /* just try to do the kdump anyhow. */
3693 if (rc)
3694 return -ENODEV;
4c2a8c40
SC
3695
3696 /* Now try to get the controller to respond to a no-op */
3697 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3698 if (hpsa_noop(pdev) == 0)
3699 break;
3700 else
3701 dev_warn(&pdev->dev, "no-op failed%s\n",
3702 (i < 11 ? "; re-trying" : ""));
3703 }
3704 return 0;
3705}
3706
edd16368
SC
3707static int __devinit hpsa_init_one(struct pci_dev *pdev,
3708 const struct pci_device_id *ent)
3709{
4c2a8c40 3710 int dac, rc;
edd16368
SC
3711 struct ctlr_info *h;
3712
3713 if (number_of_controllers == 0)
3714 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 3715
4c2a8c40
SC
3716 rc = hpsa_init_reset_devices(pdev);
3717 if (rc)
3718 return rc;
edd16368 3719
303932fd
DB
3720 /* Command structures must be aligned on a 32-byte boundary because
3721 * the 5 lower bits of the address are used by the hardware. and by
3722 * the driver. See comments in hpsa.h for more info.
3723 */
3724#define COMMANDLIST_ALIGNMENT 32
3725 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC
3726 h = kzalloc(sizeof(*h), GFP_KERNEL);
3727 if (!h)
ecd9aad4 3728 return -ENOMEM;
edd16368 3729
55c06c71 3730 h->pdev = pdev;
edd16368
SC
3731 h->busy_initializing = 1;
3732 INIT_HLIST_HEAD(&h->cmpQ);
3733 INIT_HLIST_HEAD(&h->reqQ);
55c06c71 3734 rc = hpsa_pci_init(h);
ecd9aad4 3735 if (rc != 0)
edd16368
SC
3736 goto clean1;
3737
3738 sprintf(h->devname, "hpsa%d", number_of_controllers);
3739 h->ctlr = number_of_controllers;
3740 number_of_controllers++;
edd16368
SC
3741
3742 /* configure PCI DMA stuff */
ecd9aad4
SC
3743 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3744 if (rc == 0) {
edd16368 3745 dac = 1;
ecd9aad4
SC
3746 } else {
3747 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3748 if (rc == 0) {
3749 dac = 0;
3750 } else {
3751 dev_err(&pdev->dev, "no suitable DMA available\n");
3752 goto clean1;
3753 }
edd16368
SC
3754 }
3755
3756 /* make sure the board interrupts are off */
3757 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018
SC
3758
3759 if (h->msix_vector || h->msi_vector)
3760 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
3761 IRQF_DISABLED, h->devname, h);
3762 else
3763 rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
3764 IRQF_DISABLED, h->devname, h);
ecd9aad4 3765 if (rc) {
edd16368 3766 dev_err(&pdev->dev, "unable to get irq %d for %s\n",
303932fd 3767 h->intr[PERF_MODE_INT], h->devname);
edd16368
SC
3768 goto clean2;
3769 }
3770
303932fd
DB
3771 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
3772 h->devname, pdev->device,
3773 h->intr[PERF_MODE_INT], dac ? "" : " not");
edd16368
SC
3774
3775 h->cmd_pool_bits =
3776 kmalloc(((h->nr_cmds + BITS_PER_LONG -
3777 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
3778 h->cmd_pool = pci_alloc_consistent(h->pdev,
3779 h->nr_cmds * sizeof(*h->cmd_pool),
3780 &(h->cmd_pool_dhandle));
3781 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3782 h->nr_cmds * sizeof(*h->errinfo_pool),
3783 &(h->errinfo_pool_dhandle));
3784 if ((h->cmd_pool_bits == NULL)
3785 || (h->cmd_pool == NULL)
3786 || (h->errinfo_pool == NULL)) {
3787 dev_err(&pdev->dev, "out of memory");
ecd9aad4 3788 rc = -ENOMEM;
edd16368
SC
3789 goto clean4;
3790 }
33a2ffce
SC
3791 if (hpsa_allocate_sg_chain_blocks(h))
3792 goto clean4;
edd16368 3793 spin_lock_init(&h->lock);
a08a8471
SC
3794 spin_lock_init(&h->scan_lock);
3795 init_waitqueue_head(&h->scan_wait_queue);
3796 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC
3797
3798 pci_set_drvdata(pdev, h);
3799 memset(h->cmd_pool_bits, 0,
3800 ((h->nr_cmds + BITS_PER_LONG -
3801 1) / BITS_PER_LONG) * sizeof(unsigned long));
3802
3803 hpsa_scsi_setup(h);
3804
3805 /* Turn the interrupts on so we can service requests */
3806 h->access.set_intr_mask(h, HPSA_INTR_ON);
3807
303932fd 3808 hpsa_put_ctlr_into_performant_mode(h);
339b2b14 3809 hpsa_hba_inquiry(h);
edd16368
SC
3810 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
3811 h->busy_initializing = 0;
3812 return 1;
3813
3814clean4:
33a2ffce 3815 hpsa_free_sg_chain_blocks(h);
edd16368
SC
3816 kfree(h->cmd_pool_bits);
3817 if (h->cmd_pool)
3818 pci_free_consistent(h->pdev,
3819 h->nr_cmds * sizeof(struct CommandList),
3820 h->cmd_pool, h->cmd_pool_dhandle);
3821 if (h->errinfo_pool)
3822 pci_free_consistent(h->pdev,
3823 h->nr_cmds * sizeof(struct ErrorInfo),
3824 h->errinfo_pool,
3825 h->errinfo_pool_dhandle);
303932fd 3826 free_irq(h->intr[PERF_MODE_INT], h);
edd16368
SC
3827clean2:
3828clean1:
3829 h->busy_initializing = 0;
3830 kfree(h);
ecd9aad4 3831 return rc;
edd16368
SC
3832}
3833
3834static void hpsa_flush_cache(struct ctlr_info *h)
3835{
3836 char *flush_buf;
3837 struct CommandList *c;
3838
3839 flush_buf = kzalloc(4, GFP_KERNEL);
3840 if (!flush_buf)
3841 return;
3842
3843 c = cmd_special_alloc(h);
3844 if (!c) {
3845 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
3846 goto out_of_memory;
3847 }
3848 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
3849 RAID_CTLR_LUNID, TYPE_CMD);
3850 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
3851 if (c->err_info->CommandStatus != 0)
3852 dev_warn(&h->pdev->dev,
3853 "error flushing cache on controller\n");
3854 cmd_special_free(h, c);
3855out_of_memory:
3856 kfree(flush_buf);
3857}
3858
3859static void hpsa_shutdown(struct pci_dev *pdev)
3860{
3861 struct ctlr_info *h;
3862
3863 h = pci_get_drvdata(pdev);
3864 /* Turn board interrupts off and send the flush cache command
3865 * sendcmd will turn off interrupt, and send the flush...
3866 * To write all data in the battery backed cache to disks
3867 */
3868 hpsa_flush_cache(h);
3869 h->access.set_intr_mask(h, HPSA_INTR_OFF);
303932fd 3870 free_irq(h->intr[PERF_MODE_INT], h);
edd16368
SC
3871#ifdef CONFIG_PCI_MSI
3872 if (h->msix_vector)
3873 pci_disable_msix(h->pdev);
3874 else if (h->msi_vector)
3875 pci_disable_msi(h->pdev);
3876#endif /* CONFIG_PCI_MSI */
3877}
3878
3879static void __devexit hpsa_remove_one(struct pci_dev *pdev)
3880{
3881 struct ctlr_info *h;
3882
3883 if (pci_get_drvdata(pdev) == NULL) {
3884 dev_err(&pdev->dev, "unable to remove device \n");
3885 return;
3886 }
3887 h = pci_get_drvdata(pdev);
edd16368
SC
3888 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
3889 hpsa_shutdown(pdev);
3890 iounmap(h->vaddr);
204892e9
SC
3891 iounmap(h->transtable);
3892 iounmap(h->cfgtable);
33a2ffce 3893 hpsa_free_sg_chain_blocks(h);
edd16368
SC
3894 pci_free_consistent(h->pdev,
3895 h->nr_cmds * sizeof(struct CommandList),
3896 h->cmd_pool, h->cmd_pool_dhandle);
3897 pci_free_consistent(h->pdev,
3898 h->nr_cmds * sizeof(struct ErrorInfo),
3899 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB
3900 pci_free_consistent(h->pdev, h->reply_pool_size,
3901 h->reply_pool, h->reply_pool_dhandle);
edd16368 3902 kfree(h->cmd_pool_bits);
303932fd 3903 kfree(h->blockFetchTable);
339b2b14 3904 kfree(h->hba_inquiry_data);
edd16368
SC
3905 /*
3906 * Deliberately omit pci_disable_device(): it does something nasty to
3907 * Smart Array controllers that pci_enable_device does not undo
3908 */
3909 pci_release_regions(pdev);
3910 pci_set_drvdata(pdev, NULL);
edd16368
SC
3911 kfree(h);
3912}
3913
3914static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
3915 __attribute__((unused)) pm_message_t state)
3916{
3917 return -ENOSYS;
3918}
3919
3920static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
3921{
3922 return -ENOSYS;
3923}
3924
3925static struct pci_driver hpsa_pci_driver = {
3926 .name = "hpsa",
3927 .probe = hpsa_init_one,
3928 .remove = __devexit_p(hpsa_remove_one),
3929 .id_table = hpsa_pci_device_id, /* id_table */
3930 .shutdown = hpsa_shutdown,
3931 .suspend = hpsa_suspend,
3932 .resume = hpsa_resume,
3933};
3934
303932fd
DB
3935/* Fill in bucket_map[], given nsgs (the max number of
3936 * scatter gather elements supported) and bucket[],
3937 * which is an array of 8 integers. The bucket[] array
3938 * contains 8 different DMA transfer sizes (in 16
3939 * byte increments) which the controller uses to fetch
3940 * commands. This function fills in bucket_map[], which
3941 * maps a given number of scatter gather elements to one of
3942 * the 8 DMA transfer sizes. The point of it is to allow the
3943 * controller to only do as much DMA as needed to fetch the
3944 * command, with the DMA transfer size encoded in the lower
3945 * bits of the command address.
3946 */
3947static void calc_bucket_map(int bucket[], int num_buckets,
3948 int nsgs, int *bucket_map)
3949{
3950 int i, j, b, size;
3951
3952 /* even a command with 0 SGs requires 4 blocks */
3953#define MINIMUM_TRANSFER_BLOCKS 4
3954#define NUM_BUCKETS 8
3955 /* Note, bucket_map must have nsgs+1 entries. */
3956 for (i = 0; i <= nsgs; i++) {
3957 /* Compute size of a command with i SG entries */
3958 size = i + MINIMUM_TRANSFER_BLOCKS;
3959 b = num_buckets; /* Assume the biggest bucket */
3960 /* Find the bucket that is just big enough */
3961 for (j = 0; j < 8; j++) {
3962 if (bucket[j] >= size) {
3963 b = j;
3964 break;
3965 }
3966 }
3967 /* for a command with i SG entries, use bucket b. */
3968 bucket_map[i] = b;
3969 }
3970}
3971
6c311b57 3972static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
303932fd 3973{
6c311b57
SC
3974 int i;
3975 unsigned long register_value;
def342bd
SC
3976
3977 /* This is a bit complicated. There are 8 registers on
3978 * the controller which we write to to tell it 8 different
3979 * sizes of commands which there may be. It's a way of
3980 * reducing the DMA done to fetch each command. Encoded into
3981 * each command's tag are 3 bits which communicate to the controller
3982 * which of the eight sizes that command fits within. The size of
3983 * each command depends on how many scatter gather entries there are.
3984 * Each SG entry requires 16 bytes. The eight registers are programmed
3985 * with the number of 16-byte blocks a command of that size requires.
3986 * The smallest command possible requires 5 such 16 byte blocks.
3987 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3988 * blocks. Note, this only extends to the SG entries contained
3989 * within the command block, and does not extend to chained blocks
3990 * of SG elements. bft[] contains the eight values we write to
3991 * the registers. They are not evenly distributed, but have more
3992 * sizes for small commands, and fewer sizes for larger commands.
3993 */
3994 int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3995 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
303932fd
DB
3996 /* 5 = 1 s/g entry or 4k
3997 * 6 = 2 s/g entry or 8k
3998 * 8 = 4 s/g entry or 16k
3999 * 10 = 6 s/g entry or 24k
4000 */
303932fd
DB
4001
4002 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4003
4004 /* Controller spec: zero out this buffer. */
4005 memset(h->reply_pool, 0, h->reply_pool_size);
4006 h->reply_pool_head = h->reply_pool;
4007
303932fd
DB
4008 bft[7] = h->max_sg_entries + 4;
4009 calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
4010 for (i = 0; i < 8; i++)
4011 writel(bft[i], &h->transtable->BlockFetch[i]);
4012
4013 /* size of controller ring buffer */
4014 writel(h->max_commands, &h->transtable->RepQSize);
4015 writel(1, &h->transtable->RepQCount);
4016 writel(0, &h->transtable->RepQCtrAddrLow32);
4017 writel(0, &h->transtable->RepQCtrAddrHigh32);
4018 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4019 writel(0, &h->transtable->RepQAddr0High32);
4020 writel(CFGTBL_Trans_Performant,
4021 &(h->cfgtable->HostWrite.TransportRequest));
4022 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 4023 hpsa_wait_for_mode_change_ack(h);
303932fd
DB
4024 register_value = readl(&(h->cfgtable->TransportActive));
4025 if (!(register_value & CFGTBL_Trans_Performant)) {
4026 dev_warn(&h->pdev->dev, "unable to get board into"
4027 " performant mode\n");
4028 return;
4029 }
6c311b57
SC
4030}
4031
4032static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
4033{
4034 u32 trans_support;
4035
4036 trans_support = readl(&(h->cfgtable->TransportSupport));
4037 if (!(trans_support & PERFORMANT_MODE))
4038 return;
4039
cba3d38b 4040 hpsa_get_max_perf_mode_cmds(h);
6c311b57
SC
4041 h->max_sg_entries = 32;
4042 /* Performant mode ring buffer and supporting data structures */
4043 h->reply_pool_size = h->max_commands * sizeof(u64);
4044 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
4045 &(h->reply_pool_dhandle));
4046
4047 /* Need a block fetch table for performant mode */
4048 h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
4049 sizeof(u32)), GFP_KERNEL);
4050
4051 if ((h->reply_pool == NULL)
4052 || (h->blockFetchTable == NULL))
4053 goto clean_up;
4054
4055 hpsa_enter_performant_mode(h);
303932fd
DB
4056
4057 /* Change the access methods to the performant access methods */
4058 h->access = SA5_performant_access;
4059 h->transMethod = CFGTBL_Trans_Performant;
4060
4061 return;
4062
4063clean_up:
4064 if (h->reply_pool)
4065 pci_free_consistent(h->pdev, h->reply_pool_size,
4066 h->reply_pool, h->reply_pool_dhandle);
4067 kfree(h->blockFetchTable);
4068}
4069
edd16368
SC
4070/*
4071 * This is it. Register the PCI driver information for the cards we control
4072 * the OS will call our registered routines when it finds one of our cards.
4073 */
4074static int __init hpsa_init(void)
4075{
31468401 4076 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC
4077}
4078
4079static void __exit hpsa_cleanup(void)
4080{
4081 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC
4082}
4083
4084module_init(hpsa_init);
4085module_exit(hpsa_cleanup);