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1da177e4 LT |
1 | #include <linux/types.h> |
2 | #include <linux/mm.h> | |
3 | #include <linux/blkdev.h> | |
1da177e4 LT |
4 | #include <linux/init.h> |
5 | #include <linux/interrupt.h> | |
6 | ||
7 | #include <asm/setup.h> | |
8 | #include <asm/page.h> | |
9 | #include <asm/pgtable.h> | |
10 | #include <asm/amigaints.h> | |
11 | #include <asm/amigahw.h> | |
12 | #include <linux/zorro.h> | |
13 | #include <asm/irq.h> | |
14 | #include <linux/spinlock.h> | |
15 | ||
16 | #include "scsi.h" | |
17 | #include <scsi/scsi_host.h> | |
18 | #include "wd33c93.h" | |
19 | #include "gvp11.h" | |
20 | ||
21 | #include<linux/stat.h> | |
22 | ||
23 | #define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base)) | |
24 | #define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata)) | |
25 | ||
7d12e780 | 26 | static irqreturn_t gvp11_intr (int irq, void *_instance) |
1da177e4 LT |
27 | { |
28 | unsigned long flags; | |
29 | unsigned int status; | |
30 | struct Scsi_Host *instance = (struct Scsi_Host *)_instance; | |
31 | ||
32 | status = DMA(instance)->CNTR; | |
33 | if (!(status & GVP11_DMAC_INT_PENDING)) | |
34 | return IRQ_NONE; | |
35 | ||
36 | spin_lock_irqsave(instance->host_lock, flags); | |
37 | wd33c93_intr(instance); | |
38 | spin_unlock_irqrestore(instance->host_lock, flags); | |
39 | return IRQ_HANDLED; | |
40 | } | |
41 | ||
42 | static int gvp11_xfer_mask = 0; | |
43 | ||
44 | void gvp11_setup (char *str, int *ints) | |
45 | { | |
46 | gvp11_xfer_mask = ints[1]; | |
47 | } | |
48 | ||
65396410 | 49 | static int dma_setup(struct scsi_cmnd *cmd, int dir_in) |
1da177e4 LT |
50 | { |
51 | unsigned short cntr = GVP11_DMAC_INT_ENABLE; | |
52 | unsigned long addr = virt_to_bus(cmd->SCp.ptr); | |
53 | int bank_mask; | |
54 | static int scsi_alloc_out_of_range = 0; | |
55 | ||
56 | /* use bounce buffer if the physical address is bad */ | |
57 | if (addr & HDATA(cmd->device->host)->dma_xfer_mask || | |
58 | (!dir_in && mm_end_of_chunk (addr, cmd->SCp.this_residual))) | |
59 | { | |
60 | HDATA(cmd->device->host)->dma_bounce_len = (cmd->SCp.this_residual + 511) | |
61 | & ~0x1ff; | |
62 | ||
63 | if( !scsi_alloc_out_of_range ) { | |
64 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
65 | kmalloc (HDATA(cmd->device->host)->dma_bounce_len, GFP_KERNEL); | |
66 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_SCSI_ALLOCED; | |
67 | } | |
68 | ||
69 | if (scsi_alloc_out_of_range || | |
70 | !HDATA(cmd->device->host)->dma_bounce_buffer) { | |
71 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
72 | amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, | |
73 | "GVP II SCSI Bounce Buffer"); | |
74 | ||
75 | if(!HDATA(cmd->device->host)->dma_bounce_buffer) | |
76 | { | |
77 | HDATA(cmd->device->host)->dma_bounce_len = 0; | |
78 | return 1; | |
79 | } | |
80 | ||
81 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
82 | } | |
83 | ||
84 | /* check if the address of the bounce buffer is OK */ | |
85 | addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); | |
86 | ||
87 | if (addr & HDATA(cmd->device->host)->dma_xfer_mask) { | |
88 | /* fall back to Chip RAM if address out of range */ | |
89 | if( HDATA(cmd->device->host)->dma_buffer_pool == BUF_SCSI_ALLOCED) { | |
90 | kfree (HDATA(cmd->device->host)->dma_bounce_buffer); | |
91 | scsi_alloc_out_of_range = 1; | |
92 | } else { | |
93 | amiga_chip_free (HDATA(cmd->device->host)->dma_bounce_buffer); | |
94 | } | |
95 | ||
96 | HDATA(cmd->device->host)->dma_bounce_buffer = | |
97 | amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len, | |
98 | "GVP II SCSI Bounce Buffer"); | |
99 | ||
100 | if(!HDATA(cmd->device->host)->dma_bounce_buffer) | |
101 | { | |
102 | HDATA(cmd->device->host)->dma_bounce_len = 0; | |
103 | return 1; | |
104 | } | |
105 | ||
106 | addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer); | |
107 | HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
108 | } | |
109 | ||
110 | if (!dir_in) { | |
111 | /* copy to bounce buffer for a write */ | |
112 | memcpy (HDATA(cmd->device->host)->dma_bounce_buffer, | |
113 | cmd->SCp.ptr, cmd->SCp.this_residual); | |
114 | } | |
115 | } | |
116 | ||
117 | /* setup dma direction */ | |
118 | if (!dir_in) | |
119 | cntr |= GVP11_DMAC_DIR_WRITE; | |
120 | ||
121 | HDATA(cmd->device->host)->dma_dir = dir_in; | |
122 | DMA(cmd->device->host)->CNTR = cntr; | |
123 | ||
124 | /* setup DMA *physical* address */ | |
125 | DMA(cmd->device->host)->ACR = addr; | |
126 | ||
127 | if (dir_in) | |
128 | /* invalidate any cache */ | |
129 | cache_clear (addr, cmd->SCp.this_residual); | |
130 | else | |
131 | /* push any dirty cache */ | |
132 | cache_push (addr, cmd->SCp.this_residual); | |
133 | ||
134 | if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0)) | |
135 | DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18); | |
136 | ||
137 | /* start DMA */ | |
138 | DMA(cmd->device->host)->ST_DMA = 1; | |
139 | ||
140 | /* return success */ | |
141 | return 0; | |
142 | } | |
143 | ||
65396410 HK |
144 | static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt, |
145 | int status) | |
1da177e4 LT |
146 | { |
147 | /* stop DMA */ | |
148 | DMA(instance)->SP_DMA = 1; | |
149 | /* remove write bit from CONTROL bits */ | |
150 | DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; | |
151 | ||
152 | /* copy from a bounce buffer, if necessary */ | |
153 | if (status && HDATA(instance)->dma_bounce_buffer) { | |
154 | if (HDATA(instance)->dma_dir && SCpnt) | |
155 | memcpy (SCpnt->SCp.ptr, | |
156 | HDATA(instance)->dma_bounce_buffer, | |
157 | SCpnt->SCp.this_residual); | |
158 | ||
159 | if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED) | |
160 | kfree (HDATA(instance)->dma_bounce_buffer); | |
161 | else | |
162 | amiga_chip_free(HDATA(instance)->dma_bounce_buffer); | |
163 | ||
164 | HDATA(instance)->dma_bounce_buffer = NULL; | |
165 | HDATA(instance)->dma_bounce_len = 0; | |
166 | } | |
167 | } | |
168 | ||
169 | #define CHECK_WD33C93 | |
170 | ||
d0be4a7d | 171 | int __init gvp11_detect(struct scsi_host_template *tpnt) |
1da177e4 LT |
172 | { |
173 | static unsigned char called = 0; | |
174 | struct Scsi_Host *instance; | |
175 | unsigned long address; | |
176 | unsigned int epc; | |
177 | struct zorro_dev *z = NULL; | |
178 | unsigned int default_dma_xfer_mask; | |
179 | wd33c93_regs regs; | |
180 | int num_gvp11 = 0; | |
181 | #ifdef CHECK_WD33C93 | |
182 | volatile unsigned char *sasr_3393, *scmd_3393; | |
183 | unsigned char save_sasr; | |
184 | unsigned char q, qq; | |
185 | #endif | |
186 | ||
187 | if (!MACH_IS_AMIGA || called) | |
188 | return 0; | |
189 | called = 1; | |
190 | ||
191 | tpnt->proc_name = "GVP11"; | |
192 | tpnt->proc_info = &wd33c93_proc_info; | |
193 | ||
194 | while ((z = zorro_find_device(ZORRO_WILDCARD, z))) { | |
195 | /* | |
196 | * This should (hopefully) be the correct way to identify | |
197 | * all the different GVP SCSI controllers (except for the | |
198 | * SERIES I though). | |
199 | */ | |
200 | ||
201 | if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI || | |
202 | z->id == ZORRO_PROD_GVP_SERIES_II) | |
203 | default_dma_xfer_mask = ~0x00ffffff; | |
204 | else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI || | |
205 | z->id == ZORRO_PROD_GVP_A530_SCSI || | |
206 | z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI) | |
207 | default_dma_xfer_mask = ~0x01ffffff; | |
208 | else if (z->id == ZORRO_PROD_GVP_A1291 || | |
209 | z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1) | |
210 | default_dma_xfer_mask = ~0x07ffffff; | |
211 | else | |
212 | continue; | |
213 | ||
214 | /* | |
215 | * Rumors state that some GVP ram boards use the same product | |
216 | * code as the SCSI controllers. Therefore if the board-size | |
217 | * is not 64KB we asume it is a ram board and bail out. | |
218 | */ | |
219 | if (z->resource.end-z->resource.start != 0xffff) | |
220 | continue; | |
221 | ||
222 | address = z->resource.start; | |
223 | if (!request_mem_region(address, 256, "wd33c93")) | |
224 | continue; | |
225 | ||
226 | #ifdef CHECK_WD33C93 | |
227 | ||
228 | /* | |
229 | * These darn GVP boards are a problem - it can be tough to tell | |
230 | * whether or not they include a SCSI controller. This is the | |
231 | * ultimate Yet-Another-GVP-Detection-Hack in that it actually | |
232 | * probes for a WD33c93 chip: If we find one, it's extremely | |
233 | * likely that this card supports SCSI, regardless of Product_ | |
234 | * Code, Board_Size, etc. | |
235 | */ | |
236 | ||
237 | /* Get pointers to the presumed register locations and save contents */ | |
238 | ||
239 | sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR); | |
240 | scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD); | |
241 | save_sasr = *sasr_3393; | |
242 | ||
243 | /* First test the AuxStatus Reg */ | |
244 | ||
245 | q = *sasr_3393; /* read it */ | |
246 | if (q & 0x08) /* bit 3 should always be clear */ | |
247 | goto release; | |
248 | *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ | |
249 | if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */ | |
250 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
251 | goto release; | |
252 | } | |
253 | if (*sasr_3393 != q) { /* should still read the same */ | |
254 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
255 | goto release; | |
256 | } | |
257 | if (*scmd_3393 != q) /* and so should the image at 0x1f */ | |
258 | goto release; | |
259 | ||
260 | ||
261 | /* Ok, we probably have a wd33c93, but let's check a few other places | |
262 | * for good measure. Make sure that this works for both 'A and 'B | |
263 | * chip versions. | |
264 | */ | |
265 | ||
266 | *sasr_3393 = WD_SCSI_STATUS; | |
267 | q = *scmd_3393; | |
268 | *sasr_3393 = WD_SCSI_STATUS; | |
269 | *scmd_3393 = ~q; | |
270 | *sasr_3393 = WD_SCSI_STATUS; | |
271 | qq = *scmd_3393; | |
272 | *sasr_3393 = WD_SCSI_STATUS; | |
273 | *scmd_3393 = q; | |
274 | if (qq != q) /* should be read only */ | |
275 | goto release; | |
276 | *sasr_3393 = 0x1e; /* this register is unimplemented */ | |
277 | q = *scmd_3393; | |
278 | *sasr_3393 = 0x1e; | |
279 | *scmd_3393 = ~q; | |
280 | *sasr_3393 = 0x1e; | |
281 | qq = *scmd_3393; | |
282 | *sasr_3393 = 0x1e; | |
283 | *scmd_3393 = q; | |
284 | if (qq != q || qq != 0xff) /* should be read only, all 1's */ | |
285 | goto release; | |
286 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
287 | q = *scmd_3393; | |
288 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
289 | *scmd_3393 = ~q; | |
290 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
291 | qq = *scmd_3393; | |
292 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
293 | *scmd_3393 = q; | |
294 | if (qq != (~q & 0xff)) /* should be read/write */ | |
295 | goto release; | |
296 | #endif | |
297 | ||
298 | instance = scsi_register (tpnt, sizeof (struct WD33C93_hostdata)); | |
299 | if(instance == NULL) | |
300 | goto release; | |
301 | instance->base = ZTWO_VADDR(address); | |
302 | instance->irq = IRQ_AMIGA_PORTS; | |
303 | instance->unique_id = z->slotaddr; | |
304 | ||
305 | if (gvp11_xfer_mask) | |
306 | HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask; | |
307 | else | |
308 | HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask; | |
309 | ||
310 | ||
311 | DMA(instance)->secret2 = 1; | |
312 | DMA(instance)->secret1 = 0; | |
313 | DMA(instance)->secret3 = 15; | |
314 | while (DMA(instance)->CNTR & GVP11_DMAC_BUSY) ; | |
315 | DMA(instance)->CNTR = 0; | |
316 | ||
317 | DMA(instance)->BANK = 0; | |
318 | ||
319 | epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000); | |
320 | ||
321 | /* | |
322 | * Check for 14MHz SCSI clock | |
323 | */ | |
324 | regs.SASR = &(DMA(instance)->SASR); | |
325 | regs.SCMD = &(DMA(instance)->SCMD); | |
326 | wd33c93_init(instance, regs, dma_setup, dma_stop, | |
327 | (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10 | |
328 | : WD33C93_FS_12_15); | |
329 | ||
1d6f359a | 330 | request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED, "GVP11 SCSI", |
1da177e4 LT |
331 | instance); |
332 | DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE; | |
333 | num_gvp11++; | |
334 | continue; | |
335 | ||
336 | release: | |
337 | release_mem_region(address, 256); | |
338 | } | |
339 | ||
340 | return num_gvp11; | |
341 | } | |
342 | ||
65396410 | 343 | static int gvp11_bus_reset(struct scsi_cmnd *cmd) |
1da177e4 LT |
344 | { |
345 | /* FIXME perform bus-specific reset */ | |
68b3aa7c | 346 | |
df0ae249 JG |
347 | /* FIXME 2: shouldn't we no-op this function (return |
348 | FAILED), and fall back to host reset function, | |
349 | wd33c93_host_reset ? */ | |
350 | ||
68b3aa7c | 351 | spin_lock_irq(cmd->device->host->host_lock); |
1da177e4 | 352 | wd33c93_host_reset(cmd); |
68b3aa7c JG |
353 | spin_unlock_irq(cmd->device->host->host_lock); |
354 | ||
1da177e4 LT |
355 | return SUCCESS; |
356 | } | |
357 | ||
358 | ||
359 | #define HOSTS_C | |
360 | ||
361 | #include "gvp11.h" | |
362 | ||
d0be4a7d | 363 | static struct scsi_host_template driver_template = { |
1da177e4 LT |
364 | .proc_name = "GVP11", |
365 | .name = "GVP Series II SCSI", | |
366 | .detect = gvp11_detect, | |
367 | .release = gvp11_release, | |
368 | .queuecommand = wd33c93_queuecommand, | |
369 | .eh_abort_handler = wd33c93_abort, | |
370 | .eh_bus_reset_handler = gvp11_bus_reset, | |
371 | .eh_host_reset_handler = wd33c93_host_reset, | |
372 | .can_queue = CAN_QUEUE, | |
373 | .this_id = 7, | |
374 | .sg_tablesize = SG_ALL, | |
375 | .cmd_per_lun = CMD_PER_LUN, | |
376 | .use_clustering = DISABLE_CLUSTERING | |
377 | }; | |
378 | ||
379 | ||
380 | #include "scsi_module.c" | |
381 | ||
382 | int gvp11_release(struct Scsi_Host *instance) | |
383 | { | |
384 | #ifdef MODULE | |
385 | DMA(instance)->CNTR = 0; | |
386 | release_mem_region(ZTWO_PADDR(instance->base), 256); | |
387 | free_irq(IRQ_AMIGA_PORTS, instance); | |
388 | wd33c93_release(); | |
389 | #endif | |
390 | return 1; | |
391 | } | |
392 | ||
393 | MODULE_LICENSE("GPL"); |