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1da177e4 LT |
1 | /* |
2 | * Linux driver attachment glue for PCI based controllers. | |
3 | * | |
4 | * Copyright (c) 2000-2001 Adaptec Inc. | |
5 | * All rights reserved. | |
6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions, and the following disclaimer, | |
12 | * without modification. | |
13 | * 2. Redistributions in binary form must reproduce at minimum a disclaimer | |
14 | * substantially similar to the "NO WARRANTY" disclaimer below | |
15 | * ("Disclaimer") and any redistribution must be conditioned upon | |
16 | * including a substantially similar Disclaimer requirement for further | |
17 | * binary redistribution. | |
18 | * 3. Neither the names of the above-listed copyright holders nor the names | |
19 | * of any contributors may be used to endorse or promote products derived | |
20 | * from this software without specific prior written permission. | |
21 | * | |
22 | * Alternatively, this software may be distributed under the terms of the | |
23 | * GNU General Public License ("GPL") version 2 as published by the Free | |
24 | * Software Foundation. | |
25 | * | |
26 | * NO WARRANTY | |
27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR | |
30 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
31 | * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
33 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
34 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
35 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING | |
36 | * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
37 | * POSSIBILITY OF SUCH DAMAGES. | |
38 | * | |
39 | * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $ | |
40 | */ | |
41 | ||
42 | #include "aic7xxx_osm.h" | |
43 | #include "aic7xxx_pci.h" | |
44 | ||
45 | static int ahc_linux_pci_dev_probe(struct pci_dev *pdev, | |
46 | const struct pci_device_id *ent); | |
47 | static int ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, | |
48 | u_long *base); | |
49 | static int ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc, | |
50 | u_long *bus_addr, | |
51 | uint8_t __iomem **maddr); | |
52 | static void ahc_linux_pci_dev_remove(struct pci_dev *pdev); | |
53 | ||
54 | /* Define the macro locally since it's different for different class of chips. | |
55 | */ | |
56 | #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI) | |
57 | ||
58 | static struct pci_device_id ahc_linux_pci_id_table[] = { | |
59 | /* aic7850 based controllers */ | |
60 | ID(ID_AHA_2902_04_10_15_20C_30C), | |
61 | /* aic7860 based controllers */ | |
62 | ID(ID_AHA_2930CU), | |
63 | ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK), | |
64 | ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK), | |
65 | ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK), | |
66 | ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK), | |
67 | /* aic7870 based controllers */ | |
68 | ID(ID_AHA_2940), | |
69 | ID(ID_AHA_3940), | |
70 | ID(ID_AHA_398X), | |
71 | ID(ID_AHA_2944), | |
72 | ID(ID_AHA_3944), | |
73 | ID(ID_AHA_4944), | |
74 | /* aic7880 based controllers */ | |
75 | ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK), | |
76 | ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK), | |
77 | ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK), | |
78 | ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK), | |
79 | ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK), | |
80 | ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK), | |
81 | ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK), | |
82 | ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK), | |
83 | ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK), | |
84 | /* aic7890 based controllers */ | |
85 | ID(ID_AHA_2930U2), | |
86 | ID(ID_AHA_2940U2B), | |
87 | ID(ID_AHA_2940U2_OEM), | |
88 | ID(ID_AHA_2940U2), | |
89 | ID(ID_AHA_2950U2B), | |
90 | ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK), | |
91 | ID(ID_AAA_131U2), | |
92 | /* aic7890 based controllers */ | |
93 | ID(ID_AHA_29160), | |
94 | ID(ID_AHA_29160_CPQ), | |
95 | ID(ID_AHA_29160N), | |
96 | ID(ID_AHA_29160C), | |
97 | ID(ID_AHA_29160B), | |
98 | ID(ID_AHA_19160B), | |
99 | ID(ID_AIC7892_ARO), | |
100 | /* aic7892 based controllers */ | |
101 | ID(ID_AHA_2940U_DUAL), | |
102 | ID(ID_AHA_3940AU), | |
103 | ID(ID_AHA_3944AU), | |
104 | ID(ID_AIC7895_ARO), | |
105 | ID(ID_AHA_3950U2B_0), | |
106 | ID(ID_AHA_3950U2B_1), | |
107 | ID(ID_AHA_3950U2D_0), | |
108 | ID(ID_AHA_3950U2D_1), | |
109 | ID(ID_AIC7896_ARO), | |
110 | /* aic7899 based controllers */ | |
111 | ID(ID_AHA_3960D), | |
112 | ID(ID_AHA_3960D_CPQ), | |
113 | ID(ID_AIC7899_ARO), | |
114 | /* Generic chip probes for devices we don't know exactly. */ | |
115 | ID(ID_AIC7850 & ID_DEV_VENDOR_MASK), | |
116 | ID(ID_AIC7855 & ID_DEV_VENDOR_MASK), | |
117 | ID(ID_AIC7859 & ID_DEV_VENDOR_MASK), | |
118 | ID(ID_AIC7860 & ID_DEV_VENDOR_MASK), | |
119 | ID(ID_AIC7870 & ID_DEV_VENDOR_MASK), | |
120 | ID(ID_AIC7880 & ID_DEV_VENDOR_MASK), | |
121 | ID16(ID_AIC7890 & ID_9005_GENERIC_MASK), | |
122 | ID16(ID_AIC7892 & ID_9005_GENERIC_MASK), | |
123 | ID(ID_AIC7895 & ID_DEV_VENDOR_MASK), | |
124 | ID16(ID_AIC7896 & ID_9005_GENERIC_MASK), | |
125 | ID16(ID_AIC7899 & ID_9005_GENERIC_MASK), | |
126 | ID(ID_AIC7810 & ID_DEV_VENDOR_MASK), | |
127 | ID(ID_AIC7815 & ID_DEV_VENDOR_MASK), | |
128 | { 0 } | |
129 | }; | |
130 | ||
131 | MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table); | |
132 | ||
133 | struct pci_driver aic7xxx_pci_driver = { | |
134 | .name = "aic7xxx", | |
135 | .probe = ahc_linux_pci_dev_probe, | |
136 | .remove = ahc_linux_pci_dev_remove, | |
137 | .id_table = ahc_linux_pci_id_table | |
138 | }; | |
139 | ||
140 | static void | |
141 | ahc_linux_pci_dev_remove(struct pci_dev *pdev) | |
142 | { | |
3d65692a CH |
143 | struct ahc_softc *ahc = pci_get_drvdata(pdev); |
144 | u_long s; | |
1da177e4 | 145 | |
97af50f6 JB |
146 | if (ahc->platform_data && ahc->platform_data->host) |
147 | scsi_remove_host(ahc->platform_data->host); | |
148 | ||
3d65692a CH |
149 | ahc_lock(ahc, &s); |
150 | ahc_intr_enable(ahc, FALSE); | |
151 | ahc_unlock(ahc, &s); | |
152 | ahc_free(ahc); | |
1da177e4 LT |
153 | } |
154 | ||
3a4f5c60 JB |
155 | static void |
156 | ahc_linux_pci_inherit_flags(struct ahc_softc *ahc) | |
157 | { | |
158 | struct pci_dev *pdev = ahc->dev_softc, *master_pdev; | |
159 | unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); | |
160 | ||
161 | master_pdev = pci_get_slot(pdev->bus, master_devfn); | |
162 | if (master_pdev) { | |
163 | struct ahc_softc *master = pci_get_drvdata(master_pdev); | |
164 | if (master) { | |
165 | ahc->flags &= ~AHC_BIOS_ENABLED; | |
166 | ahc->flags |= master->flags & AHC_BIOS_ENABLED; | |
167 | ||
168 | ahc->flags &= ~AHC_PRIMARY_CHANNEL; | |
169 | ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL; | |
170 | } else | |
171 | printk(KERN_ERR "aic7xxx: no multichannel peer found!\n"); | |
172 | pci_dev_put(master_pdev); | |
173 | } | |
174 | } | |
175 | ||
1da177e4 LT |
176 | static int |
177 | ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
178 | { | |
179 | char buf[80]; | |
180 | const uint64_t mask_39bit = 0x7FFFFFFFFFULL; | |
181 | struct ahc_softc *ahc; | |
182 | ahc_dev_softc_t pci; | |
183 | struct ahc_pci_identity *entry; | |
184 | char *name; | |
185 | int error; | |
a89f29f6 | 186 | struct device *dev = &pdev->dev; |
1da177e4 | 187 | |
1da177e4 LT |
188 | pci = pdev; |
189 | entry = ahc_find_pci_device(pci); | |
190 | if (entry == NULL) | |
191 | return (-ENODEV); | |
192 | ||
193 | /* | |
194 | * Allocate a softc for this card and | |
195 | * set it up for attachment by our | |
196 | * common detect routine. | |
197 | */ | |
198 | sprintf(buf, "ahc_pci:%d:%d:%d", | |
199 | ahc_get_pci_bus(pci), | |
200 | ahc_get_pci_slot(pci), | |
201 | ahc_get_pci_function(pci)); | |
202 | name = malloc(strlen(buf) + 1, M_DEVBUF, M_NOWAIT); | |
203 | if (name == NULL) | |
204 | return (-ENOMEM); | |
205 | strcpy(name, buf); | |
206 | ahc = ahc_alloc(NULL, name); | |
207 | if (ahc == NULL) | |
208 | return (-ENOMEM); | |
209 | if (pci_enable_device(pdev)) { | |
210 | ahc_free(ahc); | |
211 | return (-ENODEV); | |
212 | } | |
213 | pci_set_master(pdev); | |
214 | ||
215 | if (sizeof(dma_addr_t) > 4 | |
a89f29f6 JB |
216 | && ahc->features & AHC_LARGE_SCBS |
217 | && dma_set_mask(dev, mask_39bit) == 0 | |
218 | && dma_get_required_mask(dev) > DMA_32BIT_MASK) { | |
1da177e4 | 219 | ahc->flags |= AHC_39BIT_ADDRESSING; |
1da177e4 | 220 | } else { |
a89f29f6 | 221 | if (dma_set_mask(dev, DMA_32BIT_MASK)) { |
4a6fae1d | 222 | ahc_free(ahc); |
1da177e4 LT |
223 | printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n"); |
224 | return (-ENODEV); | |
225 | } | |
1da177e4 LT |
226 | } |
227 | ahc->dev_softc = pci; | |
228 | error = ahc_pci_config(ahc, entry); | |
229 | if (error != 0) { | |
230 | ahc_free(ahc); | |
231 | return (-error); | |
232 | } | |
3a4f5c60 JB |
233 | |
234 | /* | |
235 | * Second Function PCI devices need to inherit some | |
236 | * settings from function 0. | |
237 | */ | |
238 | if ((ahc->features & AHC_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0) | |
239 | ahc_linux_pci_inherit_flags(ahc); | |
240 | ||
1da177e4 | 241 | pci_set_drvdata(pdev, ahc); |
dfd287f6 | 242 | ahc_linux_register_host(ahc, &aic7xxx_driver_template); |
1da177e4 LT |
243 | return (0); |
244 | } | |
245 | ||
246 | int | |
247 | ahc_linux_pci_init(void) | |
248 | { | |
249 | /* Translate error or zero return into zero or one */ | |
250 | return pci_module_init(&aic7xxx_pci_driver) ? 0 : 1; | |
251 | } | |
252 | ||
253 | void | |
254 | ahc_linux_pci_exit(void) | |
255 | { | |
256 | pci_unregister_driver(&aic7xxx_pci_driver); | |
257 | } | |
258 | ||
259 | static int | |
260 | ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, u_long *base) | |
261 | { | |
262 | if (aic7xxx_allow_memio == 0) | |
263 | return (ENOMEM); | |
264 | ||
265 | *base = pci_resource_start(ahc->dev_softc, 0); | |
266 | if (*base == 0) | |
267 | return (ENOMEM); | |
268 | if (request_region(*base, 256, "aic7xxx") == 0) | |
269 | return (ENOMEM); | |
270 | return (0); | |
271 | } | |
272 | ||
273 | static int | |
274 | ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc, | |
275 | u_long *bus_addr, | |
276 | uint8_t __iomem **maddr) | |
277 | { | |
278 | u_long start; | |
279 | int error; | |
280 | ||
281 | error = 0; | |
282 | start = pci_resource_start(ahc->dev_softc, 1); | |
283 | if (start != 0) { | |
284 | *bus_addr = start; | |
285 | if (request_mem_region(start, 0x1000, "aic7xxx") == 0) | |
286 | error = ENOMEM; | |
287 | if (error == 0) { | |
288 | *maddr = ioremap_nocache(start, 256); | |
289 | if (*maddr == NULL) { | |
290 | error = ENOMEM; | |
291 | release_mem_region(start, 0x1000); | |
292 | } | |
293 | } | |
294 | } else | |
295 | error = ENOMEM; | |
296 | return (error); | |
297 | } | |
298 | ||
299 | int | |
300 | ahc_pci_map_registers(struct ahc_softc *ahc) | |
301 | { | |
302 | uint32_t command; | |
303 | u_long base; | |
304 | uint8_t __iomem *maddr; | |
305 | int error; | |
306 | ||
307 | /* | |
308 | * If its allowed, we prefer memory mapped access. | |
309 | */ | |
310 | command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4); | |
311 | command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN); | |
312 | base = 0; | |
313 | maddr = NULL; | |
314 | error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr); | |
315 | if (error == 0) { | |
316 | ahc->platform_data->mem_busaddr = base; | |
317 | ahc->tag = BUS_SPACE_MEMIO; | |
318 | ahc->bsh.maddr = maddr; | |
319 | ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, | |
320 | command | PCIM_CMD_MEMEN, 4); | |
321 | ||
322 | /* | |
323 | * Do a quick test to see if memory mapped | |
324 | * I/O is functioning correctly. | |
325 | */ | |
326 | if (ahc_pci_test_register_access(ahc) != 0) { | |
327 | ||
328 | printf("aic7xxx: PCI Device %d:%d:%d " | |
329 | "failed memory mapped test. Using PIO.\n", | |
330 | ahc_get_pci_bus(ahc->dev_softc), | |
331 | ahc_get_pci_slot(ahc->dev_softc), | |
332 | ahc_get_pci_function(ahc->dev_softc)); | |
333 | iounmap(maddr); | |
334 | release_mem_region(ahc->platform_data->mem_busaddr, | |
335 | 0x1000); | |
336 | ahc->bsh.maddr = NULL; | |
337 | maddr = NULL; | |
338 | } else | |
339 | command |= PCIM_CMD_MEMEN; | |
340 | } else { | |
341 | printf("aic7xxx: PCI%d:%d:%d MEM region 0x%lx " | |
342 | "unavailable. Cannot memory map device.\n", | |
343 | ahc_get_pci_bus(ahc->dev_softc), | |
344 | ahc_get_pci_slot(ahc->dev_softc), | |
345 | ahc_get_pci_function(ahc->dev_softc), | |
346 | base); | |
347 | } | |
348 | ||
349 | /* | |
350 | * We always prefer memory mapped access. | |
351 | */ | |
352 | if (maddr == NULL) { | |
353 | ||
354 | error = ahc_linux_pci_reserve_io_region(ahc, &base); | |
355 | if (error == 0) { | |
356 | ahc->tag = BUS_SPACE_PIO; | |
357 | ahc->bsh.ioport = base; | |
358 | command |= PCIM_CMD_PORTEN; | |
359 | } else { | |
360 | printf("aic7xxx: PCI%d:%d:%d IO region 0x%lx[0..255] " | |
361 | "unavailable. Cannot map device.\n", | |
362 | ahc_get_pci_bus(ahc->dev_softc), | |
363 | ahc_get_pci_slot(ahc->dev_softc), | |
364 | ahc_get_pci_function(ahc->dev_softc), | |
365 | base); | |
366 | } | |
367 | } | |
368 | ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4); | |
369 | return (error); | |
370 | } | |
371 | ||
372 | int | |
373 | ahc_pci_map_int(struct ahc_softc *ahc) | |
374 | { | |
375 | int error; | |
376 | ||
377 | error = request_irq(ahc->dev_softc->irq, ahc_linux_isr, | |
1d6f359a | 378 | IRQF_SHARED, "aic7xxx", ahc); |
1da177e4 LT |
379 | if (error == 0) |
380 | ahc->platform_data->irq = ahc->dev_softc->irq; | |
381 | ||
382 | return (-error); | |
383 | } | |
384 |