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riowd: Distinguish between driver name and OF device node name.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / sbus / char / cpwatchdog.c
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1da177e4
LT		 1/* cpwatchdog.c - driver implementation for hardware watchdog
2 * timers found on Sun Microsystems CP1400 and CP1500 boards.
3 *
4 * This device supports both the generic Linux watchdog
5 * interface and Solaris-compatible ioctls as best it is
6 * able.
7 *
8 * NOTE: CP1400 systems appear to have a defective intr_mask
9 * register on the PLD, preventing the disabling of
10 * timer interrupts. We use a timer to periodically
11 * reset 'stopped' watchdogs on affected platforms.
12 *
1da177e4
LT		 13 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/errno.h>
20#include <linux/major.h>
21#include <linux/init.h>
22#include <linux/miscdevice.h>
1da177e4
LT		 23#include <linux/interrupt.h>
24#include <linux/ioport.h>
25#include <linux/timer.h>
b66621fe 26#include <linux/smp_lock.h>
347e03df 27#include <linux/io.h>
1da177e4
LT		 28#include <asm/irq.h>
29#include <asm/ebus.h>
30#include <asm/oplib.h>
31#include <asm/uaccess.h>
32
33#include <asm/watchdog.h>
34
35#define WD_OBPNAME "watchdog"
36#define WD_BADMODEL "SUNW,501-5336"
37#define WD_BTIMEOUT (jiffies + (HZ * 1000))
38#define WD_BLIMIT 0xFFFF
39
40#define WD0_DEVNAME "watchdog0"
41#define WD1_DEVNAME "watchdog1"
42#define WD2_DEVNAME "watchdog2"
43
44#define WD0_MINOR 212
45#define WD1_MINOR 213
46#define WD2_MINOR 214
47
48
49/* Internal driver definitions
50 */
51#define WD0_ID 0 /* Watchdog0 */
52#define WD1_ID 1 /* Watchdog1 */
53#define WD2_ID 2 /* Watchdog2 */
54#define WD_NUMDEVS 3 /* Device contains 3 timers */
55
56#define WD_INTR_OFF 0 /* Interrupt disable value */
57#define WD_INTR_ON 1 /* Interrupt enable value */
58
59#define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
60#define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
61#define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
62
63/* Register value definitions
64 */
65#define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
66#define WD1_INTR_MASK 0x02
67#define WD2_INTR_MASK 0x04
68
69#define WD_S_RUNNING 0x01 /* Watchdog device status running */
70#define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
71
72/* Sun uses Altera PLD EPF8820ATC144-4
73 * providing three hardware watchdogs:
74 *
75 * 1) RIC - sends an interrupt when triggered
76 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
77 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
78 *
79 *** Timer register block definition (struct wd_timer_regblk)
80 *
81 * dcntr and limit registers (halfword access):
82 * -------------------
83 * | 15 | ...| 1 | 0 |
84 * -------------------
85 * |- counter val -|
86 * -------------------
87 * dcntr - Current 16-bit downcounter value.
88 * When downcounter reaches '0' watchdog expires.
89 * Reading this register resets downcounter with 'limit' value.
90 * limit - 16-bit countdown value in 1/10th second increments.
91 * Writing this register begins countdown with input value.
92 * Reading from this register does not affect counter.
93 * NOTES: After watchdog reset, dcntr and limit contain '1'
94 *
95 * status register (byte access):
96 * ---------------------------
97 * | 7 | ... | 2 | 1 | 0 |
98 * --------------+------------
99 * |- UNUSED -| EXP | RUN |
100 * ---------------------------
101 * status- Bit 0 - Watchdog is running
102 * Bit 1 - Watchdog has expired
103 *
104 *** PLD register block definition (struct wd_pld_regblk)
105 *
106 * intr_mask register (byte access):
107 * ---------------------------------
108 * | 7 | ... | 3 | 2 | 1 | 0 |
109 * +-------------+------------------
110 * |- UNUSED -| WD3 | WD2 | WD1 |
111 * ---------------------------------
112 * WD3 - 1 == Interrupt disabled for watchdog 3
113 * WD2 - 1 == Interrupt disabled for watchdog 2
114 * WD1 - 1 == Interrupt disabled for watchdog 1
115 *
116 * pld_status register (byte access):
117 * UNKNOWN, MAGICAL MYSTERY REGISTER
118 *
119 */
120#define WD_TIMER_REGSZ 16
121#define WD0_OFF 0
122#define WD1_OFF (WD_TIMER_REGSZ * 1)
123#define WD2_OFF (WD_TIMER_REGSZ * 2)
124#define PLD_OFF (WD_TIMER_REGSZ * 3)
125
126#define WD_DCNTR 0x00
127#define WD_LIMIT 0x04
128#define WD_STATUS 0x08
129
130#define PLD_IMASK (PLD_OFF + 0x00)
131#define PLD_STATUS (PLD_OFF + 0x04)
132
133/* Individual timer structure
134 */
135struct wd_timer {
136 __u16 timeout;
137 __u8 intr_mask;
138 unsigned char runstatus;
139 void __iomem *regs;
140};
141
142/* Device structure
143 */
144struct wd_device {
145 int irq;
146 spinlock_t lock;
147 unsigned char isbaddoggie; /* defective PLD */
148 unsigned char opt_enable;
149 unsigned char opt_reboot;
150 unsigned short opt_timeout;
151 unsigned char initialized;
152 struct wd_timer watchdog[WD_NUMDEVS];
153 void __iomem *regs;
154};
155
156static struct wd_device wd_dev = {
6027f661 157 0, __SPIN_LOCK_UNLOCKED(wd_dev.lock), 0, 0, 0, 0,
1da177e4
LT		 158};
159
160static struct timer_list wd_timer;
161
162static int wd0_timeout = 0;
163static int wd1_timeout = 0;
164static int wd2_timeout = 0;
165
166#ifdef MODULE
167module_param (wd0_timeout, int, 0);
168MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
169module_param (wd1_timeout, int, 0);
170MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
171module_param (wd2_timeout, int, 0);
172MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
173
174MODULE_AUTHOR
175 ("Eric Brower <ebrower@usa.net>");
176MODULE_DESCRIPTION
177 ("Hardware watchdog driver for Sun Microsystems CP1400/1500");
178MODULE_LICENSE("GPL");
179MODULE_SUPPORTED_DEVICE
180 ("watchdog");
181#endif /* ifdef MODULE */
182
183/* Forward declarations of internal methods
184 */
185#ifdef WD_DEBUG
186static void wd_dumpregs(void);
187#endif
7d12e780 188static irqreturn_t wd_interrupt(int irq, void *dev_id);
1da177e4
LT		 189static void wd_toggleintr(struct wd_timer* pTimer, int enable);
190static void wd_pingtimer(struct wd_timer* pTimer);
191static void wd_starttimer(struct wd_timer* pTimer);
192static void wd_resetbrokentimer(struct wd_timer* pTimer);
193static void wd_stoptimer(struct wd_timer* pTimer);
194static void wd_brokentimer(unsigned long data);
195static int wd_getstatus(struct wd_timer* pTimer);
196
197/* PLD expects words to be written in LSB format,
198 * so we must flip all words prior to writing them to regs
199 */
200static inline unsigned short flip_word(unsigned short word)
201{
202 return ((word & 0xff) << 8) | ((word >> 8) & 0xff);
203}
204
205#define wd_writew(val, addr) (writew(flip_word(val), addr))
206#define wd_readw(addr) (flip_word(readw(addr)))
207#define wd_writeb(val, addr) (writeb(val, addr))
208#define wd_readb(addr) (readb(addr))
209
210
211/* CP1400s seem to have broken PLD implementations--
212 * the interrupt_mask register cannot be written, so
213 * no timer interrupts can be masked within the PLD.
214 */
215static inline int wd_isbroken(void)
216{
217 /* we could test this by read/write/read/restore
218 * on the interrupt mask register only if OBP
219 * 'watchdog-enable?' == FALSE, but it seems
220 * ubiquitous on CP1400s
221 */
222 char val[32];
223 prom_getproperty(prom_root_node, "model", val, sizeof(val));
224 return((!strcmp(val, WD_BADMODEL)) ? 1 : 0);
225}
226
227/* Retrieve watchdog-enable? option from OBP
228 * Returns 0 if false, 1 if true
229 */
230static inline int wd_opt_enable(void)
231{
232 int opt_node;
233
234 opt_node = prom_getchild(prom_root_node);
235 opt_node = prom_searchsiblings(opt_node, "options");
236 return((-1 == prom_getint(opt_node, "watchdog-enable?")) ? 0 : 1);
237}
238
239/* Retrieve watchdog-reboot? option from OBP
240 * Returns 0 if false, 1 if true
241 */
242static inline int wd_opt_reboot(void)
243{
244 int opt_node;
245
246 opt_node = prom_getchild(prom_root_node);
247 opt_node = prom_searchsiblings(opt_node, "options");
248 return((-1 == prom_getint(opt_node, "watchdog-reboot?")) ? 0 : 1);
249}
250
251/* Retrieve watchdog-timeout option from OBP
252 * Returns OBP value, or 0 if not located
253 */
254static inline int wd_opt_timeout(void)
255{
256 int opt_node;
257 char value[32];
258 char *p = value;
259
260 opt_node = prom_getchild(prom_root_node);
261 opt_node = prom_searchsiblings(opt_node, "options");
262 opt_node = prom_getproperty(opt_node,
263 "watchdog-timeout",
264 value,
265 sizeof(value));
266 if(-1 != opt_node) {
267 /* atoi implementation */
268 for(opt_node = 0; /* nop */; p++) {
269 if(*p >= '0' && *p <= '9') {
270 opt_node = (10*opt_node)+(*p-'0');
271 }
272 else {
273 break;
274 }
275 }
276 }
277 return((-1 == opt_node) ? (0) : (opt_node));
278}
279
280static int wd_open(struct inode *inode, struct file *f)
281{
b05c9e6c 282 lock_kernel();
1da177e4
LT		 283 switch(iminor(inode))
284 {
285 case WD0_MINOR:
286 f->private_data = &wd_dev.watchdog[WD0_ID];
287 break;
288 case WD1_MINOR:
289 f->private_data = &wd_dev.watchdog[WD1_ID];
290 break;
291 case WD2_MINOR:
292 f->private_data = &wd_dev.watchdog[WD2_ID];
293 break;
294 default:
b05c9e6c 295 unlock_kernel();
1da177e4
LT		 296 return(-ENODEV);
297 }
298
299 /* Register IRQ on first open of device */
300 if(0 == wd_dev.initialized)
301 {
302 if (request_irq(wd_dev.irq,
303 &wd_interrupt,
dace1453 304 IRQF_SHARED,
1da177e4
LT		 305 WD_OBPNAME,
306 (void *)wd_dev.regs)) {
c6387a48
DM		 307 printk("%s: Cannot register IRQ %d\n",
308 WD_OBPNAME, wd_dev.irq);
b05c9e6c 309 unlock_kernel();
1da177e4
LT		 310 return(-EBUSY);
311 }
312 wd_dev.initialized = 1;
313 }
314
b05c9e6c 315 unlock_kernel();
1da177e4
LT		 316 return(nonseekable_open(inode, f));
317}
318
319static int wd_release(struct inode *inode, struct file *file)
320{
321 return 0;
322}
323
324static int wd_ioctl(struct inode *inode, struct file *file,
325 unsigned int cmd, unsigned long arg)
326{
327 int setopt = 0;
328 struct wd_timer* pTimer = (struct wd_timer*)file->private_data;
329 void __user *argp = (void __user *)arg;
330 struct watchdog_info info = {
331 0,
332 0,
333 "Altera EPF8820ATC144-4"
334 };
335
336 if(NULL == pTimer) {
337 return(-EINVAL);
338 }
339
340 switch(cmd)
341 {
342 /* Generic Linux IOCTLs */
343 case WDIOC_GETSUPPORT:
344 if(copy_to_user(argp, &info, sizeof(struct watchdog_info))) {
345 return(-EFAULT);
346 }
347 break;
348 case WDIOC_GETSTATUS:
349 case WDIOC_GETBOOTSTATUS:
350 if (put_user(0, (int __user *)argp))
351 return -EFAULT;
352 break;
353 case WDIOC_KEEPALIVE:
354 wd_pingtimer(pTimer);
355 break;
356 case WDIOC_SETOPTIONS:
357 if(copy_from_user(&setopt, argp, sizeof(unsigned int))) {
358 return -EFAULT;
359 }
360 if(setopt & WDIOS_DISABLECARD) {
361 if(wd_dev.opt_enable) {
362 printk(
363 "%s: cannot disable watchdog in ENABLED mode\n",
364 WD_OBPNAME);
365 return(-EINVAL);
366 }
367 wd_stoptimer(pTimer);
368 }
369 else if(setopt & WDIOS_ENABLECARD) {
370 wd_starttimer(pTimer);
371 }
372 else {
373 return(-EINVAL);
374 }
375 break;
376 /* Solaris-compatible IOCTLs */
377 case WIOCGSTAT:
378 setopt = wd_getstatus(pTimer);
379 if(copy_to_user(argp, &setopt, sizeof(unsigned int))) {
380 return(-EFAULT);
381 }
382 break;
383 case WIOCSTART:
384 wd_starttimer(pTimer);
385 break;
386 case WIOCSTOP:
387 if(wd_dev.opt_enable) {
388 printk("%s: cannot disable watchdog in ENABLED mode\n",
389 WD_OBPNAME);
390 return(-EINVAL);
391 }
392 wd_stoptimer(pTimer);
393 break;
394 default:
395 return(-EINVAL);
396 }
397 return(0);
398}
399
b66621fe
CH		 400static long wd_compat_ioctl(struct file *file, unsigned int cmd,
401 unsigned long arg)
402{
403 int rval = -ENOIOCTLCMD;
404
405 switch (cmd) {
406 /* solaris ioctls are specific to this driver */
407 case WIOCSTART:
408 case WIOCSTOP:
409 case WIOCGSTAT:
410 lock_kernel();
7fa95f72 411 rval = wd_ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
feee207e 412 unlock_kernel();
b66621fe
CH		 413 break;
414 /* everything else is handled by the generic compat layer */
415 default:
416 break;
417 }
418
419 return rval;
420}
421
1da177e4
LT		 422static ssize_t wd_write(struct file *file,
423 const char __user *buf,
424 size_t count,
425 loff_t *ppos)
426{
427 struct wd_timer* pTimer = (struct wd_timer*)file->private_data;
428
429 if(NULL == pTimer) {
430 return(-EINVAL);
431 }
432
433 if (count) {
434 wd_pingtimer(pTimer);
435 return 1;
436 }
437 return 0;
438}
439
440static ssize_t wd_read(struct file * file, char __user *buffer,
441 size_t count, loff_t *ppos)
442{
443#ifdef WD_DEBUG
444 wd_dumpregs();
445 return(0);
446#else
447 return(-EINVAL);
448#endif /* ifdef WD_DEBUG */
449}
450
7d12e780 451static irqreturn_t wd_interrupt(int irq, void *dev_id)
1da177e4
LT		 452{
453 /* Only WD0 will interrupt-- others are NMI and we won't
454 * see them here....
455 */
456 spin_lock_irq(&wd_dev.lock);
457 if((unsigned long)wd_dev.regs == (unsigned long)dev_id)
458 {
459 wd_stoptimer(&wd_dev.watchdog[WD0_ID]);
460 wd_dev.watchdog[WD0_ID].runstatus |= WD_STAT_SVCD;
461 }
462 spin_unlock_irq(&wd_dev.lock);
463 return IRQ_HANDLED;
464}
465
00977a59 466static const struct file_operations wd_fops = {
1da177e4
LT		 467 .owner = THIS_MODULE,
468 .ioctl = wd_ioctl,
b66621fe 469 .compat_ioctl = wd_compat_ioctl,
1da177e4
LT		 470 .open = wd_open,
471 .write = wd_write,
472 .read = wd_read,
473 .release = wd_release,
474};
475
476static struct miscdevice wd0_miscdev = { WD0_MINOR, WD0_DEVNAME, &wd_fops };
477static struct miscdevice wd1_miscdev = { WD1_MINOR, WD1_DEVNAME, &wd_fops };
478static struct miscdevice wd2_miscdev = { WD2_MINOR, WD2_DEVNAME, &wd_fops };
479
480#ifdef WD_DEBUG
481static void wd_dumpregs(void)
482{
483 /* Reading from downcounters initiates watchdog countdown--
484 * Example is included below for illustration purposes.
485 */
486 int i;
487 printk("%s: dumping register values\n", WD_OBPNAME);
488 for(i = WD0_ID; i < WD_NUMDEVS; ++i) {
489 /* printk("\t%s%i: dcntr at 0x%lx: 0x%x\n",
490 * WD_OBPNAME,
491 * i,
492 * (unsigned long)(&wd_dev.watchdog[i].regs->dcntr),
493 * readw(&wd_dev.watchdog[i].regs->dcntr));
494 */
495 printk("\t%s%i: limit at 0x%lx: 0x%x\n",
496 WD_OBPNAME,
497 i,
498 (unsigned long)(&wd_dev.watchdog[i].regs->limit),
499 readw(&wd_dev.watchdog[i].regs->limit));
500 printk("\t%s%i: status at 0x%lx: 0x%x\n",
501 WD_OBPNAME,
502 i,
503 (unsigned long)(&wd_dev.watchdog[i].regs->status),
504 readb(&wd_dev.watchdog[i].regs->status));
505 printk("\t%s%i: driver status: 0x%x\n",
506 WD_OBPNAME,
507 i,
508 wd_getstatus(&wd_dev.watchdog[i]));
509 }
510 printk("\tintr_mask at %p: 0x%x\n",
511 wd_dev.regs + PLD_IMASK,
512 readb(wd_dev.regs + PLD_IMASK));
513 printk("\tpld_status at %p: 0x%x\n",
514 wd_dev.regs + PLD_STATUS,
515 readb(wd_dev.regs + PLD_STATUS));
516}
517#endif
518
519/* Enable or disable watchdog interrupts
520 * Because of the CP1400 defect this should only be
521 * called during initialzation or by wd_[start|stop]timer()
522 *
523 * pTimer - pointer to timer device, or NULL to indicate all timers
524 * enable - non-zero to enable interrupts, zero to disable
525 */
526static void wd_toggleintr(struct wd_timer* pTimer, int enable)
527{
528 unsigned char curregs = wd_readb(wd_dev.regs + PLD_IMASK);
529 unsigned char setregs =
530 (NULL == pTimer) ?
531 (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
532 (pTimer->intr_mask);
533
534 (WD_INTR_ON == enable) ?
535 (curregs &= ~setregs):
536 (curregs |= setregs);
537
538 wd_writeb(curregs, wd_dev.regs + PLD_IMASK);
539 return;
540}
541
542/* Reset countdown timer with 'limit' value and continue countdown.
543 * This will not start a stopped timer.
544 *
545 * pTimer - pointer to timer device
546 */
547static void wd_pingtimer(struct wd_timer* pTimer)
548{
549 if (wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) {
550 wd_readw(pTimer->regs + WD_DCNTR);
551 }
552}
553
554/* Stop a running watchdog timer-- the timer actually keeps
555 * running, but the interrupt is masked so that no action is
556 * taken upon expiration.
557 *
558 * pTimer - pointer to timer device
559 */
560static void wd_stoptimer(struct wd_timer* pTimer)
561{
562 if(wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) {
563 wd_toggleintr(pTimer, WD_INTR_OFF);
564
565 if(wd_dev.isbaddoggie) {
566 pTimer->runstatus |= WD_STAT_BSTOP;
567 wd_brokentimer((unsigned long)&wd_dev);
568 }
569 }
570}
571
572/* Start a watchdog timer with the specified limit value
573 * If the watchdog is running, it will be restarted with
574 * the provided limit value.
575 *
576 * This function will enable interrupts on the specified
577 * watchdog.
578 *
579 * pTimer - pointer to timer device
580 * limit - limit (countdown) value in 1/10th seconds
581 */
582static void wd_starttimer(struct wd_timer* pTimer)
583{
584 if(wd_dev.isbaddoggie) {
585 pTimer->runstatus &= ~WD_STAT_BSTOP;
586 }
587 pTimer->runstatus &= ~WD_STAT_SVCD;
588
589 wd_writew(pTimer->timeout, pTimer->regs + WD_LIMIT);
590 wd_toggleintr(pTimer, WD_INTR_ON);
591}
592
593/* Restarts timer with maximum limit value and
594 * does not unset 'brokenstop' value.
595 */
596static void wd_resetbrokentimer(struct wd_timer* pTimer)
597{
598 wd_toggleintr(pTimer, WD_INTR_ON);
599 wd_writew(WD_BLIMIT, pTimer->regs + WD_LIMIT);
600}
601
602/* Timer device initialization helper.
603 * Returns 0 on success, other on failure
604 */
605static int wd_inittimer(int whichdog)
606{
607 struct miscdevice *whichmisc;
608 void __iomem *whichregs;
609 char whichident[8];
610 int whichmask;
611 __u16 whichlimit;
612
613 switch(whichdog)
614 {
615 case WD0_ID:
616 whichmisc = &wd0_miscdev;
617 strcpy(whichident, "RIC");
618 whichregs = wd_dev.regs + WD0_OFF;
619 whichmask = WD0_INTR_MASK;
620 whichlimit= (0 == wd0_timeout) ?
621 (wd_dev.opt_timeout):
622 (wd0_timeout);
623 break;
624 case WD1_ID:
625 whichmisc = &wd1_miscdev;
626 strcpy(whichident, "XIR");
627 whichregs = wd_dev.regs + WD1_OFF;
628 whichmask = WD1_INTR_MASK;
629 whichlimit= (0 == wd1_timeout) ?
630 (wd_dev.opt_timeout):
631 (wd1_timeout);
632 break;
633 case WD2_ID:
634 whichmisc = &wd2_miscdev;
635 strcpy(whichident, "POR");
636 whichregs = wd_dev.regs + WD2_OFF;
637 whichmask = WD2_INTR_MASK;
638 whichlimit= (0 == wd2_timeout) ?
639 (wd_dev.opt_timeout):
640 (wd2_timeout);
641 break;
642 default:
643 printk("%s: %s: invalid watchdog id: %i\n",
145980a0 644 WD_OBPNAME, __func__, whichdog);
1da177e4
LT		 645 return(1);
646 }
647 if(0 != misc_register(whichmisc))
648 {
649 return(1);
650 }
651 wd_dev.watchdog[whichdog].regs = whichregs;
652 wd_dev.watchdog[whichdog].timeout = whichlimit;
653 wd_dev.watchdog[whichdog].intr_mask = whichmask;
654 wd_dev.watchdog[whichdog].runstatus &= ~WD_STAT_BSTOP;
655 wd_dev.watchdog[whichdog].runstatus |= WD_STAT_INIT;
656
657 printk("%s%i: %s hardware watchdog [%01i.%i sec] %s\n",
658 WD_OBPNAME,
659 whichdog,
660 whichident,
661 wd_dev.watchdog[whichdog].timeout / 10,
662 wd_dev.watchdog[whichdog].timeout % 10,
663 (0 != wd_dev.opt_enable) ? "in ENABLED mode" : "");
664 return(0);
665}
666
667/* Timer method called to reset stopped watchdogs--
668 * because of the PLD bug on CP1400, we cannot mask
669 * interrupts within the PLD so me must continually
670 * reset the timers ad infinitum.
671 */
672static void wd_brokentimer(unsigned long data)
673{
674 struct wd_device* pDev = (struct wd_device*)data;
675 int id, tripped = 0;
676
677 /* kill a running timer instance, in case we
678 * were called directly instead of by kernel timer
679 */
680 if(timer_pending(&wd_timer)) {
681 del_timer(&wd_timer);
682 }
683
684 for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
685 if(pDev->watchdog[id].runstatus & WD_STAT_BSTOP) {
686 ++tripped;
687 wd_resetbrokentimer(&pDev->watchdog[id]);
688 }
689 }
690
691 if(tripped) {
692 /* there is at least one timer brokenstopped-- reschedule */
693 init_timer(&wd_timer);
694 wd_timer.expires = WD_BTIMEOUT;
695 add_timer(&wd_timer);
696 }
697}
698
699static int wd_getstatus(struct wd_timer* pTimer)
700{
701 unsigned char stat = wd_readb(pTimer->regs + WD_STATUS);
702 unsigned char intr = wd_readb(wd_dev.regs + PLD_IMASK);
703 unsigned char ret = WD_STOPPED;
704
705 /* determine STOPPED */
706 if(0 == stat ) {
707 return(ret);
708 }
709 /* determine EXPIRED vs FREERUN vs RUNNING */
710 else if(WD_S_EXPIRED & stat) {
711 ret = WD_EXPIRED;
712 }
713 else if(WD_S_RUNNING & stat) {
714 if(intr & pTimer->intr_mask) {
715 ret = WD_FREERUN;
716 }
717 else {
718 /* Fudge WD_EXPIRED status for defective CP1400--
719 * IF timer is running
720 * AND brokenstop is set
721 * AND an interrupt has been serviced
722 * we are WD_EXPIRED.
723 *
724 * IF timer is running
725 * AND brokenstop is set
726 * AND no interrupt has been serviced
727 * we are WD_FREERUN.
728 */
729 if(wd_dev.isbaddoggie && (pTimer->runstatus & WD_STAT_BSTOP)) {
730 if(pTimer->runstatus & WD_STAT_SVCD) {
731 ret = WD_EXPIRED;
732 }
733 else {
734 /* we could as well pretend we are expired */
735 ret = WD_FREERUN;
736 }
737 }
738 else {
739 ret = WD_RUNNING;
740 }
741 }
742 }
743
744 /* determine SERVICED */
745 if(pTimer->runstatus & WD_STAT_SVCD) {
746 ret |= WD_SERVICED;
747 }
748
749 return(ret);
750}
751
752static int __init wd_init(void)
753{
754 int id;
755 struct linux_ebus *ebus = NULL;
756 struct linux_ebus_device *edev = NULL;
757
758 for_each_ebus(ebus) {
759 for_each_ebusdev(edev, ebus) {
1715f5ef 760 if (!strcmp(edev->ofdev.node->name, WD_OBPNAME))
1da177e4
LT		 761 goto ebus_done;
762 }
763 }
764
765ebus_done:
766 if(!edev) {
767 printk("%s: unable to locate device\n", WD_OBPNAME);
768 return -ENODEV;
769 }
770
771 wd_dev.regs =
772 ioremap(edev->resource[0].start, 4 * WD_TIMER_REGSZ); /* ? */
773
774 if(NULL == wd_dev.regs) {
775 printk("%s: unable to map registers\n", WD_OBPNAME);
776 return(-ENODEV);
777 }
778
779 /* initialize device structure from OBP parameters */
780 wd_dev.irq = edev->irqs[0];
781 wd_dev.opt_enable = wd_opt_enable();
782 wd_dev.opt_reboot = wd_opt_reboot();
783 wd_dev.opt_timeout = wd_opt_timeout();
784 wd_dev.isbaddoggie = wd_isbroken();
785
786 /* disable all interrupts unless watchdog-enabled? == true */
787 if(! wd_dev.opt_enable) {
788 wd_toggleintr(NULL, WD_INTR_OFF);
789 }
790
791 /* register miscellaneous devices */
792 for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
793 if(0 != wd_inittimer(id)) {
794 printk("%s%i: unable to initialize\n", WD_OBPNAME, id);
795 }
796 }
797
798 /* warn about possible defective PLD */
799 if(wd_dev.isbaddoggie) {
800 init_timer(&wd_timer);
801 wd_timer.function = wd_brokentimer;
802 wd_timer.data = (unsigned long)&wd_dev;
803 wd_timer.expires = WD_BTIMEOUT;
804
805 printk("%s: PLD defect workaround enabled for model %s\n",
806 WD_OBPNAME, WD_BADMODEL);
807 }
808 return(0);
809}
810
811static void __exit wd_cleanup(void)
812{
813 int id;
814
815 /* if 'watchdog-enable?' == TRUE, timers are not stopped
816 * when module is unloaded. All brokenstopped timers will
817 * also now eventually trip.
818 */
819 for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
820 if(WD_S_RUNNING == wd_readb(wd_dev.watchdog[id].regs + WD_STATUS)) {
821 if(wd_dev.opt_enable) {
822 printk(KERN_WARNING "%s%i: timer not stopped at release\n",
823 WD_OBPNAME, id);
824 }
825 else {
826 wd_stoptimer(&wd_dev.watchdog[id]);
827 if(wd_dev.watchdog[id].runstatus & WD_STAT_BSTOP) {
828 wd_resetbrokentimer(&wd_dev.watchdog[id]);
829 printk(KERN_WARNING
830 "%s%i: defect workaround disabled at release, "\
831 "timer expires in ~%01i sec\n",
832 WD_OBPNAME, id,
833 wd_readw(wd_dev.watchdog[id].regs + WD_LIMIT) / 10);
834 }
835 }
836 }
837 }
838
839 if(wd_dev.isbaddoggie && timer_pending(&wd_timer)) {
840 del_timer(&wd_timer);
841 }
842 if(0 != (wd_dev.watchdog[WD0_ID].runstatus & WD_STAT_INIT)) {
843 misc_deregister(&wd0_miscdev);
844 }
845 if(0 != (wd_dev.watchdog[WD1_ID].runstatus & WD_STAT_INIT)) {
846 misc_deregister(&wd1_miscdev);
847 }
848 if(0 != (wd_dev.watchdog[WD2_ID].runstatus & WD_STAT_INIT)) {
849 misc_deregister(&wd2_miscdev);
850 }
851 if(0 != wd_dev.initialized) {
852 free_irq(wd_dev.irq, (void *)wd_dev.regs);
853 }
854 iounmap(wd_dev.regs);
855}
856
857module_init(wd_init);
858module_exit(wd_cleanup);
kernel source for telekom puls (alcatel/mediatek)