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qeth: improving debug message handling
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/string.h>
14#include <linux/errno.h>
15#include <linux/kernel.h>
16#include <linux/ip.h>
17#include <linux/ipv6.h>
18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
21
22#include <asm-s390/ebcdic.h>
23#include <asm-s390/io.h>
24#include <asm/s390_rdev.h>
25
26#include "qeth_core.h"
27#include "qeth_core_offl.h"
28
d11ba0c4
PT		 29static DEFINE_PER_CPU(char[256], qeth_core_dbf_txt_buf);
30#define QETH_DBF_TXT_BUF qeth_core_dbf_txt_buf
31
32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_QERR] = {"qeth_qerr",
38 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_TRACE] = {"qeth_trace",
40 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
41 [QETH_DBF_MSG] = {"qeth_msg",
42 8, 1, 128, 3, &debug_sprintf_view, NULL},
43 [QETH_DBF_SENSE] = {"qeth_sense",
44 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_MISC] = {"qeth_misc",
46 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
47 [QETH_DBF_CTRL] = {"qeth_control",
48 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
49};
50EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 51
52struct qeth_card_list_struct qeth_core_card_list;
53EXPORT_SYMBOL_GPL(qeth_core_card_list);
4a71df50
FB		 54
55static struct device *qeth_core_root_dev;
56static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
57static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 58
59static void qeth_send_control_data_cb(struct qeth_channel *,
60 struct qeth_cmd_buffer *);
61static int qeth_issue_next_read(struct qeth_card *);
62static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
63static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
64static void qeth_free_buffer_pool(struct qeth_card *);
65static int qeth_qdio_establish(struct qeth_card *);
66
67
68static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
69 struct qdio_buffer *buffer, int is_tso,
70 int *next_element_to_fill)
71{
72 struct skb_frag_struct *frag;
73 int fragno;
74 unsigned long addr;
75 int element, cnt, dlen;
76
77 fragno = skb_shinfo(skb)->nr_frags;
78 element = *next_element_to_fill;
79 dlen = 0;
80
81 if (is_tso)
82 buffer->element[element].flags =
83 SBAL_FLAGS_MIDDLE_FRAG;
84 else
85 buffer->element[element].flags =
86 SBAL_FLAGS_FIRST_FRAG;
87 dlen = skb->len - skb->data_len;
88 if (dlen) {
89 buffer->element[element].addr = skb->data;
90 buffer->element[element].length = dlen;
91 element++;
92 }
93 for (cnt = 0; cnt < fragno; cnt++) {
94 frag = &skb_shinfo(skb)->frags[cnt];
95 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
96 frag->page_offset;
97 buffer->element[element].addr = (char *)addr;
98 buffer->element[element].length = frag->size;
99 if (cnt < (fragno - 1))
100 buffer->element[element].flags =
101 SBAL_FLAGS_MIDDLE_FRAG;
102 else
103 buffer->element[element].flags =
104 SBAL_FLAGS_LAST_FRAG;
105 element++;
106 }
107 *next_element_to_fill = element;
108}
109
110static inline const char *qeth_get_cardname(struct qeth_card *card)
111{
112 if (card->info.guestlan) {
113 switch (card->info.type) {
114 case QETH_CARD_TYPE_OSAE:
115 return " Guest LAN QDIO";
116 case QETH_CARD_TYPE_IQD:
117 return " Guest LAN Hiper";
118 default:
119 return " unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSAE:
124 return " OSD Express";
125 case QETH_CARD_TYPE_IQD:
126 return " HiperSockets";
127 case QETH_CARD_TYPE_OSN:
128 return " OSN QDIO";
129 default:
130 return " unknown";
131 }
132 }
133 return " n/a";
134}
135
136/* max length to be returned: 14 */
137const char *qeth_get_cardname_short(struct qeth_card *card)
138{
139 if (card->info.guestlan) {
140 switch (card->info.type) {
141 case QETH_CARD_TYPE_OSAE:
142 return "GuestLAN QDIO";
143 case QETH_CARD_TYPE_IQD:
144 return "GuestLAN Hiper";
145 default:
146 return "unknown";
147 }
148 } else {
149 switch (card->info.type) {
150 case QETH_CARD_TYPE_OSAE:
151 switch (card->info.link_type) {
152 case QETH_LINK_TYPE_FAST_ETH:
153 return "OSD_100";
154 case QETH_LINK_TYPE_HSTR:
155 return "HSTR";
156 case QETH_LINK_TYPE_GBIT_ETH:
157 return "OSD_1000";
158 case QETH_LINK_TYPE_10GBIT_ETH:
159 return "OSD_10GIG";
160 case QETH_LINK_TYPE_LANE_ETH100:
161 return "OSD_FE_LANE";
162 case QETH_LINK_TYPE_LANE_TR:
163 return "OSD_TR_LANE";
164 case QETH_LINK_TYPE_LANE_ETH1000:
165 return "OSD_GbE_LANE";
166 case QETH_LINK_TYPE_LANE:
167 return "OSD_ATM_LANE";
168 default:
169 return "OSD_Express";
170 }
171 case QETH_CARD_TYPE_IQD:
172 return "HiperSockets";
173 case QETH_CARD_TYPE_OSN:
174 return "OSN";
175 default:
176 return "unknown";
177 }
178 }
179 return "n/a";
180}
181
182void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
183 int clear_start_mask)
184{
185 unsigned long flags;
186
187 spin_lock_irqsave(&card->thread_mask_lock, flags);
188 card->thread_allowed_mask = threads;
189 if (clear_start_mask)
190 card->thread_start_mask &= threads;
191 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
192 wake_up(&card->wait_q);
193}
194EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
195
196int qeth_threads_running(struct qeth_card *card, unsigned long threads)
197{
198 unsigned long flags;
199 int rc = 0;
200
201 spin_lock_irqsave(&card->thread_mask_lock, flags);
202 rc = (card->thread_running_mask & threads);
203 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
204 return rc;
205}
206EXPORT_SYMBOL_GPL(qeth_threads_running);
207
208int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
209{
210 return wait_event_interruptible(card->wait_q,
211 qeth_threads_running(card, threads) == 0);
212}
213EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
214
215void qeth_clear_working_pool_list(struct qeth_card *card)
216{
217 struct qeth_buffer_pool_entry *pool_entry, *tmp;
218
d11ba0c4 219 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 220 list_for_each_entry_safe(pool_entry, tmp,
221 &card->qdio.in_buf_pool.entry_list, list){
222 list_del(&pool_entry->list);
223 }
224}
225EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
226
227static int qeth_alloc_buffer_pool(struct qeth_card *card)
228{
229 struct qeth_buffer_pool_entry *pool_entry;
230 void *ptr;
231 int i, j;
232
d11ba0c4 233 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 234 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
235 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
236 if (!pool_entry) {
237 qeth_free_buffer_pool(card);
238 return -ENOMEM;
239 }
240 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 241 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 242 if (!ptr) {
243 while (j > 0)
244 free_page((unsigned long)
245 pool_entry->elements[--j]);
246 kfree(pool_entry);
247 qeth_free_buffer_pool(card);
248 return -ENOMEM;
249 }
250 pool_entry->elements[j] = ptr;
251 }
252 list_add(&pool_entry->init_list,
253 &card->qdio.init_pool.entry_list);
254 }
255 return 0;
256}
257
258int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
259{
d11ba0c4 260 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 261
262 if ((card->state != CARD_STATE_DOWN) &&
263 (card->state != CARD_STATE_RECOVER))
264 return -EPERM;
265
266 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
267 qeth_clear_working_pool_list(card);
268 qeth_free_buffer_pool(card);
269 card->qdio.in_buf_pool.buf_count = bufcnt;
270 card->qdio.init_pool.buf_count = bufcnt;
271 return qeth_alloc_buffer_pool(card);
272}
273
274int qeth_set_large_send(struct qeth_card *card,
275 enum qeth_large_send_types type)
276{
277 int rc = 0;
278
279 if (card->dev == NULL) {
280 card->options.large_send = type;
281 return 0;
282 }
283 if (card->state == CARD_STATE_UP)
284 netif_tx_disable(card->dev);
285 card->options.large_send = type;
286 switch (card->options.large_send) {
287 case QETH_LARGE_SEND_EDDP:
288 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
289 NETIF_F_HW_CSUM;
290 break;
291 case QETH_LARGE_SEND_TSO:
292 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
293 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
294 NETIF_F_HW_CSUM;
295 } else {
296 PRINT_WARN("TSO not supported on %s. "
297 "large_send set to 'no'.\n",
298 card->dev->name);
299 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
300 NETIF_F_HW_CSUM);
301 card->options.large_send = QETH_LARGE_SEND_NO;
302 rc = -EOPNOTSUPP;
303 }
304 break;
305 default: /* includes QETH_LARGE_SEND_NO */
306 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
307 NETIF_F_HW_CSUM);
308 break;
309 }
310 if (card->state == CARD_STATE_UP)
311 netif_wake_queue(card->dev);
312 return rc;
313}
314EXPORT_SYMBOL_GPL(qeth_set_large_send);
315
316static int qeth_issue_next_read(struct qeth_card *card)
317{
318 int rc;
319 struct qeth_cmd_buffer *iob;
320
d11ba0c4 321 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 322 if (card->read.state != CH_STATE_UP)
323 return -EIO;
324 iob = qeth_get_buffer(&card->read);
325 if (!iob) {
326 PRINT_WARN("issue_next_read failed: no iob available!\n");
327 return -ENOMEM;
328 }
329 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 330 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 331 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
332 (addr_t) iob, 0, 0);
333 if (rc) {
334 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
335 atomic_set(&card->read.irq_pending, 0);
336 qeth_schedule_recovery(card);
337 wake_up(&card->wait_q);
338 }
339 return rc;
340}
341
342static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
343{
344 struct qeth_reply *reply;
345
346 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
347 if (reply) {
348 atomic_set(&reply->refcnt, 1);
349 atomic_set(&reply->received, 0);
350 reply->card = card;
351 };
352 return reply;
353}
354
355static void qeth_get_reply(struct qeth_reply *reply)
356{
357 WARN_ON(atomic_read(&reply->refcnt) <= 0);
358 atomic_inc(&reply->refcnt);
359}
360
361static void qeth_put_reply(struct qeth_reply *reply)
362{
363 WARN_ON(atomic_read(&reply->refcnt) <= 0);
364 if (atomic_dec_and_test(&reply->refcnt))
365 kfree(reply);
366}
367
d11ba0c4 368static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 369 struct qeth_card *card)
370{
4a71df50 371 char *ipa_name;
d11ba0c4 372 int com = cmd->hdr.command;
4a71df50 373 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 374 if (rc)
375 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
376 ipa_name, com, QETH_CARD_IFNAME(card),
377 rc, qeth_get_ipa_msg(rc));
378 else
379 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
380 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 381}
382
383static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
384 struct qeth_cmd_buffer *iob)
385{
386 struct qeth_ipa_cmd *cmd = NULL;
387
d11ba0c4 388 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 389 if (IS_IPA(iob->data)) {
390 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
391 if (IS_IPA_REPLY(cmd)) {
d11ba0c4
PT		 392 if (cmd->hdr.command < IPA_CMD_SETCCID ||
393 cmd->hdr.command > IPA_CMD_MODCCID)
394 qeth_issue_ipa_msg(cmd,
395 cmd->hdr.return_code, card);
4a71df50
FB		 396 return cmd;
397 } else {
398 switch (cmd->hdr.command) {
399 case IPA_CMD_STOPLAN:
400 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
401 "there is a network problem or "
402 "someone pulled the cable or "
403 "disabled the port.\n",
404 QETH_CARD_IFNAME(card),
405 card->info.chpid);
406 card->lan_online = 0;
407 if (card->dev && netif_carrier_ok(card->dev))
408 netif_carrier_off(card->dev);
409 return NULL;
410 case IPA_CMD_STARTLAN:
411 PRINT_INFO("Link reestablished on %s "
412 "(CHPID 0x%X). Scheduling "
413 "IP address reset.\n",
414 QETH_CARD_IFNAME(card),
415 card->info.chpid);
416 netif_carrier_on(card->dev);
922dc062 417 card->lan_online = 1;
4a71df50
FB		 418 qeth_schedule_recovery(card);
419 return NULL;
420 case IPA_CMD_MODCCID:
421 return cmd;
422 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 423 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 424 break;
425 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 426 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 427 break;
428 default:
429 PRINT_WARN("Received data is IPA "
430 "but not a reply!\n");
431 break;
432 }
433 }
434 }
435 return cmd;
436}
437
438void qeth_clear_ipacmd_list(struct qeth_card *card)
439{
440 struct qeth_reply *reply, *r;
441 unsigned long flags;
442
d11ba0c4 443 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 444
445 spin_lock_irqsave(&card->lock, flags);
446 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
447 qeth_get_reply(reply);
448 reply->rc = -EIO;
449 atomic_inc(&reply->received);
450 list_del_init(&reply->list);
451 wake_up(&reply->wait_q);
452 qeth_put_reply(reply);
453 }
454 spin_unlock_irqrestore(&card->lock, flags);
455}
456EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
457
458static int qeth_check_idx_response(unsigned char *buffer)
459{
460 if (!buffer)
461 return 0;
462
d11ba0c4 463 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50
FB		 464 if ((buffer[2] & 0xc0) == 0xc0) {
465 PRINT_WARN("received an IDX TERMINATE "
466 "with cause code 0x%02x%s\n",
467 buffer[4],
468 ((buffer[4] == 0x22) ?
469 " -- try another portname" : ""));
d11ba0c4
PT		 470 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
471 QETH_DBF_TEXT(TRACE, 2, " idxterm");
472 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 473 return -EIO;
474 }
475 return 0;
476}
477
478static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
479 __u32 len)
480{
481 struct qeth_card *card;
482
d11ba0c4 483 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 484 card = CARD_FROM_CDEV(channel->ccwdev);
485 if (channel == &card->read)
486 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
487 else
488 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
489 channel->ccw.count = len;
490 channel->ccw.cda = (__u32) __pa(iob);
491}
492
493static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
494{
495 __u8 index;
496
d11ba0c4 497 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 498 index = channel->io_buf_no;
499 do {
500 if (channel->iob[index].state == BUF_STATE_FREE) {
501 channel->iob[index].state = BUF_STATE_LOCKED;
502 channel->io_buf_no = (channel->io_buf_no + 1) %
503 QETH_CMD_BUFFER_NO;
504 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
505 return channel->iob + index;
506 }
507 index = (index + 1) % QETH_CMD_BUFFER_NO;
508 } while (index != channel->io_buf_no);
509
510 return NULL;
511}
512
513void qeth_release_buffer(struct qeth_channel *channel,
514 struct qeth_cmd_buffer *iob)
515{
516 unsigned long flags;
517
d11ba0c4 518 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 519 spin_lock_irqsave(&channel->iob_lock, flags);
520 memset(iob->data, 0, QETH_BUFSIZE);
521 iob->state = BUF_STATE_FREE;
522 iob->callback = qeth_send_control_data_cb;
523 iob->rc = 0;
524 spin_unlock_irqrestore(&channel->iob_lock, flags);
525}
526EXPORT_SYMBOL_GPL(qeth_release_buffer);
527
528static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
529{
530 struct qeth_cmd_buffer *buffer = NULL;
531 unsigned long flags;
532
533 spin_lock_irqsave(&channel->iob_lock, flags);
534 buffer = __qeth_get_buffer(channel);
535 spin_unlock_irqrestore(&channel->iob_lock, flags);
536 return buffer;
537}
538
539struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
540{
541 struct qeth_cmd_buffer *buffer;
542 wait_event(channel->wait_q,
543 ((buffer = qeth_get_buffer(channel)) != NULL));
544 return buffer;
545}
546EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
547
548void qeth_clear_cmd_buffers(struct qeth_channel *channel)
549{
550 int cnt;
551
552 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
553 qeth_release_buffer(channel, &channel->iob[cnt]);
554 channel->buf_no = 0;
555 channel->io_buf_no = 0;
556}
557EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
558
559static void qeth_send_control_data_cb(struct qeth_channel *channel,
560 struct qeth_cmd_buffer *iob)
561{
562 struct qeth_card *card;
563 struct qeth_reply *reply, *r;
564 struct qeth_ipa_cmd *cmd;
565 unsigned long flags;
566 int keep_reply;
567
d11ba0c4 568 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 569
570 card = CARD_FROM_CDEV(channel->ccwdev);
571 if (qeth_check_idx_response(iob->data)) {
572 qeth_clear_ipacmd_list(card);
573 qeth_schedule_recovery(card);
574 goto out;
575 }
576
577 cmd = qeth_check_ipa_data(card, iob);
578 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
579 goto out;
580 /*in case of OSN : check if cmd is set */
581 if (card->info.type == QETH_CARD_TYPE_OSN &&
582 cmd &&
583 cmd->hdr.command != IPA_CMD_STARTLAN &&
584 card->osn_info.assist_cb != NULL) {
585 card->osn_info.assist_cb(card->dev, cmd);
586 goto out;
587 }
588
589 spin_lock_irqsave(&card->lock, flags);
590 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
591 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
592 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
593 qeth_get_reply(reply);
594 list_del_init(&reply->list);
595 spin_unlock_irqrestore(&card->lock, flags);
596 keep_reply = 0;
597 if (reply->callback != NULL) {
598 if (cmd) {
599 reply->offset = (__u16)((char *)cmd -
600 (char *)iob->data);
601 keep_reply = reply->callback(card,
602 reply,
603 (unsigned long)cmd);
604 } else
605 keep_reply = reply->callback(card,
606 reply,
607 (unsigned long)iob);
608 }
609 if (cmd)
610 reply->rc = (u16) cmd->hdr.return_code;
611 else if (iob->rc)
612 reply->rc = iob->rc;
613 if (keep_reply) {
614 spin_lock_irqsave(&card->lock, flags);
615 list_add_tail(&reply->list,
616 &card->cmd_waiter_list);
617 spin_unlock_irqrestore(&card->lock, flags);
618 } else {
619 atomic_inc(&reply->received);
620 wake_up(&reply->wait_q);
621 }
622 qeth_put_reply(reply);
623 goto out;
624 }
625 }
626 spin_unlock_irqrestore(&card->lock, flags);
627out:
628 memcpy(&card->seqno.pdu_hdr_ack,
629 QETH_PDU_HEADER_SEQ_NO(iob->data),
630 QETH_SEQ_NO_LENGTH);
631 qeth_release_buffer(channel, iob);
632}
633
634static int qeth_setup_channel(struct qeth_channel *channel)
635{
636 int cnt;
637
d11ba0c4 638 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 639 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
640 channel->iob[cnt].data = (char *)
641 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
642 if (channel->iob[cnt].data == NULL)
643 break;
644 channel->iob[cnt].state = BUF_STATE_FREE;
645 channel->iob[cnt].channel = channel;
646 channel->iob[cnt].callback = qeth_send_control_data_cb;
647 channel->iob[cnt].rc = 0;
648 }
649 if (cnt < QETH_CMD_BUFFER_NO) {
650 while (cnt-- > 0)
651 kfree(channel->iob[cnt].data);
652 return -ENOMEM;
653 }
654 channel->buf_no = 0;
655 channel->io_buf_no = 0;
656 atomic_set(&channel->irq_pending, 0);
657 spin_lock_init(&channel->iob_lock);
658
659 init_waitqueue_head(&channel->wait_q);
660 return 0;
661}
662
663static int qeth_set_thread_start_bit(struct qeth_card *card,
664 unsigned long thread)
665{
666 unsigned long flags;
667
668 spin_lock_irqsave(&card->thread_mask_lock, flags);
669 if (!(card->thread_allowed_mask & thread) ||
670 (card->thread_start_mask & thread)) {
671 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
672 return -EPERM;
673 }
674 card->thread_start_mask |= thread;
675 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
676 return 0;
677}
678
679void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
680{
681 unsigned long flags;
682
683 spin_lock_irqsave(&card->thread_mask_lock, flags);
684 card->thread_start_mask &= ~thread;
685 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
686 wake_up(&card->wait_q);
687}
688EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
689
690void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
691{
692 unsigned long flags;
693
694 spin_lock_irqsave(&card->thread_mask_lock, flags);
695 card->thread_running_mask &= ~thread;
696 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
697 wake_up(&card->wait_q);
698}
699EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
700
701static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
702{
703 unsigned long flags;
704 int rc = 0;
705
706 spin_lock_irqsave(&card->thread_mask_lock, flags);
707 if (card->thread_start_mask & thread) {
708 if ((card->thread_allowed_mask & thread) &&
709 !(card->thread_running_mask & thread)) {
710 rc = 1;
711 card->thread_start_mask &= ~thread;
712 card->thread_running_mask |= thread;
713 } else
714 rc = -EPERM;
715 }
716 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
717 return rc;
718}
719
720int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
721{
722 int rc = 0;
723
724 wait_event(card->wait_q,
725 (rc = __qeth_do_run_thread(card, thread)) >= 0);
726 return rc;
727}
728EXPORT_SYMBOL_GPL(qeth_do_run_thread);
729
730void qeth_schedule_recovery(struct qeth_card *card)
731{
d11ba0c4 732 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 733 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
734 schedule_work(&card->kernel_thread_starter);
735}
736EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
737
738static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
739{
740 int dstat, cstat;
741 char *sense;
742
743 sense = (char *) irb->ecw;
744 cstat = irb->scsw.cstat;
745 dstat = irb->scsw.dstat;
746
747 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
748 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
749 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 750 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
4a71df50
FB		 751 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
752 cdev->dev.bus_id, dstat, cstat);
753 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
754 16, 1, irb, 64, 1);
755 return 1;
756 }
757
758 if (dstat & DEV_STAT_UNIT_CHECK) {
759 if (sense[SENSE_RESETTING_EVENT_BYTE] &
760 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 761 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 762 return 1;
763 }
764 if (sense[SENSE_COMMAND_REJECT_BYTE] &
765 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 766 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
4a71df50
FB		 767 return 0;
768 }
769 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 770 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 771 return 1;
772 }
773 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 774 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 775 return 0;
776 }
d11ba0c4 777 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 778 return 1;
779 }
780 return 0;
781}
782
783static long __qeth_check_irb_error(struct ccw_device *cdev,
784 unsigned long intparm, struct irb *irb)
785{
786 if (!IS_ERR(irb))
787 return 0;
788
789 switch (PTR_ERR(irb)) {
790 case -EIO:
791 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
d11ba0c4
PT		 792 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
793 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 794 break;
795 case -ETIMEDOUT:
796 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
d11ba0c4
PT		 797 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
798 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 799 if (intparm == QETH_RCD_PARM) {
800 struct qeth_card *card = CARD_FROM_CDEV(cdev);
801
802 if (card && (card->data.ccwdev == cdev)) {
803 card->data.state = CH_STATE_DOWN;
804 wake_up(&card->wait_q);
805 }
806 }
807 break;
808 default:
809 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
810 cdev->dev.bus_id);
d11ba0c4
PT		 811 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
812 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 813 }
814 return PTR_ERR(irb);
815}
816
817static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
818 struct irb *irb)
819{
820 int rc;
821 int cstat, dstat;
822 struct qeth_cmd_buffer *buffer;
823 struct qeth_channel *channel;
824 struct qeth_card *card;
825 struct qeth_cmd_buffer *iob;
826 __u8 index;
827
d11ba0c4 828 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 829
830 if (__qeth_check_irb_error(cdev, intparm, irb))
831 return;
832 cstat = irb->scsw.cstat;
833 dstat = irb->scsw.dstat;
834
835 card = CARD_FROM_CDEV(cdev);
836 if (!card)
837 return;
838
839 if (card->read.ccwdev == cdev) {
840 channel = &card->read;
d11ba0c4 841 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 842 } else if (card->write.ccwdev == cdev) {
843 channel = &card->write;
d11ba0c4 844 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 845 } else {
846 channel = &card->data;
d11ba0c4 847 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 848 }
849 atomic_set(&channel->irq_pending, 0);
850
851 if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
852 channel->state = CH_STATE_STOPPED;
853
854 if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
855 channel->state = CH_STATE_HALTED;
856
857 /*let's wake up immediately on data channel*/
858 if ((channel == &card->data) && (intparm != 0) &&
859 (intparm != QETH_RCD_PARM))
860 goto out;
861
862 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 863 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 864 /* we don't have to handle this further */
865 intparm = 0;
866 }
867 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 868 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 869 /* we don't have to handle this further */
870 intparm = 0;
871 }
872 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
873 (dstat & DEV_STAT_UNIT_CHECK) ||
874 (cstat)) {
875 if (irb->esw.esw0.erw.cons) {
876 /* TODO: we should make this s390dbf */
877 PRINT_WARN("sense data available on channel %s.\n",
878 CHANNEL_ID(channel));
879 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
880 print_hex_dump(KERN_WARNING, "qeth: irb ",
881 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
882 print_hex_dump(KERN_WARNING, "qeth: sense data ",
883 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
884 }
885 if (intparm == QETH_RCD_PARM) {
886 channel->state = CH_STATE_DOWN;
887 goto out;
888 }
889 rc = qeth_get_problem(cdev, irb);
890 if (rc) {
891 qeth_schedule_recovery(card);
892 goto out;
893 }
894 }
895
896 if (intparm == QETH_RCD_PARM) {
897 channel->state = CH_STATE_RCD_DONE;
898 goto out;
899 }
900 if (intparm) {
901 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
902 buffer->state = BUF_STATE_PROCESSED;
903 }
904 if (channel == &card->data)
905 return;
906 if (channel == &card->read &&
907 channel->state == CH_STATE_UP)
908 qeth_issue_next_read(card);
909
910 iob = channel->iob;
911 index = channel->buf_no;
912 while (iob[index].state == BUF_STATE_PROCESSED) {
913 if (iob[index].callback != NULL)
914 iob[index].callback(channel, iob + index);
915
916 index = (index + 1) % QETH_CMD_BUFFER_NO;
917 }
918 channel->buf_no = index;
919out:
920 wake_up(&card->wait_q);
921 return;
922}
923
924static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
925 struct qeth_qdio_out_buffer *buf)
926{
927 int i;
928 struct sk_buff *skb;
929
930 /* is PCI flag set on buffer? */
931 if (buf->buffer->element[0].flags & 0x40)
932 atomic_dec(&queue->set_pci_flags_count);
933
934 skb = skb_dequeue(&buf->skb_list);
935 while (skb) {
936 atomic_dec(&skb->users);
937 dev_kfree_skb_any(skb);
938 skb = skb_dequeue(&buf->skb_list);
939 }
940 qeth_eddp_buf_release_contexts(buf);
941 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
942 buf->buffer->element[i].length = 0;
943 buf->buffer->element[i].addr = NULL;
944 buf->buffer->element[i].flags = 0;
945 }
946 buf->next_element_to_fill = 0;
947 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
948}
949
950void qeth_clear_qdio_buffers(struct qeth_card *card)
951{
952 int i, j;
953
d11ba0c4 954 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 955 /* clear outbound buffers to free skbs */
956 for (i = 0; i < card->qdio.no_out_queues; ++i)
957 if (card->qdio.out_qs[i]) {
958 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
959 qeth_clear_output_buffer(card->qdio.out_qs[i],
960 &card->qdio.out_qs[i]->bufs[j]);
961 }
962}
963EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
964
965static void qeth_free_buffer_pool(struct qeth_card *card)
966{
967 struct qeth_buffer_pool_entry *pool_entry, *tmp;
968 int i = 0;
d11ba0c4 969 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 970 list_for_each_entry_safe(pool_entry, tmp,
971 &card->qdio.init_pool.entry_list, init_list){
972 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
973 free_page((unsigned long)pool_entry->elements[i]);
974 list_del(&pool_entry->init_list);
975 kfree(pool_entry);
976 }
977}
978
979static void qeth_free_qdio_buffers(struct qeth_card *card)
980{
981 int i, j;
982
d11ba0c4 983 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 984 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
985 QETH_QDIO_UNINITIALIZED)
986 return;
987 kfree(card->qdio.in_q);
988 card->qdio.in_q = NULL;
989 /* inbound buffer pool */
990 qeth_free_buffer_pool(card);
991 /* free outbound qdio_qs */
992 if (card->qdio.out_qs) {
993 for (i = 0; i < card->qdio.no_out_queues; ++i) {
994 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
995 qeth_clear_output_buffer(card->qdio.out_qs[i],
996 &card->qdio.out_qs[i]->bufs[j]);
997 kfree(card->qdio.out_qs[i]);
998 }
999 kfree(card->qdio.out_qs);
1000 card->qdio.out_qs = NULL;
1001 }
1002}
1003
1004static void qeth_clean_channel(struct qeth_channel *channel)
1005{
1006 int cnt;
1007
d11ba0c4 1008 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1009 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1010 kfree(channel->iob[cnt].data);
1011}
1012
1013static int qeth_is_1920_device(struct qeth_card *card)
1014{
1015 int single_queue = 0;
1016 struct ccw_device *ccwdev;
1017 struct channelPath_dsc {
1018 u8 flags;
1019 u8 lsn;
1020 u8 desc;
1021 u8 chpid;
1022 u8 swla;
1023 u8 zeroes;
1024 u8 chla;
1025 u8 chpp;
1026 } *chp_dsc;
1027
d11ba0c4 1028 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1029
1030 ccwdev = card->data.ccwdev;
1031 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1032 if (chp_dsc != NULL) {
1033 /* CHPP field bit 6 == 1 -> single queue */
1034 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1035 kfree(chp_dsc);
1036 }
d11ba0c4 1037 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1038 return single_queue;
1039}
1040
1041static void qeth_init_qdio_info(struct qeth_card *card)
1042{
d11ba0c4 1043 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1044 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1045 /* inbound */
1046 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1047 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1048 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1049 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1050 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1051}
1052
1053static void qeth_set_intial_options(struct qeth_card *card)
1054{
1055 card->options.route4.type = NO_ROUTER;
1056 card->options.route6.type = NO_ROUTER;
1057 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1058 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1059 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1060 card->options.fake_broadcast = 0;
1061 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1062 card->options.fake_ll = 0;
1063 card->options.performance_stats = 0;
1064 card->options.rx_sg_cb = QETH_RX_SG_CB;
1065}
1066
1067static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1068{
1069 unsigned long flags;
1070 int rc = 0;
1071
1072 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1073 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1074 (u8) card->thread_start_mask,
1075 (u8) card->thread_allowed_mask,
1076 (u8) card->thread_running_mask);
1077 rc = (card->thread_start_mask & thread);
1078 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1079 return rc;
1080}
1081
1082static void qeth_start_kernel_thread(struct work_struct *work)
1083{
1084 struct qeth_card *card = container_of(work, struct qeth_card,
1085 kernel_thread_starter);
d11ba0c4 1086 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1087
1088 if (card->read.state != CH_STATE_UP &&
1089 card->write.state != CH_STATE_UP)
1090 return;
1091 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1092 kthread_run(card->discipline.recover, (void *) card,
1093 "qeth_recover");
1094}
1095
1096static int qeth_setup_card(struct qeth_card *card)
1097{
1098
d11ba0c4
PT		 1099 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1100 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1101
1102 card->read.state = CH_STATE_DOWN;
1103 card->write.state = CH_STATE_DOWN;
1104 card->data.state = CH_STATE_DOWN;
1105 card->state = CARD_STATE_DOWN;
1106 card->lan_online = 0;
1107 card->use_hard_stop = 0;
1108 card->dev = NULL;
1109 spin_lock_init(&card->vlanlock);
1110 spin_lock_init(&card->mclock);
1111 card->vlangrp = NULL;
1112 spin_lock_init(&card->lock);
1113 spin_lock_init(&card->ip_lock);
1114 spin_lock_init(&card->thread_mask_lock);
1115 card->thread_start_mask = 0;
1116 card->thread_allowed_mask = 0;
1117 card->thread_running_mask = 0;
1118 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1119 INIT_LIST_HEAD(&card->ip_list);
1120 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1121 if (!card->ip_tbd_list) {
d11ba0c4 1122 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
4a71df50
FB		 1123 return -ENOMEM;
1124 }
1125 INIT_LIST_HEAD(card->ip_tbd_list);
1126 INIT_LIST_HEAD(&card->cmd_waiter_list);
1127 init_waitqueue_head(&card->wait_q);
1128 /* intial options */
1129 qeth_set_intial_options(card);
1130 /* IP address takeover */
1131 INIT_LIST_HEAD(&card->ipato.entries);
1132 card->ipato.enabled = 0;
1133 card->ipato.invert4 = 0;
1134 card->ipato.invert6 = 0;
1135 /* init QDIO stuff */
1136 qeth_init_qdio_info(card);
1137 return 0;
1138}
1139
1140static struct qeth_card *qeth_alloc_card(void)
1141{
1142 struct qeth_card *card;
1143
d11ba0c4 1144 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1145 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1146 if (!card)
1147 return NULL;
d11ba0c4 1148 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1149 if (qeth_setup_channel(&card->read)) {
1150 kfree(card);
1151 return NULL;
1152 }
1153 if (qeth_setup_channel(&card->write)) {
1154 qeth_clean_channel(&card->read);
1155 kfree(card);
1156 return NULL;
1157 }
1158 card->options.layer2 = -1;
1159 return card;
1160}
1161
1162static int qeth_determine_card_type(struct qeth_card *card)
1163{
1164 int i = 0;
1165
d11ba0c4 1166 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1167
1168 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1169 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1170 while (known_devices[i][4]) {
1171 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1172 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1173 card->info.type = known_devices[i][4];
1174 card->qdio.no_out_queues = known_devices[i][8];
1175 card->info.is_multicast_different = known_devices[i][9];
1176 if (qeth_is_1920_device(card)) {
1177 PRINT_INFO("Priority Queueing not able "
1178 "due to hardware limitations!\n");
1179 card->qdio.no_out_queues = 1;
1180 card->qdio.default_out_queue = 0;
1181 }
1182 return 0;
1183 }
1184 i++;
1185 }
1186 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1187 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1188 return -ENOENT;
1189}
1190
1191static int qeth_clear_channel(struct qeth_channel *channel)
1192{
1193 unsigned long flags;
1194 struct qeth_card *card;
1195 int rc;
1196
d11ba0c4 1197 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1198 card = CARD_FROM_CDEV(channel->ccwdev);
1199 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1200 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1201 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1202
1203 if (rc)
1204 return rc;
1205 rc = wait_event_interruptible_timeout(card->wait_q,
1206 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1207 if (rc == -ERESTARTSYS)
1208 return rc;
1209 if (channel->state != CH_STATE_STOPPED)
1210 return -ETIME;
1211 channel->state = CH_STATE_DOWN;
1212 return 0;
1213}
1214
1215static int qeth_halt_channel(struct qeth_channel *channel)
1216{
1217 unsigned long flags;
1218 struct qeth_card *card;
1219 int rc;
1220
d11ba0c4 1221 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1222 card = CARD_FROM_CDEV(channel->ccwdev);
1223 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1224 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1225 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1226
1227 if (rc)
1228 return rc;
1229 rc = wait_event_interruptible_timeout(card->wait_q,
1230 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1231 if (rc == -ERESTARTSYS)
1232 return rc;
1233 if (channel->state != CH_STATE_HALTED)
1234 return -ETIME;
1235 return 0;
1236}
1237
1238static int qeth_halt_channels(struct qeth_card *card)
1239{
1240 int rc1 = 0, rc2 = 0, rc3 = 0;
1241
d11ba0c4 1242 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1243 rc1 = qeth_halt_channel(&card->read);
1244 rc2 = qeth_halt_channel(&card->write);
1245 rc3 = qeth_halt_channel(&card->data);
1246 if (rc1)
1247 return rc1;
1248 if (rc2)
1249 return rc2;
1250 return rc3;
1251}
1252
1253static int qeth_clear_channels(struct qeth_card *card)
1254{
1255 int rc1 = 0, rc2 = 0, rc3 = 0;
1256
d11ba0c4 1257 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1258 rc1 = qeth_clear_channel(&card->read);
1259 rc2 = qeth_clear_channel(&card->write);
1260 rc3 = qeth_clear_channel(&card->data);
1261 if (rc1)
1262 return rc1;
1263 if (rc2)
1264 return rc2;
1265 return rc3;
1266}
1267
1268static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1269{
1270 int rc = 0;
1271
d11ba0c4
PT		 1272 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1273 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1274
1275 if (halt)
1276 rc = qeth_halt_channels(card);
1277 if (rc)
1278 return rc;
1279 return qeth_clear_channels(card);
1280}
1281
1282int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1283{
1284 int rc = 0;
1285
d11ba0c4 1286 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1287 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1288 QETH_QDIO_CLEANING)) {
1289 case QETH_QDIO_ESTABLISHED:
1290 if (card->info.type == QETH_CARD_TYPE_IQD)
1291 rc = qdio_cleanup(CARD_DDEV(card),
1292 QDIO_FLAG_CLEANUP_USING_HALT);
1293 else
1294 rc = qdio_cleanup(CARD_DDEV(card),
1295 QDIO_FLAG_CLEANUP_USING_CLEAR);
1296 if (rc)
d11ba0c4 1297 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1298 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1299 break;
1300 case QETH_QDIO_CLEANING:
1301 return rc;
1302 default:
1303 break;
1304 }
1305 rc = qeth_clear_halt_card(card, use_halt);
1306 if (rc)
d11ba0c4 1307 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1308 card->state = CARD_STATE_DOWN;
1309 return rc;
1310}
1311EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1312
1313static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1314 int *length)
1315{
1316 struct ciw *ciw;
1317 char *rcd_buf;
1318 int ret;
1319 struct qeth_channel *channel = &card->data;
1320 unsigned long flags;
1321
1322 /*
1323 * scan for RCD command in extended SenseID data
1324 */
1325 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1326 if (!ciw || ciw->cmd == 0)
1327 return -EOPNOTSUPP;
1328 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1329 if (!rcd_buf)
1330 return -ENOMEM;
1331
1332 channel->ccw.cmd_code = ciw->cmd;
1333 channel->ccw.cda = (__u32) __pa(rcd_buf);
1334 channel->ccw.count = ciw->count;
1335 channel->ccw.flags = CCW_FLAG_SLI;
1336 channel->state = CH_STATE_RCD;
1337 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1338 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1339 QETH_RCD_PARM, LPM_ANYPATH, 0,
1340 QETH_RCD_TIMEOUT);
1341 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1342 if (!ret)
1343 wait_event(card->wait_q,
1344 (channel->state == CH_STATE_RCD_DONE ||
1345 channel->state == CH_STATE_DOWN));
1346 if (channel->state == CH_STATE_DOWN)
1347 ret = -EIO;
1348 else
1349 channel->state = CH_STATE_DOWN;
1350 if (ret) {
1351 kfree(rcd_buf);
1352 *buffer = NULL;
1353 *length = 0;
1354 } else {
1355 *length = ciw->count;
1356 *buffer = rcd_buf;
1357 }
1358 return ret;
1359}
1360
1361static int qeth_get_unitaddr(struct qeth_card *card)
1362{
1363 int length;
1364 char *prcd;
1365 int rc;
1366
d11ba0c4 1367 QETH_DBF_TEXT(SETUP, 2, "getunit");
4a71df50
FB		 1368 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1369 if (rc) {
1370 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1371 CARD_DDEV_ID(card), rc);
1372 return rc;
1373 }
1374 card->info.chpid = prcd[30];
1375 card->info.unit_addr2 = prcd[31];
1376 card->info.cula = prcd[63];
1377 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1378 (prcd[0x11] == _ascebc['M']));
1379 kfree(prcd);
1380 return 0;
1381}
1382
1383static void qeth_init_tokens(struct qeth_card *card)
1384{
1385 card->token.issuer_rm_w = 0x00010103UL;
1386 card->token.cm_filter_w = 0x00010108UL;
1387 card->token.cm_connection_w = 0x0001010aUL;
1388 card->token.ulp_filter_w = 0x0001010bUL;
1389 card->token.ulp_connection_w = 0x0001010dUL;
1390}
1391
1392static void qeth_init_func_level(struct qeth_card *card)
1393{
1394 if (card->ipato.enabled) {
1395 if (card->info.type == QETH_CARD_TYPE_IQD)
1396 card->info.func_level =
1397 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1398 else
1399 card->info.func_level =
1400 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1401 } else {
1402 if (card->info.type == QETH_CARD_TYPE_IQD)
1403 /*FIXME:why do we have same values for dis and ena for
1404 osae??? */
1405 card->info.func_level =
1406 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1407 else
1408 card->info.func_level =
1409 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1410 }
1411}
1412
1413static inline __u16 qeth_raw_devno_from_bus_id(char *id)
1414{
1415 id += (strlen(id) - 4);
1416 return (__u16) simple_strtoul(id, &id, 16);
1417}
1418
1419static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1420 void (*idx_reply_cb)(struct qeth_channel *,
1421 struct qeth_cmd_buffer *))
1422{
1423 struct qeth_cmd_buffer *iob;
1424 unsigned long flags;
1425 int rc;
1426 struct qeth_card *card;
1427
d11ba0c4 1428 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1429 card = CARD_FROM_CDEV(channel->ccwdev);
1430 iob = qeth_get_buffer(channel);
1431 iob->callback = idx_reply_cb;
1432 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1433 channel->ccw.count = QETH_BUFSIZE;
1434 channel->ccw.cda = (__u32) __pa(iob->data);
1435
1436 wait_event(card->wait_q,
1437 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1438 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1439 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1440 rc = ccw_device_start(channel->ccwdev,
1441 &channel->ccw, (addr_t) iob, 0, 0);
1442 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1443
1444 if (rc) {
1445 PRINT_ERR("Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1446 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1447 atomic_set(&channel->irq_pending, 0);
1448 wake_up(&card->wait_q);
1449 return rc;
1450 }
1451 rc = wait_event_interruptible_timeout(card->wait_q,
1452 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1453 if (rc == -ERESTARTSYS)
1454 return rc;
1455 if (channel->state != CH_STATE_UP) {
1456 rc = -ETIME;
d11ba0c4 1457 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1458 qeth_clear_cmd_buffers(channel);
1459 } else
1460 rc = 0;
1461 return rc;
1462}
1463
1464static int qeth_idx_activate_channel(struct qeth_channel *channel,
1465 void (*idx_reply_cb)(struct qeth_channel *,
1466 struct qeth_cmd_buffer *))
1467{
1468 struct qeth_card *card;
1469 struct qeth_cmd_buffer *iob;
1470 unsigned long flags;
1471 __u16 temp;
1472 __u8 tmp;
1473 int rc;
1474
1475 card = CARD_FROM_CDEV(channel->ccwdev);
1476
d11ba0c4 1477 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1478
1479 iob = qeth_get_buffer(channel);
1480 iob->callback = idx_reply_cb;
1481 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1482 channel->ccw.count = IDX_ACTIVATE_SIZE;
1483 channel->ccw.cda = (__u32) __pa(iob->data);
1484 if (channel == &card->write) {
1485 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1486 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1487 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1488 card->seqno.trans_hdr++;
1489 } else {
1490 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1491 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1492 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1493 }
1494 tmp = ((__u8)card->info.portno) | 0x80;
1495 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1496 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1497 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1498 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1499 &card->info.func_level, sizeof(__u16));
1500 temp = qeth_raw_devno_from_bus_id(CARD_DDEV_ID(card));
1501 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp, 2);
1502 temp = (card->info.cula << 8) + card->info.unit_addr2;
1503 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1504
1505 wait_event(card->wait_q,
1506 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1507 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1508 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1509 rc = ccw_device_start(channel->ccwdev,
1510 &channel->ccw, (addr_t) iob, 0, 0);
1511 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1512
1513 if (rc) {
1514 PRINT_ERR("Error1 in activating channel. rc=%d\n", rc);
d11ba0c4 1515 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1516 atomic_set(&channel->irq_pending, 0);
1517 wake_up(&card->wait_q);
1518 return rc;
1519 }
1520 rc = wait_event_interruptible_timeout(card->wait_q,
1521 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1522 if (rc == -ERESTARTSYS)
1523 return rc;
1524 if (channel->state != CH_STATE_ACTIVATING) {
1525 PRINT_WARN("IDX activate timed out!\n");
d11ba0c4 1526 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1527 qeth_clear_cmd_buffers(channel);
1528 return -ETIME;
1529 }
1530 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1531}
1532
1533static int qeth_peer_func_level(int level)
1534{
1535 if ((level & 0xff) == 8)
1536 return (level & 0xff) + 0x400;
1537 if (((level >> 8) & 3) == 1)
1538 return (level & 0xff) + 0x200;
1539 return level;
1540}
1541
1542static void qeth_idx_write_cb(struct qeth_channel *channel,
1543 struct qeth_cmd_buffer *iob)
1544{
1545 struct qeth_card *card;
1546 __u16 temp;
1547
d11ba0c4 1548 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1549
1550 if (channel->state == CH_STATE_DOWN) {
1551 channel->state = CH_STATE_ACTIVATING;
1552 goto out;
1553 }
1554 card = CARD_FROM_CDEV(channel->ccwdev);
1555
1556 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1557 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1558 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1559 "adapter exclusively used by another host\n",
1560 CARD_WDEV_ID(card));
1561 else
1562 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1563 "negative reply\n", CARD_WDEV_ID(card));
1564 goto out;
1565 }
1566 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1567 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1568 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1569 "function level mismatch "
1570 "(sent: 0x%x, received: 0x%x)\n",
1571 CARD_WDEV_ID(card), card->info.func_level, temp);
1572 goto out;
1573 }
1574 channel->state = CH_STATE_UP;
1575out:
1576 qeth_release_buffer(channel, iob);
1577}
1578
1579static void qeth_idx_read_cb(struct qeth_channel *channel,
1580 struct qeth_cmd_buffer *iob)
1581{
1582 struct qeth_card *card;
1583 __u16 temp;
1584
d11ba0c4 1585 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1586 if (channel->state == CH_STATE_DOWN) {
1587 channel->state = CH_STATE_ACTIVATING;
1588 goto out;
1589 }
1590
1591 card = CARD_FROM_CDEV(channel->ccwdev);
1592 if (qeth_check_idx_response(iob->data))
1593 goto out;
1594
1595 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1596 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1597 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1598 "adapter exclusively used by another host\n",
1599 CARD_RDEV_ID(card));
1600 else
1601 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1602 "negative reply\n", CARD_RDEV_ID(card));
1603 goto out;
1604 }
1605
1606/**
1607 * temporary fix for microcode bug
1608 * to revert it,replace OR by AND
1609 */
1610 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1611 (card->info.type == QETH_CARD_TYPE_OSAE))
1612 card->info.portname_required = 1;
1613
1614 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1615 if (temp != qeth_peer_func_level(card->info.func_level)) {
1616 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1617 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1618 CARD_RDEV_ID(card), card->info.func_level, temp);
1619 goto out;
1620 }
1621 memcpy(&card->token.issuer_rm_r,
1622 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1623 QETH_MPC_TOKEN_LENGTH);
1624 memcpy(&card->info.mcl_level[0],
1625 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1626 channel->state = CH_STATE_UP;
1627out:
1628 qeth_release_buffer(channel, iob);
1629}
1630
1631void qeth_prepare_control_data(struct qeth_card *card, int len,
1632 struct qeth_cmd_buffer *iob)
1633{
1634 qeth_setup_ccw(&card->write, iob->data, len);
1635 iob->callback = qeth_release_buffer;
1636
1637 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1638 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1639 card->seqno.trans_hdr++;
1640 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1641 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1642 card->seqno.pdu_hdr++;
1643 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1644 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1645 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1646}
1647EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1648
1649int qeth_send_control_data(struct qeth_card *card, int len,
1650 struct qeth_cmd_buffer *iob,
1651 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1652 unsigned long),
1653 void *reply_param)
1654{
1655 int rc;
1656 unsigned long flags;
1657 struct qeth_reply *reply = NULL;
1658 unsigned long timeout;
1659
d11ba0c4 1660 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1661
1662 reply = qeth_alloc_reply(card);
1663 if (!reply) {
d11ba0c4 1664 PRINT_WARN("Could not alloc qeth_reply!\n");
4a71df50
FB		 1665 return -ENOMEM;
1666 }
1667 reply->callback = reply_cb;
1668 reply->param = reply_param;
1669 if (card->state == CARD_STATE_DOWN)
1670 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1671 else
1672 reply->seqno = card->seqno.ipa++;
1673 init_waitqueue_head(&reply->wait_q);
1674 spin_lock_irqsave(&card->lock, flags);
1675 list_add_tail(&reply->list, &card->cmd_waiter_list);
1676 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1677 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1678
1679 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1680 qeth_prepare_control_data(card, len, iob);
1681
1682 if (IS_IPA(iob->data))
1683 timeout = jiffies + QETH_IPA_TIMEOUT;
1684 else
1685 timeout = jiffies + QETH_TIMEOUT;
1686
d11ba0c4 1687 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1688 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1689 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1690 (addr_t) iob, 0, 0);
1691 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1692 if (rc) {
1693 PRINT_WARN("qeth_send_control_data: "
1694 "ccw_device_start rc = %i\n", rc);
d11ba0c4 1695 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1696 spin_lock_irqsave(&card->lock, flags);
1697 list_del_init(&reply->list);
1698 qeth_put_reply(reply);
1699 spin_unlock_irqrestore(&card->lock, flags);
1700 qeth_release_buffer(iob->channel, iob);
1701 atomic_set(&card->write.irq_pending, 0);
1702 wake_up(&card->wait_q);
1703 return rc;
1704 }
1705 while (!atomic_read(&reply->received)) {
1706 if (time_after(jiffies, timeout)) {
1707 spin_lock_irqsave(&reply->card->lock, flags);
1708 list_del_init(&reply->list);
1709 spin_unlock_irqrestore(&reply->card->lock, flags);
1710 reply->rc = -ETIME;
1711 atomic_inc(&reply->received);
1712 wake_up(&reply->wait_q);
1713 }
1714 cpu_relax();
1715 };
1716 rc = reply->rc;
1717 qeth_put_reply(reply);
1718 return rc;
1719}
1720EXPORT_SYMBOL_GPL(qeth_send_control_data);
1721
1722static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1723 unsigned long data)
1724{
1725 struct qeth_cmd_buffer *iob;
1726
d11ba0c4 1727 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1728
1729 iob = (struct qeth_cmd_buffer *) data;
1730 memcpy(&card->token.cm_filter_r,
1731 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1732 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1733 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1734 return 0;
1735}
1736
1737static int qeth_cm_enable(struct qeth_card *card)
1738{
1739 int rc;
1740 struct qeth_cmd_buffer *iob;
1741
d11ba0c4 1742 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1743
1744 iob = qeth_wait_for_buffer(&card->write);
1745 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1746 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1747 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1748 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1749 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1750
1751 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1752 qeth_cm_enable_cb, NULL);
1753 return rc;
1754}
1755
1756static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1757 unsigned long data)
1758{
1759
1760 struct qeth_cmd_buffer *iob;
1761
d11ba0c4 1762 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1763
1764 iob = (struct qeth_cmd_buffer *) data;
1765 memcpy(&card->token.cm_connection_r,
1766 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1767 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1768 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1769 return 0;
1770}
1771
1772static int qeth_cm_setup(struct qeth_card *card)
1773{
1774 int rc;
1775 struct qeth_cmd_buffer *iob;
1776
d11ba0c4 1777 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1778
1779 iob = qeth_wait_for_buffer(&card->write);
1780 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1781 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1782 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1783 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1784 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1785 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1786 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1787 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1788 qeth_cm_setup_cb, NULL);
1789 return rc;
1790
1791}
1792
1793static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1794{
1795 switch (card->info.type) {
1796 case QETH_CARD_TYPE_UNKNOWN:
1797 return 1500;
1798 case QETH_CARD_TYPE_IQD:
1799 return card->info.max_mtu;
1800 case QETH_CARD_TYPE_OSAE:
1801 switch (card->info.link_type) {
1802 case QETH_LINK_TYPE_HSTR:
1803 case QETH_LINK_TYPE_LANE_TR:
1804 return 2000;
1805 default:
1806 return 1492;
1807 }
1808 default:
1809 return 1500;
1810 }
1811}
1812
1813static inline int qeth_get_max_mtu_for_card(int cardtype)
1814{
1815 switch (cardtype) {
1816
1817 case QETH_CARD_TYPE_UNKNOWN:
1818 case QETH_CARD_TYPE_OSAE:
1819 case QETH_CARD_TYPE_OSN:
1820 return 61440;
1821 case QETH_CARD_TYPE_IQD:
1822 return 57344;
1823 default:
1824 return 1500;
1825 }
1826}
1827
1828static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1829{
1830 switch (cardtype) {
1831 case QETH_CARD_TYPE_IQD:
1832 return 1;
1833 default:
1834 return 0;
1835 }
1836}
1837
1838static inline int qeth_get_mtu_outof_framesize(int framesize)
1839{
1840 switch (framesize) {
1841 case 0x4000:
1842 return 8192;
1843 case 0x6000:
1844 return 16384;
1845 case 0xa000:
1846 return 32768;
1847 case 0xffff:
1848 return 57344;
1849 default:
1850 return 0;
1851 }
1852}
1853
1854static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1855{
1856 switch (card->info.type) {
1857 case QETH_CARD_TYPE_OSAE:
1858 return ((mtu >= 576) && (mtu <= 61440));
1859 case QETH_CARD_TYPE_IQD:
1860 return ((mtu >= 576) &&
1861 (mtu <= card->info.max_mtu + 4096 - 32));
1862 case QETH_CARD_TYPE_OSN:
1863 case QETH_CARD_TYPE_UNKNOWN:
1864 default:
1865 return 1;
1866 }
1867}
1868
1869static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1870 unsigned long data)
1871{
1872
1873 __u16 mtu, framesize;
1874 __u16 len;
1875 __u8 link_type;
1876 struct qeth_cmd_buffer *iob;
1877
d11ba0c4 1878 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1879
1880 iob = (struct qeth_cmd_buffer *) data;
1881 memcpy(&card->token.ulp_filter_r,
1882 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1883 QETH_MPC_TOKEN_LENGTH);
1884 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1885 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1886 mtu = qeth_get_mtu_outof_framesize(framesize);
1887 if (!mtu) {
1888 iob->rc = -EINVAL;
d11ba0c4 1889 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1890 return 0;
1891 }
1892 card->info.max_mtu = mtu;
1893 card->info.initial_mtu = mtu;
1894 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1895 } else {
1896 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1897 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1898 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1899 }
1900
1901 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1902 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1903 memcpy(&link_type,
1904 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1905 card->info.link_type = link_type;
1906 } else
1907 card->info.link_type = 0;
d11ba0c4 1908 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1909 return 0;
1910}
1911
1912static int qeth_ulp_enable(struct qeth_card *card)
1913{
1914 int rc;
1915 char prot_type;
1916 struct qeth_cmd_buffer *iob;
1917
1918 /*FIXME: trace view callbacks*/
d11ba0c4 1919 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1920
1921 iob = qeth_wait_for_buffer(&card->write);
1922 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1923
1924 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1925 (__u8) card->info.portno;
1926 if (card->options.layer2)
1927 if (card->info.type == QETH_CARD_TYPE_OSN)
1928 prot_type = QETH_PROT_OSN2;
1929 else
1930 prot_type = QETH_PROT_LAYER2;
1931 else
1932 prot_type = QETH_PROT_TCPIP;
1933
1934 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1935 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1936 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1937 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1938 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1939 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1940 card->info.portname, 9);
1941 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1942 qeth_ulp_enable_cb, NULL);
1943 return rc;
1944
1945}
1946
1947static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1948 unsigned long data)
1949{
1950 struct qeth_cmd_buffer *iob;
1951
d11ba0c4 1952 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 1953
1954 iob = (struct qeth_cmd_buffer *) data;
1955 memcpy(&card->token.ulp_connection_r,
1956 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1957 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1958 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1959 return 0;
1960}
1961
1962static int qeth_ulp_setup(struct qeth_card *card)
1963{
1964 int rc;
1965 __u16 temp;
1966 struct qeth_cmd_buffer *iob;
1967 struct ccw_dev_id dev_id;
1968
d11ba0c4 1969 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 1970
1971 iob = qeth_wait_for_buffer(&card->write);
1972 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1973
1974 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1975 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1976 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1977 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1978 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1979 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1980
1981 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1982 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1983 temp = (card->info.cula << 8) + card->info.unit_addr2;
1984 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1985 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1986 qeth_ulp_setup_cb, NULL);
1987 return rc;
1988}
1989
1990static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1991{
1992 int i, j;
1993
d11ba0c4 1994 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 1995
1996 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1997 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
1998 return 0;
1999
2000 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 2001 GFP_KERNEL);
4a71df50
FB		 2002 if (!card->qdio.in_q)
2003 goto out_nomem;
d11ba0c4
PT		 2004 QETH_DBF_TEXT(SETUP, 2, "inq");
2005 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2006 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2007 /* give inbound qeth_qdio_buffers their qdio_buffers */
2008 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2009 card->qdio.in_q->bufs[i].buffer =
2010 &card->qdio.in_q->qdio_bufs[i];
2011 /* inbound buffer pool */
2012 if (qeth_alloc_buffer_pool(card))
2013 goto out_freeinq;
2014 /* outbound */
2015 card->qdio.out_qs =
2016 kmalloc(card->qdio.no_out_queues *
2017 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2018 if (!card->qdio.out_qs)
2019 goto out_freepool;
2020 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2021 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2022 GFP_KERNEL);
4a71df50
FB		 2023 if (!card->qdio.out_qs[i])
2024 goto out_freeoutq;
d11ba0c4
PT		 2025 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2026 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2027 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2028 card->qdio.out_qs[i]->queue_no = i;
2029 /* give outbound qeth_qdio_buffers their qdio_buffers */
2030 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2031 card->qdio.out_qs[i]->bufs[j].buffer =
2032 &card->qdio.out_qs[i]->qdio_bufs[j];
2033 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2034 skb_list);
2035 lockdep_set_class(
2036 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2037 &qdio_out_skb_queue_key);
2038 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2039 }
2040 }
2041 return 0;
2042
2043out_freeoutq:
2044 while (i > 0)
2045 kfree(card->qdio.out_qs[--i]);
2046 kfree(card->qdio.out_qs);
2047 card->qdio.out_qs = NULL;
2048out_freepool:
2049 qeth_free_buffer_pool(card);
2050out_freeinq:
2051 kfree(card->qdio.in_q);
2052 card->qdio.in_q = NULL;
2053out_nomem:
2054 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2055 return -ENOMEM;
2056}
2057
2058static void qeth_create_qib_param_field(struct qeth_card *card,
2059 char *param_field)
2060{
2061
2062 param_field[0] = _ascebc['P'];
2063 param_field[1] = _ascebc['C'];
2064 param_field[2] = _ascebc['I'];
2065 param_field[3] = _ascebc['T'];
2066 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2067 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2068 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2069}
2070
2071static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2072 char *param_field)
2073{
2074 param_field[16] = _ascebc['B'];
2075 param_field[17] = _ascebc['L'];
2076 param_field[18] = _ascebc['K'];
2077 param_field[19] = _ascebc['T'];
2078 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2079 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2080 *((unsigned int *) (&param_field[28])) =
2081 card->info.blkt.inter_packet_jumbo;
2082}
2083
2084static int qeth_qdio_activate(struct qeth_card *card)
2085{
d11ba0c4 2086 QETH_DBF_TEXT(SETUP, 3, "qdioact");
4a71df50
FB		 2087 return qdio_activate(CARD_DDEV(card), 0);
2088}
2089
2090static int qeth_dm_act(struct qeth_card *card)
2091{
2092 int rc;
2093 struct qeth_cmd_buffer *iob;
2094
d11ba0c4 2095 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2096
2097 iob = qeth_wait_for_buffer(&card->write);
2098 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2099
2100 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2101 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2102 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2103 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2104 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2105 return rc;
2106}
2107
2108static int qeth_mpc_initialize(struct qeth_card *card)
2109{
2110 int rc;
2111
d11ba0c4 2112 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2113
2114 rc = qeth_issue_next_read(card);
2115 if (rc) {
d11ba0c4 2116 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2117 return rc;
2118 }
2119 rc = qeth_cm_enable(card);
2120 if (rc) {
d11ba0c4 2121 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2122 goto out_qdio;
2123 }
2124 rc = qeth_cm_setup(card);
2125 if (rc) {
d11ba0c4 2126 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2127 goto out_qdio;
2128 }
2129 rc = qeth_ulp_enable(card);
2130 if (rc) {
d11ba0c4 2131 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2132 goto out_qdio;
2133 }
2134 rc = qeth_ulp_setup(card);
2135 if (rc) {
d11ba0c4 2136 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2137 goto out_qdio;
2138 }
2139 rc = qeth_alloc_qdio_buffers(card);
2140 if (rc) {
d11ba0c4 2141 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2142 goto out_qdio;
2143 }
2144 rc = qeth_qdio_establish(card);
2145 if (rc) {
d11ba0c4 2146 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2147 qeth_free_qdio_buffers(card);
2148 goto out_qdio;
2149 }
2150 rc = qeth_qdio_activate(card);
2151 if (rc) {
d11ba0c4 2152 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2153 goto out_qdio;
2154 }
2155 rc = qeth_dm_act(card);
2156 if (rc) {
d11ba0c4 2157 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2158 goto out_qdio;
2159 }
2160
2161 return 0;
2162out_qdio:
2163 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2164 return rc;
2165}
2166
2167static void qeth_print_status_with_portname(struct qeth_card *card)
2168{
2169 char dbf_text[15];
2170 int i;
2171
2172 sprintf(dbf_text, "%s", card->info.portname + 1);
2173 for (i = 0; i < 8; i++)
2174 dbf_text[i] =
2175 (char) _ebcasc[(__u8) dbf_text[i]];
2176 dbf_text[8] = 0;
2177 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2178 "with link type %s (portname: %s)\n",
2179 CARD_RDEV_ID(card),
2180 CARD_WDEV_ID(card),
2181 CARD_DDEV_ID(card),
2182 qeth_get_cardname(card),
2183 (card->info.mcl_level[0]) ? " (level: " : "",
2184 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2185 (card->info.mcl_level[0]) ? ")" : "",
2186 qeth_get_cardname_short(card),
2187 dbf_text);
2188
2189}
2190
2191static void qeth_print_status_no_portname(struct qeth_card *card)
2192{
2193 if (card->info.portname[0])
2194 PRINT_INFO("Device %s/%s/%s is a%s "
2195 "card%s%s%s\nwith link type %s "
2196 "(no portname needed by interface).\n",
2197 CARD_RDEV_ID(card),
2198 CARD_WDEV_ID(card),
2199 CARD_DDEV_ID(card),
2200 qeth_get_cardname(card),
2201 (card->info.mcl_level[0]) ? " (level: " : "",
2202 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2203 (card->info.mcl_level[0]) ? ")" : "",
2204 qeth_get_cardname_short(card));
2205 else
2206 PRINT_INFO("Device %s/%s/%s is a%s "
2207 "card%s%s%s\nwith link type %s.\n",
2208 CARD_RDEV_ID(card),
2209 CARD_WDEV_ID(card),
2210 CARD_DDEV_ID(card),
2211 qeth_get_cardname(card),
2212 (card->info.mcl_level[0]) ? " (level: " : "",
2213 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2214 (card->info.mcl_level[0]) ? ")" : "",
2215 qeth_get_cardname_short(card));
2216}
2217
2218void qeth_print_status_message(struct qeth_card *card)
2219{
2220 switch (card->info.type) {
2221 case QETH_CARD_TYPE_OSAE:
2222 /* VM will use a non-zero first character
2223 * to indicate a HiperSockets like reporting
2224 * of the level OSA sets the first character to zero
2225 * */
2226 if (!card->info.mcl_level[0]) {
2227 sprintf(card->info.mcl_level, "%02x%02x",
2228 card->info.mcl_level[2],
2229 card->info.mcl_level[3]);
2230
2231 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2232 break;
2233 }
2234 /* fallthrough */
2235 case QETH_CARD_TYPE_IQD:
2236 if (card->info.guestlan) {
2237 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2238 card->info.mcl_level[0]];
2239 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2240 card->info.mcl_level[1]];
2241 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2242 card->info.mcl_level[2]];
2243 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2244 card->info.mcl_level[3]];
2245 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2246 }
2247 break;
2248 default:
2249 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2250 }
2251 if (card->info.portname_required)
2252 qeth_print_status_with_portname(card);
2253 else
2254 qeth_print_status_no_portname(card);
2255}
2256EXPORT_SYMBOL_GPL(qeth_print_status_message);
2257
2258void qeth_put_buffer_pool_entry(struct qeth_card *card,
2259 struct qeth_buffer_pool_entry *entry)
2260{
d11ba0c4 2261 QETH_DBF_TEXT(TRACE, 6, "ptbfplen");
4a71df50
FB		 2262 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
2263}
2264EXPORT_SYMBOL_GPL(qeth_put_buffer_pool_entry);
2265
2266static void qeth_initialize_working_pool_list(struct qeth_card *card)
2267{
2268 struct qeth_buffer_pool_entry *entry;
2269
d11ba0c4 2270 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2271
2272 list_for_each_entry(entry,
2273 &card->qdio.init_pool.entry_list, init_list) {
2274 qeth_put_buffer_pool_entry(card, entry);
2275 }
2276}
2277
2278static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2279 struct qeth_card *card)
2280{
2281 struct list_head *plh;
2282 struct qeth_buffer_pool_entry *entry;
2283 int i, free;
2284 struct page *page;
2285
2286 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2287 return NULL;
2288
2289 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2290 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2291 free = 1;
2292 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2293 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2294 free = 0;
2295 break;
2296 }
2297 }
2298 if (free) {
2299 list_del_init(&entry->list);
2300 return entry;
2301 }
2302 }
2303
2304 /* no free buffer in pool so take first one and swap pages */
2305 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2306 struct qeth_buffer_pool_entry, list);
2307 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2308 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2309 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2310 if (!page) {
2311 return NULL;
2312 } else {
2313 free_page((unsigned long)entry->elements[i]);
2314 entry->elements[i] = page_address(page);
2315 if (card->options.performance_stats)
2316 card->perf_stats.sg_alloc_page_rx++;
2317 }
2318 }
2319 }
2320 list_del_init(&entry->list);
2321 return entry;
2322}
2323
2324static int qeth_init_input_buffer(struct qeth_card *card,
2325 struct qeth_qdio_buffer *buf)
2326{
2327 struct qeth_buffer_pool_entry *pool_entry;
2328 int i;
2329
2330 pool_entry = qeth_find_free_buffer_pool_entry(card);
2331 if (!pool_entry)
2332 return 1;
2333
2334 /*
2335 * since the buffer is accessed only from the input_tasklet
2336 * there shouldn't be a need to synchronize; also, since we use
2337 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2338 * buffers
2339 */
2340 BUG_ON(!pool_entry);
2341
2342 buf->pool_entry = pool_entry;
2343 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2344 buf->buffer->element[i].length = PAGE_SIZE;
2345 buf->buffer->element[i].addr = pool_entry->elements[i];
2346 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2347 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2348 else
2349 buf->buffer->element[i].flags = 0;
2350 }
2351 return 0;
2352}
2353
2354int qeth_init_qdio_queues(struct qeth_card *card)
2355{
2356 int i, j;
2357 int rc;
2358
d11ba0c4 2359 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2360
2361 /* inbound queue */
2362 memset(card->qdio.in_q->qdio_bufs, 0,
2363 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2364 qeth_initialize_working_pool_list(card);
2365 /*give only as many buffers to hardware as we have buffer pool entries*/
2366 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2367 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2368 card->qdio.in_q->next_buf_to_init =
2369 card->qdio.in_buf_pool.buf_count - 1;
2370 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2371 card->qdio.in_buf_pool.buf_count - 1, NULL);
2372 if (rc) {
d11ba0c4 2373 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2374 return rc;
2375 }
2376 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
2377 if (rc) {
d11ba0c4 2378 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2379 return rc;
2380 }
2381 /* outbound queue */
2382 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2383 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2384 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2385 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2386 qeth_clear_output_buffer(card->qdio.out_qs[i],
2387 &card->qdio.out_qs[i]->bufs[j]);
2388 }
2389 card->qdio.out_qs[i]->card = card;
2390 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2391 card->qdio.out_qs[i]->do_pack = 0;
2392 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2393 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2394 atomic_set(&card->qdio.out_qs[i]->state,
2395 QETH_OUT_Q_UNLOCKED);
2396 }
2397 return 0;
2398}
2399EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2400
2401static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2402{
2403 switch (link_type) {
2404 case QETH_LINK_TYPE_HSTR:
2405 return 2;
2406 default:
2407 return 1;
2408 }
2409}
2410
2411static void qeth_fill_ipacmd_header(struct qeth_card *card,
2412 struct qeth_ipa_cmd *cmd, __u8 command,
2413 enum qeth_prot_versions prot)
2414{
2415 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2416 cmd->hdr.command = command;
2417 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2418 cmd->hdr.seqno = card->seqno.ipa;
2419 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2420 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2421 if (card->options.layer2)
2422 cmd->hdr.prim_version_no = 2;
2423 else
2424 cmd->hdr.prim_version_no = 1;
2425 cmd->hdr.param_count = 1;
2426 cmd->hdr.prot_version = prot;
2427 cmd->hdr.ipa_supported = 0;
2428 cmd->hdr.ipa_enabled = 0;
2429}
2430
2431struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2432 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2433{
2434 struct qeth_cmd_buffer *iob;
2435 struct qeth_ipa_cmd *cmd;
2436
2437 iob = qeth_wait_for_buffer(&card->write);
2438 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2439 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2440
2441 return iob;
2442}
2443EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2444
2445void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2446 char prot_type)
2447{
2448 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2449 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2450 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2451 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2452}
2453EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2454
2455int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2456 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2457 unsigned long),
2458 void *reply_param)
2459{
2460 int rc;
2461 char prot_type;
4a71df50 2462
d11ba0c4 2463 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2464
2465 if (card->options.layer2)
2466 if (card->info.type == QETH_CARD_TYPE_OSN)
2467 prot_type = QETH_PROT_OSN2;
2468 else
2469 prot_type = QETH_PROT_LAYER2;
2470 else
2471 prot_type = QETH_PROT_TCPIP;
2472 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2473 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2474 iob, reply_cb, reply_param);
4a71df50
FB		 2475 return rc;
2476}
2477EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2478
2479static int qeth_send_startstoplan(struct qeth_card *card,
2480 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2481{
2482 int rc;
2483 struct qeth_cmd_buffer *iob;
2484
2485 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2486 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2487
2488 return rc;
2489}
2490
2491int qeth_send_startlan(struct qeth_card *card)
2492{
2493 int rc;
2494
d11ba0c4 2495 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2496
2497 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2498 return rc;
2499}
2500EXPORT_SYMBOL_GPL(qeth_send_startlan);
2501
2502int qeth_send_stoplan(struct qeth_card *card)
2503{
2504 int rc = 0;
2505
2506 /*
2507 * TODO: according to the IPA format document page 14,
2508 * TCP/IP (we!) never issue a STOPLAN
2509 * is this right ?!?
2510 */
d11ba0c4 2511 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2512
2513 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2514 return rc;
2515}
2516EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2517
2518int qeth_default_setadapterparms_cb(struct qeth_card *card,
2519 struct qeth_reply *reply, unsigned long data)
2520{
2521 struct qeth_ipa_cmd *cmd;
2522
d11ba0c4 2523 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2524
2525 cmd = (struct qeth_ipa_cmd *) data;
2526 if (cmd->hdr.return_code == 0)
2527 cmd->hdr.return_code =
2528 cmd->data.setadapterparms.hdr.return_code;
2529 return 0;
2530}
2531EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2532
2533static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2534 struct qeth_reply *reply, unsigned long data)
2535{
2536 struct qeth_ipa_cmd *cmd;
2537
d11ba0c4 2538 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2539
2540 cmd = (struct qeth_ipa_cmd *) data;
2541 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2542 card->info.link_type =
2543 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2544 card->options.adp.supported_funcs =
2545 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2546 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2547}
2548
2549struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2550 __u32 command, __u32 cmdlen)
2551{
2552 struct qeth_cmd_buffer *iob;
2553 struct qeth_ipa_cmd *cmd;
2554
2555 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2556 QETH_PROT_IPV4);
2557 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2558 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2559 cmd->data.setadapterparms.hdr.command_code = command;
2560 cmd->data.setadapterparms.hdr.used_total = 1;
2561 cmd->data.setadapterparms.hdr.seq_no = 1;
2562
2563 return iob;
2564}
2565EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2566
2567int qeth_query_setadapterparms(struct qeth_card *card)
2568{
2569 int rc;
2570 struct qeth_cmd_buffer *iob;
2571
d11ba0c4 2572 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2573 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2574 sizeof(struct qeth_ipacmd_setadpparms));
2575 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2576 return rc;
2577}
2578EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2579
2580int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2581 unsigned int siga_error, const char *dbftext)
2582{
2583 if (qdio_error || siga_error) {
d11ba0c4
PT		 2584 QETH_DBF_TEXT(TRACE, 2, dbftext);
2585 QETH_DBF_TEXT(QERR, 2, dbftext);
2586 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2587 buf->element[15].flags & 0xff);
d11ba0c4 2588 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2589 buf->element[14].flags & 0xff);
d11ba0c4
PT		 2590 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2591 QETH_DBF_TEXT_(QERR, 2, " serr=%X", siga_error);
4a71df50
FB		 2592 return 1;
2593 }
2594 return 0;
2595}
2596EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2597
2598void qeth_queue_input_buffer(struct qeth_card *card, int index)
2599{
2600 struct qeth_qdio_q *queue = card->qdio.in_q;
2601 int count;
2602 int i;
2603 int rc;
2604 int newcount = 0;
2605
d11ba0c4 2606 QETH_DBF_TEXT(TRACE, 6, "queinbuf");
4a71df50
FB		 2607 count = (index < queue->next_buf_to_init)?
2608 card->qdio.in_buf_pool.buf_count -
2609 (queue->next_buf_to_init - index) :
2610 card->qdio.in_buf_pool.buf_count -
2611 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2612 /* only requeue at a certain threshold to avoid SIGAs */
2613 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2614 for (i = queue->next_buf_to_init;
2615 i < queue->next_buf_to_init + count; ++i) {
2616 if (qeth_init_input_buffer(card,
2617 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2618 break;
2619 } else {
2620 newcount++;
2621 }
2622 }
2623
2624 if (newcount < count) {
2625 /* we are in memory shortage so we switch back to
2626 traditional skb allocation and drop packages */
2627 if (!atomic_read(&card->force_alloc_skb) &&
2628 net_ratelimit())
2629 PRINT_WARN("Switch to alloc skb\n");
2630 atomic_set(&card->force_alloc_skb, 3);
2631 count = newcount;
2632 } else {
2633 if ((atomic_read(&card->force_alloc_skb) == 1) &&
2634 net_ratelimit())
2635 PRINT_WARN("Switch to sg\n");
2636 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2637 }
2638
2639 /*
2640 * according to old code it should be avoided to requeue all
2641 * 128 buffers in order to benefit from PCI avoidance.
2642 * this function keeps at least one buffer (the buffer at
2643 * 'index') un-requeued -> this buffer is the first buffer that
2644 * will be requeued the next time
2645 */
2646 if (card->options.performance_stats) {
2647 card->perf_stats.inbound_do_qdio_cnt++;
2648 card->perf_stats.inbound_do_qdio_start_time =
2649 qeth_get_micros();
2650 }
2651 rc = do_QDIO(CARD_DDEV(card),
2652 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2653 0, queue->next_buf_to_init, count, NULL);
2654 if (card->options.performance_stats)
2655 card->perf_stats.inbound_do_qdio_time +=
2656 qeth_get_micros() -
2657 card->perf_stats.inbound_do_qdio_start_time;
2658 if (rc) {
2659 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2660 "return %i (device %s).\n",
2661 rc, CARD_DDEV_ID(card));
d11ba0c4
PT		 2662 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2663 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2664 }
2665 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2666 QDIO_MAX_BUFFERS_PER_Q;
2667 }
2668}
2669EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2670
2671static int qeth_handle_send_error(struct qeth_card *card,
2672 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err,
2673 unsigned int siga_err)
2674{
2675 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2676 int cc = siga_err & 3;
2677
d11ba0c4 2678 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
4a71df50
FB		 2679 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2680 switch (cc) {
2681 case 0:
2682 if (qdio_err) {
d11ba0c4
PT		 2683 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2684 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2685 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
4a71df50
FB		 2686 (u16)qdio_err, (u8)sbalf15);
2687 return QETH_SEND_ERROR_LINK_FAILURE;
2688 }
2689 return QETH_SEND_ERROR_NONE;
2690 case 2:
2691 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
d11ba0c4
PT		 2692 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2693 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2694 return QETH_SEND_ERROR_KICK_IT;
2695 }
2696 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2697 return QETH_SEND_ERROR_RETRY;
2698 return QETH_SEND_ERROR_LINK_FAILURE;
2699 /* look at qdio_error and sbalf 15 */
2700 case 1:
d11ba0c4
PT		 2701 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2702 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2703 return QETH_SEND_ERROR_LINK_FAILURE;
2704 case 3:
2705 default:
d11ba0c4
PT		 2706 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2707 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2708 return QETH_SEND_ERROR_KICK_IT;
2709 }
2710}
2711
2712/*
2713 * Switched to packing state if the number of used buffers on a queue
2714 * reaches a certain limit.
2715 */
2716static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2717{
2718 if (!queue->do_pack) {
2719 if (atomic_read(&queue->used_buffers)
2720 >= QETH_HIGH_WATERMARK_PACK){
2721 /* switch non-PACKING -> PACKING */
d11ba0c4 2722 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2723 if (queue->card->options.performance_stats)
2724 queue->card->perf_stats.sc_dp_p++;
2725 queue->do_pack = 1;
2726 }
2727 }
2728}
2729
2730/*
2731 * Switches from packing to non-packing mode. If there is a packing
2732 * buffer on the queue this buffer will be prepared to be flushed.
2733 * In that case 1 is returned to inform the caller. If no buffer
2734 * has to be flushed, zero is returned.
2735 */
2736static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2737{
2738 struct qeth_qdio_out_buffer *buffer;
2739 int flush_count = 0;
2740
2741 if (queue->do_pack) {
2742 if (atomic_read(&queue->used_buffers)
2743 <= QETH_LOW_WATERMARK_PACK) {
2744 /* switch PACKING -> non-PACKING */
d11ba0c4 2745 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2746 if (queue->card->options.performance_stats)
2747 queue->card->perf_stats.sc_p_dp++;
2748 queue->do_pack = 0;
2749 /* flush packing buffers */
2750 buffer = &queue->bufs[queue->next_buf_to_fill];
2751 if ((atomic_read(&buffer->state) ==
2752 QETH_QDIO_BUF_EMPTY) &&
2753 (buffer->next_element_to_fill > 0)) {
2754 atomic_set(&buffer->state,
2755 QETH_QDIO_BUF_PRIMED);
2756 flush_count++;
2757 queue->next_buf_to_fill =
2758 (queue->next_buf_to_fill + 1) %
2759 QDIO_MAX_BUFFERS_PER_Q;
2760 }
2761 }
2762 }
2763 return flush_count;
2764}
2765
2766/*
2767 * Called to flush a packing buffer if no more pci flags are on the queue.
2768 * Checks if there is a packing buffer and prepares it to be flushed.
2769 * In that case returns 1, otherwise zero.
2770 */
2771static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2772{
2773 struct qeth_qdio_out_buffer *buffer;
2774
2775 buffer = &queue->bufs[queue->next_buf_to_fill];
2776 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2777 (buffer->next_element_to_fill > 0)) {
2778 /* it's a packing buffer */
2779 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2780 queue->next_buf_to_fill =
2781 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2782 return 1;
2783 }
2784 return 0;
2785}
2786
2787static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2788 int index, int count)
2789{
2790 struct qeth_qdio_out_buffer *buf;
2791 int rc;
2792 int i;
2793 unsigned int qdio_flags;
2794
d11ba0c4 2795 QETH_DBF_TEXT(TRACE, 6, "flushbuf");
4a71df50
FB		 2796
2797 for (i = index; i < index + count; ++i) {
2798 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2799 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2800 SBAL_FLAGS_LAST_ENTRY;
2801
2802 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2803 continue;
2804
2805 if (!queue->do_pack) {
2806 if ((atomic_read(&queue->used_buffers) >=
2807 (QETH_HIGH_WATERMARK_PACK -
2808 QETH_WATERMARK_PACK_FUZZ)) &&
2809 !atomic_read(&queue->set_pci_flags_count)) {
2810 /* it's likely that we'll go to packing
2811 * mode soon */
2812 atomic_inc(&queue->set_pci_flags_count);
2813 buf->buffer->element[0].flags |= 0x40;
2814 }
2815 } else {
2816 if (!atomic_read(&queue->set_pci_flags_count)) {
2817 /*
2818 * there's no outstanding PCI any more, so we
2819 * have to request a PCI to be sure the the PCI
2820 * will wake at some time in the future then we
2821 * can flush packed buffers that might still be
2822 * hanging around, which can happen if no
2823 * further send was requested by the stack
2824 */
2825 atomic_inc(&queue->set_pci_flags_count);
2826 buf->buffer->element[0].flags |= 0x40;
2827 }
2828 }
2829 }
2830
2831 queue->card->dev->trans_start = jiffies;
2832 if (queue->card->options.performance_stats) {
2833 queue->card->perf_stats.outbound_do_qdio_cnt++;
2834 queue->card->perf_stats.outbound_do_qdio_start_time =
2835 qeth_get_micros();
2836 }
2837 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2838 if (under_int)
2839 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
2840 if (atomic_read(&queue->set_pci_flags_count))
2841 qdio_flags |= QDIO_FLAG_PCI_OUT;
2842 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2843 queue->queue_no, index, count, NULL);
2844 if (queue->card->options.performance_stats)
2845 queue->card->perf_stats.outbound_do_qdio_time +=
2846 qeth_get_micros() -
2847 queue->card->perf_stats.outbound_do_qdio_start_time;
2848 if (rc) {
d11ba0c4
PT		 2849 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2850 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2851 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
4a71df50
FB		 2852 queue->card->stats.tx_errors += count;
2853 /* this must not happen under normal circumstances. if it
2854 * happens something is really wrong -> recover */
2855 qeth_schedule_recovery(queue->card);
2856 return;
2857 }
2858 atomic_add(count, &queue->used_buffers);
2859 if (queue->card->options.performance_stats)
2860 queue->card->perf_stats.bufs_sent += count;
2861}
2862
2863static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2864{
2865 int index;
2866 int flush_cnt = 0;
2867 int q_was_packing = 0;
2868
2869 /*
2870 * check if weed have to switch to non-packing mode or if
2871 * we have to get a pci flag out on the queue
2872 */
2873 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2874 !atomic_read(&queue->set_pci_flags_count)) {
2875 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2876 QETH_OUT_Q_UNLOCKED) {
2877 /*
2878 * If we get in here, there was no action in
2879 * do_send_packet. So, we check if there is a
2880 * packing buffer to be flushed here.
2881 */
2882 netif_stop_queue(queue->card->dev);
2883 index = queue->next_buf_to_fill;
2884 q_was_packing = queue->do_pack;
2885 /* queue->do_pack may change */
2886 barrier();
2887 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2888 if (!flush_cnt &&
2889 !atomic_read(&queue->set_pci_flags_count))
2890 flush_cnt +=
2891 qeth_flush_buffers_on_no_pci(queue);
2892 if (queue->card->options.performance_stats &&
2893 q_was_packing)
2894 queue->card->perf_stats.bufs_sent_pack +=
2895 flush_cnt;
2896 if (flush_cnt)
2897 qeth_flush_buffers(queue, 1, index, flush_cnt);
2898 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2899 }
2900 }
2901}
2902
2903void qeth_qdio_output_handler(struct ccw_device *ccwdev, unsigned int status,
2904 unsigned int qdio_error, unsigned int siga_error,
2905 unsigned int __queue, int first_element, int count,
2906 unsigned long card_ptr)
2907{
2908 struct qeth_card *card = (struct qeth_card *) card_ptr;
2909 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2910 struct qeth_qdio_out_buffer *buffer;
2911 int i;
2912
d11ba0c4 2913 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
4a71df50
FB		 2914 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2915 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION) {
d11ba0c4
PT		 2916 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2917 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2918 QETH_DBF_TEXT_(TRACE, 2, "%08x", status);
4a71df50
FB		 2919 netif_stop_queue(card->dev);
2920 qeth_schedule_recovery(card);
2921 return;
2922 }
2923 }
2924 if (card->options.performance_stats) {
2925 card->perf_stats.outbound_handler_cnt++;
2926 card->perf_stats.outbound_handler_start_time =
2927 qeth_get_micros();
2928 }
2929 for (i = first_element; i < (first_element + count); ++i) {
2930 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2931 /*we only handle the KICK_IT error by doing a recovery */
2932 if (qeth_handle_send_error(card, buffer,
2933 qdio_error, siga_error)
2934 == QETH_SEND_ERROR_KICK_IT){
2935 netif_stop_queue(card->dev);
2936 qeth_schedule_recovery(card);
2937 return;
2938 }
2939 qeth_clear_output_buffer(queue, buffer);
2940 }
2941 atomic_sub(count, &queue->used_buffers);
2942 /* check if we need to do something on this outbound queue */
2943 if (card->info.type != QETH_CARD_TYPE_IQD)
2944 qeth_check_outbound_queue(queue);
2945
2946 netif_wake_queue(queue->card->dev);
2947 if (card->options.performance_stats)
2948 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2949 card->perf_stats.outbound_handler_start_time;
2950}
2951EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2952
2953int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2954{
2955 int cast_type = RTN_UNSPEC;
2956
2957 if (card->info.type == QETH_CARD_TYPE_OSN)
2958 return cast_type;
2959
2960 if (skb->dst && skb->dst->neighbour) {
2961 cast_type = skb->dst->neighbour->type;
2962 if ((cast_type == RTN_BROADCAST) ||
2963 (cast_type == RTN_MULTICAST) ||
2964 (cast_type == RTN_ANYCAST))
2965 return cast_type;
2966 else
2967 return RTN_UNSPEC;
2968 }
2969 /* try something else */
2970 if (skb->protocol == ETH_P_IPV6)
2971 return (skb_network_header(skb)[24] == 0xff) ?
2972 RTN_MULTICAST : 0;
2973 else if (skb->protocol == ETH_P_IP)
2974 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2975 RTN_MULTICAST : 0;
2976 /* ... */
2977 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2978 return RTN_BROADCAST;
2979 else {
2980 u16 hdr_mac;
2981
2982 hdr_mac = *((u16 *)skb->data);
2983 /* tr multicast? */
2984 switch (card->info.link_type) {
2985 case QETH_LINK_TYPE_HSTR:
2986 case QETH_LINK_TYPE_LANE_TR:
2987 if ((hdr_mac == QETH_TR_MAC_NC) ||
2988 (hdr_mac == QETH_TR_MAC_C))
2989 return RTN_MULTICAST;
2990 break;
2991 /* eth or so multicast? */
2992 default:
2993 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2994 (hdr_mac == QETH_ETH_MAC_V6))
2995 return RTN_MULTICAST;
2996 }
2997 }
2998 return cast_type;
2999}
3000EXPORT_SYMBOL_GPL(qeth_get_cast_type);
3001
3002int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3003 int ipv, int cast_type)
3004{
3005 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
3006 return card->qdio.default_out_queue;
3007 switch (card->qdio.no_out_queues) {
3008 case 4:
3009 if (cast_type && card->info.is_multicast_different)
3010 return card->info.is_multicast_different &
3011 (card->qdio.no_out_queues - 1);
3012 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3013 const u8 tos = ip_hdr(skb)->tos;
3014
3015 if (card->qdio.do_prio_queueing ==
3016 QETH_PRIO_Q_ING_TOS) {
3017 if (tos & IP_TOS_NOTIMPORTANT)
3018 return 3;
3019 if (tos & IP_TOS_HIGHRELIABILITY)
3020 return 2;
3021 if (tos & IP_TOS_HIGHTHROUGHPUT)
3022 return 1;
3023 if (tos & IP_TOS_LOWDELAY)
3024 return 0;
3025 }
3026 if (card->qdio.do_prio_queueing ==
3027 QETH_PRIO_Q_ING_PREC)
3028 return 3 - (tos >> 6);
3029 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3030 /* TODO: IPv6!!! */
3031 }
3032 return card->qdio.default_out_queue;
3033 case 1: /* fallthrough for single-out-queue 1920-device */
3034 default:
3035 return card->qdio.default_out_queue;
3036 }
3037}
3038EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3039
3040static void __qeth_free_new_skb(struct sk_buff *orig_skb,
3041 struct sk_buff *new_skb)
3042{
3043 if (orig_skb != new_skb)
3044 dev_kfree_skb_any(new_skb);
3045}
3046
3047static inline struct sk_buff *qeth_realloc_headroom(struct qeth_card *card,
3048 struct sk_buff *skb, int size)
3049{
3050 struct sk_buff *new_skb = skb;
3051
3052 if (skb_headroom(skb) >= size)
3053 return skb;
3054 new_skb = skb_realloc_headroom(skb, size);
3055 if (!new_skb)
3056 PRINT_ERR("Could not realloc headroom for qeth_hdr "
3057 "on interface %s", QETH_CARD_IFNAME(card));
3058 return new_skb;
3059}
3060
3061struct sk_buff *qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb,
3062 struct qeth_hdr **hdr)
3063{
3064 struct sk_buff *new_skb;
3065
d11ba0c4 3066 QETH_DBF_TEXT(TRACE, 6, "prepskb");
4a71df50
FB		 3067
3068 new_skb = qeth_realloc_headroom(card, skb,
3069 sizeof(struct qeth_hdr));
3070 if (!new_skb)
3071 return NULL;
3072
3073 *hdr = ((struct qeth_hdr *)qeth_push_skb(card, new_skb,
3074 sizeof(struct qeth_hdr)));
3075 if (*hdr == NULL) {
3076 __qeth_free_new_skb(skb, new_skb);
3077 return NULL;
3078 }
3079 return new_skb;
3080}
3081EXPORT_SYMBOL_GPL(qeth_prepare_skb);
3082
3083int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3084 struct sk_buff *skb, int elems)
3085{
3086 int elements_needed = 0;
3087
3088 if (skb_shinfo(skb)->nr_frags > 0)
3089 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3090 if (elements_needed == 0)
3091 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
3092 + skb->len) >> PAGE_SHIFT);
3093 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3094 PRINT_ERR("Invalid size of IP packet "
3095 "(Number=%d / Length=%d). Discarded.\n",
3096 (elements_needed+elems), skb->len);
3097 return 0;
3098 }
3099 return elements_needed;
3100}
3101EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3102
3103static void __qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
3104 int is_tso, int *next_element_to_fill)
3105{
3106 int length = skb->len;
3107 int length_here;
3108 int element;
3109 char *data;
3110 int first_lap ;
3111
3112 element = *next_element_to_fill;
3113 data = skb->data;
3114 first_lap = (is_tso == 0 ? 1 : 0);
3115
3116 while (length > 0) {
3117 /* length_here is the remaining amount of data in this page */
3118 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3119 if (length < length_here)
3120 length_here = length;
3121
3122 buffer->element[element].addr = data;
3123 buffer->element[element].length = length_here;
3124 length -= length_here;
3125 if (!length) {
3126 if (first_lap)
3127 buffer->element[element].flags = 0;
3128 else
3129 buffer->element[element].flags =
3130 SBAL_FLAGS_LAST_FRAG;
3131 } else {
3132 if (first_lap)
3133 buffer->element[element].flags =
3134 SBAL_FLAGS_FIRST_FRAG;
3135 else
3136 buffer->element[element].flags =
3137 SBAL_FLAGS_MIDDLE_FRAG;
3138 }
3139 data += length_here;
3140 element++;
3141 first_lap = 0;
3142 }
3143 *next_element_to_fill = element;
3144}
3145
3146static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3147 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb)
3148{
3149 struct qdio_buffer *buffer;
3150 struct qeth_hdr_tso *hdr;
3151 int flush_cnt = 0, hdr_len, large_send = 0;
3152
d11ba0c4 3153 QETH_DBF_TEXT(TRACE, 6, "qdfillbf");
4a71df50
FB		 3154
3155 buffer = buf->buffer;
3156 atomic_inc(&skb->users);
3157 skb_queue_tail(&buf->skb_list, skb);
3158
3159 hdr = (struct qeth_hdr_tso *) skb->data;
3160 /*check first on TSO ....*/
3161 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3162 int element = buf->next_element_to_fill;
3163
3164 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
3165 /*fill first buffer entry only with header information */
3166 buffer->element[element].addr = skb->data;
3167 buffer->element[element].length = hdr_len;
3168 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3169 buf->next_element_to_fill++;
3170 skb->data += hdr_len;
3171 skb->len -= hdr_len;
3172 large_send = 1;
3173 }
3174 if (skb_shinfo(skb)->nr_frags == 0)
3175 __qeth_fill_buffer(skb, buffer, large_send,
3176 (int *)&buf->next_element_to_fill);
3177 else
3178 __qeth_fill_buffer_frag(skb, buffer, large_send,
3179 (int *)&buf->next_element_to_fill);
3180
3181 if (!queue->do_pack) {
d11ba0c4 3182 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3183 /* set state to PRIMED -> will be flushed */
3184 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3185 flush_cnt = 1;
3186 } else {
d11ba0c4 3187 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3188 if (queue->card->options.performance_stats)
3189 queue->card->perf_stats.skbs_sent_pack++;
3190 if (buf->next_element_to_fill >=
3191 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3192 /*
3193 * packed buffer if full -> set state PRIMED
3194 * -> will be flushed
3195 */
3196 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3197 flush_cnt = 1;
3198 }
3199 }
3200 return flush_cnt;
3201}
3202
3203int qeth_do_send_packet_fast(struct qeth_card *card,
3204 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3205 struct qeth_hdr *hdr, int elements_needed,
3206 struct qeth_eddp_context *ctx)
3207{
3208 struct qeth_qdio_out_buffer *buffer;
3209 int buffers_needed = 0;
3210 int flush_cnt = 0;
3211 int index;
3212
d11ba0c4 3213 QETH_DBF_TEXT(TRACE, 6, "dosndpfa");
4a71df50
FB		 3214
3215 /* spin until we get the queue ... */
3216 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3217 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3218 /* ... now we've got the queue */
3219 index = queue->next_buf_to_fill;
3220 buffer = &queue->bufs[queue->next_buf_to_fill];
3221 /*
3222 * check if buffer is empty to make sure that we do not 'overtake'
3223 * ourselves and try to fill a buffer that is already primed
3224 */
3225 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3226 goto out;
3227 if (ctx == NULL)
3228 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3229 QDIO_MAX_BUFFERS_PER_Q;
3230 else {
3231 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3232 ctx);
3233 if (buffers_needed < 0)
3234 goto out;
3235 queue->next_buf_to_fill =
3236 (queue->next_buf_to_fill + buffers_needed) %
3237 QDIO_MAX_BUFFERS_PER_Q;
3238 }
3239 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3240 if (ctx == NULL) {
3241 qeth_fill_buffer(queue, buffer, skb);
3242 qeth_flush_buffers(queue, 0, index, 1);
3243 } else {
3244 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3245 WARN_ON(buffers_needed != flush_cnt);
3246 qeth_flush_buffers(queue, 0, index, flush_cnt);
3247 }
3248 return 0;
3249out:
3250 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3251 return -EBUSY;
3252}
3253EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3254
3255int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3256 struct sk_buff *skb, struct qeth_hdr *hdr,
3257 int elements_needed, struct qeth_eddp_context *ctx)
3258{
3259 struct qeth_qdio_out_buffer *buffer;
3260 int start_index;
3261 int flush_count = 0;
3262 int do_pack = 0;
3263 int tmp;
3264 int rc = 0;
3265
d11ba0c4 3266 QETH_DBF_TEXT(TRACE, 6, "dosndpkt");
4a71df50
FB		 3267
3268 /* spin until we get the queue ... */
3269 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3270 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3271 start_index = queue->next_buf_to_fill;
3272 buffer = &queue->bufs[queue->next_buf_to_fill];
3273 /*
3274 * check if buffer is empty to make sure that we do not 'overtake'
3275 * ourselves and try to fill a buffer that is already primed
3276 */
3277 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3278 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3279 return -EBUSY;
3280 }
3281 /* check if we need to switch packing state of this queue */
3282 qeth_switch_to_packing_if_needed(queue);
3283 if (queue->do_pack) {
3284 do_pack = 1;
3285 if (ctx == NULL) {
3286 /* does packet fit in current buffer? */
3287 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3288 buffer->next_element_to_fill) < elements_needed) {
3289 /* ... no -> set state PRIMED */
3290 atomic_set(&buffer->state,
3291 QETH_QDIO_BUF_PRIMED);
3292 flush_count++;
3293 queue->next_buf_to_fill =
3294 (queue->next_buf_to_fill + 1) %
3295 QDIO_MAX_BUFFERS_PER_Q;
3296 buffer = &queue->bufs[queue->next_buf_to_fill];
3297 /* we did a step forward, so check buffer state
3298 * again */
3299 if (atomic_read(&buffer->state) !=
3300 QETH_QDIO_BUF_EMPTY){
3301 qeth_flush_buffers(queue, 0,
3302 start_index, flush_count);
3303 atomic_set(&queue->state,
3304 QETH_OUT_Q_UNLOCKED);
3305 return -EBUSY;
3306 }
3307 }
3308 } else {
3309 /* check if we have enough elements (including following
3310 * free buffers) to handle eddp context */
3311 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3312 < 0) {
3313 if (net_ratelimit())
3314 PRINT_WARN("eddp tx_dropped 1\n");
3315 rc = -EBUSY;
3316 goto out;
3317 }
3318 }
3319 }
3320 if (ctx == NULL)
3321 tmp = qeth_fill_buffer(queue, buffer, skb);
3322 else {
3323 tmp = qeth_eddp_fill_buffer(queue, ctx,
3324 queue->next_buf_to_fill);
3325 if (tmp < 0) {
3326 PRINT_ERR("eddp tx_dropped 2\n");
3327 rc = -EBUSY;
3328 goto out;
3329 }
3330 }
3331 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3332 QDIO_MAX_BUFFERS_PER_Q;
3333 flush_count += tmp;
3334out:
3335 if (flush_count)
3336 qeth_flush_buffers(queue, 0, start_index, flush_count);
3337 else if (!atomic_read(&queue->set_pci_flags_count))
3338 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3339 /*
3340 * queue->state will go from LOCKED -> UNLOCKED or from
3341 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3342 * (switch packing state or flush buffer to get another pci flag out).
3343 * In that case we will enter this loop
3344 */
3345 while (atomic_dec_return(&queue->state)) {
3346 flush_count = 0;
3347 start_index = queue->next_buf_to_fill;
3348 /* check if we can go back to non-packing state */
3349 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3350 /*
3351 * check if we need to flush a packing buffer to get a pci
3352 * flag out on the queue
3353 */
3354 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3355 flush_count += qeth_flush_buffers_on_no_pci(queue);
3356 if (flush_count)
3357 qeth_flush_buffers(queue, 0, start_index, flush_count);
3358 }
3359 /* at this point the queue is UNLOCKED again */
3360 if (queue->card->options.performance_stats && do_pack)
3361 queue->card->perf_stats.bufs_sent_pack += flush_count;
3362
3363 return rc;
3364}
3365EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3366
3367static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3368 struct qeth_reply *reply, unsigned long data)
3369{
3370 struct qeth_ipa_cmd *cmd;
3371 struct qeth_ipacmd_setadpparms *setparms;
3372
d11ba0c4 3373 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3374
3375 cmd = (struct qeth_ipa_cmd *) data;
3376 setparms = &(cmd->data.setadapterparms);
3377
3378 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3379 if (cmd->hdr.return_code) {
d11ba0c4 3380 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3381 setparms->data.mode = SET_PROMISC_MODE_OFF;
3382 }
3383 card->info.promisc_mode = setparms->data.mode;
3384 return 0;
3385}
3386
3387void qeth_setadp_promisc_mode(struct qeth_card *card)
3388{
3389 enum qeth_ipa_promisc_modes mode;
3390 struct net_device *dev = card->dev;
3391 struct qeth_cmd_buffer *iob;
3392 struct qeth_ipa_cmd *cmd;
3393
d11ba0c4 3394 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3395
3396 if (((dev->flags & IFF_PROMISC) &&
3397 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3398 (!(dev->flags & IFF_PROMISC) &&
3399 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3400 return;
3401 mode = SET_PROMISC_MODE_OFF;
3402 if (dev->flags & IFF_PROMISC)
3403 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3404 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3405
3406 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3407 sizeof(struct qeth_ipacmd_setadpparms));
3408 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3409 cmd->data.setadapterparms.data.mode = mode;
3410 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3411}
3412EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3413
3414int qeth_change_mtu(struct net_device *dev, int new_mtu)
3415{
3416 struct qeth_card *card;
3417 char dbf_text[15];
3418
3419 card = netdev_priv(dev);
3420
d11ba0c4 3421 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3422 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3423 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3424
3425 if (new_mtu < 64)
3426 return -EINVAL;
3427 if (new_mtu > 65535)
3428 return -EINVAL;
3429 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3430 (!qeth_mtu_is_valid(card, new_mtu)))
3431 return -EINVAL;
3432 dev->mtu = new_mtu;
3433 return 0;
3434}
3435EXPORT_SYMBOL_GPL(qeth_change_mtu);
3436
3437struct net_device_stats *qeth_get_stats(struct net_device *dev)
3438{
3439 struct qeth_card *card;
3440
3441 card = netdev_priv(dev);
3442
d11ba0c4 3443 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3444
3445 return &card->stats;
3446}
3447EXPORT_SYMBOL_GPL(qeth_get_stats);
3448
3449static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3450 struct qeth_reply *reply, unsigned long data)
3451{
3452 struct qeth_ipa_cmd *cmd;
3453
d11ba0c4 3454 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3455
3456 cmd = (struct qeth_ipa_cmd *) data;
3457 if (!card->options.layer2 ||
3458 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3459 memcpy(card->dev->dev_addr,
3460 &cmd->data.setadapterparms.data.change_addr.addr,
3461 OSA_ADDR_LEN);
3462 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3463 }
3464 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3465 return 0;
3466}
3467
3468int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3469{
3470 int rc;
3471 struct qeth_cmd_buffer *iob;
3472 struct qeth_ipa_cmd *cmd;
3473
d11ba0c4 3474 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3475
3476 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3477 sizeof(struct qeth_ipacmd_setadpparms));
3478 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3479 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3480 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3481 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3482 card->dev->dev_addr, OSA_ADDR_LEN);
3483 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3484 NULL);
3485 return rc;
3486}
3487EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3488
3489void qeth_tx_timeout(struct net_device *dev)
3490{
3491 struct qeth_card *card;
3492
3493 card = netdev_priv(dev);
3494 card->stats.tx_errors++;
3495 qeth_schedule_recovery(card);
3496}
3497EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3498
3499int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3500{
3501 struct qeth_card *card = netdev_priv(dev);
3502 int rc = 0;
3503
3504 switch (regnum) {
3505 case MII_BMCR: /* Basic mode control register */
3506 rc = BMCR_FULLDPLX;
3507 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3508 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3509 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3510 rc |= BMCR_SPEED100;
3511 break;
3512 case MII_BMSR: /* Basic mode status register */
3513 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3514 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3515 BMSR_100BASE4;
3516 break;
3517 case MII_PHYSID1: /* PHYS ID 1 */
3518 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3519 dev->dev_addr[2];
3520 rc = (rc >> 5) & 0xFFFF;
3521 break;
3522 case MII_PHYSID2: /* PHYS ID 2 */
3523 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3524 break;
3525 case MII_ADVERTISE: /* Advertisement control reg */
3526 rc = ADVERTISE_ALL;
3527 break;
3528 case MII_LPA: /* Link partner ability reg */
3529 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3530 LPA_100BASE4 | LPA_LPACK;
3531 break;
3532 case MII_EXPANSION: /* Expansion register */
3533 break;
3534 case MII_DCOUNTER: /* disconnect counter */
3535 break;
3536 case MII_FCSCOUNTER: /* false carrier counter */
3537 break;
3538 case MII_NWAYTEST: /* N-way auto-neg test register */
3539 break;
3540 case MII_RERRCOUNTER: /* rx error counter */
3541 rc = card->stats.rx_errors;
3542 break;
3543 case MII_SREVISION: /* silicon revision */
3544 break;
3545 case MII_RESV1: /* reserved 1 */
3546 break;
3547 case MII_LBRERROR: /* loopback, rx, bypass error */
3548 break;
3549 case MII_PHYADDR: /* physical address */
3550 break;
3551 case MII_RESV2: /* reserved 2 */
3552 break;
3553 case MII_TPISTATUS: /* TPI status for 10mbps */
3554 break;
3555 case MII_NCONFIG: /* network interface config */
3556 break;
3557 default:
3558 break;
3559 }
3560 return rc;
3561}
3562EXPORT_SYMBOL_GPL(qeth_mdio_read);
3563
3564static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3565 struct qeth_cmd_buffer *iob, int len,
3566 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3567 unsigned long),
3568 void *reply_param)
3569{
3570 u16 s1, s2;
3571
d11ba0c4 3572 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3573
3574 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3575 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3576 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3577 /* adjust PDU length fields in IPA_PDU_HEADER */
3578 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3579 s2 = (u32) len;
3580 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3581 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3582 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3583 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3584 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3585 reply_cb, reply_param);
3586}
3587
3588static int qeth_snmp_command_cb(struct qeth_card *card,
3589 struct qeth_reply *reply, unsigned long sdata)
3590{
3591 struct qeth_ipa_cmd *cmd;
3592 struct qeth_arp_query_info *qinfo;
3593 struct qeth_snmp_cmd *snmp;
3594 unsigned char *data;
3595 __u16 data_len;
3596
d11ba0c4 3597 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3598
3599 cmd = (struct qeth_ipa_cmd *) sdata;
3600 data = (unsigned char *)((char *)cmd - reply->offset);
3601 qinfo = (struct qeth_arp_query_info *) reply->param;
3602 snmp = &cmd->data.setadapterparms.data.snmp;
3603
3604 if (cmd->hdr.return_code) {
d11ba0c4 3605 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3606 return 0;
3607 }
3608 if (cmd->data.setadapterparms.hdr.return_code) {
3609 cmd->hdr.return_code =
3610 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3611 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3612 return 0;
3613 }
3614 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3615 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3616 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3617 else
3618 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3619
3620 /* check if there is enough room in userspace */
3621 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3622 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3623 cmd->hdr.return_code = -ENOMEM;
3624 return 0;
3625 }
d11ba0c4 3626 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3627 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3628 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3629 cmd->data.setadapterparms.hdr.seq_no);
3630 /*copy entries to user buffer*/
3631 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3632 memcpy(qinfo->udata + qinfo->udata_offset,
3633 (char *)snmp,
3634 data_len + offsetof(struct qeth_snmp_cmd, data));
3635 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3636 } else {
3637 memcpy(qinfo->udata + qinfo->udata_offset,
3638 (char *)&snmp->request, data_len);
3639 }
3640 qinfo->udata_offset += data_len;
3641 /* check if all replies received ... */
d11ba0c4 3642 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3643 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3644 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3645 cmd->data.setadapterparms.hdr.seq_no);
3646 if (cmd->data.setadapterparms.hdr.seq_no <
3647 cmd->data.setadapterparms.hdr.used_total)
3648 return 1;
3649 return 0;
3650}
3651
3652int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3653{
3654 struct qeth_cmd_buffer *iob;
3655 struct qeth_ipa_cmd *cmd;
3656 struct qeth_snmp_ureq *ureq;
3657 int req_len;
3658 struct qeth_arp_query_info qinfo = {0, };
3659 int rc = 0;
3660
d11ba0c4 3661 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3662
3663 if (card->info.guestlan)
3664 return -EOPNOTSUPP;
3665
3666 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3667 (!card->options.layer2)) {
3668 PRINT_WARN("SNMP Query MIBS not supported "
3669 "on %s!\n", QETH_CARD_IFNAME(card));
3670 return -EOPNOTSUPP;
3671 }
3672 /* skip 4 bytes (data_len struct member) to get req_len */
3673 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3674 return -EFAULT;
3675 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3676 if (!ureq) {
d11ba0c4 3677 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3678 return -ENOMEM;
3679 }
3680 if (copy_from_user(ureq, udata,
3681 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3682 kfree(ureq);
3683 return -EFAULT;
3684 }
3685 qinfo.udata_len = ureq->hdr.data_len;
3686 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3687 if (!qinfo.udata) {
3688 kfree(ureq);
3689 return -ENOMEM;
3690 }
3691 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3692
3693 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3694 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3695 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3696 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3697 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3698 qeth_snmp_command_cb, (void *)&qinfo);
3699 if (rc)
3700 PRINT_WARN("SNMP command failed on %s: (0x%x)\n",
3701 QETH_CARD_IFNAME(card), rc);
3702 else {
3703 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3704 rc = -EFAULT;
3705 }
3706
3707 kfree(ureq);
3708 kfree(qinfo.udata);
3709 return rc;
3710}
3711EXPORT_SYMBOL_GPL(qeth_snmp_command);
3712
3713static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3714{
3715 switch (card->info.type) {
3716 case QETH_CARD_TYPE_IQD:
3717 return 2;
3718 default:
3719 return 0;
3720 }
3721}
3722
3723static int qeth_qdio_establish(struct qeth_card *card)
3724{
3725 struct qdio_initialize init_data;
3726 char *qib_param_field;
3727 struct qdio_buffer **in_sbal_ptrs;
3728 struct qdio_buffer **out_sbal_ptrs;
3729 int i, j, k;
3730 int rc = 0;
3731
d11ba0c4 3732 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3733
3734 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3735 GFP_KERNEL);
3736 if (!qib_param_field)
3737 return -ENOMEM;
3738
3739 qeth_create_qib_param_field(card, qib_param_field);
3740 qeth_create_qib_param_field_blkt(card, qib_param_field);
3741
3742 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3743 GFP_KERNEL);
3744 if (!in_sbal_ptrs) {
3745 kfree(qib_param_field);
3746 return -ENOMEM;
3747 }
3748 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3749 in_sbal_ptrs[i] = (struct qdio_buffer *)
3750 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3751
3752 out_sbal_ptrs =
3753 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3754 sizeof(void *), GFP_KERNEL);
3755 if (!out_sbal_ptrs) {
3756 kfree(in_sbal_ptrs);
3757 kfree(qib_param_field);
3758 return -ENOMEM;
3759 }
3760 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3761 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3762 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3763 card->qdio.out_qs[i]->bufs[j].buffer);
3764 }
3765
3766 memset(&init_data, 0, sizeof(struct qdio_initialize));
3767 init_data.cdev = CARD_DDEV(card);
3768 init_data.q_format = qeth_get_qdio_q_format(card);
3769 init_data.qib_param_field_format = 0;
3770 init_data.qib_param_field = qib_param_field;
3771 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3772 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3773 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3774 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3775 init_data.no_input_qs = 1;
3776 init_data.no_output_qs = card->qdio.no_out_queues;
3777 init_data.input_handler = card->discipline.input_handler;
3778 init_data.output_handler = card->discipline.output_handler;
3779 init_data.int_parm = (unsigned long) card;
3780 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3781 QDIO_OUTBOUND_0COPY_SBALS |
3782 QDIO_USE_OUTBOUND_PCIS;
3783 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3784 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3785
3786 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3787 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3788 rc = qdio_initialize(&init_data);
3789 if (rc)
3790 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3791 }
3792 kfree(out_sbal_ptrs);
3793 kfree(in_sbal_ptrs);
3794 kfree(qib_param_field);
3795 return rc;
3796}
3797
3798static void qeth_core_free_card(struct qeth_card *card)
3799{
3800
d11ba0c4
PT		 3801 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3802 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3803 qeth_clean_channel(&card->read);
3804 qeth_clean_channel(&card->write);
3805 if (card->dev)
3806 free_netdev(card->dev);
3807 kfree(card->ip_tbd_list);
3808 qeth_free_qdio_buffers(card);
3809 kfree(card);
3810}
3811
3812static struct ccw_device_id qeth_ids[] = {
3813 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3814 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3815 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3816 {},
3817};
3818MODULE_DEVICE_TABLE(ccw, qeth_ids);
3819
3820static struct ccw_driver qeth_ccw_driver = {
3821 .name = "qeth",
3822 .ids = qeth_ids,
3823 .probe = ccwgroup_probe_ccwdev,
3824 .remove = ccwgroup_remove_ccwdev,
3825};
3826
3827static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3828 unsigned long driver_id)
3829{
3830 const char *start, *end;
3831 char bus_ids[3][BUS_ID_SIZE], *argv[3];
3832 int i;
3833
3834 start = buf;
3835 for (i = 0; i < 3; i++) {
3836 static const char delim[] = { ',', ',', '\n' };
3837 int len;
3838
3839 end = strchr(start, delim[i]);
3840 if (!end)
3841 return -EINVAL;
3842 len = min_t(ptrdiff_t, BUS_ID_SIZE, end - start);
3843 strncpy(bus_ids[i], start, len);
3844 bus_ids[i][len] = '\0';
3845 start = end + 1;
3846 argv[i] = bus_ids[i];
3847 }
3848
3849 return (ccwgroup_create(root_dev, driver_id,
3850 &qeth_ccw_driver, 3, argv));
3851}
3852
3853int qeth_core_hardsetup_card(struct qeth_card *card)
3854{
3855 int retries = 3;
3856 int mpno;
3857 int rc;
3858
d11ba0c4 3859 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3860 atomic_set(&card->force_alloc_skb, 0);
3861retry:
3862 if (retries < 3) {
3863 PRINT_WARN("Retrying to do IDX activates.\n");
3864 ccw_device_set_offline(CARD_DDEV(card));
3865 ccw_device_set_offline(CARD_WDEV(card));
3866 ccw_device_set_offline(CARD_RDEV(card));
3867 ccw_device_set_online(CARD_RDEV(card));
3868 ccw_device_set_online(CARD_WDEV(card));
3869 ccw_device_set_online(CARD_DDEV(card));
3870 }
3871 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3872 if (rc == -ERESTARTSYS) {
d11ba0c4 3873 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3874 return rc;
3875 } else if (rc) {
d11ba0c4 3876 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 3877 if (--retries < 0)
3878 goto out;
3879 else
3880 goto retry;
3881 }
3882
3883 rc = qeth_get_unitaddr(card);
3884 if (rc) {
d11ba0c4 3885 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 3886 return rc;
3887 }
3888
3889 mpno = QETH_MAX_PORTNO;
3890 if (card->info.portno > mpno) {
3891 PRINT_ERR("Device %s does not offer port number %d \n.",
3892 CARD_BUS_ID(card), card->info.portno);
3893 rc = -ENODEV;
3894 goto out;
3895 }
3896 qeth_init_tokens(card);
3897 qeth_init_func_level(card);
3898 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3899 if (rc == -ERESTARTSYS) {
d11ba0c4 3900 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3901 return rc;
3902 } else if (rc) {
d11ba0c4 3903 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3904 if (--retries < 0)
3905 goto out;
3906 else
3907 goto retry;
3908 }
3909 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3910 if (rc == -ERESTARTSYS) {
d11ba0c4 3911 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3912 return rc;
3913 } else if (rc) {
d11ba0c4 3914 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3915 if (--retries < 0)
3916 goto out;
3917 else
3918 goto retry;
3919 }
3920 rc = qeth_mpc_initialize(card);
3921 if (rc) {
d11ba0c4 3922 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3923 goto out;
3924 }
3925 return 0;
3926out:
3927 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3928 return rc;
3929}
3930EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3931
3932static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3933 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3934{
3935 struct page *page = virt_to_page(element->addr);
3936 if (*pskb == NULL) {
3937 /* the upper protocol layers assume that there is data in the
3938 * skb itself. Copy a small amount (64 bytes) to make them
3939 * happy. */
3940 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3941 if (!(*pskb))
3942 return -ENOMEM;
3943 skb_reserve(*pskb, ETH_HLEN);
3944 if (data_len <= 64) {
3945 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3946 data_len);
3947 } else {
3948 get_page(page);
3949 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3950 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3951 data_len - 64);
3952 (*pskb)->data_len += data_len - 64;
3953 (*pskb)->len += data_len - 64;
3954 (*pskb)->truesize += data_len - 64;
3955 (*pfrag)++;
3956 }
3957 } else {
3958 get_page(page);
3959 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3960 (*pskb)->data_len += data_len;
3961 (*pskb)->len += data_len;
3962 (*pskb)->truesize += data_len;
3963 (*pfrag)++;
3964 }
3965 return 0;
3966}
3967
3968struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3969 struct qdio_buffer *buffer,
3970 struct qdio_buffer_element **__element, int *__offset,
3971 struct qeth_hdr **hdr)
3972{
3973 struct qdio_buffer_element *element = *__element;
3974 int offset = *__offset;
3975 struct sk_buff *skb = NULL;
3976 int skb_len;
3977 void *data_ptr;
3978 int data_len;
3979 int headroom = 0;
3980 int use_rx_sg = 0;
3981 int frag = 0;
3982
d11ba0c4 3983 QETH_DBF_TEXT(TRACE, 6, "nextskb");
4a71df50
FB		 3984 /* qeth_hdr must not cross element boundaries */
3985 if (element->length < offset + sizeof(struct qeth_hdr)) {
3986 if (qeth_is_last_sbale(element))
3987 return NULL;
3988 element++;
3989 offset = 0;
3990 if (element->length < sizeof(struct qeth_hdr))
3991 return NULL;
3992 }
3993 *hdr = element->addr + offset;
3994
3995 offset += sizeof(struct qeth_hdr);
3996 if (card->options.layer2) {
3997 if (card->info.type == QETH_CARD_TYPE_OSN) {
3998 skb_len = (*hdr)->hdr.osn.pdu_length;
3999 headroom = sizeof(struct qeth_hdr);
4000 } else {
4001 skb_len = (*hdr)->hdr.l2.pkt_length;
4002 }
4003 } else {
4004 skb_len = (*hdr)->hdr.l3.length;
4005 headroom = max((int)ETH_HLEN, (int)TR_HLEN);
4006 }
4007
4008 if (!skb_len)
4009 return NULL;
4010
4011 if ((skb_len >= card->options.rx_sg_cb) &&
4012 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4013 (!atomic_read(&card->force_alloc_skb))) {
4014 use_rx_sg = 1;
4015 } else {
4016 skb = dev_alloc_skb(skb_len + headroom);
4017 if (!skb)
4018 goto no_mem;
4019 if (headroom)
4020 skb_reserve(skb, headroom);
4021 }
4022
4023 data_ptr = element->addr + offset;
4024 while (skb_len) {
4025 data_len = min(skb_len, (int)(element->length - offset));
4026 if (data_len) {
4027 if (use_rx_sg) {
4028 if (qeth_create_skb_frag(element, &skb, offset,
4029 &frag, data_len))
4030 goto no_mem;
4031 } else {
4032 memcpy(skb_put(skb, data_len), data_ptr,
4033 data_len);
4034 }
4035 }
4036 skb_len -= data_len;
4037 if (skb_len) {
4038 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 4039 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4040 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 4041 CARD_BUS_ID(card));
d11ba0c4
PT		 4042 QETH_DBF_TEXT(QERR, 2, "unexeob");
4043 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 4044 CARD_BUS_ID(card));
d11ba0c4 4045 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 4046 dev_kfree_skb_any(skb);
4047 card->stats.rx_errors++;
4048 return NULL;
4049 }
4050 element++;
4051 offset = 0;
4052 data_ptr = element->addr;
4053 } else {
4054 offset += data_len;
4055 }
4056 }
4057 *__element = element;
4058 *__offset = offset;
4059 if (use_rx_sg && card->options.performance_stats) {
4060 card->perf_stats.sg_skbs_rx++;
4061 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4062 }
4063 return skb;
4064no_mem:
4065 if (net_ratelimit()) {
4066 PRINT_WARN("No memory for packet received on %s.\n",
4067 QETH_CARD_IFNAME(card));
d11ba0c4
PT		 4068 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4069 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 4070 }
4071 card->stats.rx_dropped++;
4072 return NULL;
4073}
4074EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4075
4076static void qeth_unregister_dbf_views(void)
4077{
d11ba0c4
PT		 4078 int x;
4079 for (x = 0; x < QETH_DBF_INFOS; x++) {
4080 debug_unregister(qeth_dbf[x].id);
4081 qeth_dbf[x].id = NULL;
4082 }
4a71df50
FB		 4083}
4084
4085static int qeth_register_dbf_views(void)
4086{
d11ba0c4
PT		 4087 int ret;
4088 int x;
4089
4090 for (x = 0; x < QETH_DBF_INFOS; x++) {
4091 /* register the areas */
4092 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4093 qeth_dbf[x].pages,
4094 qeth_dbf[x].areas,
4095 qeth_dbf[x].len);
4096 if (qeth_dbf[x].id == NULL) {
4097 qeth_unregister_dbf_views();
4098 return -ENOMEM;
4099 }
4a71df50 4100
d11ba0c4
PT		 4101 /* register a view */
4102 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4103 if (ret) {
4104 qeth_unregister_dbf_views();
4105 return ret;
4106 }
4a71df50 4107
d11ba0c4
PT		 4108 /* set a passing level */
4109 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4110 }
4a71df50
FB		 4111
4112 return 0;
4113}
4114
4115int qeth_core_load_discipline(struct qeth_card *card,
4116 enum qeth_discipline_id discipline)
4117{
4118 int rc = 0;
4119 switch (discipline) {
4120 case QETH_DISCIPLINE_LAYER3:
4121 card->discipline.ccwgdriver = try_then_request_module(
4122 symbol_get(qeth_l3_ccwgroup_driver),
4123 "qeth_l3");
4124 break;
4125 case QETH_DISCIPLINE_LAYER2:
4126 card->discipline.ccwgdriver = try_then_request_module(
4127 symbol_get(qeth_l2_ccwgroup_driver),
4128 "qeth_l2");
4129 break;
4130 }
4131 if (!card->discipline.ccwgdriver) {
4132 PRINT_ERR("Support for discipline %d not present\n",
4133 discipline);
4134 rc = -EINVAL;
4135 }
4136 return rc;
4137}
4138
4139void qeth_core_free_discipline(struct qeth_card *card)
4140{
4141 if (card->options.layer2)
4142 symbol_put(qeth_l2_ccwgroup_driver);
4143 else
4144 symbol_put(qeth_l3_ccwgroup_driver);
4145 card->discipline.ccwgdriver = NULL;
4146}
4147
4148static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4149{
4150 struct qeth_card *card;
4151 struct device *dev;
4152 int rc;
4153 unsigned long flags;
4154
d11ba0c4 4155 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4156
4157 dev = &gdev->dev;
4158 if (!get_device(dev))
4159 return -ENODEV;
4160
d11ba0c4 4161 QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id);
4a71df50
FB		 4162
4163 card = qeth_alloc_card();
4164 if (!card) {
d11ba0c4 4165 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4166 rc = -ENOMEM;
4167 goto err_dev;
4168 }
4169 card->read.ccwdev = gdev->cdev[0];
4170 card->write.ccwdev = gdev->cdev[1];
4171 card->data.ccwdev = gdev->cdev[2];
4172 dev_set_drvdata(&gdev->dev, card);
4173 card->gdev = gdev;
4174 gdev->cdev[0]->handler = qeth_irq;
4175 gdev->cdev[1]->handler = qeth_irq;
4176 gdev->cdev[2]->handler = qeth_irq;
4177
4178 rc = qeth_determine_card_type(card);
4179 if (rc) {
4180 PRINT_WARN("%s: not a valid card type\n", __func__);
d11ba0c4 4181 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4182 goto err_card;
4183 }
4184 rc = qeth_setup_card(card);
4185 if (rc) {
d11ba0c4 4186 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4187 goto err_card;
4188 }
4189
4190 if (card->info.type == QETH_CARD_TYPE_OSN) {
4191 rc = qeth_core_create_osn_attributes(dev);
4192 if (rc)
4193 goto err_card;
4194 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4195 if (rc) {
4196 qeth_core_remove_osn_attributes(dev);
4197 goto err_card;
4198 }
4199 rc = card->discipline.ccwgdriver->probe(card->gdev);
4200 if (rc) {
4201 qeth_core_free_discipline(card);
4202 qeth_core_remove_osn_attributes(dev);
4203 goto err_card;
4204 }
4205 } else {
4206 rc = qeth_core_create_device_attributes(dev);
4207 if (rc)
4208 goto err_card;
4209 }
4210
4211 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4212 list_add_tail(&card->list, &qeth_core_card_list.list);
4213 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4214 return 0;
4215
4216err_card:
4217 qeth_core_free_card(card);
4218err_dev:
4219 put_device(dev);
4220 return rc;
4221}
4222
4223static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4224{
4225 unsigned long flags;
4226 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4227
4228 if (card->discipline.ccwgdriver) {
4229 card->discipline.ccwgdriver->remove(gdev);
4230 qeth_core_free_discipline(card);
4231 }
4232
4233 if (card->info.type == QETH_CARD_TYPE_OSN) {
4234 qeth_core_remove_osn_attributes(&gdev->dev);
4235 } else {
4236 qeth_core_remove_device_attributes(&gdev->dev);
4237 }
4238 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4239 list_del(&card->list);
4240 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4241 qeth_core_free_card(card);
4242 dev_set_drvdata(&gdev->dev, NULL);
4243 put_device(&gdev->dev);
4244 return;
4245}
4246
4247static int qeth_core_set_online(struct ccwgroup_device *gdev)
4248{
4249 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4250 int rc = 0;
4251 int def_discipline;
4252
4253 if (!card->discipline.ccwgdriver) {
4254 if (card->info.type == QETH_CARD_TYPE_IQD)
4255 def_discipline = QETH_DISCIPLINE_LAYER3;
4256 else
4257 def_discipline = QETH_DISCIPLINE_LAYER2;
4258 rc = qeth_core_load_discipline(card, def_discipline);
4259 if (rc)
4260 goto err;
4261 rc = card->discipline.ccwgdriver->probe(card->gdev);
4262 if (rc)
4263 goto err;
4264 }
4265 rc = card->discipline.ccwgdriver->set_online(gdev);
4266err:
4267 return rc;
4268}
4269
4270static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4271{
4272 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4273 return card->discipline.ccwgdriver->set_offline(gdev);
4274}
4275
4276static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4277{
4278 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4279 if (card->discipline.ccwgdriver &&
4280 card->discipline.ccwgdriver->shutdown)
4281 card->discipline.ccwgdriver->shutdown(gdev);
4282}
4283
4284static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4285 .owner = THIS_MODULE,
4286 .name = "qeth",
4287 .driver_id = 0xD8C5E3C8,
4288 .probe = qeth_core_probe_device,
4289 .remove = qeth_core_remove_device,
4290 .set_online = qeth_core_set_online,
4291 .set_offline = qeth_core_set_offline,
4292 .shutdown = qeth_core_shutdown,
4293};
4294
4295static ssize_t
4296qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4297 size_t count)
4298{
4299 int err;
4300 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4301 qeth_core_ccwgroup_driver.driver_id);
4302 if (err)
4303 return err;
4304 else
4305 return count;
4306}
4307
4308static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4309
4310static struct {
4311 const char str[ETH_GSTRING_LEN];
4312} qeth_ethtool_stats_keys[] = {
4313/* 0 */{"rx skbs"},
4314 {"rx buffers"},
4315 {"tx skbs"},
4316 {"tx buffers"},
4317 {"tx skbs no packing"},
4318 {"tx buffers no packing"},
4319 {"tx skbs packing"},
4320 {"tx buffers packing"},
4321 {"tx sg skbs"},
4322 {"tx sg frags"},
4323/* 10 */{"rx sg skbs"},
4324 {"rx sg frags"},
4325 {"rx sg page allocs"},
4326 {"tx large kbytes"},
4327 {"tx large count"},
4328 {"tx pk state ch n->p"},
4329 {"tx pk state ch p->n"},
4330 {"tx pk watermark low"},
4331 {"tx pk watermark high"},
4332 {"queue 0 buffer usage"},
4333/* 20 */{"queue 1 buffer usage"},
4334 {"queue 2 buffer usage"},
4335 {"queue 3 buffer usage"},
4336 {"rx handler time"},
4337 {"rx handler count"},
4338 {"rx do_QDIO time"},
4339 {"rx do_QDIO count"},
4340 {"tx handler time"},
4341 {"tx handler count"},
4342 {"tx time"},
4343/* 30 */{"tx count"},
4344 {"tx do_QDIO time"},
4345 {"tx do_QDIO count"},
4346};
4347
4348int qeth_core_get_stats_count(struct net_device *dev)
4349{
4350 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4351}
4352EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4353
4354void qeth_core_get_ethtool_stats(struct net_device *dev,
4355 struct ethtool_stats *stats, u64 *data)
4356{
4357 struct qeth_card *card = netdev_priv(dev);
4358 data[0] = card->stats.rx_packets -
4359 card->perf_stats.initial_rx_packets;
4360 data[1] = card->perf_stats.bufs_rec;
4361 data[2] = card->stats.tx_packets -
4362 card->perf_stats.initial_tx_packets;
4363 data[3] = card->perf_stats.bufs_sent;
4364 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4365 - card->perf_stats.skbs_sent_pack;
4366 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4367 data[6] = card->perf_stats.skbs_sent_pack;
4368 data[7] = card->perf_stats.bufs_sent_pack;
4369 data[8] = card->perf_stats.sg_skbs_sent;
4370 data[9] = card->perf_stats.sg_frags_sent;
4371 data[10] = card->perf_stats.sg_skbs_rx;
4372 data[11] = card->perf_stats.sg_frags_rx;
4373 data[12] = card->perf_stats.sg_alloc_page_rx;
4374 data[13] = (card->perf_stats.large_send_bytes >> 10);
4375 data[14] = card->perf_stats.large_send_cnt;
4376 data[15] = card->perf_stats.sc_dp_p;
4377 data[16] = card->perf_stats.sc_p_dp;
4378 data[17] = QETH_LOW_WATERMARK_PACK;
4379 data[18] = QETH_HIGH_WATERMARK_PACK;
4380 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4381 data[20] = (card->qdio.no_out_queues > 1) ?
4382 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4383 data[21] = (card->qdio.no_out_queues > 2) ?
4384 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4385 data[22] = (card->qdio.no_out_queues > 3) ?
4386 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4387 data[23] = card->perf_stats.inbound_time;
4388 data[24] = card->perf_stats.inbound_cnt;
4389 data[25] = card->perf_stats.inbound_do_qdio_time;
4390 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4391 data[27] = card->perf_stats.outbound_handler_time;
4392 data[28] = card->perf_stats.outbound_handler_cnt;
4393 data[29] = card->perf_stats.outbound_time;
4394 data[30] = card->perf_stats.outbound_cnt;
4395 data[31] = card->perf_stats.outbound_do_qdio_time;
4396 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4397}
4398EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4399
4400void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4401{
4402 switch (stringset) {
4403 case ETH_SS_STATS:
4404 memcpy(data, &qeth_ethtool_stats_keys,
4405 sizeof(qeth_ethtool_stats_keys));
4406 break;
4407 default:
4408 WARN_ON(1);
4409 break;
4410 }
4411}
4412EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4413
4414void qeth_core_get_drvinfo(struct net_device *dev,
4415 struct ethtool_drvinfo *info)
4416{
4417 struct qeth_card *card = netdev_priv(dev);
4418 if (card->options.layer2)
4419 strcpy(info->driver, "qeth_l2");
4420 else
4421 strcpy(info->driver, "qeth_l3");
4422
4423 strcpy(info->version, "1.0");
4424 strcpy(info->fw_version, card->info.mcl_level);
4425 sprintf(info->bus_info, "%s/%s/%s",
4426 CARD_RDEV_ID(card),
4427 CARD_WDEV_ID(card),
4428 CARD_DDEV_ID(card));
4429}
4430EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4431
4432static int __init qeth_core_init(void)
4433{
4434 int rc;
4435
4436 PRINT_INFO("loading core functions\n");
4437 INIT_LIST_HEAD(&qeth_core_card_list.list);
4438 rwlock_init(&qeth_core_card_list.rwlock);
4439
4440 rc = qeth_register_dbf_views();
4441 if (rc)
4442 goto out_err;
4443 rc = ccw_driver_register(&qeth_ccw_driver);
4444 if (rc)
4445 goto ccw_err;
4446 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4447 if (rc)
4448 goto ccwgroup_err;
4449 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4450 &driver_attr_group);
4451 if (rc)
4452 goto driver_err;
4453 qeth_core_root_dev = s390_root_dev_register("qeth");
4454 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4455 if (rc)
4456 goto register_err;
4457 return 0;
4458
4459register_err:
4460 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4461 &driver_attr_group);
4462driver_err:
4463 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4464ccwgroup_err:
4465 ccw_driver_unregister(&qeth_ccw_driver);
4466ccw_err:
4467 qeth_unregister_dbf_views();
4468out_err:
4469 PRINT_ERR("Initialization failed with code %d\n", rc);
4470 return rc;
4471}
4472
4473static void __exit qeth_core_exit(void)
4474{
4475 s390_root_dev_unregister(qeth_core_root_dev);
4476 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4477 &driver_attr_group);
4478 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4479 ccw_driver_unregister(&qeth_ccw_driver);
4480 qeth_unregister_dbf_views();
4481 PRINT_INFO("core functions removed\n");
4482}
4483
4484module_init(qeth_core_init);
4485module_exit(qeth_core_exit);
4486MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4487MODULE_DESCRIPTION("qeth core functions");
4488MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)