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qeth: add query OSA address table support
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
b3332930 24#include <net/iucv/af_iucv.h>
4a71df50 25
ab4227cb
MS		 26#include <asm/ebcdic.h>
27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 54
55static void qeth_send_control_data_cb(struct qeth_channel *,
56 struct qeth_cmd_buffer *);
57static int qeth_issue_next_read(struct qeth_card *);
58static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
59static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
60static void qeth_free_buffer_pool(struct qeth_card *);
61static int qeth_qdio_establish(struct qeth_card *);
0da9581d 62static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 63static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
64 struct qeth_qdio_out_buffer *buf,
65 enum iucv_tx_notify notification);
66static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 67static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
68 struct qeth_qdio_out_buffer *buf,
69 enum qeth_qdio_buffer_states newbufstate);
72861ae7 70static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 71
4a71df50
FB		 72static inline const char *qeth_get_cardname(struct qeth_card *card)
73{
74 if (card->info.guestlan) {
75 switch (card->info.type) {
5113fec0 76 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 77 return " Guest LAN QDIO";
78 case QETH_CARD_TYPE_IQD:
79 return " Guest LAN Hiper";
5113fec0
UB		 80 case QETH_CARD_TYPE_OSM:
81 return " Guest LAN QDIO - OSM";
82 case QETH_CARD_TYPE_OSX:
83 return " Guest LAN QDIO - OSX";
4a71df50
FB		 84 default:
85 return " unknown";
86 }
87 } else {
88 switch (card->info.type) {
5113fec0 89 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 90 return " OSD Express";
91 case QETH_CARD_TYPE_IQD:
92 return " HiperSockets";
93 case QETH_CARD_TYPE_OSN:
94 return " OSN QDIO";
5113fec0
UB		 95 case QETH_CARD_TYPE_OSM:
96 return " OSM QDIO";
97 case QETH_CARD_TYPE_OSX:
98 return " OSX QDIO";
4a71df50
FB		 99 default:
100 return " unknown";
101 }
102 }
103 return " n/a";
104}
105
106/* max length to be returned: 14 */
107const char *qeth_get_cardname_short(struct qeth_card *card)
108{
109 if (card->info.guestlan) {
110 switch (card->info.type) {
5113fec0 111 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 112 return "GuestLAN QDIO";
113 case QETH_CARD_TYPE_IQD:
114 return "GuestLAN Hiper";
5113fec0
UB		 115 case QETH_CARD_TYPE_OSM:
116 return "GuestLAN OSM";
117 case QETH_CARD_TYPE_OSX:
118 return "GuestLAN OSX";
4a71df50
FB		 119 default:
120 return "unknown";
121 }
122 } else {
123 switch (card->info.type) {
5113fec0 124 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 125 switch (card->info.link_type) {
126 case QETH_LINK_TYPE_FAST_ETH:
127 return "OSD_100";
128 case QETH_LINK_TYPE_HSTR:
129 return "HSTR";
130 case QETH_LINK_TYPE_GBIT_ETH:
131 return "OSD_1000";
132 case QETH_LINK_TYPE_10GBIT_ETH:
133 return "OSD_10GIG";
134 case QETH_LINK_TYPE_LANE_ETH100:
135 return "OSD_FE_LANE";
136 case QETH_LINK_TYPE_LANE_TR:
137 return "OSD_TR_LANE";
138 case QETH_LINK_TYPE_LANE_ETH1000:
139 return "OSD_GbE_LANE";
140 case QETH_LINK_TYPE_LANE:
141 return "OSD_ATM_LANE";
142 default:
143 return "OSD_Express";
144 }
145 case QETH_CARD_TYPE_IQD:
146 return "HiperSockets";
147 case QETH_CARD_TYPE_OSN:
148 return "OSN";
5113fec0
UB		 149 case QETH_CARD_TYPE_OSM:
150 return "OSM_1000";
151 case QETH_CARD_TYPE_OSX:
152 return "OSX_10GIG";
4a71df50
FB		 153 default:
154 return "unknown";
155 }
156 }
157 return "n/a";
158}
159
160void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
161 int clear_start_mask)
162{
163 unsigned long flags;
164
165 spin_lock_irqsave(&card->thread_mask_lock, flags);
166 card->thread_allowed_mask = threads;
167 if (clear_start_mask)
168 card->thread_start_mask &= threads;
169 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
170 wake_up(&card->wait_q);
171}
172EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
173
174int qeth_threads_running(struct qeth_card *card, unsigned long threads)
175{
176 unsigned long flags;
177 int rc = 0;
178
179 spin_lock_irqsave(&card->thread_mask_lock, flags);
180 rc = (card->thread_running_mask & threads);
181 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
182 return rc;
183}
184EXPORT_SYMBOL_GPL(qeth_threads_running);
185
186int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
187{
188 return wait_event_interruptible(card->wait_q,
189 qeth_threads_running(card, threads) == 0);
190}
191EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
192
193void qeth_clear_working_pool_list(struct qeth_card *card)
194{
195 struct qeth_buffer_pool_entry *pool_entry, *tmp;
196
847a50fd 197 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 198 list_for_each_entry_safe(pool_entry, tmp,
199 &card->qdio.in_buf_pool.entry_list, list){
200 list_del(&pool_entry->list);
201 }
202}
203EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
204
205static int qeth_alloc_buffer_pool(struct qeth_card *card)
206{
207 struct qeth_buffer_pool_entry *pool_entry;
208 void *ptr;
209 int i, j;
210
847a50fd 211 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 212 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 213 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 214 if (!pool_entry) {
215 qeth_free_buffer_pool(card);
216 return -ENOMEM;
217 }
218 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 219 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 220 if (!ptr) {
221 while (j > 0)
222 free_page((unsigned long)
223 pool_entry->elements[--j]);
224 kfree(pool_entry);
225 qeth_free_buffer_pool(card);
226 return -ENOMEM;
227 }
228 pool_entry->elements[j] = ptr;
229 }
230 list_add(&pool_entry->init_list,
231 &card->qdio.init_pool.entry_list);
232 }
233 return 0;
234}
235
236int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
237{
847a50fd 238 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 239
240 if ((card->state != CARD_STATE_DOWN) &&
241 (card->state != CARD_STATE_RECOVER))
242 return -EPERM;
243
244 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
245 qeth_clear_working_pool_list(card);
246 qeth_free_buffer_pool(card);
247 card->qdio.in_buf_pool.buf_count = bufcnt;
248 card->qdio.init_pool.buf_count = bufcnt;
249 return qeth_alloc_buffer_pool(card);
250}
76b11f8e 251EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 252
0da9581d
EL		 253static inline int qeth_cq_init(struct qeth_card *card)
254{
255 int rc;
256
257 if (card->options.cq == QETH_CQ_ENABLED) {
258 QETH_DBF_TEXT(SETUP, 2, "cqinit");
259 memset(card->qdio.c_q->qdio_bufs, 0,
260 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
261 card->qdio.c_q->next_buf_to_init = 127;
262 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
263 card->qdio.no_in_queues - 1, 0,
264 127);
265 if (rc) {
266 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
267 goto out;
268 }
269 }
270 rc = 0;
271out:
272 return rc;
273}
274
275static inline int qeth_alloc_cq(struct qeth_card *card)
276{
277 int rc;
278
279 if (card->options.cq == QETH_CQ_ENABLED) {
280 int i;
281 struct qdio_outbuf_state *outbuf_states;
282
283 QETH_DBF_TEXT(SETUP, 2, "cqon");
284 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
285 GFP_KERNEL);
286 if (!card->qdio.c_q) {
287 rc = -1;
288 goto kmsg_out;
289 }
290 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
291
292 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
293 card->qdio.c_q->bufs[i].buffer =
294 &card->qdio.c_q->qdio_bufs[i];
295 }
296
297 card->qdio.no_in_queues = 2;
298
299 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
300 kzalloc(card->qdio.no_out_queues *
301 QDIO_MAX_BUFFERS_PER_Q *
302 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
303 outbuf_states = card->qdio.out_bufstates;
304 if (outbuf_states == NULL) {
305 rc = -1;
306 goto free_cq_out;
307 }
308 for (i = 0; i < card->qdio.no_out_queues; ++i) {
309 card->qdio.out_qs[i]->bufstates = outbuf_states;
310 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
311 }
312 } else {
313 QETH_DBF_TEXT(SETUP, 2, "nocq");
314 card->qdio.c_q = NULL;
315 card->qdio.no_in_queues = 1;
316 }
317 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
318 rc = 0;
319out:
320 return rc;
321free_cq_out:
322 kfree(card->qdio.c_q);
323 card->qdio.c_q = NULL;
324kmsg_out:
325 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
326 goto out;
327}
328
329static inline void qeth_free_cq(struct qeth_card *card)
330{
331 if (card->qdio.c_q) {
332 --card->qdio.no_in_queues;
333 kfree(card->qdio.c_q);
334 card->qdio.c_q = NULL;
335 }
336 kfree(card->qdio.out_bufstates);
337 card->qdio.out_bufstates = NULL;
338}
339
b3332930
FB		 340static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
341 int delayed) {
342 enum iucv_tx_notify n;
343
344 switch (sbalf15) {
345 case 0:
346 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
347 break;
348 case 4:
349 case 16:
350 case 17:
351 case 18:
352 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
353 TX_NOTIFY_UNREACHABLE;
354 break;
355 default:
356 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
357 TX_NOTIFY_GENERALERROR;
358 break;
359 }
360
361 return n;
362}
363
0da9581d
EL		 364static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
365 int bidx, int forced_cleanup)
366{
72861ae7
EL		 367 if (q->card->options.cq != QETH_CQ_ENABLED)
368 return;
369
0da9581d
EL		 370 if (q->bufs[bidx]->next_pending != NULL) {
371 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
372 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
373
374 while (c) {
375 if (forced_cleanup ||
376 atomic_read(&c->state) ==
377 QETH_QDIO_BUF_HANDLED_DELAYED) {
378 struct qeth_qdio_out_buffer *f = c;
379 QETH_CARD_TEXT(f->q->card, 5, "fp");
380 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 381 /* release here to avoid interleaving between
382 outbound tasklet and inbound tasklet
383 regarding notifications and lifecycle */
384 qeth_release_skbs(c);
385
0da9581d
EL		 386 c = f->next_pending;
387 BUG_ON(head->next_pending != f);
388 head->next_pending = c;
389 kmem_cache_free(qeth_qdio_outbuf_cache, f);
390 } else {
391 head = c;
392 c = c->next_pending;
393 }
394
395 }
396 }
72861ae7
EL		 397 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
398 QETH_QDIO_BUF_HANDLED_DELAYED)) {
399 /* for recovery situations */
400 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
401 qeth_init_qdio_out_buf(q, bidx);
402 QETH_CARD_TEXT(q->card, 2, "clprecov");
403 }
0da9581d
EL		 404}
405
406
407static inline void qeth_qdio_handle_aob(struct qeth_card *card,
408 unsigned long phys_aob_addr) {
409 struct qaob *aob;
410 struct qeth_qdio_out_buffer *buffer;
b3332930 411 enum iucv_tx_notify notification;
0da9581d
EL		 412
413 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
414 QETH_CARD_TEXT(card, 5, "haob");
415 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
416 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
417 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
418
419 BUG_ON(buffer == NULL);
420
b3332930
FB		 421 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
422 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
423 notification = TX_NOTIFY_OK;
424 } else {
425 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
b3332930
FB		 426 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
427 notification = TX_NOTIFY_DELAYED_OK;
428 }
429
430 if (aob->aorc != 0) {
431 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
432 notification = qeth_compute_cq_notification(aob->aorc, 1);
433 }
434 qeth_notify_skbs(buffer->q, buffer, notification);
435
0da9581d
EL		 436 buffer->aob = NULL;
437 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 438 QETH_QDIO_BUF_HANDLED_DELAYED);
439
0da9581d
EL		 440 /* from here on: do not touch buffer anymore */
441 qdio_release_aob(aob);
442}
443
444static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
445{
446 return card->options.cq == QETH_CQ_ENABLED &&
447 card->qdio.c_q != NULL &&
448 queue != 0 &&
449 queue == card->qdio.no_in_queues - 1;
450}
451
452
4a71df50
FB		 453static int qeth_issue_next_read(struct qeth_card *card)
454{
455 int rc;
456 struct qeth_cmd_buffer *iob;
457
847a50fd 458 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 459 if (card->read.state != CH_STATE_UP)
460 return -EIO;
461 iob = qeth_get_buffer(&card->read);
462 if (!iob) {
74eacdb9
FB		 463 dev_warn(&card->gdev->dev, "The qeth device driver "
464 "failed to recover an error on the device\n");
465 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
466 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 467 return -ENOMEM;
468 }
469 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 470 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 471 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
472 (addr_t) iob, 0, 0);
473 if (rc) {
74eacdb9
FB		 474 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
475 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 476 atomic_set(&card->read.irq_pending, 0);
908abbb5 477 card->read_or_write_problem = 1;
4a71df50
FB		 478 qeth_schedule_recovery(card);
479 wake_up(&card->wait_q);
480 }
481 return rc;
482}
483
484static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
485{
486 struct qeth_reply *reply;
487
488 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
489 if (reply) {
490 atomic_set(&reply->refcnt, 1);
491 atomic_set(&reply->received, 0);
492 reply->card = card;
493 };
494 return reply;
495}
496
497static void qeth_get_reply(struct qeth_reply *reply)
498{
499 WARN_ON(atomic_read(&reply->refcnt) <= 0);
500 atomic_inc(&reply->refcnt);
501}
502
503static void qeth_put_reply(struct qeth_reply *reply)
504{
505 WARN_ON(atomic_read(&reply->refcnt) <= 0);
506 if (atomic_dec_and_test(&reply->refcnt))
507 kfree(reply);
508}
509
d11ba0c4 510static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 511 struct qeth_card *card)
512{
4a71df50 513 char *ipa_name;
d11ba0c4 514 int com = cmd->hdr.command;
4a71df50 515 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 516 if (rc)
70919e23
UB		 517 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
518 "x%X \"%s\"\n",
519 ipa_name, com, dev_name(&card->gdev->dev),
520 QETH_CARD_IFNAME(card), rc,
521 qeth_get_ipa_msg(rc));
d11ba0c4 522 else
70919e23
UB		 523 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
524 ipa_name, com, dev_name(&card->gdev->dev),
525 QETH_CARD_IFNAME(card));
4a71df50
FB		 526}
527
528static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
529 struct qeth_cmd_buffer *iob)
530{
531 struct qeth_ipa_cmd *cmd = NULL;
532
847a50fd 533 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 534 if (IS_IPA(iob->data)) {
535 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
536 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 537 if (cmd->hdr.command != IPA_CMD_SETCCID &&
538 cmd->hdr.command != IPA_CMD_DELCCID &&
539 cmd->hdr.command != IPA_CMD_MODCCID &&
540 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 541 qeth_issue_ipa_msg(cmd,
542 cmd->hdr.return_code, card);
4a71df50
FB		 543 return cmd;
544 } else {
545 switch (cmd->hdr.command) {
546 case IPA_CMD_STOPLAN:
74eacdb9
FB		 547 dev_warn(&card->gdev->dev,
548 "The link for interface %s on CHPID"
549 " 0x%X failed\n",
4a71df50
FB		 550 QETH_CARD_IFNAME(card),
551 card->info.chpid);
552 card->lan_online = 0;
553 if (card->dev && netif_carrier_ok(card->dev))
554 netif_carrier_off(card->dev);
555 return NULL;
556 case IPA_CMD_STARTLAN:
74eacdb9
FB		 557 dev_info(&card->gdev->dev,
558 "The link for %s on CHPID 0x%X has"
559 " been restored\n",
4a71df50
FB		 560 QETH_CARD_IFNAME(card),
561 card->info.chpid);
562 netif_carrier_on(card->dev);
922dc062 563 card->lan_online = 1;
1da74b1c
FB		 564 if (card->info.hwtrap)
565 card->info.hwtrap = 2;
4a71df50
FB		 566 qeth_schedule_recovery(card);
567 return NULL;
568 case IPA_CMD_MODCCID:
569 return cmd;
570 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 571 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 572 break;
573 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 574 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 575 break;
576 default:
c4cef07c 577 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 578 "but not a reply!\n");
579 break;
580 }
581 }
582 }
583 return cmd;
584}
585
586void qeth_clear_ipacmd_list(struct qeth_card *card)
587{
588 struct qeth_reply *reply, *r;
589 unsigned long flags;
590
847a50fd 591 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 592
593 spin_lock_irqsave(&card->lock, flags);
594 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
595 qeth_get_reply(reply);
596 reply->rc = -EIO;
597 atomic_inc(&reply->received);
598 list_del_init(&reply->list);
599 wake_up(&reply->wait_q);
600 qeth_put_reply(reply);
601 }
602 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 603 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 604}
605EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
606
5113fec0
UB		 607static int qeth_check_idx_response(struct qeth_card *card,
608 unsigned char *buffer)
4a71df50
FB		 609{
610 if (!buffer)
611 return 0;
612
d11ba0c4 613 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 614 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 615 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 616 "with cause code 0x%02x%s\n",
617 buffer[4],
618 ((buffer[4] == 0x22) ?
619 " -- try another portname" : ""));
847a50fd
CO		 620 QETH_CARD_TEXT(card, 2, "ckidxres");
621 QETH_CARD_TEXT(card, 2, " idxterm");
622 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 623 if (buffer[4] == 0xf6) {
624 dev_err(&card->gdev->dev,
625 "The qeth device is not configured "
626 "for the OSI layer required by z/VM\n");
627 return -EPERM;
628 }
4a71df50
FB		 629 return -EIO;
630 }
631 return 0;
632}
633
634static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
635 __u32 len)
636{
637 struct qeth_card *card;
638
4a71df50 639 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 640 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 641 if (channel == &card->read)
642 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
643 else
644 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
645 channel->ccw.count = len;
646 channel->ccw.cda = (__u32) __pa(iob);
647}
648
649static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
650{
651 __u8 index;
652
847a50fd 653 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 654 index = channel->io_buf_no;
655 do {
656 if (channel->iob[index].state == BUF_STATE_FREE) {
657 channel->iob[index].state = BUF_STATE_LOCKED;
658 channel->io_buf_no = (channel->io_buf_no + 1) %
659 QETH_CMD_BUFFER_NO;
660 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
661 return channel->iob + index;
662 }
663 index = (index + 1) % QETH_CMD_BUFFER_NO;
664 } while (index != channel->io_buf_no);
665
666 return NULL;
667}
668
669void qeth_release_buffer(struct qeth_channel *channel,
670 struct qeth_cmd_buffer *iob)
671{
672 unsigned long flags;
673
847a50fd 674 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 675 spin_lock_irqsave(&channel->iob_lock, flags);
676 memset(iob->data, 0, QETH_BUFSIZE);
677 iob->state = BUF_STATE_FREE;
678 iob->callback = qeth_send_control_data_cb;
679 iob->rc = 0;
680 spin_unlock_irqrestore(&channel->iob_lock, flags);
681}
682EXPORT_SYMBOL_GPL(qeth_release_buffer);
683
684static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
685{
686 struct qeth_cmd_buffer *buffer = NULL;
687 unsigned long flags;
688
689 spin_lock_irqsave(&channel->iob_lock, flags);
690 buffer = __qeth_get_buffer(channel);
691 spin_unlock_irqrestore(&channel->iob_lock, flags);
692 return buffer;
693}
694
695struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
696{
697 struct qeth_cmd_buffer *buffer;
698 wait_event(channel->wait_q,
699 ((buffer = qeth_get_buffer(channel)) != NULL));
700 return buffer;
701}
702EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
703
704void qeth_clear_cmd_buffers(struct qeth_channel *channel)
705{
706 int cnt;
707
708 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
709 qeth_release_buffer(channel, &channel->iob[cnt]);
710 channel->buf_no = 0;
711 channel->io_buf_no = 0;
712}
713EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
714
715static void qeth_send_control_data_cb(struct qeth_channel *channel,
716 struct qeth_cmd_buffer *iob)
717{
718 struct qeth_card *card;
719 struct qeth_reply *reply, *r;
720 struct qeth_ipa_cmd *cmd;
721 unsigned long flags;
722 int keep_reply;
5113fec0 723 int rc = 0;
4a71df50 724
4a71df50 725 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 726 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 727 rc = qeth_check_idx_response(card, iob->data);
728 switch (rc) {
729 case 0:
730 break;
731 case -EIO:
4a71df50 732 qeth_clear_ipacmd_list(card);
5113fec0 733 qeth_schedule_recovery(card);
01fc3e86 734 /* fall through */
5113fec0 735 default:
4a71df50
FB		 736 goto out;
737 }
738
739 cmd = qeth_check_ipa_data(card, iob);
740 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
741 goto out;
742 /*in case of OSN : check if cmd is set */
743 if (card->info.type == QETH_CARD_TYPE_OSN &&
744 cmd &&
745 cmd->hdr.command != IPA_CMD_STARTLAN &&
746 card->osn_info.assist_cb != NULL) {
747 card->osn_info.assist_cb(card->dev, cmd);
748 goto out;
749 }
750
751 spin_lock_irqsave(&card->lock, flags);
752 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
753 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
754 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
755 qeth_get_reply(reply);
756 list_del_init(&reply->list);
757 spin_unlock_irqrestore(&card->lock, flags);
758 keep_reply = 0;
759 if (reply->callback != NULL) {
760 if (cmd) {
761 reply->offset = (__u16)((char *)cmd -
762 (char *)iob->data);
763 keep_reply = reply->callback(card,
764 reply,
765 (unsigned long)cmd);
766 } else
767 keep_reply = reply->callback(card,
768 reply,
769 (unsigned long)iob);
770 }
771 if (cmd)
772 reply->rc = (u16) cmd->hdr.return_code;
773 else if (iob->rc)
774 reply->rc = iob->rc;
775 if (keep_reply) {
776 spin_lock_irqsave(&card->lock, flags);
777 list_add_tail(&reply->list,
778 &card->cmd_waiter_list);
779 spin_unlock_irqrestore(&card->lock, flags);
780 } else {
781 atomic_inc(&reply->received);
782 wake_up(&reply->wait_q);
783 }
784 qeth_put_reply(reply);
785 goto out;
786 }
787 }
788 spin_unlock_irqrestore(&card->lock, flags);
789out:
790 memcpy(&card->seqno.pdu_hdr_ack,
791 QETH_PDU_HEADER_SEQ_NO(iob->data),
792 QETH_SEQ_NO_LENGTH);
793 qeth_release_buffer(channel, iob);
794}
795
796static int qeth_setup_channel(struct qeth_channel *channel)
797{
798 int cnt;
799
d11ba0c4 800 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 801 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 802 channel->iob[cnt].data =
b3332930 803 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 804 if (channel->iob[cnt].data == NULL)
805 break;
806 channel->iob[cnt].state = BUF_STATE_FREE;
807 channel->iob[cnt].channel = channel;
808 channel->iob[cnt].callback = qeth_send_control_data_cb;
809 channel->iob[cnt].rc = 0;
810 }
811 if (cnt < QETH_CMD_BUFFER_NO) {
812 while (cnt-- > 0)
813 kfree(channel->iob[cnt].data);
814 return -ENOMEM;
815 }
816 channel->buf_no = 0;
817 channel->io_buf_no = 0;
818 atomic_set(&channel->irq_pending, 0);
819 spin_lock_init(&channel->iob_lock);
820
821 init_waitqueue_head(&channel->wait_q);
822 return 0;
823}
824
825static int qeth_set_thread_start_bit(struct qeth_card *card,
826 unsigned long thread)
827{
828 unsigned long flags;
829
830 spin_lock_irqsave(&card->thread_mask_lock, flags);
831 if (!(card->thread_allowed_mask & thread) ||
832 (card->thread_start_mask & thread)) {
833 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
834 return -EPERM;
835 }
836 card->thread_start_mask |= thread;
837 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
838 return 0;
839}
840
841void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
842{
843 unsigned long flags;
844
845 spin_lock_irqsave(&card->thread_mask_lock, flags);
846 card->thread_start_mask &= ~thread;
847 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848 wake_up(&card->wait_q);
849}
850EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
851
852void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
853{
854 unsigned long flags;
855
856 spin_lock_irqsave(&card->thread_mask_lock, flags);
857 card->thread_running_mask &= ~thread;
858 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
859 wake_up(&card->wait_q);
860}
861EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
862
863static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
864{
865 unsigned long flags;
866 int rc = 0;
867
868 spin_lock_irqsave(&card->thread_mask_lock, flags);
869 if (card->thread_start_mask & thread) {
870 if ((card->thread_allowed_mask & thread) &&
871 !(card->thread_running_mask & thread)) {
872 rc = 1;
873 card->thread_start_mask &= ~thread;
874 card->thread_running_mask |= thread;
875 } else
876 rc = -EPERM;
877 }
878 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
879 return rc;
880}
881
882int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
883{
884 int rc = 0;
885
886 wait_event(card->wait_q,
887 (rc = __qeth_do_run_thread(card, thread)) >= 0);
888 return rc;
889}
890EXPORT_SYMBOL_GPL(qeth_do_run_thread);
891
892void qeth_schedule_recovery(struct qeth_card *card)
893{
847a50fd 894 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 895 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
896 schedule_work(&card->kernel_thread_starter);
897}
898EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
899
900static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
901{
902 int dstat, cstat;
903 char *sense;
847a50fd 904 struct qeth_card *card;
4a71df50
FB		 905
906 sense = (char *) irb->ecw;
23d805b6
PO		 907 cstat = irb->scsw.cmd.cstat;
908 dstat = irb->scsw.cmd.dstat;
847a50fd 909 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 910
911 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
912 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
913 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 914 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 915 dev_warn(&cdev->dev, "The qeth device driver "
916 "failed to recover an error on the device\n");
5113fec0 917 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 918 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 919 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
920 16, 1, irb, 64, 1);
921 return 1;
922 }
923
924 if (dstat & DEV_STAT_UNIT_CHECK) {
925 if (sense[SENSE_RESETTING_EVENT_BYTE] &
926 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 927 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 928 return 1;
929 }
930 if (sense[SENSE_COMMAND_REJECT_BYTE] &
931 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 932 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 933 return 1;
4a71df50
FB		 934 }
935 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 936 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 937 return 1;
938 }
939 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 940 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 941 return 0;
942 }
847a50fd 943 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 944 return 1;
945 }
946 return 0;
947}
948
949static long __qeth_check_irb_error(struct ccw_device *cdev,
950 unsigned long intparm, struct irb *irb)
951{
847a50fd
CO		 952 struct qeth_card *card;
953
954 card = CARD_FROM_CDEV(cdev);
955
4a71df50
FB		 956 if (!IS_ERR(irb))
957 return 0;
958
959 switch (PTR_ERR(irb)) {
960 case -EIO:
74eacdb9
FB		 961 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
962 dev_name(&cdev->dev));
847a50fd
CO		 963 QETH_CARD_TEXT(card, 2, "ckirberr");
964 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 965 break;
966 case -ETIMEDOUT:
74eacdb9
FB		 967 dev_warn(&cdev->dev, "A hardware operation timed out"
968 " on the device\n");
847a50fd
CO		 969 QETH_CARD_TEXT(card, 2, "ckirberr");
970 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 971 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 972 if (card && (card->data.ccwdev == cdev)) {
973 card->data.state = CH_STATE_DOWN;
974 wake_up(&card->wait_q);
975 }
976 }
977 break;
978 default:
74eacdb9
FB		 979 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
980 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 981 QETH_CARD_TEXT(card, 2, "ckirberr");
982 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 983 }
984 return PTR_ERR(irb);
985}
986
987static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
988 struct irb *irb)
989{
990 int rc;
991 int cstat, dstat;
992 struct qeth_cmd_buffer *buffer;
993 struct qeth_channel *channel;
994 struct qeth_card *card;
995 struct qeth_cmd_buffer *iob;
996 __u8 index;
997
4a71df50
FB		 998 if (__qeth_check_irb_error(cdev, intparm, irb))
999 return;
23d805b6
PO		 1000 cstat = irb->scsw.cmd.cstat;
1001 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1002
1003 card = CARD_FROM_CDEV(cdev);
1004 if (!card)
1005 return;
1006
847a50fd
CO		 1007 QETH_CARD_TEXT(card, 5, "irq");
1008
4a71df50
FB		 1009 if (card->read.ccwdev == cdev) {
1010 channel = &card->read;
847a50fd 1011 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1012 } else if (card->write.ccwdev == cdev) {
1013 channel = &card->write;
847a50fd 1014 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1015 } else {
1016 channel = &card->data;
847a50fd 1017 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1018 }
1019 atomic_set(&channel->irq_pending, 0);
1020
23d805b6 1021 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1022 channel->state = CH_STATE_STOPPED;
1023
23d805b6 1024 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1025 channel->state = CH_STATE_HALTED;
1026
1027 /*let's wake up immediately on data channel*/
1028 if ((channel == &card->data) && (intparm != 0) &&
1029 (intparm != QETH_RCD_PARM))
1030 goto out;
1031
1032 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1033 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1034 /* we don't have to handle this further */
1035 intparm = 0;
1036 }
1037 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1038 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1039 /* we don't have to handle this further */
1040 intparm = 0;
1041 }
1042 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1043 (dstat & DEV_STAT_UNIT_CHECK) ||
1044 (cstat)) {
1045 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1046 dev_warn(&channel->ccwdev->dev,
1047 "The qeth device driver failed to recover "
1048 "an error on the device\n");
1049 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1050 "0x%X dstat 0x%X\n",
1051 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1052 print_hex_dump(KERN_WARNING, "qeth: irb ",
1053 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1054 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1055 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1056 }
1057 if (intparm == QETH_RCD_PARM) {
1058 channel->state = CH_STATE_DOWN;
1059 goto out;
1060 }
1061 rc = qeth_get_problem(cdev, irb);
1062 if (rc) {
28a7e4c9 1063 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1064 qeth_schedule_recovery(card);
1065 goto out;
1066 }
1067 }
1068
1069 if (intparm == QETH_RCD_PARM) {
1070 channel->state = CH_STATE_RCD_DONE;
1071 goto out;
1072 }
1073 if (intparm) {
1074 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1075 buffer->state = BUF_STATE_PROCESSED;
1076 }
1077 if (channel == &card->data)
1078 return;
1079 if (channel == &card->read &&
1080 channel->state == CH_STATE_UP)
1081 qeth_issue_next_read(card);
1082
1083 iob = channel->iob;
1084 index = channel->buf_no;
1085 while (iob[index].state == BUF_STATE_PROCESSED) {
1086 if (iob[index].callback != NULL)
1087 iob[index].callback(channel, iob + index);
1088
1089 index = (index + 1) % QETH_CMD_BUFFER_NO;
1090 }
1091 channel->buf_no = index;
1092out:
1093 wake_up(&card->wait_q);
1094 return;
1095}
1096
b3332930 1097static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1098 struct qeth_qdio_out_buffer *buf,
b3332930 1099 enum iucv_tx_notify notification)
4a71df50 1100{
4a71df50
FB		 1101 struct sk_buff *skb;
1102
b3332930
FB		 1103 if (skb_queue_empty(&buf->skb_list))
1104 goto out;
1105 skb = skb_peek(&buf->skb_list);
1106 while (skb) {
1107 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1108 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1109 if (skb->protocol == ETH_P_AF_IUCV) {
1110 if (skb->sk) {
1111 struct iucv_sock *iucv = iucv_sk(skb->sk);
1112 iucv->sk_txnotify(skb, notification);
1113 }
1114 }
1115 if (skb_queue_is_last(&buf->skb_list, skb))
1116 skb = NULL;
1117 else
1118 skb = skb_queue_next(&buf->skb_list, skb);
1119 }
1120out:
1121 return;
1122}
1123
1124static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1125{
1126 struct sk_buff *skb;
72861ae7
EL		 1127 struct iucv_sock *iucv;
1128 int notify_general_error = 0;
1129
1130 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1131 notify_general_error = 1;
1132
1133 /* release may never happen from within CQ tasklet scope */
1134 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1135
b67d801f
UB		 1136 skb = skb_dequeue(&buf->skb_list);
1137 while (skb) {
b3332930
FB		 1138 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1139 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1140 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1141 if (skb->sk) {
1142 iucv = iucv_sk(skb->sk);
1143 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1144 }
1145 }
b67d801f
UB		 1146 atomic_dec(&skb->users);
1147 dev_kfree_skb_any(skb);
4a71df50
FB		 1148 skb = skb_dequeue(&buf->skb_list);
1149 }
b3332930
FB		 1150}
1151
1152static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1153 struct qeth_qdio_out_buffer *buf,
1154 enum qeth_qdio_buffer_states newbufstate)
1155{
1156 int i;
1157
1158 /* is PCI flag set on buffer? */
1159 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1160 atomic_dec(&queue->set_pci_flags_count);
1161
1162 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1163 qeth_release_skbs(buf);
1164 }
4a71df50 1165 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1166 if (buf->buffer->element[i].addr && buf->is_header[i])
1167 kmem_cache_free(qeth_core_header_cache,
1168 buf->buffer->element[i].addr);
1169 buf->is_header[i] = 0;
4a71df50
FB		 1170 buf->buffer->element[i].length = 0;
1171 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1172 buf->buffer->element[i].eflags = 0;
1173 buf->buffer->element[i].sflags = 0;
4a71df50 1174 }
3ec90878
JG		 1175 buf->buffer->element[15].eflags = 0;
1176 buf->buffer->element[15].sflags = 0;
4a71df50 1177 buf->next_element_to_fill = 0;
0da9581d
EL		 1178 atomic_set(&buf->state, newbufstate);
1179}
1180
1181static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1182{
1183 int j;
1184
1185 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1186 if (!q->bufs[j])
1187 continue;
72861ae7 1188 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1189 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1190 if (free) {
1191 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1192 q->bufs[j] = NULL;
1193 }
1194 }
4a71df50
FB		 1195}
1196
1197void qeth_clear_qdio_buffers(struct qeth_card *card)
1198{
0da9581d 1199 int i;
4a71df50 1200
847a50fd 1201 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1202 /* clear outbound buffers to free skbs */
0da9581d 1203 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1204 if (card->qdio.out_qs[i]) {
0da9581d 1205 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1206 }
0da9581d 1207 }
4a71df50
FB		 1208}
1209EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1210
1211static void qeth_free_buffer_pool(struct qeth_card *card)
1212{
1213 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1214 int i = 0;
4a71df50
FB		 1215 list_for_each_entry_safe(pool_entry, tmp,
1216 &card->qdio.init_pool.entry_list, init_list){
1217 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1218 free_page((unsigned long)pool_entry->elements[i]);
1219 list_del(&pool_entry->init_list);
1220 kfree(pool_entry);
1221 }
1222}
1223
1224static void qeth_free_qdio_buffers(struct qeth_card *card)
1225{
b3332930 1226 int i, j;
4a71df50 1227
4a71df50
FB		 1228 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1229 QETH_QDIO_UNINITIALIZED)
1230 return;
0da9581d
EL		 1231
1232 qeth_free_cq(card);
b3332930
FB		 1233 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1234 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
72861ae7 1235 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
4a71df50
FB		 1236 kfree(card->qdio.in_q);
1237 card->qdio.in_q = NULL;
1238 /* inbound buffer pool */
1239 qeth_free_buffer_pool(card);
1240 /* free outbound qdio_qs */
1241 if (card->qdio.out_qs) {
1242 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1243 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1244 kfree(card->qdio.out_qs[i]);
1245 }
1246 kfree(card->qdio.out_qs);
1247 card->qdio.out_qs = NULL;
1248 }
1249}
1250
1251static void qeth_clean_channel(struct qeth_channel *channel)
1252{
1253 int cnt;
1254
d11ba0c4 1255 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1256 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1257 kfree(channel->iob[cnt].data);
1258}
1259
5113fec0 1260static void qeth_get_channel_path_desc(struct qeth_card *card)
4a71df50 1261{
4a71df50
FB		 1262 struct ccw_device *ccwdev;
1263 struct channelPath_dsc {
1264 u8 flags;
1265 u8 lsn;
1266 u8 desc;
1267 u8 chpid;
1268 u8 swla;
1269 u8 zeroes;
1270 u8 chla;
1271 u8 chpp;
1272 } *chp_dsc;
1273
5113fec0 1274 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1275
1276 ccwdev = card->data.ccwdev;
1277 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1278 if (chp_dsc != NULL) {
99558ea9
UB		 1279 if (card->info.type != QETH_CARD_TYPE_IQD) {
1280 /* CHPP field bit 6 == 1 -> single queue */
1281 if ((chp_dsc->chpp & 0x02) == 0x02) {
1282 if ((atomic_read(&card->qdio.state) !=
1283 QETH_QDIO_UNINITIALIZED) &&
1284 (card->qdio.no_out_queues == 4))
1285 /* change from 4 to 1 outbound queues */
1286 qeth_free_qdio_buffers(card);
1287 card->qdio.no_out_queues = 1;
1288 if (card->qdio.default_out_queue != 0)
1289 dev_info(&card->gdev->dev,
d0ff1f52 1290 "Priority Queueing not supported\n");
99558ea9
UB		 1291 card->qdio.default_out_queue = 0;
1292 } else {
1293 if ((atomic_read(&card->qdio.state) !=
1294 QETH_QDIO_UNINITIALIZED) &&
1295 (card->qdio.no_out_queues == 1)) {
1296 /* change from 1 to 4 outbound queues */
1297 qeth_free_qdio_buffers(card);
1298 card->qdio.default_out_queue = 2;
1299 }
1300 card->qdio.no_out_queues = 4;
d0ff1f52 1301 }
d0ff1f52 1302 }
5113fec0 1303 card->info.func_level = 0x4100 + chp_dsc->desc;
4a71df50
FB		 1304 kfree(chp_dsc);
1305 }
5113fec0
UB		 1306 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1307 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1308 return;
4a71df50
FB		 1309}
1310
1311static void qeth_init_qdio_info(struct qeth_card *card)
1312{
d11ba0c4 1313 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1314 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1315 /* inbound */
1316 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1317 if (card->info.type == QETH_CARD_TYPE_IQD)
1318 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1319 else
1320 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1321 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1322 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1323 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1324}
1325
1326static void qeth_set_intial_options(struct qeth_card *card)
1327{
1328 card->options.route4.type = NO_ROUTER;
1329 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1330 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1331 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1332 card->options.fake_broadcast = 0;
1333 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1334 card->options.performance_stats = 0;
1335 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1336 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1337 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1338}
1339
1340static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1341{
1342 unsigned long flags;
1343 int rc = 0;
1344
1345 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1346 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1347 (u8) card->thread_start_mask,
1348 (u8) card->thread_allowed_mask,
1349 (u8) card->thread_running_mask);
1350 rc = (card->thread_start_mask & thread);
1351 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1352 return rc;
1353}
1354
1355static void qeth_start_kernel_thread(struct work_struct *work)
1356{
3f36b890 1357 struct task_struct *ts;
4a71df50
FB		 1358 struct qeth_card *card = container_of(work, struct qeth_card,
1359 kernel_thread_starter);
847a50fd 1360 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1361
1362 if (card->read.state != CH_STATE_UP &&
1363 card->write.state != CH_STATE_UP)
1364 return;
3f36b890
FB		 1365 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1366 ts = kthread_run(card->discipline.recover, (void *)card,
4a71df50 1367 "qeth_recover");
3f36b890
FB		 1368 if (IS_ERR(ts)) {
1369 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1370 qeth_clear_thread_running_bit(card,
1371 QETH_RECOVER_THREAD);
1372 }
1373 }
4a71df50
FB		 1374}
1375
1376static int qeth_setup_card(struct qeth_card *card)
1377{
1378
d11ba0c4
PT		 1379 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1380 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1381
1382 card->read.state = CH_STATE_DOWN;
1383 card->write.state = CH_STATE_DOWN;
1384 card->data.state = CH_STATE_DOWN;
1385 card->state = CARD_STATE_DOWN;
1386 card->lan_online = 0;
908abbb5 1387 card->read_or_write_problem = 0;
4a71df50
FB		 1388 card->dev = NULL;
1389 spin_lock_init(&card->vlanlock);
1390 spin_lock_init(&card->mclock);
4a71df50
FB		 1391 spin_lock_init(&card->lock);
1392 spin_lock_init(&card->ip_lock);
1393 spin_lock_init(&card->thread_mask_lock);
c4949f07 1394 mutex_init(&card->conf_mutex);
9dc48ccc 1395 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1396 card->thread_start_mask = 0;
1397 card->thread_allowed_mask = 0;
1398 card->thread_running_mask = 0;
1399 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1400 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1401 INIT_LIST_HEAD(card->ip_tbd_list);
1402 INIT_LIST_HEAD(&card->cmd_waiter_list);
1403 init_waitqueue_head(&card->wait_q);
25985edc 1404 /* initial options */
4a71df50
FB		 1405 qeth_set_intial_options(card);
1406 /* IP address takeover */
1407 INIT_LIST_HEAD(&card->ipato.entries);
1408 card->ipato.enabled = 0;
1409 card->ipato.invert4 = 0;
1410 card->ipato.invert6 = 0;
1411 /* init QDIO stuff */
1412 qeth_init_qdio_info(card);
b3332930 1413 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
4a71df50
FB		 1414 return 0;
1415}
1416
6bcac508
MS		 1417static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1418{
1419 struct qeth_card *card = container_of(slr, struct qeth_card,
1420 qeth_service_level);
0d788c7d
KDW		 1421 if (card->info.mcl_level[0])
1422 seq_printf(m, "qeth: %s firmware level %s\n",
1423 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1424}
1425
4a71df50
FB		 1426static struct qeth_card *qeth_alloc_card(void)
1427{
1428 struct qeth_card *card;
1429
d11ba0c4 1430 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1431 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1432 if (!card)
76b11f8e 1433 goto out;
d11ba0c4 1434 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1435 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1436 if (!card->ip_tbd_list) {
1437 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1438 goto out_card;
4a71df50 1439 }
76b11f8e
UB		 1440 if (qeth_setup_channel(&card->read))
1441 goto out_ip;
1442 if (qeth_setup_channel(&card->write))
1443 goto out_channel;
4a71df50 1444 card->options.layer2 = -1;
6bcac508
MS		 1445 card->qeth_service_level.seq_print = qeth_core_sl_print;
1446 register_service_level(&card->qeth_service_level);
4a71df50 1447 return card;
76b11f8e
UB		 1448
1449out_channel:
1450 qeth_clean_channel(&card->read);
1451out_ip:
1452 kfree(card->ip_tbd_list);
1453out_card:
1454 kfree(card);
1455out:
1456 return NULL;
4a71df50
FB		 1457}
1458
1459static int qeth_determine_card_type(struct qeth_card *card)
1460{
1461 int i = 0;
1462
d11ba0c4 1463 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1464
1465 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1466 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1467 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1468 if ((CARD_RDEV(card)->id.dev_type ==
1469 known_devices[i][QETH_DEV_TYPE_IND]) &&
1470 (CARD_RDEV(card)->id.dev_model ==
1471 known_devices[i][QETH_DEV_MODEL_IND])) {
1472 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1473 card->qdio.no_out_queues =
1474 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1475 card->qdio.no_in_queues = 1;
5113fec0
UB		 1476 card->info.is_multicast_different =
1477 known_devices[i][QETH_MULTICAST_IND];
1478 qeth_get_channel_path_desc(card);
4a71df50
FB		 1479 return 0;
1480 }
1481 i++;
1482 }
1483 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1484 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1485 "unknown type\n");
4a71df50
FB		 1486 return -ENOENT;
1487}
1488
1489static int qeth_clear_channel(struct qeth_channel *channel)
1490{
1491 unsigned long flags;
1492 struct qeth_card *card;
1493 int rc;
1494
4a71df50 1495 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1496 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1497 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1498 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1499 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1500
1501 if (rc)
1502 return rc;
1503 rc = wait_event_interruptible_timeout(card->wait_q,
1504 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1505 if (rc == -ERESTARTSYS)
1506 return rc;
1507 if (channel->state != CH_STATE_STOPPED)
1508 return -ETIME;
1509 channel->state = CH_STATE_DOWN;
1510 return 0;
1511}
1512
1513static int qeth_halt_channel(struct qeth_channel *channel)
1514{
1515 unsigned long flags;
1516 struct qeth_card *card;
1517 int rc;
1518
4a71df50 1519 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1520 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1521 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1522 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1523 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1524
1525 if (rc)
1526 return rc;
1527 rc = wait_event_interruptible_timeout(card->wait_q,
1528 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1529 if (rc == -ERESTARTSYS)
1530 return rc;
1531 if (channel->state != CH_STATE_HALTED)
1532 return -ETIME;
1533 return 0;
1534}
1535
1536static int qeth_halt_channels(struct qeth_card *card)
1537{
1538 int rc1 = 0, rc2 = 0, rc3 = 0;
1539
847a50fd 1540 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1541 rc1 = qeth_halt_channel(&card->read);
1542 rc2 = qeth_halt_channel(&card->write);
1543 rc3 = qeth_halt_channel(&card->data);
1544 if (rc1)
1545 return rc1;
1546 if (rc2)
1547 return rc2;
1548 return rc3;
1549}
1550
1551static int qeth_clear_channels(struct qeth_card *card)
1552{
1553 int rc1 = 0, rc2 = 0, rc3 = 0;
1554
847a50fd 1555 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1556 rc1 = qeth_clear_channel(&card->read);
1557 rc2 = qeth_clear_channel(&card->write);
1558 rc3 = qeth_clear_channel(&card->data);
1559 if (rc1)
1560 return rc1;
1561 if (rc2)
1562 return rc2;
1563 return rc3;
1564}
1565
1566static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1567{
1568 int rc = 0;
1569
847a50fd 1570 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1571
1572 if (halt)
1573 rc = qeth_halt_channels(card);
1574 if (rc)
1575 return rc;
1576 return qeth_clear_channels(card);
1577}
1578
1579int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1580{
1581 int rc = 0;
1582
847a50fd 1583 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1584 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1585 QETH_QDIO_CLEANING)) {
1586 case QETH_QDIO_ESTABLISHED:
1587 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1588 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1589 QDIO_FLAG_CLEANUP_USING_HALT);
1590 else
cc961d40 1591 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1592 QDIO_FLAG_CLEANUP_USING_CLEAR);
1593 if (rc)
847a50fd 1594 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1595 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1596 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1597 break;
1598 case QETH_QDIO_CLEANING:
1599 return rc;
1600 default:
1601 break;
1602 }
1603 rc = qeth_clear_halt_card(card, use_halt);
1604 if (rc)
847a50fd 1605 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1606 card->state = CARD_STATE_DOWN;
1607 return rc;
1608}
1609EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1610
1611static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1612 int *length)
1613{
1614 struct ciw *ciw;
1615 char *rcd_buf;
1616 int ret;
1617 struct qeth_channel *channel = &card->data;
1618 unsigned long flags;
1619
1620 /*
1621 * scan for RCD command in extended SenseID data
1622 */
1623 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1624 if (!ciw || ciw->cmd == 0)
1625 return -EOPNOTSUPP;
1626 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1627 if (!rcd_buf)
1628 return -ENOMEM;
1629
1630 channel->ccw.cmd_code = ciw->cmd;
1631 channel->ccw.cda = (__u32) __pa(rcd_buf);
1632 channel->ccw.count = ciw->count;
1633 channel->ccw.flags = CCW_FLAG_SLI;
1634 channel->state = CH_STATE_RCD;
1635 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1636 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1637 QETH_RCD_PARM, LPM_ANYPATH, 0,
1638 QETH_RCD_TIMEOUT);
1639 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1640 if (!ret)
1641 wait_event(card->wait_q,
1642 (channel->state == CH_STATE_RCD_DONE ||
1643 channel->state == CH_STATE_DOWN));
1644 if (channel->state == CH_STATE_DOWN)
1645 ret = -EIO;
1646 else
1647 channel->state = CH_STATE_DOWN;
1648 if (ret) {
1649 kfree(rcd_buf);
1650 *buffer = NULL;
1651 *length = 0;
1652 } else {
1653 *length = ciw->count;
1654 *buffer = rcd_buf;
1655 }
1656 return ret;
1657}
1658
a60389ab 1659static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1660{
a60389ab 1661 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1662 card->info.chpid = prcd[30];
1663 card->info.unit_addr2 = prcd[31];
1664 card->info.cula = prcd[63];
1665 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1666 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1667}
1668
1669static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1670{
1671 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1672
1673 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1674 card->info.blkt.time_total = 250;
1675 card->info.blkt.inter_packet = 5;
1676 card->info.blkt.inter_packet_jumbo = 15;
1677 } else {
1678 card->info.blkt.time_total = 0;
1679 card->info.blkt.inter_packet = 0;
1680 card->info.blkt.inter_packet_jumbo = 0;
1681 }
4a71df50
FB		 1682}
1683
1684static void qeth_init_tokens(struct qeth_card *card)
1685{
1686 card->token.issuer_rm_w = 0x00010103UL;
1687 card->token.cm_filter_w = 0x00010108UL;
1688 card->token.cm_connection_w = 0x0001010aUL;
1689 card->token.ulp_filter_w = 0x0001010bUL;
1690 card->token.ulp_connection_w = 0x0001010dUL;
1691}
1692
1693static void qeth_init_func_level(struct qeth_card *card)
1694{
5113fec0
UB		 1695 switch (card->info.type) {
1696 case QETH_CARD_TYPE_IQD:
6298263a 1697 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1698 break;
1699 case QETH_CARD_TYPE_OSD:
0132951e 1700 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1701 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1702 break;
1703 default:
1704 break;
4a71df50
FB		 1705 }
1706}
1707
4a71df50
FB		 1708static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1709 void (*idx_reply_cb)(struct qeth_channel *,
1710 struct qeth_cmd_buffer *))
1711{
1712 struct qeth_cmd_buffer *iob;
1713 unsigned long flags;
1714 int rc;
1715 struct qeth_card *card;
1716
d11ba0c4 1717 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1718 card = CARD_FROM_CDEV(channel->ccwdev);
1719 iob = qeth_get_buffer(channel);
1720 iob->callback = idx_reply_cb;
1721 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1722 channel->ccw.count = QETH_BUFSIZE;
1723 channel->ccw.cda = (__u32) __pa(iob->data);
1724
1725 wait_event(card->wait_q,
1726 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1727 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1728 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1729 rc = ccw_device_start(channel->ccwdev,
1730 &channel->ccw, (addr_t) iob, 0, 0);
1731 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1732
1733 if (rc) {
14cc21b6 1734 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1735 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1736 atomic_set(&channel->irq_pending, 0);
1737 wake_up(&card->wait_q);
1738 return rc;
1739 }
1740 rc = wait_event_interruptible_timeout(card->wait_q,
1741 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1742 if (rc == -ERESTARTSYS)
1743 return rc;
1744 if (channel->state != CH_STATE_UP) {
1745 rc = -ETIME;
d11ba0c4 1746 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1747 qeth_clear_cmd_buffers(channel);
1748 } else
1749 rc = 0;
1750 return rc;
1751}
1752
1753static int qeth_idx_activate_channel(struct qeth_channel *channel,
1754 void (*idx_reply_cb)(struct qeth_channel *,
1755 struct qeth_cmd_buffer *))
1756{
1757 struct qeth_card *card;
1758 struct qeth_cmd_buffer *iob;
1759 unsigned long flags;
1760 __u16 temp;
1761 __u8 tmp;
1762 int rc;
f06f6f32 1763 struct ccw_dev_id temp_devid;
4a71df50
FB		 1764
1765 card = CARD_FROM_CDEV(channel->ccwdev);
1766
d11ba0c4 1767 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1768
1769 iob = qeth_get_buffer(channel);
1770 iob->callback = idx_reply_cb;
1771 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1772 channel->ccw.count = IDX_ACTIVATE_SIZE;
1773 channel->ccw.cda = (__u32) __pa(iob->data);
1774 if (channel == &card->write) {
1775 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1776 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1777 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1778 card->seqno.trans_hdr++;
1779 } else {
1780 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1781 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1782 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1783 }
1784 tmp = ((__u8)card->info.portno) | 0x80;
1785 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1786 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1787 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1788 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1789 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1790 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1791 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1792 temp = (card->info.cula << 8) + card->info.unit_addr2;
1793 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1794
1795 wait_event(card->wait_q,
1796 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1797 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1798 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1799 rc = ccw_device_start(channel->ccwdev,
1800 &channel->ccw, (addr_t) iob, 0, 0);
1801 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1802
1803 if (rc) {
14cc21b6
FB		 1804 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1805 rc);
d11ba0c4 1806 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1807 atomic_set(&channel->irq_pending, 0);
1808 wake_up(&card->wait_q);
1809 return rc;
1810 }
1811 rc = wait_event_interruptible_timeout(card->wait_q,
1812 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1813 if (rc == -ERESTARTSYS)
1814 return rc;
1815 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1816 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1817 " failed to recover an error on the device\n");
1818 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1819 dev_name(&channel->ccwdev->dev));
d11ba0c4 1820 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1821 qeth_clear_cmd_buffers(channel);
1822 return -ETIME;
1823 }
1824 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1825}
1826
1827static int qeth_peer_func_level(int level)
1828{
1829 if ((level & 0xff) == 8)
1830 return (level & 0xff) + 0x400;
1831 if (((level >> 8) & 3) == 1)
1832 return (level & 0xff) + 0x200;
1833 return level;
1834}
1835
1836static void qeth_idx_write_cb(struct qeth_channel *channel,
1837 struct qeth_cmd_buffer *iob)
1838{
1839 struct qeth_card *card;
1840 __u16 temp;
1841
d11ba0c4 1842 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1843
1844 if (channel->state == CH_STATE_DOWN) {
1845 channel->state = CH_STATE_ACTIVATING;
1846 goto out;
1847 }
1848 card = CARD_FROM_CDEV(channel->ccwdev);
1849
1850 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1851 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1852 dev_err(&card->write.ccwdev->dev,
1853 "The adapter is used exclusively by another "
1854 "host\n");
4a71df50 1855 else
74eacdb9
FB		 1856 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1857 " negative reply\n",
1858 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1859 goto out;
1860 }
1861 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1862 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1863 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1864 "function level mismatch (sent: 0x%x, received: "
1865 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1866 card->info.func_level, temp);
4a71df50
FB		 1867 goto out;
1868 }
1869 channel->state = CH_STATE_UP;
1870out:
1871 qeth_release_buffer(channel, iob);
1872}
1873
1874static void qeth_idx_read_cb(struct qeth_channel *channel,
1875 struct qeth_cmd_buffer *iob)
1876{
1877 struct qeth_card *card;
1878 __u16 temp;
1879
d11ba0c4 1880 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1881 if (channel->state == CH_STATE_DOWN) {
1882 channel->state = CH_STATE_ACTIVATING;
1883 goto out;
1884 }
1885
1886 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1887 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1888 goto out;
1889
1890 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1891 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1892 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1893 dev_err(&card->write.ccwdev->dev,
1894 "The adapter is used exclusively by another "
1895 "host\n");
5113fec0
UB		 1896 break;
1897 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1898 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1899 dev_err(&card->read.ccwdev->dev,
1900 "Setting the device online failed because of "
01fc3e86 1901 "insufficient authorization\n");
5113fec0
UB		 1902 break;
1903 default:
74eacdb9
FB		 1904 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1905 " negative reply\n",
1906 dev_name(&card->read.ccwdev->dev));
5113fec0 1907 }
01fc3e86
UB		 1908 QETH_CARD_TEXT_(card, 2, "idxread%c",
1909 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1910 goto out;
1911 }
1912
1913/**
5113fec0
UB		 1914 * * temporary fix for microcode bug
1915 * * to revert it,replace OR by AND
1916 * */
4a71df50 1917 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1918 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1919 card->info.portname_required = 1;
1920
1921 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1922 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1923 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1924 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1925 dev_name(&card->read.ccwdev->dev),
1926 card->info.func_level, temp);
4a71df50
FB		 1927 goto out;
1928 }
1929 memcpy(&card->token.issuer_rm_r,
1930 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1931 QETH_MPC_TOKEN_LENGTH);
1932 memcpy(&card->info.mcl_level[0],
1933 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1934 channel->state = CH_STATE_UP;
1935out:
1936 qeth_release_buffer(channel, iob);
1937}
1938
1939void qeth_prepare_control_data(struct qeth_card *card, int len,
1940 struct qeth_cmd_buffer *iob)
1941{
1942 qeth_setup_ccw(&card->write, iob->data, len);
1943 iob->callback = qeth_release_buffer;
1944
1945 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1946 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1947 card->seqno.trans_hdr++;
1948 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1949 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1950 card->seqno.pdu_hdr++;
1951 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1952 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1953 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1954}
1955EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1956
1957int qeth_send_control_data(struct qeth_card *card, int len,
1958 struct qeth_cmd_buffer *iob,
1959 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1960 unsigned long),
1961 void *reply_param)
1962{
1963 int rc;
1964 unsigned long flags;
1965 struct qeth_reply *reply = NULL;
7834cd5a 1966 unsigned long timeout, event_timeout;
5b54e16f 1967 struct qeth_ipa_cmd *cmd;
4a71df50 1968
847a50fd 1969 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1970
908abbb5
UB		 1971 if (card->read_or_write_problem) {
1972 qeth_release_buffer(iob->channel, iob);
1973 return -EIO;
1974 }
4a71df50
FB		 1975 reply = qeth_alloc_reply(card);
1976 if (!reply) {
4a71df50
FB		 1977 return -ENOMEM;
1978 }
1979 reply->callback = reply_cb;
1980 reply->param = reply_param;
1981 if (card->state == CARD_STATE_DOWN)
1982 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1983 else
1984 reply->seqno = card->seqno.ipa++;
1985 init_waitqueue_head(&reply->wait_q);
1986 spin_lock_irqsave(&card->lock, flags);
1987 list_add_tail(&reply->list, &card->cmd_waiter_list);
1988 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1989 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1990
1991 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1992 qeth_prepare_control_data(card, len, iob);
1993
1994 if (IS_IPA(iob->data))
7834cd5a 1995 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1996 else
7834cd5a
HC		 1997 event_timeout = QETH_TIMEOUT;
1998 timeout = jiffies + event_timeout;
4a71df50 1999
847a50fd 2000 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2001 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2002 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2003 (addr_t) iob, 0, 0);
2004 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2005 if (rc) {
74eacdb9
FB		 2006 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2007 "ccw_device_start rc = %i\n",
2008 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2009 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2010 spin_lock_irqsave(&card->lock, flags);
2011 list_del_init(&reply->list);
2012 qeth_put_reply(reply);
2013 spin_unlock_irqrestore(&card->lock, flags);
2014 qeth_release_buffer(iob->channel, iob);
2015 atomic_set(&card->write.irq_pending, 0);
2016 wake_up(&card->wait_q);
2017 return rc;
2018 }
5b54e16f
FB		 2019
2020 /* we have only one long running ipassist, since we can ensure
2021 process context of this command we can sleep */
2022 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2023 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2024 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2025 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2026 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2027 goto time_err;
2028 } else {
2029 while (!atomic_read(&reply->received)) {
2030 if (time_after(jiffies, timeout))
2031 goto time_err;
2032 cpu_relax();
2033 };
2034 }
2035
70919e23
UB		 2036 if (reply->rc == -EIO)
2037 goto error;
5b54e16f
FB		 2038 rc = reply->rc;
2039 qeth_put_reply(reply);
2040 return rc;
2041
2042time_err:
70919e23 2043 reply->rc = -ETIME;
5b54e16f
FB		 2044 spin_lock_irqsave(&reply->card->lock, flags);
2045 list_del_init(&reply->list);
2046 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2047 atomic_inc(&reply->received);
70919e23 2048error:
908abbb5
UB		 2049 atomic_set(&card->write.irq_pending, 0);
2050 qeth_release_buffer(iob->channel, iob);
2051 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2052 rc = reply->rc;
2053 qeth_put_reply(reply);
2054 return rc;
2055}
2056EXPORT_SYMBOL_GPL(qeth_send_control_data);
2057
2058static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2059 unsigned long data)
2060{
2061 struct qeth_cmd_buffer *iob;
2062
d11ba0c4 2063 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2064
2065 iob = (struct qeth_cmd_buffer *) data;
2066 memcpy(&card->token.cm_filter_r,
2067 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2068 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2069 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2070 return 0;
2071}
2072
2073static int qeth_cm_enable(struct qeth_card *card)
2074{
2075 int rc;
2076 struct qeth_cmd_buffer *iob;
2077
d11ba0c4 2078 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2079
2080 iob = qeth_wait_for_buffer(&card->write);
2081 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2082 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2083 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2084 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2085 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2086
2087 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2088 qeth_cm_enable_cb, NULL);
2089 return rc;
2090}
2091
2092static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2093 unsigned long data)
2094{
2095
2096 struct qeth_cmd_buffer *iob;
2097
d11ba0c4 2098 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2099
2100 iob = (struct qeth_cmd_buffer *) data;
2101 memcpy(&card->token.cm_connection_r,
2102 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2103 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2104 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2105 return 0;
2106}
2107
2108static int qeth_cm_setup(struct qeth_card *card)
2109{
2110 int rc;
2111 struct qeth_cmd_buffer *iob;
2112
d11ba0c4 2113 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2114
2115 iob = qeth_wait_for_buffer(&card->write);
2116 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2117 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2118 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2119 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2120 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2121 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2122 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2123 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2124 qeth_cm_setup_cb, NULL);
2125 return rc;
2126
2127}
2128
2129static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2130{
2131 switch (card->info.type) {
2132 case QETH_CARD_TYPE_UNKNOWN:
2133 return 1500;
2134 case QETH_CARD_TYPE_IQD:
2135 return card->info.max_mtu;
5113fec0 2136 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2137 switch (card->info.link_type) {
2138 case QETH_LINK_TYPE_HSTR:
2139 case QETH_LINK_TYPE_LANE_TR:
2140 return 2000;
2141 default:
2142 return 1492;
2143 }
5113fec0
UB		 2144 case QETH_CARD_TYPE_OSM:
2145 case QETH_CARD_TYPE_OSX:
2146 return 1492;
4a71df50
FB		 2147 default:
2148 return 1500;
2149 }
2150}
2151
4a71df50
FB		 2152static inline int qeth_get_mtu_outof_framesize(int framesize)
2153{
2154 switch (framesize) {
2155 case 0x4000:
2156 return 8192;
2157 case 0x6000:
2158 return 16384;
2159 case 0xa000:
2160 return 32768;
2161 case 0xffff:
2162 return 57344;
2163 default:
2164 return 0;
2165 }
2166}
2167
2168static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2169{
2170 switch (card->info.type) {
5113fec0
UB		 2171 case QETH_CARD_TYPE_OSD:
2172 case QETH_CARD_TYPE_OSM:
2173 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2174 case QETH_CARD_TYPE_IQD:
2175 return ((mtu >= 576) &&
9853b97b 2176 (mtu <= card->info.max_mtu));
4a71df50
FB		 2177 case QETH_CARD_TYPE_OSN:
2178 case QETH_CARD_TYPE_UNKNOWN:
2179 default:
2180 return 1;
2181 }
2182}
2183
2184static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2185 unsigned long data)
2186{
2187
2188 __u16 mtu, framesize;
2189 __u16 len;
2190 __u8 link_type;
2191 struct qeth_cmd_buffer *iob;
2192
d11ba0c4 2193 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2194
2195 iob = (struct qeth_cmd_buffer *) data;
2196 memcpy(&card->token.ulp_filter_r,
2197 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2198 QETH_MPC_TOKEN_LENGTH);
9853b97b 2199 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2200 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2201 mtu = qeth_get_mtu_outof_framesize(framesize);
2202 if (!mtu) {
2203 iob->rc = -EINVAL;
d11ba0c4 2204 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2205 return 0;
2206 }
8b2e18f6
UB		 2207 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2208 /* frame size has changed */
2209 if (card->dev &&
2210 ((card->dev->mtu == card->info.initial_mtu) ||
2211 (card->dev->mtu > mtu)))
2212 card->dev->mtu = mtu;
2213 qeth_free_qdio_buffers(card);
2214 }
4a71df50 2215 card->info.initial_mtu = mtu;
8b2e18f6 2216 card->info.max_mtu = mtu;
4a71df50
FB		 2217 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2218 } else {
2219 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2220 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2221 iob->data);
4a71df50
FB		 2222 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2223 }
2224
2225 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2226 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2227 memcpy(&link_type,
2228 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2229 card->info.link_type = link_type;
2230 } else
2231 card->info.link_type = 0;
01fc3e86 2232 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2233 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2234 return 0;
2235}
2236
2237static int qeth_ulp_enable(struct qeth_card *card)
2238{
2239 int rc;
2240 char prot_type;
2241 struct qeth_cmd_buffer *iob;
2242
2243 /*FIXME: trace view callbacks*/
d11ba0c4 2244 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2245
2246 iob = qeth_wait_for_buffer(&card->write);
2247 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2248
2249 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2250 (__u8) card->info.portno;
2251 if (card->options.layer2)
2252 if (card->info.type == QETH_CARD_TYPE_OSN)
2253 prot_type = QETH_PROT_OSN2;
2254 else
2255 prot_type = QETH_PROT_LAYER2;
2256 else
2257 prot_type = QETH_PROT_TCPIP;
2258
2259 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2260 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2261 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2262 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2263 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2264 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2265 card->info.portname, 9);
2266 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2267 qeth_ulp_enable_cb, NULL);
2268 return rc;
2269
2270}
2271
2272static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2273 unsigned long data)
2274{
2275 struct qeth_cmd_buffer *iob;
65a1f898 2276 int rc = 0;
4a71df50 2277
d11ba0c4 2278 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2279
2280 iob = (struct qeth_cmd_buffer *) data;
2281 memcpy(&card->token.ulp_connection_r,
2282 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2283 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2284 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2285 3)) {
2286 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2287 dev_err(&card->gdev->dev, "A connection could not be "
2288 "established because of an OLM limit\n");
bbb822a8 2289 iob->rc = -EMLINK;
65a1f898 2290 }
d11ba0c4 2291 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
65a1f898 2292 return rc;
4a71df50
FB		 2293}
2294
2295static int qeth_ulp_setup(struct qeth_card *card)
2296{
2297 int rc;
2298 __u16 temp;
2299 struct qeth_cmd_buffer *iob;
2300 struct ccw_dev_id dev_id;
2301
d11ba0c4 2302 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2303
2304 iob = qeth_wait_for_buffer(&card->write);
2305 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2306
2307 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2308 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2309 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2310 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2311 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2312 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2313
2314 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2315 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2316 temp = (card->info.cula << 8) + card->info.unit_addr2;
2317 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2318 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2319 qeth_ulp_setup_cb, NULL);
2320 return rc;
2321}
2322
0da9581d
EL		 2323static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2324{
2325 int rc;
2326 struct qeth_qdio_out_buffer *newbuf;
2327
2328 rc = 0;
2329 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2330 if (!newbuf) {
2331 rc = -ENOMEM;
2332 goto out;
2333 }
2334 newbuf->buffer = &q->qdio_bufs[bidx];
2335 skb_queue_head_init(&newbuf->skb_list);
2336 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2337 newbuf->q = q;
2338 newbuf->aob = NULL;
2339 newbuf->next_pending = q->bufs[bidx];
2340 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2341 q->bufs[bidx] = newbuf;
2342 if (q->bufstates) {
2343 q->bufstates[bidx].user = newbuf;
2344 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2345 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2346 QETH_CARD_TEXT_(q->card, 2, "%lx",
2347 (long) newbuf->next_pending);
2348 }
2349out:
2350 return rc;
2351}
2352
2353
4a71df50
FB		 2354static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2355{
2356 int i, j;
2357
d11ba0c4 2358 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2359
2360 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2361 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2362 return 0;
2363
b3332930 2364 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2365 GFP_KERNEL);
4a71df50
FB		 2366 if (!card->qdio.in_q)
2367 goto out_nomem;
d11ba0c4
PT		 2368 QETH_DBF_TEXT(SETUP, 2, "inq");
2369 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2370 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2371 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2372 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2373 card->qdio.in_q->bufs[i].buffer =
2374 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2375 card->qdio.in_q->bufs[i].rx_skb = NULL;
2376 }
4a71df50
FB		 2377 /* inbound buffer pool */
2378 if (qeth_alloc_buffer_pool(card))
2379 goto out_freeinq;
0da9581d 2380
4a71df50
FB		 2381 /* outbound */
2382 card->qdio.out_qs =
b3332930 2383 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2384 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2385 if (!card->qdio.out_qs)
2386 goto out_freepool;
2387 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2388 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2389 GFP_KERNEL);
4a71df50
FB		 2390 if (!card->qdio.out_qs[i])
2391 goto out_freeoutq;
d11ba0c4
PT		 2392 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2393 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2394 card->qdio.out_qs[i]->queue_no = i;
2395 /* give outbound qeth_qdio_buffers their qdio_buffers */
2396 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
0da9581d
EL		 2397 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2398 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2399 goto out_freeoutqbufs;
4a71df50
FB		 2400 }
2401 }
0da9581d
EL		 2402
2403 /* completion */
2404 if (qeth_alloc_cq(card))
2405 goto out_freeoutq;
2406
4a71df50
FB		 2407 return 0;
2408
0da9581d
EL		 2409out_freeoutqbufs:
2410 while (j > 0) {
2411 --j;
2412 kmem_cache_free(qeth_qdio_outbuf_cache,
2413 card->qdio.out_qs[i]->bufs[j]);
2414 card->qdio.out_qs[i]->bufs[j] = NULL;
2415 }
4a71df50 2416out_freeoutq:
0da9581d 2417 while (i > 0) {
4a71df50 2418 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2419 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2420 }
4a71df50
FB		 2421 kfree(card->qdio.out_qs);
2422 card->qdio.out_qs = NULL;
2423out_freepool:
2424 qeth_free_buffer_pool(card);
2425out_freeinq:
2426 kfree(card->qdio.in_q);
2427 card->qdio.in_q = NULL;
2428out_nomem:
2429 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2430 return -ENOMEM;
2431}
2432
2433static void qeth_create_qib_param_field(struct qeth_card *card,
2434 char *param_field)
2435{
2436
2437 param_field[0] = _ascebc['P'];
2438 param_field[1] = _ascebc['C'];
2439 param_field[2] = _ascebc['I'];
2440 param_field[3] = _ascebc['T'];
2441 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2442 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2443 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2444}
2445
2446static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2447 char *param_field)
2448{
2449 param_field[16] = _ascebc['B'];
2450 param_field[17] = _ascebc['L'];
2451 param_field[18] = _ascebc['K'];
2452 param_field[19] = _ascebc['T'];
2453 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2454 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2455 *((unsigned int *) (&param_field[28])) =
2456 card->info.blkt.inter_packet_jumbo;
2457}
2458
2459static int qeth_qdio_activate(struct qeth_card *card)
2460{
d11ba0c4 2461 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2462 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2463}
2464
2465static int qeth_dm_act(struct qeth_card *card)
2466{
2467 int rc;
2468 struct qeth_cmd_buffer *iob;
2469
d11ba0c4 2470 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2471
2472 iob = qeth_wait_for_buffer(&card->write);
2473 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2474
2475 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2476 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2477 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2478 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2479 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2480 return rc;
2481}
2482
2483static int qeth_mpc_initialize(struct qeth_card *card)
2484{
2485 int rc;
2486
d11ba0c4 2487 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2488
2489 rc = qeth_issue_next_read(card);
2490 if (rc) {
d11ba0c4 2491 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2492 return rc;
2493 }
2494 rc = qeth_cm_enable(card);
2495 if (rc) {
d11ba0c4 2496 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2497 goto out_qdio;
2498 }
2499 rc = qeth_cm_setup(card);
2500 if (rc) {
d11ba0c4 2501 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2502 goto out_qdio;
2503 }
2504 rc = qeth_ulp_enable(card);
2505 if (rc) {
d11ba0c4 2506 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2507 goto out_qdio;
2508 }
2509 rc = qeth_ulp_setup(card);
2510 if (rc) {
d11ba0c4 2511 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2512 goto out_qdio;
2513 }
2514 rc = qeth_alloc_qdio_buffers(card);
2515 if (rc) {
d11ba0c4 2516 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2517 goto out_qdio;
2518 }
2519 rc = qeth_qdio_establish(card);
2520 if (rc) {
d11ba0c4 2521 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2522 qeth_free_qdio_buffers(card);
2523 goto out_qdio;
2524 }
2525 rc = qeth_qdio_activate(card);
2526 if (rc) {
d11ba0c4 2527 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2528 goto out_qdio;
2529 }
2530 rc = qeth_dm_act(card);
2531 if (rc) {
d11ba0c4 2532 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2533 goto out_qdio;
2534 }
2535
2536 return 0;
2537out_qdio:
2538 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2539 return rc;
2540}
2541
2542static void qeth_print_status_with_portname(struct qeth_card *card)
2543{
2544 char dbf_text[15];
2545 int i;
2546
2547 sprintf(dbf_text, "%s", card->info.portname + 1);
2548 for (i = 0; i < 8; i++)
2549 dbf_text[i] =
2550 (char) _ebcasc[(__u8) dbf_text[i]];
2551 dbf_text[8] = 0;
74eacdb9 2552 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2553 "with link type %s (portname: %s)\n",
4a71df50
FB		 2554 qeth_get_cardname(card),
2555 (card->info.mcl_level[0]) ? " (level: " : "",
2556 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2557 (card->info.mcl_level[0]) ? ")" : "",
2558 qeth_get_cardname_short(card),
2559 dbf_text);
2560
2561}
2562
2563static void qeth_print_status_no_portname(struct qeth_card *card)
2564{
2565 if (card->info.portname[0])
74eacdb9 2566 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2567 "card%s%s%s\nwith link type %s "
2568 "(no portname needed by interface).\n",
4a71df50
FB		 2569 qeth_get_cardname(card),
2570 (card->info.mcl_level[0]) ? " (level: " : "",
2571 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2572 (card->info.mcl_level[0]) ? ")" : "",
2573 qeth_get_cardname_short(card));
2574 else
74eacdb9 2575 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2576 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2577 qeth_get_cardname(card),
2578 (card->info.mcl_level[0]) ? " (level: " : "",
2579 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2580 (card->info.mcl_level[0]) ? ")" : "",
2581 qeth_get_cardname_short(card));
2582}
2583
2584void qeth_print_status_message(struct qeth_card *card)
2585{
2586 switch (card->info.type) {
5113fec0
UB		 2587 case QETH_CARD_TYPE_OSD:
2588 case QETH_CARD_TYPE_OSM:
2589 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2590 /* VM will use a non-zero first character
2591 * to indicate a HiperSockets like reporting
2592 * of the level OSA sets the first character to zero
2593 * */
2594 if (!card->info.mcl_level[0]) {
2595 sprintf(card->info.mcl_level, "%02x%02x",
2596 card->info.mcl_level[2],
2597 card->info.mcl_level[3]);
2598
2599 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2600 break;
2601 }
2602 /* fallthrough */
2603 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2604 if ((card->info.guestlan) ||
2605 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2606 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2607 card->info.mcl_level[0]];
2608 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2609 card->info.mcl_level[1]];
2610 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2611 card->info.mcl_level[2]];
2612 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2613 card->info.mcl_level[3]];
2614 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2615 }
2616 break;
2617 default:
2618 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2619 }
2620 if (card->info.portname_required)
2621 qeth_print_status_with_portname(card);
2622 else
2623 qeth_print_status_no_portname(card);
2624}
2625EXPORT_SYMBOL_GPL(qeth_print_status_message);
2626
4a71df50
FB		 2627static void qeth_initialize_working_pool_list(struct qeth_card *card)
2628{
2629 struct qeth_buffer_pool_entry *entry;
2630
847a50fd 2631 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2632
2633 list_for_each_entry(entry,
2634 &card->qdio.init_pool.entry_list, init_list) {
2635 qeth_put_buffer_pool_entry(card, entry);
2636 }
2637}
2638
2639static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2640 struct qeth_card *card)
2641{
2642 struct list_head *plh;
2643 struct qeth_buffer_pool_entry *entry;
2644 int i, free;
2645 struct page *page;
2646
2647 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2648 return NULL;
2649
2650 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2651 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2652 free = 1;
2653 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2654 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2655 free = 0;
2656 break;
2657 }
2658 }
2659 if (free) {
2660 list_del_init(&entry->list);
2661 return entry;
2662 }
2663 }
2664
2665 /* no free buffer in pool so take first one and swap pages */
2666 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2667 struct qeth_buffer_pool_entry, list);
2668 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2669 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2670 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2671 if (!page) {
2672 return NULL;
2673 } else {
2674 free_page((unsigned long)entry->elements[i]);
2675 entry->elements[i] = page_address(page);
2676 if (card->options.performance_stats)
2677 card->perf_stats.sg_alloc_page_rx++;
2678 }
2679 }
2680 }
2681 list_del_init(&entry->list);
2682 return entry;
2683}
2684
2685static int qeth_init_input_buffer(struct qeth_card *card,
2686 struct qeth_qdio_buffer *buf)
2687{
2688 struct qeth_buffer_pool_entry *pool_entry;
2689 int i;
2690
b3332930
FB		 2691 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2692 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2693 if (!buf->rx_skb)
2694 return 1;
2695 }
2696
4a71df50
FB		 2697 pool_entry = qeth_find_free_buffer_pool_entry(card);
2698 if (!pool_entry)
2699 return 1;
2700
2701 /*
2702 * since the buffer is accessed only from the input_tasklet
2703 * there shouldn't be a need to synchronize; also, since we use
2704 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2705 * buffers
2706 */
4a71df50
FB		 2707
2708 buf->pool_entry = pool_entry;
2709 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2710 buf->buffer->element[i].length = PAGE_SIZE;
2711 buf->buffer->element[i].addr = pool_entry->elements[i];
2712 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2713 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2714 else
3ec90878
JG		 2715 buf->buffer->element[i].eflags = 0;
2716 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2717 }
2718 return 0;
2719}
2720
2721int qeth_init_qdio_queues(struct qeth_card *card)
2722{
2723 int i, j;
2724 int rc;
2725
d11ba0c4 2726 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2727
2728 /* inbound queue */
2729 memset(card->qdio.in_q->qdio_bufs, 0,
2730 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2731 qeth_initialize_working_pool_list(card);
2732 /*give only as many buffers to hardware as we have buffer pool entries*/
2733 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2734 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2735 card->qdio.in_q->next_buf_to_init =
2736 card->qdio.in_buf_pool.buf_count - 1;
2737 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2738 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2739 if (rc) {
d11ba0c4 2740 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2741 return rc;
2742 }
0da9581d
EL		 2743
2744 /* completion */
2745 rc = qeth_cq_init(card);
2746 if (rc) {
2747 return rc;
2748 }
2749
4a71df50
FB		 2750 /* outbound queue */
2751 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2752 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2753 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2754 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2755 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2756 card->qdio.out_qs[i]->bufs[j],
2757 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2758 }
2759 card->qdio.out_qs[i]->card = card;
2760 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2761 card->qdio.out_qs[i]->do_pack = 0;
2762 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2763 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2764 atomic_set(&card->qdio.out_qs[i]->state,
2765 QETH_OUT_Q_UNLOCKED);
2766 }
2767 return 0;
2768}
2769EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2770
2771static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2772{
2773 switch (link_type) {
2774 case QETH_LINK_TYPE_HSTR:
2775 return 2;
2776 default:
2777 return 1;
2778 }
2779}
2780
2781static void qeth_fill_ipacmd_header(struct qeth_card *card,
2782 struct qeth_ipa_cmd *cmd, __u8 command,
2783 enum qeth_prot_versions prot)
2784{
2785 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2786 cmd->hdr.command = command;
2787 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2788 cmd->hdr.seqno = card->seqno.ipa;
2789 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2790 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2791 if (card->options.layer2)
2792 cmd->hdr.prim_version_no = 2;
2793 else
2794 cmd->hdr.prim_version_no = 1;
2795 cmd->hdr.param_count = 1;
2796 cmd->hdr.prot_version = prot;
2797 cmd->hdr.ipa_supported = 0;
2798 cmd->hdr.ipa_enabled = 0;
2799}
2800
2801struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2802 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2803{
2804 struct qeth_cmd_buffer *iob;
2805 struct qeth_ipa_cmd *cmd;
2806
2807 iob = qeth_wait_for_buffer(&card->write);
2808 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2809 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2810
2811 return iob;
2812}
2813EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2814
2815void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2816 char prot_type)
2817{
2818 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2819 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2820 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2821 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2822}
2823EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2824
2825int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2826 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2827 unsigned long),
2828 void *reply_param)
2829{
2830 int rc;
2831 char prot_type;
4a71df50 2832
847a50fd 2833 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2834
2835 if (card->options.layer2)
2836 if (card->info.type == QETH_CARD_TYPE_OSN)
2837 prot_type = QETH_PROT_OSN2;
2838 else
2839 prot_type = QETH_PROT_LAYER2;
2840 else
2841 prot_type = QETH_PROT_TCPIP;
2842 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2843 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2844 iob, reply_cb, reply_param);
908abbb5
UB		 2845 if (rc == -ETIME) {
2846 qeth_clear_ipacmd_list(card);
2847 qeth_schedule_recovery(card);
2848 }
4a71df50
FB		 2849 return rc;
2850}
2851EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2852
4a71df50
FB		 2853int qeth_send_startlan(struct qeth_card *card)
2854{
2855 int rc;
70919e23 2856 struct qeth_cmd_buffer *iob;
4a71df50 2857
d11ba0c4 2858 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2859
70919e23
UB		 2860 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2861 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2862 return rc;
2863}
2864EXPORT_SYMBOL_GPL(qeth_send_startlan);
2865
4a71df50
FB		 2866int qeth_default_setadapterparms_cb(struct qeth_card *card,
2867 struct qeth_reply *reply, unsigned long data)
2868{
2869 struct qeth_ipa_cmd *cmd;
2870
847a50fd 2871 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2872
2873 cmd = (struct qeth_ipa_cmd *) data;
2874 if (cmd->hdr.return_code == 0)
2875 cmd->hdr.return_code =
2876 cmd->data.setadapterparms.hdr.return_code;
2877 return 0;
2878}
2879EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2880
2881static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2882 struct qeth_reply *reply, unsigned long data)
2883{
2884 struct qeth_ipa_cmd *cmd;
2885
847a50fd 2886 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2887
2888 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2889 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2890 card->info.link_type =
2891 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2892 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2893 }
4a71df50
FB		 2894 card->options.adp.supported_funcs =
2895 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2896 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2897}
2898
2899struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2900 __u32 command, __u32 cmdlen)
2901{
2902 struct qeth_cmd_buffer *iob;
2903 struct qeth_ipa_cmd *cmd;
2904
2905 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2906 QETH_PROT_IPV4);
2907 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2908 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2909 cmd->data.setadapterparms.hdr.command_code = command;
2910 cmd->data.setadapterparms.hdr.used_total = 1;
2911 cmd->data.setadapterparms.hdr.seq_no = 1;
2912
2913 return iob;
2914}
2915EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2916
2917int qeth_query_setadapterparms(struct qeth_card *card)
2918{
2919 int rc;
2920 struct qeth_cmd_buffer *iob;
2921
847a50fd 2922 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2923 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2924 sizeof(struct qeth_ipacmd_setadpparms));
2925 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2926 return rc;
2927}
2928EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2929
1da74b1c
FB		 2930static int qeth_query_ipassists_cb(struct qeth_card *card,
2931 struct qeth_reply *reply, unsigned long data)
2932{
2933 struct qeth_ipa_cmd *cmd;
2934
2935 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2936
2937 cmd = (struct qeth_ipa_cmd *) data;
2938 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2939 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2940 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2941 } else {
2942 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2943 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2944 }
2945 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2946 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
2947 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
2948 return 0;
2949}
2950
2951int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2952{
2953 int rc;
2954 struct qeth_cmd_buffer *iob;
2955
2956 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2957 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2958 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2959 return rc;
2960}
2961EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2962
2963static int qeth_query_setdiagass_cb(struct qeth_card *card,
2964 struct qeth_reply *reply, unsigned long data)
2965{
2966 struct qeth_ipa_cmd *cmd;
2967 __u16 rc;
2968
2969 cmd = (struct qeth_ipa_cmd *)data;
2970 rc = cmd->hdr.return_code;
2971 if (rc)
2972 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2973 else
2974 card->info.diagass_support = cmd->data.diagass.ext;
2975 return 0;
2976}
2977
2978static int qeth_query_setdiagass(struct qeth_card *card)
2979{
2980 struct qeth_cmd_buffer *iob;
2981 struct qeth_ipa_cmd *cmd;
2982
2983 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2984 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2985 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2986 cmd->data.diagass.subcmd_len = 16;
2987 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2988 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2989}
2990
2991static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2992{
2993 unsigned long info = get_zeroed_page(GFP_KERNEL);
2994 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2995 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2996 struct ccw_dev_id ccwid;
2997 int level, rc;
2998
2999 tid->chpid = card->info.chpid;
3000 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3001 tid->ssid = ccwid.ssid;
3002 tid->devno = ccwid.devno;
3003 if (!info)
3004 return;
3005
3006 rc = stsi(NULL, 0, 0, 0);
3007 if (rc == -ENOSYS)
3008 level = rc;
3009 else
3010 level = (((unsigned int) rc) >> 28);
3011
3012 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
3013 tid->lparnr = info222->lpar_number;
3014
3015 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
3016 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3017 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3018 }
3019 free_page(info);
3020 return;
3021}
3022
3023static int qeth_hw_trap_cb(struct qeth_card *card,
3024 struct qeth_reply *reply, unsigned long data)
3025{
3026 struct qeth_ipa_cmd *cmd;
3027 __u16 rc;
3028
3029 cmd = (struct qeth_ipa_cmd *)data;
3030 rc = cmd->hdr.return_code;
3031 if (rc)
3032 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3033 return 0;
3034}
3035
3036int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3037{
3038 struct qeth_cmd_buffer *iob;
3039 struct qeth_ipa_cmd *cmd;
3040
3041 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3042 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3043 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3044 cmd->data.diagass.subcmd_len = 80;
3045 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3046 cmd->data.diagass.type = 1;
3047 cmd->data.diagass.action = action;
3048 switch (action) {
3049 case QETH_DIAGS_TRAP_ARM:
3050 cmd->data.diagass.options = 0x0003;
3051 cmd->data.diagass.ext = 0x00010000 +
3052 sizeof(struct qeth_trap_id);
3053 qeth_get_trap_id(card,
3054 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3055 break;
3056 case QETH_DIAGS_TRAP_DISARM:
3057 cmd->data.diagass.options = 0x0001;
3058 break;
3059 case QETH_DIAGS_TRAP_CAPTURE:
3060 break;
3061 }
3062 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3063}
3064EXPORT_SYMBOL_GPL(qeth_hw_trap);
3065
76b11f8e
UB		 3066int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3067 unsigned int qdio_error, const char *dbftext)
4a71df50 3068{
779e6e1c 3069 if (qdio_error) {
847a50fd 3070 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3071 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3072 buf->element[15].sflags);
38593d01 3073 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3074 buf->element[14].sflags);
38593d01 3075 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3076 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3077 card->stats.rx_dropped++;
3078 return 0;
3079 } else
3080 return 1;
4a71df50
FB		 3081 }
3082 return 0;
3083}
3084EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3085
b3332930
FB		 3086void qeth_buffer_reclaim_work(struct work_struct *work)
3087{
3088 struct qeth_card *card = container_of(work, struct qeth_card,
3089 buffer_reclaim_work.work);
3090
3091 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3092 qeth_queue_input_buffer(card, card->reclaim_index);
3093}
3094
4a71df50
FB		 3095void qeth_queue_input_buffer(struct qeth_card *card, int index)
3096{
3097 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3098 struct list_head *lh;
4a71df50
FB		 3099 int count;
3100 int i;
3101 int rc;
3102 int newcount = 0;
3103
4a71df50
FB		 3104 count = (index < queue->next_buf_to_init)?
3105 card->qdio.in_buf_pool.buf_count -
3106 (queue->next_buf_to_init - index) :
3107 card->qdio.in_buf_pool.buf_count -
3108 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3109 /* only requeue at a certain threshold to avoid SIGAs */
3110 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3111 for (i = queue->next_buf_to_init;
3112 i < queue->next_buf_to_init + count; ++i) {
3113 if (qeth_init_input_buffer(card,
3114 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3115 break;
3116 } else {
3117 newcount++;
3118 }
3119 }
3120
3121 if (newcount < count) {
3122 /* we are in memory shortage so we switch back to
3123 traditional skb allocation and drop packages */
4a71df50
FB		 3124 atomic_set(&card->force_alloc_skb, 3);
3125 count = newcount;
3126 } else {
4a71df50
FB		 3127 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3128 }
3129
b3332930
FB		 3130 if (!count) {
3131 i = 0;
3132 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3133 i++;
3134 if (i == card->qdio.in_buf_pool.buf_count) {
3135 QETH_CARD_TEXT(card, 2, "qsarbw");
3136 card->reclaim_index = index;
3137 schedule_delayed_work(
3138 &card->buffer_reclaim_work,
3139 QETH_RECLAIM_WORK_TIME);
3140 }
3141 return;
3142 }
3143
4a71df50
FB		 3144 /*
3145 * according to old code it should be avoided to requeue all
3146 * 128 buffers in order to benefit from PCI avoidance.
3147 * this function keeps at least one buffer (the buffer at
3148 * 'index') un-requeued -> this buffer is the first buffer that
3149 * will be requeued the next time
3150 */
3151 if (card->options.performance_stats) {
3152 card->perf_stats.inbound_do_qdio_cnt++;
3153 card->perf_stats.inbound_do_qdio_start_time =
3154 qeth_get_micros();
3155 }
779e6e1c
JG		 3156 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3157 queue->next_buf_to_init, count);
4a71df50
FB		 3158 if (card->options.performance_stats)
3159 card->perf_stats.inbound_do_qdio_time +=
3160 qeth_get_micros() -
3161 card->perf_stats.inbound_do_qdio_start_time;
3162 if (rc) {
847a50fd 3163 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3164 }
3165 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3166 QDIO_MAX_BUFFERS_PER_Q;
3167 }
3168}
3169EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3170
3171static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3172 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3173{
3ec90878 3174 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3175
847a50fd 3176 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3177 if (card->info.type == QETH_CARD_TYPE_IQD) {
3178 if (sbalf15 == 0) {
3179 qdio_err = 0;
3180 } else {
3181 qdio_err = 1;
3182 }
3183 }
76b11f8e 3184 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3185
3186 if (!qdio_err)
4a71df50 3187 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3188
3189 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3190 return QETH_SEND_ERROR_RETRY;
3191
847a50fd
CO		 3192 QETH_CARD_TEXT(card, 1, "lnkfail");
3193 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3194 (u16)qdio_err, (u8)sbalf15);
3195 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3196}
3197
3198/*
3199 * Switched to packing state if the number of used buffers on a queue
3200 * reaches a certain limit.
3201 */
3202static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3203{
3204 if (!queue->do_pack) {
3205 if (atomic_read(&queue->used_buffers)
3206 >= QETH_HIGH_WATERMARK_PACK){
3207 /* switch non-PACKING -> PACKING */
847a50fd 3208 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3209 if (queue->card->options.performance_stats)
3210 queue->card->perf_stats.sc_dp_p++;
3211 queue->do_pack = 1;
3212 }
3213 }
3214}
3215
3216/*
3217 * Switches from packing to non-packing mode. If there is a packing
3218 * buffer on the queue this buffer will be prepared to be flushed.
3219 * In that case 1 is returned to inform the caller. If no buffer
3220 * has to be flushed, zero is returned.
3221 */
3222static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3223{
3224 struct qeth_qdio_out_buffer *buffer;
3225 int flush_count = 0;
3226
3227 if (queue->do_pack) {
3228 if (atomic_read(&queue->used_buffers)
3229 <= QETH_LOW_WATERMARK_PACK) {
3230 /* switch PACKING -> non-PACKING */
847a50fd 3231 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3232 if (queue->card->options.performance_stats)
3233 queue->card->perf_stats.sc_p_dp++;
3234 queue->do_pack = 0;
3235 /* flush packing buffers */
0da9581d 3236 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3237 if ((atomic_read(&buffer->state) ==
3238 QETH_QDIO_BUF_EMPTY) &&
3239 (buffer->next_element_to_fill > 0)) {
3240 atomic_set(&buffer->state,
0da9581d 3241 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3242 flush_count++;
3243 queue->next_buf_to_fill =
3244 (queue->next_buf_to_fill + 1) %
3245 QDIO_MAX_BUFFERS_PER_Q;
3246 }
3247 }
3248 }
3249 return flush_count;
3250}
3251
0da9581d 3252
4a71df50
FB		 3253/*
3254 * Called to flush a packing buffer if no more pci flags are on the queue.
3255 * Checks if there is a packing buffer and prepares it to be flushed.
3256 * In that case returns 1, otherwise zero.
3257 */
3258static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3259{
3260 struct qeth_qdio_out_buffer *buffer;
3261
0da9581d 3262 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3263 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3264 (buffer->next_element_to_fill > 0)) {
3265 /* it's a packing buffer */
3266 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3267 queue->next_buf_to_fill =
3268 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3269 return 1;
3270 }
3271 return 0;
3272}
3273
779e6e1c
JG		 3274static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3275 int count)
4a71df50
FB		 3276{
3277 struct qeth_qdio_out_buffer *buf;
3278 int rc;
3279 int i;
3280 unsigned int qdio_flags;
3281
4a71df50 3282 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3283 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3284 buf = queue->bufs[bidx];
3ec90878
JG		 3285 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3286 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3287
0da9581d
EL		 3288 if (queue->bufstates)
3289 queue->bufstates[bidx].user = buf;
3290
4a71df50
FB		 3291 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3292 continue;
3293
3294 if (!queue->do_pack) {
3295 if ((atomic_read(&queue->used_buffers) >=
3296 (QETH_HIGH_WATERMARK_PACK -
3297 QETH_WATERMARK_PACK_FUZZ)) &&
3298 !atomic_read(&queue->set_pci_flags_count)) {
3299 /* it's likely that we'll go to packing
3300 * mode soon */
3301 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3302 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3303 }
3304 } else {
3305 if (!atomic_read(&queue->set_pci_flags_count)) {
3306 /*
3307 * there's no outstanding PCI any more, so we
3308 * have to request a PCI to be sure the the PCI
3309 * will wake at some time in the future then we
3310 * can flush packed buffers that might still be
3311 * hanging around, which can happen if no
3312 * further send was requested by the stack
3313 */
3314 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3315 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3316 }
3317 }
3318 }
3319
3320 queue->card->dev->trans_start = jiffies;
3321 if (queue->card->options.performance_stats) {
3322 queue->card->perf_stats.outbound_do_qdio_cnt++;
3323 queue->card->perf_stats.outbound_do_qdio_start_time =
3324 qeth_get_micros();
3325 }
3326 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3327 if (atomic_read(&queue->set_pci_flags_count))
3328 qdio_flags |= QDIO_FLAG_PCI_OUT;
3329 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3330 queue->queue_no, index, count);
4a71df50
FB		 3331 if (queue->card->options.performance_stats)
3332 queue->card->perf_stats.outbound_do_qdio_time +=
3333 qeth_get_micros() -
3334 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3335 atomic_add(count, &queue->used_buffers);
4a71df50 3336 if (rc) {
d303b6fd
JG		 3337 queue->card->stats.tx_errors += count;
3338 /* ignore temporary SIGA errors without busy condition */
3339 if (rc == QDIO_ERROR_SIGA_TARGET)
3340 return;
847a50fd 3341 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3342 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3343 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3344 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3345 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3346
4a71df50
FB		 3347 /* this must not happen under normal circumstances. if it
3348 * happens something is really wrong -> recover */
3349 qeth_schedule_recovery(queue->card);
3350 return;
3351 }
4a71df50
FB		 3352 if (queue->card->options.performance_stats)
3353 queue->card->perf_stats.bufs_sent += count;
3354}
3355
3356static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3357{
3358 int index;
3359 int flush_cnt = 0;
3360 int q_was_packing = 0;
3361
3362 /*
3363 * check if weed have to switch to non-packing mode or if
3364 * we have to get a pci flag out on the queue
3365 */
3366 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3367 !atomic_read(&queue->set_pci_flags_count)) {
3368 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3369 QETH_OUT_Q_UNLOCKED) {
3370 /*
3371 * If we get in here, there was no action in
3372 * do_send_packet. So, we check if there is a
3373 * packing buffer to be flushed here.
3374 */
3375 netif_stop_queue(queue->card->dev);
3376 index = queue->next_buf_to_fill;
3377 q_was_packing = queue->do_pack;
3378 /* queue->do_pack may change */
3379 barrier();
3380 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3381 if (!flush_cnt &&
3382 !atomic_read(&queue->set_pci_flags_count))
3383 flush_cnt +=
3384 qeth_flush_buffers_on_no_pci(queue);
3385 if (queue->card->options.performance_stats &&
3386 q_was_packing)
3387 queue->card->perf_stats.bufs_sent_pack +=
3388 flush_cnt;
3389 if (flush_cnt)
779e6e1c 3390 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3391 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3392 }
3393 }
3394}
3395
a1c3ed4c
FB		 3396void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3397 unsigned long card_ptr)
3398{
3399 struct qeth_card *card = (struct qeth_card *)card_ptr;
3400
0cffef48 3401 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3402 napi_schedule(&card->napi);
3403}
3404EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3405
0da9581d
EL		 3406int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3407{
3408 int rc;
3409
3410 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3411 rc = -1;
3412 goto out;
3413 } else {
3414 if (card->options.cq == cq) {
3415 rc = 0;
3416 goto out;
3417 }
3418
3419 if (card->state != CARD_STATE_DOWN &&
3420 card->state != CARD_STATE_RECOVER) {
3421 rc = -1;
3422 goto out;
3423 }
3424
3425 qeth_free_qdio_buffers(card);
3426 card->options.cq = cq;
3427 rc = 0;
3428 }
3429out:
3430 return rc;
3431
3432}
3433EXPORT_SYMBOL_GPL(qeth_configure_cq);
3434
3435
3436static void qeth_qdio_cq_handler(struct qeth_card *card,
3437 unsigned int qdio_err,
3438 unsigned int queue, int first_element, int count) {
3439 struct qeth_qdio_q *cq = card->qdio.c_q;
3440 int i;
3441 int rc;
3442
3443 if (!qeth_is_cq(card, queue))
3444 goto out;
3445
3446 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3447 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3448 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3449
3450 if (qdio_err) {
3451 netif_stop_queue(card->dev);
3452 qeth_schedule_recovery(card);
3453 goto out;
3454 }
3455
3456 if (card->options.performance_stats) {
3457 card->perf_stats.cq_cnt++;
3458 card->perf_stats.cq_start_time = qeth_get_micros();
3459 }
3460
3461 for (i = first_element; i < first_element + count; ++i) {
3462 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3463 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3464 int e;
3465
3466 e = 0;
3467 while (buffer->element[e].addr) {
3468 unsigned long phys_aob_addr;
3469
3470 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3471 qeth_qdio_handle_aob(card, phys_aob_addr);
3472 buffer->element[e].addr = NULL;
3473 buffer->element[e].eflags = 0;
3474 buffer->element[e].sflags = 0;
3475 buffer->element[e].length = 0;
3476
3477 ++e;
3478 }
3479
3480 buffer->element[15].eflags = 0;
3481 buffer->element[15].sflags = 0;
3482 }
3483 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3484 card->qdio.c_q->next_buf_to_init,
3485 count);
3486 if (rc) {
3487 dev_warn(&card->gdev->dev,
3488 "QDIO reported an error, rc=%i\n", rc);
3489 QETH_CARD_TEXT(card, 2, "qcqherr");
3490 }
3491 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3492 + count) % QDIO_MAX_BUFFERS_PER_Q;
3493
3494 netif_wake_queue(card->dev);
3495
3496 if (card->options.performance_stats) {
3497 int delta_t = qeth_get_micros();
3498 delta_t -= card->perf_stats.cq_start_time;
3499 card->perf_stats.cq_time += delta_t;
3500 }
3501out:
3502 return;
3503}
3504
a1c3ed4c 3505void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3506 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3507 unsigned long card_ptr)
3508{
3509 struct qeth_card *card = (struct qeth_card *)card_ptr;
3510
0da9581d
EL		 3511 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3512 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3513
3514 if (qeth_is_cq(card, queue))
3515 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3516 else if (qdio_err)
a1c3ed4c 3517 qeth_schedule_recovery(card);
0da9581d
EL		 3518
3519
a1c3ed4c
FB		 3520}
3521EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3522
779e6e1c
JG		 3523void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3524 unsigned int qdio_error, int __queue, int first_element,
3525 int count, unsigned long card_ptr)
4a71df50
FB		 3526{
3527 struct qeth_card *card = (struct qeth_card *) card_ptr;
3528 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3529 struct qeth_qdio_out_buffer *buffer;
3530 int i;
3531
847a50fd 3532 QETH_CARD_TEXT(card, 6, "qdouhdl");
779e6e1c 3533 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
847a50fd 3534 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3535 netif_stop_queue(card->dev);
3536 qeth_schedule_recovery(card);
3537 return;
4a71df50
FB		 3538 }
3539 if (card->options.performance_stats) {
3540 card->perf_stats.outbound_handler_cnt++;
3541 card->perf_stats.outbound_handler_start_time =
3542 qeth_get_micros();
3543 }
3544 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3545 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3546 buffer = queue->bufs[bidx];
b67d801f 3547 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3548
3549 if (queue->bufstates &&
3550 (queue->bufstates[bidx].flags &
3551 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
b3332930
FB		 3552 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3553
3554 if (atomic_cmpxchg(&buffer->state,
3555 QETH_QDIO_BUF_PRIMED,
3556 QETH_QDIO_BUF_PENDING) ==
3557 QETH_QDIO_BUF_PRIMED) {
3558 qeth_notify_skbs(queue, buffer,
3559 TX_NOTIFY_PENDING);
3560 }
0da9581d
EL		 3561 buffer->aob = queue->bufstates[bidx].aob;
3562 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3563 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3564 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3565 virt_to_phys(buffer->aob));
3566 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
b3332930
FB		 3567 if (qeth_init_qdio_out_buf(queue, bidx)) {
3568 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3569 qeth_schedule_recovery(card);
b3332930 3570 }
0da9581d 3571 } else {
b3332930
FB		 3572 if (card->options.cq == QETH_CQ_ENABLED) {
3573 enum iucv_tx_notify n;
3574
3575 n = qeth_compute_cq_notification(
3576 buffer->buffer->element[15].sflags, 0);
3577 qeth_notify_skbs(queue, buffer, n);
3578 }
3579
0da9581d
EL		 3580 qeth_clear_output_buffer(queue, buffer,
3581 QETH_QDIO_BUF_EMPTY);
3582 }
3583 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3584 }
3585 atomic_sub(count, &queue->used_buffers);
3586 /* check if we need to do something on this outbound queue */
3587 if (card->info.type != QETH_CARD_TYPE_IQD)
3588 qeth_check_outbound_queue(queue);
3589
3590 netif_wake_queue(queue->card->dev);
3591 if (card->options.performance_stats)
3592 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3593 card->perf_stats.outbound_handler_start_time;
3594}
3595EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3596
4a71df50
FB		 3597int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3598 int ipv, int cast_type)
3599{
5113fec0
UB		 3600 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3601 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3602 return card->qdio.default_out_queue;
3603 switch (card->qdio.no_out_queues) {
3604 case 4:
3605 if (cast_type && card->info.is_multicast_different)
3606 return card->info.is_multicast_different &
3607 (card->qdio.no_out_queues - 1);
3608 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3609 const u8 tos = ip_hdr(skb)->tos;
3610
3611 if (card->qdio.do_prio_queueing ==
3612 QETH_PRIO_Q_ING_TOS) {
3613 if (tos & IP_TOS_NOTIMPORTANT)
3614 return 3;
3615 if (tos & IP_TOS_HIGHRELIABILITY)
3616 return 2;
3617 if (tos & IP_TOS_HIGHTHROUGHPUT)
3618 return 1;
3619 if (tos & IP_TOS_LOWDELAY)
3620 return 0;
3621 }
3622 if (card->qdio.do_prio_queueing ==
3623 QETH_PRIO_Q_ING_PREC)
3624 return 3 - (tos >> 6);
3625 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3626 /* TODO: IPv6!!! */
3627 }
3628 return card->qdio.default_out_queue;
3629 case 1: /* fallthrough for single-out-queue 1920-device */
3630 default:
3631 return card->qdio.default_out_queue;
3632 }
3633}
3634EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3635
4a71df50
FB		 3636int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3637 struct sk_buff *skb, int elems)
3638{
51aa165c
FB		 3639 int dlen = skb->len - skb->data_len;
3640 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3641 PFN_DOWN((unsigned long)skb->data);
4a71df50 3642
51aa165c 3643 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3644 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3645 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3646 "(Number=%d / Length=%d). Discarded.\n",
3647 (elements_needed+elems), skb->len);
3648 return 0;
3649 }
3650 return elements_needed;
3651}
3652EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3653
51aa165c
FB		 3654int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3655{
3656 int hroom, inpage, rest;
3657
3658 if (((unsigned long)skb->data & PAGE_MASK) !=
3659 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3660 hroom = skb_headroom(skb);
3661 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3662 rest = len - inpage;
3663 if (rest > hroom)
3664 return 1;
3665 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3666 skb->data -= rest;
3667 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3668 }
3669 return 0;
3670}
3671EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3672
f90b744e 3673static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3674 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3675 int offset)
4a71df50 3676{
51aa165c 3677 int length = skb->len - skb->data_len;
4a71df50
FB		 3678 int length_here;
3679 int element;
3680 char *data;
51aa165c
FB		 3681 int first_lap, cnt;
3682 struct skb_frag_struct *frag;
4a71df50
FB		 3683
3684 element = *next_element_to_fill;
3685 data = skb->data;
3686 first_lap = (is_tso == 0 ? 1 : 0);
3687
683d718a
FB		 3688 if (offset >= 0) {
3689 data = skb->data + offset;
e1f03ae8 3690 length -= offset;
683d718a
FB		 3691 first_lap = 0;
3692 }
3693
4a71df50
FB		 3694 while (length > 0) {
3695 /* length_here is the remaining amount of data in this page */
3696 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3697 if (length < length_here)
3698 length_here = length;
3699
3700 buffer->element[element].addr = data;
3701 buffer->element[element].length = length_here;
3702 length -= length_here;
3703 if (!length) {
3704 if (first_lap)
51aa165c 3705 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3706 buffer->element[element].eflags =
3707 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3708 else
3ec90878 3709 buffer->element[element].eflags = 0;
4a71df50 3710 else
3ec90878
JG		 3711 buffer->element[element].eflags =
3712 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3713 } else {
3714 if (first_lap)
3ec90878
JG		 3715 buffer->element[element].eflags =
3716 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3717 else
3ec90878
JG		 3718 buffer->element[element].eflags =
3719 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3720 }
3721 data += length_here;
3722 element++;
3723 first_lap = 0;
3724 }
51aa165c
FB		 3725
3726 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3727 frag = &skb_shinfo(skb)->frags[cnt];
8d36bb0d
IC		 3728 buffer->element[element].addr = (char *)
3729 page_to_phys(skb_frag_page(frag))
51aa165c
FB		 3730 + frag->page_offset;
3731 buffer->element[element].length = frag->size;
3ec90878 3732 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3733 element++;
3734 }
3735
3ec90878
JG		 3736 if (buffer->element[element - 1].eflags)
3737 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3738 *next_element_to_fill = element;
3739}
3740
f90b744e 3741static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3742 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3743 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3744{
3745 struct qdio_buffer *buffer;
4a71df50
FB		 3746 int flush_cnt = 0, hdr_len, large_send = 0;
3747
4a71df50
FB		 3748 buffer = buf->buffer;
3749 atomic_inc(&skb->users);
3750 skb_queue_tail(&buf->skb_list, skb);
3751
4a71df50 3752 /*check first on TSO ....*/
683d718a 3753 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3754 int element = buf->next_element_to_fill;
3755
683d718a
FB		 3756 hdr_len = sizeof(struct qeth_hdr_tso) +
3757 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3758 /*fill first buffer entry only with header information */
3759 buffer->element[element].addr = skb->data;
3760 buffer->element[element].length = hdr_len;
3ec90878 3761 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3762 buf->next_element_to_fill++;
3763 skb->data += hdr_len;
3764 skb->len -= hdr_len;
3765 large_send = 1;
3766 }
683d718a
FB		 3767
3768 if (offset >= 0) {
3769 int element = buf->next_element_to_fill;
3770 buffer->element[element].addr = hdr;
3771 buffer->element[element].length = sizeof(struct qeth_hdr) +
3772 hd_len;
3ec90878 3773 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3774 buf->is_header[element] = 1;
3775 buf->next_element_to_fill++;
3776 }
3777
51aa165c
FB		 3778 __qeth_fill_buffer(skb, buffer, large_send,
3779 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3780
3781 if (!queue->do_pack) {
847a50fd 3782 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3783 /* set state to PRIMED -> will be flushed */
3784 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3785 flush_cnt = 1;
3786 } else {
847a50fd 3787 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3788 if (queue->card->options.performance_stats)
3789 queue->card->perf_stats.skbs_sent_pack++;
3790 if (buf->next_element_to_fill >=
3791 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3792 /*
3793 * packed buffer if full -> set state PRIMED
3794 * -> will be flushed
3795 */
3796 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3797 flush_cnt = 1;
3798 }
3799 }
3800 return flush_cnt;
3801}
3802
3803int qeth_do_send_packet_fast(struct qeth_card *card,
3804 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3805 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3806 int offset, int hd_len)
4a71df50
FB		 3807{
3808 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3809 int index;
3810
4a71df50
FB		 3811 /* spin until we get the queue ... */
3812 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3813 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3814 /* ... now we've got the queue */
3815 index = queue->next_buf_to_fill;
0da9581d 3816 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3817 /*
3818 * check if buffer is empty to make sure that we do not 'overtake'
3819 * ourselves and try to fill a buffer that is already primed
3820 */
3821 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3822 goto out;
64ef8957 3823 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3824 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3825 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3826 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3827 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3828 return 0;
3829out:
3830 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3831 return -EBUSY;
3832}
3833EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3834
3835int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3836 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3837 int elements_needed)
4a71df50
FB		 3838{
3839 struct qeth_qdio_out_buffer *buffer;
3840 int start_index;
3841 int flush_count = 0;
3842 int do_pack = 0;
3843 int tmp;
3844 int rc = 0;
3845
4a71df50
FB		 3846 /* spin until we get the queue ... */
3847 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3848 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3849 start_index = queue->next_buf_to_fill;
0da9581d 3850 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3851 /*
3852 * check if buffer is empty to make sure that we do not 'overtake'
3853 * ourselves and try to fill a buffer that is already primed
3854 */
3855 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3856 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3857 return -EBUSY;
3858 }
3859 /* check if we need to switch packing state of this queue */
3860 qeth_switch_to_packing_if_needed(queue);
3861 if (queue->do_pack) {
3862 do_pack = 1;
64ef8957
FB		 3863 /* does packet fit in current buffer? */
3864 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3865 buffer->next_element_to_fill) < elements_needed) {
3866 /* ... no -> set state PRIMED */
3867 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3868 flush_count++;
3869 queue->next_buf_to_fill =
3870 (queue->next_buf_to_fill + 1) %
3871 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3872 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3873 /* we did a step forward, so check buffer state
3874 * again */
3875 if (atomic_read(&buffer->state) !=
3876 QETH_QDIO_BUF_EMPTY) {
3877 qeth_flush_buffers(queue, start_index,
779e6e1c 3878 flush_count);
64ef8957 3879 atomic_set(&queue->state,
4a71df50 3880 QETH_OUT_Q_UNLOCKED);
64ef8957 3881 return -EBUSY;
4a71df50
FB		 3882 }
3883 }
3884 }
64ef8957 3885 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3886 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3887 QDIO_MAX_BUFFERS_PER_Q;
3888 flush_count += tmp;
4a71df50 3889 if (flush_count)
779e6e1c 3890 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3891 else if (!atomic_read(&queue->set_pci_flags_count))
3892 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3893 /*
3894 * queue->state will go from LOCKED -> UNLOCKED or from
3895 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3896 * (switch packing state or flush buffer to get another pci flag out).
3897 * In that case we will enter this loop
3898 */
3899 while (atomic_dec_return(&queue->state)) {
3900 flush_count = 0;
3901 start_index = queue->next_buf_to_fill;
3902 /* check if we can go back to non-packing state */
3903 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3904 /*
3905 * check if we need to flush a packing buffer to get a pci
3906 * flag out on the queue
3907 */
3908 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3909 flush_count += qeth_flush_buffers_on_no_pci(queue);
3910 if (flush_count)
779e6e1c 3911 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3912 }
3913 /* at this point the queue is UNLOCKED again */
3914 if (queue->card->options.performance_stats && do_pack)
3915 queue->card->perf_stats.bufs_sent_pack += flush_count;
3916
3917 return rc;
3918}
3919EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3920
3921static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3922 struct qeth_reply *reply, unsigned long data)
3923{
3924 struct qeth_ipa_cmd *cmd;
3925 struct qeth_ipacmd_setadpparms *setparms;
3926
847a50fd 3927 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3928
3929 cmd = (struct qeth_ipa_cmd *) data;
3930 setparms = &(cmd->data.setadapterparms);
3931
3932 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3933 if (cmd->hdr.return_code) {
847a50fd 3934 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3935 setparms->data.mode = SET_PROMISC_MODE_OFF;
3936 }
3937 card->info.promisc_mode = setparms->data.mode;
3938 return 0;
3939}
3940
3941void qeth_setadp_promisc_mode(struct qeth_card *card)
3942{
3943 enum qeth_ipa_promisc_modes mode;
3944 struct net_device *dev = card->dev;
3945 struct qeth_cmd_buffer *iob;
3946 struct qeth_ipa_cmd *cmd;
3947
847a50fd 3948 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3949
3950 if (((dev->flags & IFF_PROMISC) &&
3951 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3952 (!(dev->flags & IFF_PROMISC) &&
3953 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3954 return;
3955 mode = SET_PROMISC_MODE_OFF;
3956 if (dev->flags & IFF_PROMISC)
3957 mode = SET_PROMISC_MODE_ON;
847a50fd 3958 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3959
3960 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3961 sizeof(struct qeth_ipacmd_setadpparms));
3962 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3963 cmd->data.setadapterparms.data.mode = mode;
3964 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3965}
3966EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3967
3968int qeth_change_mtu(struct net_device *dev, int new_mtu)
3969{
3970 struct qeth_card *card;
3971 char dbf_text[15];
3972
509e2562 3973 card = dev->ml_priv;
4a71df50 3974
847a50fd 3975 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3976 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3977 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3978
3979 if (new_mtu < 64)
3980 return -EINVAL;
3981 if (new_mtu > 65535)
3982 return -EINVAL;
3983 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3984 (!qeth_mtu_is_valid(card, new_mtu)))
3985 return -EINVAL;
3986 dev->mtu = new_mtu;
3987 return 0;
3988}
3989EXPORT_SYMBOL_GPL(qeth_change_mtu);
3990
3991struct net_device_stats *qeth_get_stats(struct net_device *dev)
3992{
3993 struct qeth_card *card;
3994
509e2562 3995 card = dev->ml_priv;
4a71df50 3996
847a50fd 3997 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 3998
3999 return &card->stats;
4000}
4001EXPORT_SYMBOL_GPL(qeth_get_stats);
4002
4003static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4004 struct qeth_reply *reply, unsigned long data)
4005{
4006 struct qeth_ipa_cmd *cmd;
4007
847a50fd 4008 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4009
4010 cmd = (struct qeth_ipa_cmd *) data;
4011 if (!card->options.layer2 ||
4012 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4013 memcpy(card->dev->dev_addr,
4014 &cmd->data.setadapterparms.data.change_addr.addr,
4015 OSA_ADDR_LEN);
4016 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4017 }
4018 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4019 return 0;
4020}
4021
4022int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4023{
4024 int rc;
4025 struct qeth_cmd_buffer *iob;
4026 struct qeth_ipa_cmd *cmd;
4027
847a50fd 4028 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4029
4030 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4031 sizeof(struct qeth_ipacmd_setadpparms));
4032 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4033 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4034 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4035 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4036 card->dev->dev_addr, OSA_ADDR_LEN);
4037 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4038 NULL);
4039 return rc;
4040}
4041EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4042
d64ecc22
EL		 4043static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4044 struct qeth_reply *reply, unsigned long data)
4045{
4046 struct qeth_ipa_cmd *cmd;
4047 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 4048
847a50fd 4049 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4050
4051 cmd = (struct qeth_ipa_cmd *) data;
4052 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4053 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4054 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4055 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4056 cmd->data.setadapterparms.hdr.return_code);
4057 switch (cmd->data.setadapterparms.hdr.return_code) {
4058 case SET_ACCESS_CTRL_RC_SUCCESS:
4059 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4060 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4061 {
4062 card->options.isolation = access_ctrl_req->subcmd_code;
4063 if (card->options.isolation == ISOLATION_MODE_NONE) {
4064 dev_info(&card->gdev->dev,
4065 "QDIO data connection isolation is deactivated\n");
4066 } else {
4067 dev_info(&card->gdev->dev,
4068 "QDIO data connection isolation is activated\n");
4069 }
4070 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4071 card->gdev->dev.kobj.name,
4072 access_ctrl_req->subcmd_code,
4073 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4074 break;
4075 }
4076 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4077 {
4078 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4079 card->gdev->dev.kobj.name,
4080 access_ctrl_req->subcmd_code,
4081 cmd->data.setadapterparms.hdr.return_code);
4082 dev_err(&card->gdev->dev, "Adapter does not "
4083 "support QDIO data connection isolation\n");
4084
4085 /* ensure isolation mode is "none" */
4086 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4087 break;
4088 }
4089 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4090 {
4091 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4092 card->gdev->dev.kobj.name,
4093 access_ctrl_req->subcmd_code,
4094 cmd->data.setadapterparms.hdr.return_code);
4095 dev_err(&card->gdev->dev,
4096 "Adapter is dedicated. "
4097 "QDIO data connection isolation not supported\n");
4098
4099 /* ensure isolation mode is "none" */
4100 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4101 break;
4102 }
4103 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4104 {
4105 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4106 card->gdev->dev.kobj.name,
4107 access_ctrl_req->subcmd_code,
4108 cmd->data.setadapterparms.hdr.return_code);
4109 dev_err(&card->gdev->dev,
4110 "TSO does not permit QDIO data connection isolation\n");
4111
4112 /* ensure isolation mode is "none" */
4113 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4114 break;
4115 }
4116 default:
4117 {
4118 /* this should never happen */
4119 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4120 "==UNKNOWN\n",
4121 card->gdev->dev.kobj.name,
4122 access_ctrl_req->subcmd_code,
4123 cmd->data.setadapterparms.hdr.return_code);
4124
4125 /* ensure isolation mode is "none" */
4126 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4127 break;
4128 }
4129 }
4130 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4131 return 0;
d64ecc22
EL		 4132}
4133
4134static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4135 enum qeth_ipa_isolation_modes isolation)
4136{
4137 int rc;
4138 struct qeth_cmd_buffer *iob;
4139 struct qeth_ipa_cmd *cmd;
4140 struct qeth_set_access_ctrl *access_ctrl_req;
4141
847a50fd 4142 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4143
4144 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4145 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4146
4147 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4148 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4149 sizeof(struct qeth_set_access_ctrl));
4150 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4151 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4152 access_ctrl_req->subcmd_code = isolation;
4153
4154 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4155 NULL);
4156 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4157 return rc;
4158}
4159
4160int qeth_set_access_ctrl_online(struct qeth_card *card)
4161{
4162 int rc = 0;
4163
847a50fd 4164 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4165
5113fec0
UB		 4166 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4167 card->info.type == QETH_CARD_TYPE_OSX) &&
4168 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 4169 rc = qeth_setadpparms_set_access_ctrl(card,
4170 card->options.isolation);
4171 if (rc) {
4172 QETH_DBF_MESSAGE(3,
5113fec0 4173 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4174 card->gdev->dev.kobj.name,
4175 rc);
4176 }
4177 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4178 card->options.isolation = ISOLATION_MODE_NONE;
4179
4180 dev_err(&card->gdev->dev, "Adapter does not "
4181 "support QDIO data connection isolation\n");
4182 rc = -EOPNOTSUPP;
4183 }
4184 return rc;
4185}
4186EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4187
4a71df50
FB		 4188void qeth_tx_timeout(struct net_device *dev)
4189{
4190 struct qeth_card *card;
4191
509e2562 4192 card = dev->ml_priv;
847a50fd 4193 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4194 card->stats.tx_errors++;
4195 qeth_schedule_recovery(card);
4196}
4197EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4198
4199int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4200{
509e2562 4201 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4202 int rc = 0;
4203
4204 switch (regnum) {
4205 case MII_BMCR: /* Basic mode control register */
4206 rc = BMCR_FULLDPLX;
4207 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4208 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4209 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4210 rc |= BMCR_SPEED100;
4211 break;
4212 case MII_BMSR: /* Basic mode status register */
4213 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4214 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4215 BMSR_100BASE4;
4216 break;
4217 case MII_PHYSID1: /* PHYS ID 1 */
4218 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4219 dev->dev_addr[2];
4220 rc = (rc >> 5) & 0xFFFF;
4221 break;
4222 case MII_PHYSID2: /* PHYS ID 2 */
4223 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4224 break;
4225 case MII_ADVERTISE: /* Advertisement control reg */
4226 rc = ADVERTISE_ALL;
4227 break;
4228 case MII_LPA: /* Link partner ability reg */
4229 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4230 LPA_100BASE4 | LPA_LPACK;
4231 break;
4232 case MII_EXPANSION: /* Expansion register */
4233 break;
4234 case MII_DCOUNTER: /* disconnect counter */
4235 break;
4236 case MII_FCSCOUNTER: /* false carrier counter */
4237 break;
4238 case MII_NWAYTEST: /* N-way auto-neg test register */
4239 break;
4240 case MII_RERRCOUNTER: /* rx error counter */
4241 rc = card->stats.rx_errors;
4242 break;
4243 case MII_SREVISION: /* silicon revision */
4244 break;
4245 case MII_RESV1: /* reserved 1 */
4246 break;
4247 case MII_LBRERROR: /* loopback, rx, bypass error */
4248 break;
4249 case MII_PHYADDR: /* physical address */
4250 break;
4251 case MII_RESV2: /* reserved 2 */
4252 break;
4253 case MII_TPISTATUS: /* TPI status for 10mbps */
4254 break;
4255 case MII_NCONFIG: /* network interface config */
4256 break;
4257 default:
4258 break;
4259 }
4260 return rc;
4261}
4262EXPORT_SYMBOL_GPL(qeth_mdio_read);
4263
4264static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4265 struct qeth_cmd_buffer *iob, int len,
4266 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4267 unsigned long),
4268 void *reply_param)
4269{
4270 u16 s1, s2;
4271
847a50fd 4272 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4273
4274 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4275 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4276 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4277 /* adjust PDU length fields in IPA_PDU_HEADER */
4278 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4279 s2 = (u32) len;
4280 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4281 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4282 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4283 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4284 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4285 reply_cb, reply_param);
4286}
4287
4288static int qeth_snmp_command_cb(struct qeth_card *card,
4289 struct qeth_reply *reply, unsigned long sdata)
4290{
4291 struct qeth_ipa_cmd *cmd;
4292 struct qeth_arp_query_info *qinfo;
4293 struct qeth_snmp_cmd *snmp;
4294 unsigned char *data;
4295 __u16 data_len;
4296
847a50fd 4297 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4298
4299 cmd = (struct qeth_ipa_cmd *) sdata;
4300 data = (unsigned char *)((char *)cmd - reply->offset);
4301 qinfo = (struct qeth_arp_query_info *) reply->param;
4302 snmp = &cmd->data.setadapterparms.data.snmp;
4303
4304 if (cmd->hdr.return_code) {
847a50fd 4305 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4306 return 0;
4307 }
4308 if (cmd->data.setadapterparms.hdr.return_code) {
4309 cmd->hdr.return_code =
4310 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4311 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4312 return 0;
4313 }
4314 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4315 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4316 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4317 else
4318 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4319
4320 /* check if there is enough room in userspace */
4321 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4322 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 4323 cmd->hdr.return_code = -ENOMEM;
4324 return 0;
4325 }
847a50fd 4326 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4327 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4328 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4329 cmd->data.setadapterparms.hdr.seq_no);
4330 /*copy entries to user buffer*/
4331 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4332 memcpy(qinfo->udata + qinfo->udata_offset,
4333 (char *)snmp,
4334 data_len + offsetof(struct qeth_snmp_cmd, data));
4335 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4336 } else {
4337 memcpy(qinfo->udata + qinfo->udata_offset,
4338 (char *)&snmp->request, data_len);
4339 }
4340 qinfo->udata_offset += data_len;
4341 /* check if all replies received ... */
847a50fd 4342 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4343 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4344 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4345 cmd->data.setadapterparms.hdr.seq_no);
4346 if (cmd->data.setadapterparms.hdr.seq_no <
4347 cmd->data.setadapterparms.hdr.used_total)
4348 return 1;
4349 return 0;
4350}
4351
4352int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4353{
4354 struct qeth_cmd_buffer *iob;
4355 struct qeth_ipa_cmd *cmd;
4356 struct qeth_snmp_ureq *ureq;
4357 int req_len;
4358 struct qeth_arp_query_info qinfo = {0, };
4359 int rc = 0;
4360
847a50fd 4361 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4362
4363 if (card->info.guestlan)
4364 return -EOPNOTSUPP;
4365
4366 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4367 (!card->options.layer2)) {
4a71df50
FB		 4368 return -EOPNOTSUPP;
4369 }
4370 /* skip 4 bytes (data_len struct member) to get req_len */
4371 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4372 return -EFAULT;
4986f3f0
JL		 4373 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4374 if (IS_ERR(ureq)) {
847a50fd 4375 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4376 return PTR_ERR(ureq);
4a71df50
FB		 4377 }
4378 qinfo.udata_len = ureq->hdr.data_len;
4379 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4380 if (!qinfo.udata) {
4381 kfree(ureq);
4382 return -ENOMEM;
4383 }
4384 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4385
4386 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4387 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4388 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4389 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4390 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4391 qeth_snmp_command_cb, (void *)&qinfo);
4392 if (rc)
14cc21b6 4393 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4394 QETH_CARD_IFNAME(card), rc);
4395 else {
4396 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4397 rc = -EFAULT;
4398 }
4399
4400 kfree(ureq);
4401 kfree(qinfo.udata);
4402 return rc;
4403}
4404EXPORT_SYMBOL_GPL(qeth_snmp_command);
4405
c3ab96f3
FB		 4406static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4407 struct qeth_reply *reply, unsigned long data)
4408{
4409 struct qeth_ipa_cmd *cmd;
4410 struct qeth_qoat_priv *priv;
4411 char *resdata;
4412 int resdatalen;
4413
4414 QETH_CARD_TEXT(card, 3, "qoatcb");
4415
4416 cmd = (struct qeth_ipa_cmd *)data;
4417 priv = (struct qeth_qoat_priv *)reply->param;
4418 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4419 resdata = (char *)data + 28;
4420
4421 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4422 cmd->hdr.return_code = IPA_RC_FFFF;
4423 return 0;
4424 }
4425
4426 memcpy((priv->buffer + priv->response_len), resdata,
4427 resdatalen);
4428 priv->response_len += resdatalen;
4429
4430 if (cmd->data.setadapterparms.hdr.seq_no <
4431 cmd->data.setadapterparms.hdr.used_total)
4432 return 1;
4433 return 0;
4434}
4435
4436int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4437{
4438 int rc = 0;
4439 struct qeth_cmd_buffer *iob;
4440 struct qeth_ipa_cmd *cmd;
4441 struct qeth_query_oat *oat_req;
4442 struct qeth_query_oat_data oat_data;
4443 struct qeth_qoat_priv priv;
4444 void __user *tmp;
4445
4446 QETH_CARD_TEXT(card, 3, "qoatcmd");
4447
4448 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4449 rc = -EOPNOTSUPP;
4450 goto out;
4451 }
4452
4453 if (copy_from_user(&oat_data, udata,
4454 sizeof(struct qeth_query_oat_data))) {
4455 rc = -EFAULT;
4456 goto out;
4457 }
4458
4459 priv.buffer_len = oat_data.buffer_len;
4460 priv.response_len = 0;
4461 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4462 if (!priv.buffer) {
4463 rc = -ENOMEM;
4464 goto out;
4465 }
4466
4467 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4468 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4469 sizeof(struct qeth_query_oat));
4470 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4471 oat_req = &cmd->data.setadapterparms.data.query_oat;
4472 oat_req->subcmd_code = oat_data.command;
4473
4474 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4475 &priv);
4476 if (!rc) {
4477 if (is_compat_task())
4478 tmp = compat_ptr(oat_data.ptr);
4479 else
4480 tmp = (void __user *)(unsigned long)oat_data.ptr;
4481
4482 if (copy_to_user(tmp, priv.buffer,
4483 priv.response_len)) {
4484 rc = -EFAULT;
4485 goto out_free;
4486 }
4487
4488 oat_data.response_len = priv.response_len;
4489
4490 if (copy_to_user(udata, &oat_data,
4491 sizeof(struct qeth_query_oat_data)))
4492 rc = -EFAULT;
4493 } else
4494 if (rc == IPA_RC_FFFF)
4495 rc = -EFAULT;
4496
4497out_free:
4498 kfree(priv.buffer);
4499out:
4500 return rc;
4501}
4502EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4503
4a71df50
FB		 4504static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4505{
4506 switch (card->info.type) {
4507 case QETH_CARD_TYPE_IQD:
4508 return 2;
4509 default:
4510 return 0;
4511 }
4512}
4513
d0ff1f52
UB		 4514static void qeth_determine_capabilities(struct qeth_card *card)
4515{
4516 int rc;
4517 int length;
4518 char *prcd;
4519 struct ccw_device *ddev;
4520 int ddev_offline = 0;
4521
4522 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4523 ddev = CARD_DDEV(card);
4524 if (!ddev->online) {
4525 ddev_offline = 1;
4526 rc = ccw_device_set_online(ddev);
4527 if (rc) {
4528 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4529 goto out;
4530 }
4531 }
4532
4533 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4534 if (rc) {
4535 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4536 dev_name(&card->gdev->dev), rc);
4537 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4538 goto out_offline;
4539 }
4540 qeth_configure_unitaddr(card, prcd);
4541 qeth_configure_blkt_default(card, prcd);
4542 kfree(prcd);
4543
4544 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4545 if (rc)
4546 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4547
0da9581d
EL		 4548 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4549 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4550 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4551 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4552 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4553 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4554 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4555 dev_info(&card->gdev->dev,
4556 "Completion Queueing supported\n");
4557 } else {
4558 card->options.cq = QETH_CQ_NOTAVAILABLE;
4559 }
4560
4561
d0ff1f52
UB		 4562out_offline:
4563 if (ddev_offline == 1)
4564 ccw_device_set_offline(ddev);
4565out:
4566 return;
4567}
4568
0da9581d
EL		 4569static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4570 struct qdio_buffer **in_sbal_ptrs,
4571 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4572 int i;
4573
4574 if (card->options.cq == QETH_CQ_ENABLED) {
4575 int offset = QDIO_MAX_BUFFERS_PER_Q *
4576 (card->qdio.no_in_queues - 1);
4577 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4578 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4579 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4580 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4581 }
4582
4583 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4584 }
4585}
4586
4a71df50
FB		 4587static int qeth_qdio_establish(struct qeth_card *card)
4588{
4589 struct qdio_initialize init_data;
4590 char *qib_param_field;
4591 struct qdio_buffer **in_sbal_ptrs;
104ea556 4592 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4593 struct qdio_buffer **out_sbal_ptrs;
4594 int i, j, k;
4595 int rc = 0;
4596
d11ba0c4 4597 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4598
4599 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4600 GFP_KERNEL);
104ea556 4601 if (!qib_param_field) {
4602 rc = -ENOMEM;
4603 goto out_free_nothing;
4604 }
4a71df50
FB		 4605
4606 qeth_create_qib_param_field(card, qib_param_field);
4607 qeth_create_qib_param_field_blkt(card, qib_param_field);
4608
b3332930 4609 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4610 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4611 GFP_KERNEL);
4612 if (!in_sbal_ptrs) {
104ea556 4613 rc = -ENOMEM;
4614 goto out_free_qib_param;
4a71df50 4615 }
0da9581d 4616 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4617 in_sbal_ptrs[i] = (struct qdio_buffer *)
4618 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4619 }
4a71df50 4620
0da9581d
EL		 4621 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4622 GFP_KERNEL);
104ea556 4623 if (!queue_start_poll) {
4624 rc = -ENOMEM;
4625 goto out_free_in_sbals;
4626 }
0da9581d
EL		 4627 for (i = 0; i < card->qdio.no_in_queues; ++i)
4628 queue_start_poll[i] = card->discipline.start_poll;
4629
4630 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4631
4a71df50 4632 out_sbal_ptrs =
b3332930 4633 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4634 sizeof(void *), GFP_KERNEL);
4635 if (!out_sbal_ptrs) {
104ea556 4636 rc = -ENOMEM;
4637 goto out_free_queue_start_poll;
4a71df50
FB		 4638 }
4639 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4640 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4641 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4642 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4643 }
4644
4645 memset(&init_data, 0, sizeof(struct qdio_initialize));
4646 init_data.cdev = CARD_DDEV(card);
4647 init_data.q_format = qeth_get_qdio_q_format(card);
4648 init_data.qib_param_field_format = 0;
4649 init_data.qib_param_field = qib_param_field;
0da9581d 4650 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50
FB		 4651 init_data.no_output_qs = card->qdio.no_out_queues;
4652 init_data.input_handler = card->discipline.input_handler;
4653 init_data.output_handler = card->discipline.output_handler;
e58b0d90 4654 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4655 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4656 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4657 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4658 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4659 init_data.scan_threshold =
4660 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4661
4662 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4663 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4664 rc = qdio_allocate(&init_data);
4665 if (rc) {
4666 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4667 goto out;
4668 }
4669 rc = qdio_establish(&init_data);
4670 if (rc) {
4a71df50 4671 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4672 qdio_free(CARD_DDEV(card));
4673 }
4a71df50 4674 }
0da9581d
EL		 4675
4676 switch (card->options.cq) {
4677 case QETH_CQ_ENABLED:
4678 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4679 break;
4680 case QETH_CQ_DISABLED:
4681 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4682 break;
4683 default:
4684 break;
4685 }
cc961d40 4686out:
4a71df50 4687 kfree(out_sbal_ptrs);
104ea556 4688out_free_queue_start_poll:
4689 kfree(queue_start_poll);
4690out_free_in_sbals:
4a71df50 4691 kfree(in_sbal_ptrs);
104ea556 4692out_free_qib_param:
4a71df50 4693 kfree(qib_param_field);
104ea556 4694out_free_nothing:
4a71df50
FB		 4695 return rc;
4696}
4697
4698static void qeth_core_free_card(struct qeth_card *card)
4699{
4700
d11ba0c4
PT		 4701 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4702 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4703 qeth_clean_channel(&card->read);
4704 qeth_clean_channel(&card->write);
4705 if (card->dev)
4706 free_netdev(card->dev);
4707 kfree(card->ip_tbd_list);
4708 qeth_free_qdio_buffers(card);
6bcac508 4709 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4710 kfree(card);
4711}
4712
4713static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4714 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4715 .driver_info = QETH_CARD_TYPE_OSD},
4716 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4717 .driver_info = QETH_CARD_TYPE_IQD},
4718 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4719 .driver_info = QETH_CARD_TYPE_OSN},
4720 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4721 .driver_info = QETH_CARD_TYPE_OSM},
4722 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4723 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4724 {},
4725};
4726MODULE_DEVICE_TABLE(ccw, qeth_ids);
4727
4728static struct ccw_driver qeth_ccw_driver = {
3bda058b 4729 .driver = {
3e70b3b8 4730 .owner = THIS_MODULE,
3bda058b
SO		 4731 .name = "qeth",
4732 },
4a71df50
FB		 4733 .ids = qeth_ids,
4734 .probe = ccwgroup_probe_ccwdev,
4735 .remove = ccwgroup_remove_ccwdev,
4736};
4737
4738static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4739 unsigned long driver_id)
4740{
022b660a
UB		 4741 return ccwgroup_create_from_string(root_dev, driver_id,
4742 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 4743}
4744
4745int qeth_core_hardsetup_card(struct qeth_card *card)
4746{
aa909224 4747 int retries = 0;
4a71df50
FB		 4748 int rc;
4749
d11ba0c4 4750 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4751 atomic_set(&card->force_alloc_skb, 0);
d0ff1f52 4752 qeth_get_channel_path_desc(card);
4a71df50 4753retry:
aa909224 4754 if (retries)
74eacdb9
FB		 4755 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4756 dev_name(&card->gdev->dev));
aa909224
UB		 4757 ccw_device_set_offline(CARD_DDEV(card));
4758 ccw_device_set_offline(CARD_WDEV(card));
4759 ccw_device_set_offline(CARD_RDEV(card));
4760 rc = ccw_device_set_online(CARD_RDEV(card));
4761 if (rc)
4762 goto retriable;
4763 rc = ccw_device_set_online(CARD_WDEV(card));
4764 if (rc)
4765 goto retriable;
4766 rc = ccw_device_set_online(CARD_DDEV(card));
4767 if (rc)
4768 goto retriable;
4a71df50 4769 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4770retriable:
4a71df50 4771 if (rc == -ERESTARTSYS) {
d11ba0c4 4772 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4773 return rc;
4774 } else if (rc) {
d11ba0c4 4775 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 4776 if (++retries > 3)
4a71df50
FB		 4777 goto out;
4778 else
4779 goto retry;
4780 }
d0ff1f52 4781 qeth_determine_capabilities(card);
4a71df50
FB		 4782 qeth_init_tokens(card);
4783 qeth_init_func_level(card);
4784 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4785 if (rc == -ERESTARTSYS) {
d11ba0c4 4786 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4787 return rc;
4788 } else if (rc) {
d11ba0c4 4789 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4790 if (--retries < 0)
4791 goto out;
4792 else
4793 goto retry;
4794 }
4795 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4796 if (rc == -ERESTARTSYS) {
d11ba0c4 4797 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4798 return rc;
4799 } else if (rc) {
d11ba0c4 4800 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4801 if (--retries < 0)
4802 goto out;
4803 else
4804 goto retry;
4805 }
908abbb5 4806 card->read_or_write_problem = 0;
4a71df50
FB		 4807 rc = qeth_mpc_initialize(card);
4808 if (rc) {
d11ba0c4 4809 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4810 goto out;
4811 }
1da74b1c
FB		 4812
4813 card->options.ipa4.supported_funcs = 0;
4814 card->options.adp.supported_funcs = 0;
4815 card->info.diagass_support = 0;
4816 qeth_query_ipassists(card, QETH_PROT_IPV4);
4817 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4818 qeth_query_setadapterparms(card);
4819 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4820 qeth_query_setdiagass(card);
4a71df50
FB		 4821 return 0;
4822out:
74eacdb9
FB		 4823 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4824 "an error on the device\n");
4825 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4826 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4827 return rc;
4828}
4829EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4830
b3332930
FB		 4831static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4832 struct qdio_buffer_element *element,
4a71df50
FB		 4833 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4834{
4835 struct page *page = virt_to_page(element->addr);
4836 if (*pskb == NULL) {
b3332930
FB		 4837 if (qethbuffer->rx_skb) {
4838 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4839 *pskb = qethbuffer->rx_skb;
4840 qethbuffer->rx_skb = NULL;
4841 } else {
4842 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4843 if (!(*pskb))
4844 return -ENOMEM;
4845 }
4846
4a71df50 4847 skb_reserve(*pskb, ETH_HLEN);
b3332930 4848 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 4849 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4850 data_len);
4851 } else {
4852 get_page(page);
b3332930
FB		 4853 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4854 element->addr + offset, QETH_RX_PULL_LEN);
4855 skb_fill_page_desc(*pskb, *pfrag, page,
4856 offset + QETH_RX_PULL_LEN,
4857 data_len - QETH_RX_PULL_LEN);
4858 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4859 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4860 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 4861 (*pfrag)++;
4862 }
4863 } else {
4864 get_page(page);
4865 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4866 (*pskb)->data_len += data_len;
4867 (*pskb)->len += data_len;
4868 (*pskb)->truesize += data_len;
4869 (*pfrag)++;
4870 }
0da9581d
EL		 4871
4872
4a71df50
FB		 4873 return 0;
4874}
4875
4876struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 4877 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 4878 struct qdio_buffer_element **__element, int *__offset,
4879 struct qeth_hdr **hdr)
4880{
4881 struct qdio_buffer_element *element = *__element;
b3332930 4882 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 4883 int offset = *__offset;
4884 struct sk_buff *skb = NULL;
76b11f8e 4885 int skb_len = 0;
4a71df50
FB		 4886 void *data_ptr;
4887 int data_len;
4888 int headroom = 0;
4889 int use_rx_sg = 0;
4890 int frag = 0;
4891
4a71df50
FB		 4892 /* qeth_hdr must not cross element boundaries */
4893 if (element->length < offset + sizeof(struct qeth_hdr)) {
4894 if (qeth_is_last_sbale(element))
4895 return NULL;
4896 element++;
4897 offset = 0;
4898 if (element->length < sizeof(struct qeth_hdr))
4899 return NULL;
4900 }
4901 *hdr = element->addr + offset;
4902
4903 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4904 switch ((*hdr)->hdr.l2.id) {
4905 case QETH_HEADER_TYPE_LAYER2:
4906 skb_len = (*hdr)->hdr.l2.pkt_length;
4907 break;
4908 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4909 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4910 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4911 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4912 headroom = TR_HLEN;
4913 else
4914 headroom = ETH_HLEN;
76b11f8e
UB		 4915 break;
4916 case QETH_HEADER_TYPE_OSN:
4917 skb_len = (*hdr)->hdr.osn.pdu_length;
4918 headroom = sizeof(struct qeth_hdr);
4919 break;
4920 default:
4921 break;
4a71df50
FB		 4922 }
4923
4924 if (!skb_len)
4925 return NULL;
4926
b3332930
FB		 4927 if (((skb_len >= card->options.rx_sg_cb) &&
4928 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4929 (!atomic_read(&card->force_alloc_skb))) ||
4930 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 4931 use_rx_sg = 1;
4932 } else {
4933 skb = dev_alloc_skb(skb_len + headroom);
4934 if (!skb)
4935 goto no_mem;
4936 if (headroom)
4937 skb_reserve(skb, headroom);
4938 }
4939
4940 data_ptr = element->addr + offset;
4941 while (skb_len) {
4942 data_len = min(skb_len, (int)(element->length - offset));
4943 if (data_len) {
4944 if (use_rx_sg) {
b3332930
FB		 4945 if (qeth_create_skb_frag(qethbuffer, element,
4946 &skb, offset, &frag, data_len))
4a71df50
FB		 4947 goto no_mem;
4948 } else {
4949 memcpy(skb_put(skb, data_len), data_ptr,
4950 data_len);
4951 }
4952 }
4953 skb_len -= data_len;
4954 if (skb_len) {
4955 if (qeth_is_last_sbale(element)) {
847a50fd 4956 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4957 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4958 dev_kfree_skb_any(skb);
4959 card->stats.rx_errors++;
4960 return NULL;
4961 }
4962 element++;
4963 offset = 0;
4964 data_ptr = element->addr;
4965 } else {
4966 offset += data_len;
4967 }
4968 }
4969 *__element = element;
4970 *__offset = offset;
4971 if (use_rx_sg && card->options.performance_stats) {
4972 card->perf_stats.sg_skbs_rx++;
4973 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4974 }
4975 return skb;
4976no_mem:
4977 if (net_ratelimit()) {
847a50fd 4978 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4979 }
4980 card->stats.rx_dropped++;
4981 return NULL;
4982}
4983EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4984
4985static void qeth_unregister_dbf_views(void)
4986{
d11ba0c4
PT		 4987 int x;
4988 for (x = 0; x < QETH_DBF_INFOS; x++) {
4989 debug_unregister(qeth_dbf[x].id);
4990 qeth_dbf[x].id = NULL;
4991 }
4a71df50
FB		 4992}
4993
8e96c51c 4994void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 4995{
4996 char dbf_txt_buf[32];
345aa66e 4997 va_list args;
cd023216 4998
8e96c51c 4999 if (level > id->level)
cd023216 5000 return;
345aa66e
PT		 5001 va_start(args, fmt);
5002 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5003 va_end(args);
8e96c51c 5004 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5005}
5006EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5007
4a71df50
FB		 5008static int qeth_register_dbf_views(void)
5009{
d11ba0c4
PT		 5010 int ret;
5011 int x;
5012
5013 for (x = 0; x < QETH_DBF_INFOS; x++) {
5014 /* register the areas */
5015 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5016 qeth_dbf[x].pages,
5017 qeth_dbf[x].areas,
5018 qeth_dbf[x].len);
5019 if (qeth_dbf[x].id == NULL) {
5020 qeth_unregister_dbf_views();
5021 return -ENOMEM;
5022 }
4a71df50 5023
d11ba0c4
PT		 5024 /* register a view */
5025 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5026 if (ret) {
5027 qeth_unregister_dbf_views();
5028 return ret;
5029 }
4a71df50 5030
d11ba0c4
PT		 5031 /* set a passing level */
5032 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5033 }
4a71df50
FB		 5034
5035 return 0;
5036}
5037
5038int qeth_core_load_discipline(struct qeth_card *card,
5039 enum qeth_discipline_id discipline)
5040{
5041 int rc = 0;
5042 switch (discipline) {
5043 case QETH_DISCIPLINE_LAYER3:
5044 card->discipline.ccwgdriver = try_then_request_module(
5045 symbol_get(qeth_l3_ccwgroup_driver),
5046 "qeth_l3");
5047 break;
5048 case QETH_DISCIPLINE_LAYER2:
5049 card->discipline.ccwgdriver = try_then_request_module(
5050 symbol_get(qeth_l2_ccwgroup_driver),
5051 "qeth_l2");
5052 break;
5053 }
5054 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 5055 dev_err(&card->gdev->dev, "There is no kernel module to "
5056 "support discipline %d\n", discipline);
4a71df50
FB		 5057 rc = -EINVAL;
5058 }
5059 return rc;
5060}
5061
5062void qeth_core_free_discipline(struct qeth_card *card)
5063{
5064 if (card->options.layer2)
5065 symbol_put(qeth_l2_ccwgroup_driver);
5066 else
5067 symbol_put(qeth_l3_ccwgroup_driver);
5068 card->discipline.ccwgdriver = NULL;
5069}
5070
5071static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5072{
5073 struct qeth_card *card;
5074 struct device *dev;
5075 int rc;
5076 unsigned long flags;
af039068 5077 char dbf_name[20];
4a71df50 5078
d11ba0c4 5079 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5080
5081 dev = &gdev->dev;
5082 if (!get_device(dev))
5083 return -ENODEV;
5084
2a0217d5 5085 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5086
5087 card = qeth_alloc_card();
5088 if (!card) {
d11ba0c4 5089 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5090 rc = -ENOMEM;
5091 goto err_dev;
5092 }
af039068
CO		 5093
5094 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5095 dev_name(&gdev->dev));
5096 card->debug = debug_register(dbf_name, 2, 1, 8);
5097 if (!card->debug) {
5098 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5099 rc = -ENOMEM;
5100 goto err_card;
5101 }
5102 debug_register_view(card->debug, &debug_hex_ascii_view);
5103
4a71df50
FB		 5104 card->read.ccwdev = gdev->cdev[0];
5105 card->write.ccwdev = gdev->cdev[1];
5106 card->data.ccwdev = gdev->cdev[2];
5107 dev_set_drvdata(&gdev->dev, card);
5108 card->gdev = gdev;
5109 gdev->cdev[0]->handler = qeth_irq;
5110 gdev->cdev[1]->handler = qeth_irq;
5111 gdev->cdev[2]->handler = qeth_irq;
5112
5113 rc = qeth_determine_card_type(card);
5114 if (rc) {
d11ba0c4 5115 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 5116 goto err_dbf;
4a71df50
FB		 5117 }
5118 rc = qeth_setup_card(card);
5119 if (rc) {
d11ba0c4 5120 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 5121 goto err_dbf;
4a71df50
FB		 5122 }
5123
5113fec0 5124 if (card->info.type == QETH_CARD_TYPE_OSN)
4a71df50 5125 rc = qeth_core_create_osn_attributes(dev);
5113fec0
UB		 5126 else
5127 rc = qeth_core_create_device_attributes(dev);
5128 if (rc)
af039068 5129 goto err_dbf;
5113fec0
UB		 5130 switch (card->info.type) {
5131 case QETH_CARD_TYPE_OSN:
5132 case QETH_CARD_TYPE_OSM:
4a71df50 5133 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0
UB		 5134 if (rc)
5135 goto err_attr;
4a71df50 5136 rc = card->discipline.ccwgdriver->probe(card->gdev);
4a71df50 5137 if (rc)
5113fec0
UB		 5138 goto err_disc;
5139 case QETH_CARD_TYPE_OSD:
5140 case QETH_CARD_TYPE_OSX:
5141 default:
5142 break;
4a71df50
FB		 5143 }
5144
5145 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5146 list_add_tail(&card->list, &qeth_core_card_list.list);
5147 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5148
5149 qeth_determine_capabilities(card);
4a71df50
FB		 5150 return 0;
5151
5113fec0
UB		 5152err_disc:
5153 qeth_core_free_discipline(card);
5154err_attr:
5155 if (card->info.type == QETH_CARD_TYPE_OSN)
5156 qeth_core_remove_osn_attributes(dev);
5157 else
5158 qeth_core_remove_device_attributes(dev);
af039068
CO		 5159err_dbf:
5160 debug_unregister(card->debug);
4a71df50
FB		 5161err_card:
5162 qeth_core_free_card(card);
5163err_dev:
5164 put_device(dev);
5165 return rc;
5166}
5167
5168static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5169{
5170 unsigned long flags;
5171 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5172
28a7e4c9 5173 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 5174
5175 if (card->info.type == QETH_CARD_TYPE_OSN) {
5176 qeth_core_remove_osn_attributes(&gdev->dev);
5177 } else {
5178 qeth_core_remove_device_attributes(&gdev->dev);
5179 }
9dc48ccc
UB		 5180
5181 if (card->discipline.ccwgdriver) {
5182 card->discipline.ccwgdriver->remove(gdev);
5183 qeth_core_free_discipline(card);
5184 }
5185
af039068 5186 debug_unregister(card->debug);
4a71df50
FB		 5187 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5188 list_del(&card->list);
5189 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5190 qeth_core_free_card(card);
5191 dev_set_drvdata(&gdev->dev, NULL);
5192 put_device(&gdev->dev);
5193 return;
5194}
5195
5196static int qeth_core_set_online(struct ccwgroup_device *gdev)
5197{
5198 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5199 int rc = 0;
5200 int def_discipline;
5201
5202 if (!card->discipline.ccwgdriver) {
5203 if (card->info.type == QETH_CARD_TYPE_IQD)
5204 def_discipline = QETH_DISCIPLINE_LAYER3;
5205 else
5206 def_discipline = QETH_DISCIPLINE_LAYER2;
5207 rc = qeth_core_load_discipline(card, def_discipline);
5208 if (rc)
5209 goto err;
5210 rc = card->discipline.ccwgdriver->probe(card->gdev);
5211 if (rc)
5212 goto err;
5213 }
5214 rc = card->discipline.ccwgdriver->set_online(gdev);
5215err:
5216 return rc;
5217}
5218
5219static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5220{
5221 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5222 return card->discipline.ccwgdriver->set_offline(gdev);
5223}
5224
5225static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5226{
5227 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5228 if (card->discipline.ccwgdriver &&
5229 card->discipline.ccwgdriver->shutdown)
5230 card->discipline.ccwgdriver->shutdown(gdev);
5231}
5232
bbcfcdc8
FB		 5233static int qeth_core_prepare(struct ccwgroup_device *gdev)
5234{
5235 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5236 if (card->discipline.ccwgdriver &&
5237 card->discipline.ccwgdriver->prepare)
5238 return card->discipline.ccwgdriver->prepare(gdev);
5239 return 0;
5240}
5241
5242static void qeth_core_complete(struct ccwgroup_device *gdev)
5243{
5244 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5245 if (card->discipline.ccwgdriver &&
5246 card->discipline.ccwgdriver->complete)
5247 card->discipline.ccwgdriver->complete(gdev);
5248}
5249
5250static int qeth_core_freeze(struct ccwgroup_device *gdev)
5251{
5252 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5253 if (card->discipline.ccwgdriver &&
5254 card->discipline.ccwgdriver->freeze)
5255 return card->discipline.ccwgdriver->freeze(gdev);
5256 return 0;
5257}
5258
5259static int qeth_core_thaw(struct ccwgroup_device *gdev)
5260{
5261 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5262 if (card->discipline.ccwgdriver &&
5263 card->discipline.ccwgdriver->thaw)
5264 return card->discipline.ccwgdriver->thaw(gdev);
5265 return 0;
5266}
5267
5268static int qeth_core_restore(struct ccwgroup_device *gdev)
5269{
5270 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5271 if (card->discipline.ccwgdriver &&
5272 card->discipline.ccwgdriver->restore)
5273 return card->discipline.ccwgdriver->restore(gdev);
5274 return 0;
5275}
5276
4a71df50 5277static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5278 .driver = {
5279 .owner = THIS_MODULE,
5280 .name = "qeth",
5281 },
4a71df50
FB		 5282 .driver_id = 0xD8C5E3C8,
5283 .probe = qeth_core_probe_device,
5284 .remove = qeth_core_remove_device,
5285 .set_online = qeth_core_set_online,
5286 .set_offline = qeth_core_set_offline,
5287 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5288 .prepare = qeth_core_prepare,
5289 .complete = qeth_core_complete,
5290 .freeze = qeth_core_freeze,
5291 .thaw = qeth_core_thaw,
5292 .restore = qeth_core_restore,
4a71df50
FB		 5293};
5294
5295static ssize_t
5296qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
5297 size_t count)
5298{
5299 int err;
5300 err = qeth_core_driver_group(buf, qeth_core_root_dev,
5301 qeth_core_ccwgroup_driver.driver_id);
5302 if (err)
5303 return err;
5304 else
5305 return count;
5306}
5307
5308static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5309
5310static struct {
5311 const char str[ETH_GSTRING_LEN];
5312} qeth_ethtool_stats_keys[] = {
5313/* 0 */{"rx skbs"},
5314 {"rx buffers"},
5315 {"tx skbs"},
5316 {"tx buffers"},
5317 {"tx skbs no packing"},
5318 {"tx buffers no packing"},
5319 {"tx skbs packing"},
5320 {"tx buffers packing"},
5321 {"tx sg skbs"},
5322 {"tx sg frags"},
5323/* 10 */{"rx sg skbs"},
5324 {"rx sg frags"},
5325 {"rx sg page allocs"},
5326 {"tx large kbytes"},
5327 {"tx large count"},
5328 {"tx pk state ch n->p"},
5329 {"tx pk state ch p->n"},
5330 {"tx pk watermark low"},
5331 {"tx pk watermark high"},
5332 {"queue 0 buffer usage"},
5333/* 20 */{"queue 1 buffer usage"},
5334 {"queue 2 buffer usage"},
5335 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5336 {"rx poll time"},
5337 {"rx poll count"},
4a71df50
FB		 5338 {"rx do_QDIO time"},
5339 {"rx do_QDIO count"},
5340 {"tx handler time"},
5341 {"tx handler count"},
5342 {"tx time"},
5343/* 30 */{"tx count"},
5344 {"tx do_QDIO time"},
5345 {"tx do_QDIO count"},
f61a0d05 5346 {"tx csum"},
c3b4a740 5347 {"tx lin"},
0da9581d
EL		 5348 {"cq handler count"},
5349 {"cq handler time"}
4a71df50
FB		 5350};
5351
df8b4ec8 5352int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5353{
df8b4ec8
BH		 5354 switch (stringset) {
5355 case ETH_SS_STATS:
5356 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5357 default:
5358 return -EINVAL;
5359 }
4a71df50 5360}
df8b4ec8 5361EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5362
5363void qeth_core_get_ethtool_stats(struct net_device *dev,
5364 struct ethtool_stats *stats, u64 *data)
5365{
509e2562 5366 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5367 data[0] = card->stats.rx_packets -
5368 card->perf_stats.initial_rx_packets;
5369 data[1] = card->perf_stats.bufs_rec;
5370 data[2] = card->stats.tx_packets -
5371 card->perf_stats.initial_tx_packets;
5372 data[3] = card->perf_stats.bufs_sent;
5373 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5374 - card->perf_stats.skbs_sent_pack;
5375 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5376 data[6] = card->perf_stats.skbs_sent_pack;
5377 data[7] = card->perf_stats.bufs_sent_pack;
5378 data[8] = card->perf_stats.sg_skbs_sent;
5379 data[9] = card->perf_stats.sg_frags_sent;
5380 data[10] = card->perf_stats.sg_skbs_rx;
5381 data[11] = card->perf_stats.sg_frags_rx;
5382 data[12] = card->perf_stats.sg_alloc_page_rx;
5383 data[13] = (card->perf_stats.large_send_bytes >> 10);
5384 data[14] = card->perf_stats.large_send_cnt;
5385 data[15] = card->perf_stats.sc_dp_p;
5386 data[16] = card->perf_stats.sc_p_dp;
5387 data[17] = QETH_LOW_WATERMARK_PACK;
5388 data[18] = QETH_HIGH_WATERMARK_PACK;
5389 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5390 data[20] = (card->qdio.no_out_queues > 1) ?
5391 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5392 data[21] = (card->qdio.no_out_queues > 2) ?
5393 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5394 data[22] = (card->qdio.no_out_queues > 3) ?
5395 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5396 data[23] = card->perf_stats.inbound_time;
5397 data[24] = card->perf_stats.inbound_cnt;
5398 data[25] = card->perf_stats.inbound_do_qdio_time;
5399 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5400 data[27] = card->perf_stats.outbound_handler_time;
5401 data[28] = card->perf_stats.outbound_handler_cnt;
5402 data[29] = card->perf_stats.outbound_time;
5403 data[30] = card->perf_stats.outbound_cnt;
5404 data[31] = card->perf_stats.outbound_do_qdio_time;
5405 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5406 data[33] = card->perf_stats.tx_csum;
c3b4a740 5407 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5408 data[35] = card->perf_stats.cq_cnt;
5409 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5410}
5411EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5412
5413void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5414{
5415 switch (stringset) {
5416 case ETH_SS_STATS:
5417 memcpy(data, &qeth_ethtool_stats_keys,
5418 sizeof(qeth_ethtool_stats_keys));
5419 break;
5420 default:
5421 WARN_ON(1);
5422 break;
5423 }
5424}
5425EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5426
5427void qeth_core_get_drvinfo(struct net_device *dev,
5428 struct ethtool_drvinfo *info)
5429{
509e2562 5430 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5431 if (card->options.layer2)
5432 strcpy(info->driver, "qeth_l2");
5433 else
5434 strcpy(info->driver, "qeth_l3");
5435
5436 strcpy(info->version, "1.0");
5437 strcpy(info->fw_version, card->info.mcl_level);
5438 sprintf(info->bus_info, "%s/%s/%s",
5439 CARD_RDEV_ID(card),
5440 CARD_WDEV_ID(card),
5441 CARD_DDEV_ID(card));
5442}
5443EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5444
3f9975aa
FB		 5445int qeth_core_ethtool_get_settings(struct net_device *netdev,
5446 struct ethtool_cmd *ecmd)
5447{
509e2562 5448 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5449 enum qeth_link_types link_type;
5450
5451 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5452 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5453 else
5454 link_type = card->info.link_type;
5455
5456 ecmd->transceiver = XCVR_INTERNAL;
5457 ecmd->supported = SUPPORTED_Autoneg;
5458 ecmd->advertising = ADVERTISED_Autoneg;
5459 ecmd->duplex = DUPLEX_FULL;
5460 ecmd->autoneg = AUTONEG_ENABLE;
5461
5462 switch (link_type) {
5463 case QETH_LINK_TYPE_FAST_ETH:
5464 case QETH_LINK_TYPE_LANE_ETH100:
5465 ecmd->supported |= SUPPORTED_10baseT_Half |
5466 SUPPORTED_10baseT_Full |
5467 SUPPORTED_100baseT_Half |
5468 SUPPORTED_100baseT_Full |
5469 SUPPORTED_TP;
5470 ecmd->advertising |= ADVERTISED_10baseT_Half |
5471 ADVERTISED_10baseT_Full |
5472 ADVERTISED_100baseT_Half |
5473 ADVERTISED_100baseT_Full |
5474 ADVERTISED_TP;
5475 ecmd->speed = SPEED_100;
5476 ecmd->port = PORT_TP;
5477 break;
5478
5479 case QETH_LINK_TYPE_GBIT_ETH:
5480 case QETH_LINK_TYPE_LANE_ETH1000:
5481 ecmd->supported |= SUPPORTED_10baseT_Half |
5482 SUPPORTED_10baseT_Full |
5483 SUPPORTED_100baseT_Half |
5484 SUPPORTED_100baseT_Full |
5485 SUPPORTED_1000baseT_Half |
5486 SUPPORTED_1000baseT_Full |
5487 SUPPORTED_FIBRE;
5488 ecmd->advertising |= ADVERTISED_10baseT_Half |
5489 ADVERTISED_10baseT_Full |
5490 ADVERTISED_100baseT_Half |
5491 ADVERTISED_100baseT_Full |
5492 ADVERTISED_1000baseT_Half |
5493 ADVERTISED_1000baseT_Full |
5494 ADVERTISED_FIBRE;
5495 ecmd->speed = SPEED_1000;
5496 ecmd->port = PORT_FIBRE;
5497 break;
5498
5499 case QETH_LINK_TYPE_10GBIT_ETH:
5500 ecmd->supported |= SUPPORTED_10baseT_Half |
5501 SUPPORTED_10baseT_Full |
5502 SUPPORTED_100baseT_Half |
5503 SUPPORTED_100baseT_Full |
5504 SUPPORTED_1000baseT_Half |
5505 SUPPORTED_1000baseT_Full |
5506 SUPPORTED_10000baseT_Full |
5507 SUPPORTED_FIBRE;
5508 ecmd->advertising |= ADVERTISED_10baseT_Half |
5509 ADVERTISED_10baseT_Full |
5510 ADVERTISED_100baseT_Half |
5511 ADVERTISED_100baseT_Full |
5512 ADVERTISED_1000baseT_Half |
5513 ADVERTISED_1000baseT_Full |
5514 ADVERTISED_10000baseT_Full |
5515 ADVERTISED_FIBRE;
5516 ecmd->speed = SPEED_10000;
5517 ecmd->port = PORT_FIBRE;
5518 break;
5519
5520 default:
5521 ecmd->supported |= SUPPORTED_10baseT_Half |
5522 SUPPORTED_10baseT_Full |
5523 SUPPORTED_TP;
5524 ecmd->advertising |= ADVERTISED_10baseT_Half |
5525 ADVERTISED_10baseT_Full |
5526 ADVERTISED_TP;
5527 ecmd->speed = SPEED_10;
5528 ecmd->port = PORT_TP;
5529 }
5530
5531 return 0;
5532}
5533EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5534
4a71df50
FB		 5535static int __init qeth_core_init(void)
5536{
5537 int rc;
5538
74eacdb9 5539 pr_info("loading core functions\n");
4a71df50
FB		 5540 INIT_LIST_HEAD(&qeth_core_card_list.list);
5541 rwlock_init(&qeth_core_card_list.rwlock);
5542
5543 rc = qeth_register_dbf_views();
5544 if (rc)
5545 goto out_err;
5546 rc = ccw_driver_register(&qeth_ccw_driver);
5547 if (rc)
5548 goto ccw_err;
5549 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5550 if (rc)
5551 goto ccwgroup_err;
5552 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
5553 &driver_attr_group);
5554 if (rc)
5555 goto driver_err;
035da16f 5556 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5557 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5558 if (rc)
5559 goto register_err;
4a71df50 5560
683d718a
FB		 5561 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5562 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5563 if (!qeth_core_header_cache) {
5564 rc = -ENOMEM;
5565 goto slab_err;
5566 }
5567
0da9581d
EL		 5568 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5569 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5570 if (!qeth_qdio_outbuf_cache) {
5571 rc = -ENOMEM;
5572 goto cqslab_err;
5573 }
5574
683d718a 5575 return 0;
0da9581d
EL		 5576cqslab_err:
5577 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5578slab_err:
035da16f 5579 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5580register_err:
5581 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5582 &driver_attr_group);
5583driver_err:
5584 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5585ccwgroup_err:
5586 ccw_driver_unregister(&qeth_ccw_driver);
5587ccw_err:
74eacdb9 5588 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 5589 qeth_unregister_dbf_views();
5590out_err:
74eacdb9 5591 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5592 return rc;
5593}
5594
5595static void __exit qeth_core_exit(void)
5596{
035da16f 5597 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5598 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5599 &driver_attr_group);
5600 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5601 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5602 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5603 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 5604 qeth_unregister_dbf_views();
74eacdb9 5605 pr_info("core functions removed\n");
4a71df50
FB		 5606}
5607
5608module_init(qeth_core_init);
5609module_exit(qeth_core_exit);
5610MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5611MODULE_DESCRIPTION("qeth core functions");
5612MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)