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net: usb: smsc95xx: fix mtu
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
b3332930 24#include <net/iucv/af_iucv.h>
4a71df50 25
ab4227cb
MS		 26#include <asm/ebcdic.h>
27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 54static struct mutex qeth_mod_mutex;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
0da9581d 63static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 64static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
65 struct qeth_qdio_out_buffer *buf,
66 enum iucv_tx_notify notification);
67static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 68static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
69 struct qeth_qdio_out_buffer *buf,
70 enum qeth_qdio_buffer_states newbufstate);
72861ae7 71static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 72
4a71df50
FB		 73static inline const char *qeth_get_cardname(struct qeth_card *card)
74{
75 if (card->info.guestlan) {
76 switch (card->info.type) {
5113fec0 77 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 78 return " Guest LAN QDIO";
79 case QETH_CARD_TYPE_IQD:
80 return " Guest LAN Hiper";
5113fec0
UB		 81 case QETH_CARD_TYPE_OSM:
82 return " Guest LAN QDIO - OSM";
83 case QETH_CARD_TYPE_OSX:
84 return " Guest LAN QDIO - OSX";
4a71df50
FB		 85 default:
86 return " unknown";
87 }
88 } else {
89 switch (card->info.type) {
5113fec0 90 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 91 return " OSD Express";
92 case QETH_CARD_TYPE_IQD:
93 return " HiperSockets";
94 case QETH_CARD_TYPE_OSN:
95 return " OSN QDIO";
5113fec0
UB		 96 case QETH_CARD_TYPE_OSM:
97 return " OSM QDIO";
98 case QETH_CARD_TYPE_OSX:
99 return " OSX QDIO";
4a71df50
FB		 100 default:
101 return " unknown";
102 }
103 }
104 return " n/a";
105}
106
107/* max length to be returned: 14 */
108const char *qeth_get_cardname_short(struct qeth_card *card)
109{
110 if (card->info.guestlan) {
111 switch (card->info.type) {
5113fec0 112 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 113 return "GuestLAN QDIO";
114 case QETH_CARD_TYPE_IQD:
115 return "GuestLAN Hiper";
5113fec0
UB		 116 case QETH_CARD_TYPE_OSM:
117 return "GuestLAN OSM";
118 case QETH_CARD_TYPE_OSX:
119 return "GuestLAN OSX";
4a71df50
FB		 120 default:
121 return "unknown";
122 }
123 } else {
124 switch (card->info.type) {
5113fec0 125 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 126 switch (card->info.link_type) {
127 case QETH_LINK_TYPE_FAST_ETH:
128 return "OSD_100";
129 case QETH_LINK_TYPE_HSTR:
130 return "HSTR";
131 case QETH_LINK_TYPE_GBIT_ETH:
132 return "OSD_1000";
133 case QETH_LINK_TYPE_10GBIT_ETH:
134 return "OSD_10GIG";
135 case QETH_LINK_TYPE_LANE_ETH100:
136 return "OSD_FE_LANE";
137 case QETH_LINK_TYPE_LANE_TR:
138 return "OSD_TR_LANE";
139 case QETH_LINK_TYPE_LANE_ETH1000:
140 return "OSD_GbE_LANE";
141 case QETH_LINK_TYPE_LANE:
142 return "OSD_ATM_LANE";
143 default:
144 return "OSD_Express";
145 }
146 case QETH_CARD_TYPE_IQD:
147 return "HiperSockets";
148 case QETH_CARD_TYPE_OSN:
149 return "OSN";
5113fec0
UB		 150 case QETH_CARD_TYPE_OSM:
151 return "OSM_1000";
152 case QETH_CARD_TYPE_OSX:
153 return "OSX_10GIG";
4a71df50
FB		 154 default:
155 return "unknown";
156 }
157 }
158 return "n/a";
159}
160
161void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
162 int clear_start_mask)
163{
164 unsigned long flags;
165
166 spin_lock_irqsave(&card->thread_mask_lock, flags);
167 card->thread_allowed_mask = threads;
168 if (clear_start_mask)
169 card->thread_start_mask &= threads;
170 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
171 wake_up(&card->wait_q);
172}
173EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
174
175int qeth_threads_running(struct qeth_card *card, unsigned long threads)
176{
177 unsigned long flags;
178 int rc = 0;
179
180 spin_lock_irqsave(&card->thread_mask_lock, flags);
181 rc = (card->thread_running_mask & threads);
182 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
183 return rc;
184}
185EXPORT_SYMBOL_GPL(qeth_threads_running);
186
187int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
188{
189 return wait_event_interruptible(card->wait_q,
190 qeth_threads_running(card, threads) == 0);
191}
192EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
193
194void qeth_clear_working_pool_list(struct qeth_card *card)
195{
196 struct qeth_buffer_pool_entry *pool_entry, *tmp;
197
847a50fd 198 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 199 list_for_each_entry_safe(pool_entry, tmp,
200 &card->qdio.in_buf_pool.entry_list, list){
201 list_del(&pool_entry->list);
202 }
203}
204EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
205
206static int qeth_alloc_buffer_pool(struct qeth_card *card)
207{
208 struct qeth_buffer_pool_entry *pool_entry;
209 void *ptr;
210 int i, j;
211
847a50fd 212 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 213 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 214 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 215 if (!pool_entry) {
216 qeth_free_buffer_pool(card);
217 return -ENOMEM;
218 }
219 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 220 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 221 if (!ptr) {
222 while (j > 0)
223 free_page((unsigned long)
224 pool_entry->elements[--j]);
225 kfree(pool_entry);
226 qeth_free_buffer_pool(card);
227 return -ENOMEM;
228 }
229 pool_entry->elements[j] = ptr;
230 }
231 list_add(&pool_entry->init_list,
232 &card->qdio.init_pool.entry_list);
233 }
234 return 0;
235}
236
237int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
238{
847a50fd 239 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 240
241 if ((card->state != CARD_STATE_DOWN) &&
242 (card->state != CARD_STATE_RECOVER))
243 return -EPERM;
244
245 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
246 qeth_clear_working_pool_list(card);
247 qeth_free_buffer_pool(card);
248 card->qdio.in_buf_pool.buf_count = bufcnt;
249 card->qdio.init_pool.buf_count = bufcnt;
250 return qeth_alloc_buffer_pool(card);
251}
76b11f8e 252EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 253
0da9581d
EL		 254static inline int qeth_cq_init(struct qeth_card *card)
255{
256 int rc;
257
258 if (card->options.cq == QETH_CQ_ENABLED) {
259 QETH_DBF_TEXT(SETUP, 2, "cqinit");
260 memset(card->qdio.c_q->qdio_bufs, 0,
261 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
262 card->qdio.c_q->next_buf_to_init = 127;
263 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
264 card->qdio.no_in_queues - 1, 0,
265 127);
266 if (rc) {
267 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
268 goto out;
269 }
270 }
271 rc = 0;
272out:
273 return rc;
274}
275
276static inline int qeth_alloc_cq(struct qeth_card *card)
277{
278 int rc;
279
280 if (card->options.cq == QETH_CQ_ENABLED) {
281 int i;
282 struct qdio_outbuf_state *outbuf_states;
283
284 QETH_DBF_TEXT(SETUP, 2, "cqon");
285 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
286 GFP_KERNEL);
287 if (!card->qdio.c_q) {
288 rc = -1;
289 goto kmsg_out;
290 }
291 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
292
293 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
294 card->qdio.c_q->bufs[i].buffer =
295 &card->qdio.c_q->qdio_bufs[i];
296 }
297
298 card->qdio.no_in_queues = 2;
299
300 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
301 kzalloc(card->qdio.no_out_queues *
302 QDIO_MAX_BUFFERS_PER_Q *
303 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
304 outbuf_states = card->qdio.out_bufstates;
305 if (outbuf_states == NULL) {
306 rc = -1;
307 goto free_cq_out;
308 }
309 for (i = 0; i < card->qdio.no_out_queues; ++i) {
310 card->qdio.out_qs[i]->bufstates = outbuf_states;
311 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
312 }
313 } else {
314 QETH_DBF_TEXT(SETUP, 2, "nocq");
315 card->qdio.c_q = NULL;
316 card->qdio.no_in_queues = 1;
317 }
318 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
319 rc = 0;
320out:
321 return rc;
322free_cq_out:
323 kfree(card->qdio.c_q);
324 card->qdio.c_q = NULL;
325kmsg_out:
326 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
327 goto out;
328}
329
330static inline void qeth_free_cq(struct qeth_card *card)
331{
332 if (card->qdio.c_q) {
333 --card->qdio.no_in_queues;
334 kfree(card->qdio.c_q);
335 card->qdio.c_q = NULL;
336 }
337 kfree(card->qdio.out_bufstates);
338 card->qdio.out_bufstates = NULL;
339}
340
b3332930
FB		 341static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
342 int delayed) {
343 enum iucv_tx_notify n;
344
345 switch (sbalf15) {
346 case 0:
347 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
348 break;
349 case 4:
350 case 16:
351 case 17:
352 case 18:
353 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
354 TX_NOTIFY_UNREACHABLE;
355 break;
356 default:
357 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
358 TX_NOTIFY_GENERALERROR;
359 break;
360 }
361
362 return n;
363}
364
0da9581d
EL		 365static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
366 int bidx, int forced_cleanup)
367{
72861ae7
EL		 368 if (q->card->options.cq != QETH_CQ_ENABLED)
369 return;
370
0da9581d
EL		 371 if (q->bufs[bidx]->next_pending != NULL) {
372 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
373 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
374
375 while (c) {
376 if (forced_cleanup ||
377 atomic_read(&c->state) ==
378 QETH_QDIO_BUF_HANDLED_DELAYED) {
379 struct qeth_qdio_out_buffer *f = c;
380 QETH_CARD_TEXT(f->q->card, 5, "fp");
381 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 382 /* release here to avoid interleaving between
383 outbound tasklet and inbound tasklet
384 regarding notifications and lifecycle */
385 qeth_release_skbs(c);
386
0da9581d
EL		 387 c = f->next_pending;
388 BUG_ON(head->next_pending != f);
389 head->next_pending = c;
390 kmem_cache_free(qeth_qdio_outbuf_cache, f);
391 } else {
392 head = c;
393 c = c->next_pending;
394 }
395
396 }
397 }
72861ae7
EL		 398 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
399 QETH_QDIO_BUF_HANDLED_DELAYED)) {
400 /* for recovery situations */
401 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
402 qeth_init_qdio_out_buf(q, bidx);
403 QETH_CARD_TEXT(q->card, 2, "clprecov");
404 }
0da9581d
EL		 405}
406
407
408static inline void qeth_qdio_handle_aob(struct qeth_card *card,
409 unsigned long phys_aob_addr) {
410 struct qaob *aob;
411 struct qeth_qdio_out_buffer *buffer;
b3332930 412 enum iucv_tx_notify notification;
0da9581d
EL		 413
414 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
415 QETH_CARD_TEXT(card, 5, "haob");
416 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
417 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
418 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
419
420 BUG_ON(buffer == NULL);
421
b3332930
FB		 422 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
423 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
424 notification = TX_NOTIFY_OK;
425 } else {
426 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
b3332930
FB		 427 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
428 notification = TX_NOTIFY_DELAYED_OK;
429 }
430
431 if (aob->aorc != 0) {
432 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
433 notification = qeth_compute_cq_notification(aob->aorc, 1);
434 }
435 qeth_notify_skbs(buffer->q, buffer, notification);
436
0da9581d
EL		 437 buffer->aob = NULL;
438 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 439 QETH_QDIO_BUF_HANDLED_DELAYED);
440
0da9581d
EL		 441 /* from here on: do not touch buffer anymore */
442 qdio_release_aob(aob);
443}
444
445static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
446{
447 return card->options.cq == QETH_CQ_ENABLED &&
448 card->qdio.c_q != NULL &&
449 queue != 0 &&
450 queue == card->qdio.no_in_queues - 1;
451}
452
453
4a71df50
FB		 454static int qeth_issue_next_read(struct qeth_card *card)
455{
456 int rc;
457 struct qeth_cmd_buffer *iob;
458
847a50fd 459 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 460 if (card->read.state != CH_STATE_UP)
461 return -EIO;
462 iob = qeth_get_buffer(&card->read);
463 if (!iob) {
74eacdb9
FB		 464 dev_warn(&card->gdev->dev, "The qeth device driver "
465 "failed to recover an error on the device\n");
466 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
467 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 468 return -ENOMEM;
469 }
470 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 471 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 472 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
473 (addr_t) iob, 0, 0);
474 if (rc) {
74eacdb9
FB		 475 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
476 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 477 atomic_set(&card->read.irq_pending, 0);
908abbb5 478 card->read_or_write_problem = 1;
4a71df50
FB		 479 qeth_schedule_recovery(card);
480 wake_up(&card->wait_q);
481 }
482 return rc;
483}
484
485static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
486{
487 struct qeth_reply *reply;
488
489 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
490 if (reply) {
491 atomic_set(&reply->refcnt, 1);
492 atomic_set(&reply->received, 0);
493 reply->card = card;
494 };
495 return reply;
496}
497
498static void qeth_get_reply(struct qeth_reply *reply)
499{
500 WARN_ON(atomic_read(&reply->refcnt) <= 0);
501 atomic_inc(&reply->refcnt);
502}
503
504static void qeth_put_reply(struct qeth_reply *reply)
505{
506 WARN_ON(atomic_read(&reply->refcnt) <= 0);
507 if (atomic_dec_and_test(&reply->refcnt))
508 kfree(reply);
509}
510
d11ba0c4 511static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 512 struct qeth_card *card)
513{
4a71df50 514 char *ipa_name;
d11ba0c4 515 int com = cmd->hdr.command;
4a71df50 516 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 517 if (rc)
70919e23
UB		 518 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
519 "x%X \"%s\"\n",
520 ipa_name, com, dev_name(&card->gdev->dev),
521 QETH_CARD_IFNAME(card), rc,
522 qeth_get_ipa_msg(rc));
d11ba0c4 523 else
70919e23
UB		 524 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
525 ipa_name, com, dev_name(&card->gdev->dev),
526 QETH_CARD_IFNAME(card));
4a71df50
FB		 527}
528
529static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
530 struct qeth_cmd_buffer *iob)
531{
532 struct qeth_ipa_cmd *cmd = NULL;
533
847a50fd 534 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 535 if (IS_IPA(iob->data)) {
536 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
537 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 538 if (cmd->hdr.command != IPA_CMD_SETCCID &&
539 cmd->hdr.command != IPA_CMD_DELCCID &&
540 cmd->hdr.command != IPA_CMD_MODCCID &&
541 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 542 qeth_issue_ipa_msg(cmd,
543 cmd->hdr.return_code, card);
4a71df50
FB		 544 return cmd;
545 } else {
546 switch (cmd->hdr.command) {
547 case IPA_CMD_STOPLAN:
74eacdb9
FB		 548 dev_warn(&card->gdev->dev,
549 "The link for interface %s on CHPID"
550 " 0x%X failed\n",
4a71df50
FB		 551 QETH_CARD_IFNAME(card),
552 card->info.chpid);
553 card->lan_online = 0;
554 if (card->dev && netif_carrier_ok(card->dev))
555 netif_carrier_off(card->dev);
556 return NULL;
557 case IPA_CMD_STARTLAN:
74eacdb9
FB		 558 dev_info(&card->gdev->dev,
559 "The link for %s on CHPID 0x%X has"
560 " been restored\n",
4a71df50
FB		 561 QETH_CARD_IFNAME(card),
562 card->info.chpid);
563 netif_carrier_on(card->dev);
922dc062 564 card->lan_online = 1;
1da74b1c
FB		 565 if (card->info.hwtrap)
566 card->info.hwtrap = 2;
4a71df50
FB		 567 qeth_schedule_recovery(card);
568 return NULL;
569 case IPA_CMD_MODCCID:
570 return cmd;
571 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 572 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 573 break;
574 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 575 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 576 break;
577 default:
c4cef07c 578 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 579 "but not a reply!\n");
580 break;
581 }
582 }
583 }
584 return cmd;
585}
586
587void qeth_clear_ipacmd_list(struct qeth_card *card)
588{
589 struct qeth_reply *reply, *r;
590 unsigned long flags;
591
847a50fd 592 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 593
594 spin_lock_irqsave(&card->lock, flags);
595 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
596 qeth_get_reply(reply);
597 reply->rc = -EIO;
598 atomic_inc(&reply->received);
599 list_del_init(&reply->list);
600 wake_up(&reply->wait_q);
601 qeth_put_reply(reply);
602 }
603 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 604 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 605}
606EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
607
5113fec0
UB		 608static int qeth_check_idx_response(struct qeth_card *card,
609 unsigned char *buffer)
4a71df50
FB		 610{
611 if (!buffer)
612 return 0;
613
d11ba0c4 614 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 615 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 616 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 617 "with cause code 0x%02x%s\n",
618 buffer[4],
619 ((buffer[4] == 0x22) ?
620 " -- try another portname" : ""));
847a50fd
CO		 621 QETH_CARD_TEXT(card, 2, "ckidxres");
622 QETH_CARD_TEXT(card, 2, " idxterm");
623 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 624 if (buffer[4] == 0xf6) {
625 dev_err(&card->gdev->dev,
626 "The qeth device is not configured "
627 "for the OSI layer required by z/VM\n");
628 return -EPERM;
629 }
4a71df50
FB		 630 return -EIO;
631 }
632 return 0;
633}
634
635static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
636 __u32 len)
637{
638 struct qeth_card *card;
639
4a71df50 640 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 641 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 642 if (channel == &card->read)
643 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
644 else
645 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
646 channel->ccw.count = len;
647 channel->ccw.cda = (__u32) __pa(iob);
648}
649
650static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
651{
652 __u8 index;
653
847a50fd 654 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 655 index = channel->io_buf_no;
656 do {
657 if (channel->iob[index].state == BUF_STATE_FREE) {
658 channel->iob[index].state = BUF_STATE_LOCKED;
659 channel->io_buf_no = (channel->io_buf_no + 1) %
660 QETH_CMD_BUFFER_NO;
661 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
662 return channel->iob + index;
663 }
664 index = (index + 1) % QETH_CMD_BUFFER_NO;
665 } while (index != channel->io_buf_no);
666
667 return NULL;
668}
669
670void qeth_release_buffer(struct qeth_channel *channel,
671 struct qeth_cmd_buffer *iob)
672{
673 unsigned long flags;
674
847a50fd 675 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 676 spin_lock_irqsave(&channel->iob_lock, flags);
677 memset(iob->data, 0, QETH_BUFSIZE);
678 iob->state = BUF_STATE_FREE;
679 iob->callback = qeth_send_control_data_cb;
680 iob->rc = 0;
681 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 682 wake_up(&channel->wait_q);
4a71df50
FB		 683}
684EXPORT_SYMBOL_GPL(qeth_release_buffer);
685
686static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
687{
688 struct qeth_cmd_buffer *buffer = NULL;
689 unsigned long flags;
690
691 spin_lock_irqsave(&channel->iob_lock, flags);
692 buffer = __qeth_get_buffer(channel);
693 spin_unlock_irqrestore(&channel->iob_lock, flags);
694 return buffer;
695}
696
697struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
698{
699 struct qeth_cmd_buffer *buffer;
700 wait_event(channel->wait_q,
701 ((buffer = qeth_get_buffer(channel)) != NULL));
702 return buffer;
703}
704EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
705
706void qeth_clear_cmd_buffers(struct qeth_channel *channel)
707{
708 int cnt;
709
710 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
711 qeth_release_buffer(channel, &channel->iob[cnt]);
712 channel->buf_no = 0;
713 channel->io_buf_no = 0;
714}
715EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
716
717static void qeth_send_control_data_cb(struct qeth_channel *channel,
718 struct qeth_cmd_buffer *iob)
719{
720 struct qeth_card *card;
721 struct qeth_reply *reply, *r;
722 struct qeth_ipa_cmd *cmd;
723 unsigned long flags;
724 int keep_reply;
5113fec0 725 int rc = 0;
4a71df50 726
4a71df50 727 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 728 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 729 rc = qeth_check_idx_response(card, iob->data);
730 switch (rc) {
731 case 0:
732 break;
733 case -EIO:
4a71df50 734 qeth_clear_ipacmd_list(card);
5113fec0 735 qeth_schedule_recovery(card);
01fc3e86 736 /* fall through */
5113fec0 737 default:
4a71df50
FB		 738 goto out;
739 }
740
741 cmd = qeth_check_ipa_data(card, iob);
742 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
743 goto out;
744 /*in case of OSN : check if cmd is set */
745 if (card->info.type == QETH_CARD_TYPE_OSN &&
746 cmd &&
747 cmd->hdr.command != IPA_CMD_STARTLAN &&
748 card->osn_info.assist_cb != NULL) {
749 card->osn_info.assist_cb(card->dev, cmd);
750 goto out;
751 }
752
753 spin_lock_irqsave(&card->lock, flags);
754 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
755 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
756 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
757 qeth_get_reply(reply);
758 list_del_init(&reply->list);
759 spin_unlock_irqrestore(&card->lock, flags);
760 keep_reply = 0;
761 if (reply->callback != NULL) {
762 if (cmd) {
763 reply->offset = (__u16)((char *)cmd -
764 (char *)iob->data);
765 keep_reply = reply->callback(card,
766 reply,
767 (unsigned long)cmd);
768 } else
769 keep_reply = reply->callback(card,
770 reply,
771 (unsigned long)iob);
772 }
773 if (cmd)
774 reply->rc = (u16) cmd->hdr.return_code;
775 else if (iob->rc)
776 reply->rc = iob->rc;
777 if (keep_reply) {
778 spin_lock_irqsave(&card->lock, flags);
779 list_add_tail(&reply->list,
780 &card->cmd_waiter_list);
781 spin_unlock_irqrestore(&card->lock, flags);
782 } else {
783 atomic_inc(&reply->received);
784 wake_up(&reply->wait_q);
785 }
786 qeth_put_reply(reply);
787 goto out;
788 }
789 }
790 spin_unlock_irqrestore(&card->lock, flags);
791out:
792 memcpy(&card->seqno.pdu_hdr_ack,
793 QETH_PDU_HEADER_SEQ_NO(iob->data),
794 QETH_SEQ_NO_LENGTH);
795 qeth_release_buffer(channel, iob);
796}
797
798static int qeth_setup_channel(struct qeth_channel *channel)
799{
800 int cnt;
801
d11ba0c4 802 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 803 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 804 channel->iob[cnt].data =
b3332930 805 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 806 if (channel->iob[cnt].data == NULL)
807 break;
808 channel->iob[cnt].state = BUF_STATE_FREE;
809 channel->iob[cnt].channel = channel;
810 channel->iob[cnt].callback = qeth_send_control_data_cb;
811 channel->iob[cnt].rc = 0;
812 }
813 if (cnt < QETH_CMD_BUFFER_NO) {
814 while (cnt-- > 0)
815 kfree(channel->iob[cnt].data);
816 return -ENOMEM;
817 }
818 channel->buf_no = 0;
819 channel->io_buf_no = 0;
820 atomic_set(&channel->irq_pending, 0);
821 spin_lock_init(&channel->iob_lock);
822
823 init_waitqueue_head(&channel->wait_q);
824 return 0;
825}
826
827static int qeth_set_thread_start_bit(struct qeth_card *card,
828 unsigned long thread)
829{
830 unsigned long flags;
831
832 spin_lock_irqsave(&card->thread_mask_lock, flags);
833 if (!(card->thread_allowed_mask & thread) ||
834 (card->thread_start_mask & thread)) {
835 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
836 return -EPERM;
837 }
838 card->thread_start_mask |= thread;
839 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
840 return 0;
841}
842
843void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
844{
845 unsigned long flags;
846
847 spin_lock_irqsave(&card->thread_mask_lock, flags);
848 card->thread_start_mask &= ~thread;
849 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
850 wake_up(&card->wait_q);
851}
852EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
853
854void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
855{
856 unsigned long flags;
857
858 spin_lock_irqsave(&card->thread_mask_lock, flags);
859 card->thread_running_mask &= ~thread;
860 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
861 wake_up(&card->wait_q);
862}
863EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
864
865static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
866{
867 unsigned long flags;
868 int rc = 0;
869
870 spin_lock_irqsave(&card->thread_mask_lock, flags);
871 if (card->thread_start_mask & thread) {
872 if ((card->thread_allowed_mask & thread) &&
873 !(card->thread_running_mask & thread)) {
874 rc = 1;
875 card->thread_start_mask &= ~thread;
876 card->thread_running_mask |= thread;
877 } else
878 rc = -EPERM;
879 }
880 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
881 return rc;
882}
883
884int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
885{
886 int rc = 0;
887
888 wait_event(card->wait_q,
889 (rc = __qeth_do_run_thread(card, thread)) >= 0);
890 return rc;
891}
892EXPORT_SYMBOL_GPL(qeth_do_run_thread);
893
894void qeth_schedule_recovery(struct qeth_card *card)
895{
847a50fd 896 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 897 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
898 schedule_work(&card->kernel_thread_starter);
899}
900EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
901
902static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
903{
904 int dstat, cstat;
905 char *sense;
847a50fd 906 struct qeth_card *card;
4a71df50
FB		 907
908 sense = (char *) irb->ecw;
23d805b6
PO		 909 cstat = irb->scsw.cmd.cstat;
910 dstat = irb->scsw.cmd.dstat;
847a50fd 911 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 912
913 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
914 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
915 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 916 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 917 dev_warn(&cdev->dev, "The qeth device driver "
918 "failed to recover an error on the device\n");
5113fec0 919 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 920 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 921 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
922 16, 1, irb, 64, 1);
923 return 1;
924 }
925
926 if (dstat & DEV_STAT_UNIT_CHECK) {
927 if (sense[SENSE_RESETTING_EVENT_BYTE] &
928 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 929 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 930 return 1;
931 }
932 if (sense[SENSE_COMMAND_REJECT_BYTE] &
933 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 934 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 935 return 1;
4a71df50
FB		 936 }
937 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 938 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 939 return 1;
940 }
941 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 942 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 943 return 0;
944 }
847a50fd 945 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 946 return 1;
947 }
948 return 0;
949}
950
951static long __qeth_check_irb_error(struct ccw_device *cdev,
952 unsigned long intparm, struct irb *irb)
953{
847a50fd
CO		 954 struct qeth_card *card;
955
956 card = CARD_FROM_CDEV(cdev);
957
4a71df50
FB		 958 if (!IS_ERR(irb))
959 return 0;
960
961 switch (PTR_ERR(irb)) {
962 case -EIO:
74eacdb9
FB		 963 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
964 dev_name(&cdev->dev));
847a50fd
CO		 965 QETH_CARD_TEXT(card, 2, "ckirberr");
966 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 967 break;
968 case -ETIMEDOUT:
74eacdb9
FB		 969 dev_warn(&cdev->dev, "A hardware operation timed out"
970 " on the device\n");
847a50fd
CO		 971 QETH_CARD_TEXT(card, 2, "ckirberr");
972 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 973 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 974 if (card && (card->data.ccwdev == cdev)) {
975 card->data.state = CH_STATE_DOWN;
976 wake_up(&card->wait_q);
977 }
978 }
979 break;
980 default:
74eacdb9
FB		 981 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
982 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 983 QETH_CARD_TEXT(card, 2, "ckirberr");
984 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 985 }
986 return PTR_ERR(irb);
987}
988
989static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
990 struct irb *irb)
991{
992 int rc;
993 int cstat, dstat;
994 struct qeth_cmd_buffer *buffer;
995 struct qeth_channel *channel;
996 struct qeth_card *card;
997 struct qeth_cmd_buffer *iob;
998 __u8 index;
999
4a71df50
FB		 1000 if (__qeth_check_irb_error(cdev, intparm, irb))
1001 return;
23d805b6
PO		 1002 cstat = irb->scsw.cmd.cstat;
1003 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1004
1005 card = CARD_FROM_CDEV(cdev);
1006 if (!card)
1007 return;
1008
847a50fd
CO		 1009 QETH_CARD_TEXT(card, 5, "irq");
1010
4a71df50
FB		 1011 if (card->read.ccwdev == cdev) {
1012 channel = &card->read;
847a50fd 1013 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1014 } else if (card->write.ccwdev == cdev) {
1015 channel = &card->write;
847a50fd 1016 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1017 } else {
1018 channel = &card->data;
847a50fd 1019 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1020 }
1021 atomic_set(&channel->irq_pending, 0);
1022
23d805b6 1023 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1024 channel->state = CH_STATE_STOPPED;
1025
23d805b6 1026 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1027 channel->state = CH_STATE_HALTED;
1028
1029 /*let's wake up immediately on data channel*/
1030 if ((channel == &card->data) && (intparm != 0) &&
1031 (intparm != QETH_RCD_PARM))
1032 goto out;
1033
1034 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1035 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1036 /* we don't have to handle this further */
1037 intparm = 0;
1038 }
1039 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1040 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1041 /* we don't have to handle this further */
1042 intparm = 0;
1043 }
1044 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1045 (dstat & DEV_STAT_UNIT_CHECK) ||
1046 (cstat)) {
1047 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1048 dev_warn(&channel->ccwdev->dev,
1049 "The qeth device driver failed to recover "
1050 "an error on the device\n");
1051 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1052 "0x%X dstat 0x%X\n",
1053 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1054 print_hex_dump(KERN_WARNING, "qeth: irb ",
1055 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1056 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1057 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1058 }
1059 if (intparm == QETH_RCD_PARM) {
1060 channel->state = CH_STATE_DOWN;
1061 goto out;
1062 }
1063 rc = qeth_get_problem(cdev, irb);
1064 if (rc) {
28a7e4c9 1065 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1066 qeth_schedule_recovery(card);
1067 goto out;
1068 }
1069 }
1070
1071 if (intparm == QETH_RCD_PARM) {
1072 channel->state = CH_STATE_RCD_DONE;
1073 goto out;
1074 }
1075 if (intparm) {
1076 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1077 buffer->state = BUF_STATE_PROCESSED;
1078 }
1079 if (channel == &card->data)
1080 return;
1081 if (channel == &card->read &&
1082 channel->state == CH_STATE_UP)
1083 qeth_issue_next_read(card);
1084
1085 iob = channel->iob;
1086 index = channel->buf_no;
1087 while (iob[index].state == BUF_STATE_PROCESSED) {
1088 if (iob[index].callback != NULL)
1089 iob[index].callback(channel, iob + index);
1090
1091 index = (index + 1) % QETH_CMD_BUFFER_NO;
1092 }
1093 channel->buf_no = index;
1094out:
1095 wake_up(&card->wait_q);
1096 return;
1097}
1098
b3332930 1099static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1100 struct qeth_qdio_out_buffer *buf,
b3332930 1101 enum iucv_tx_notify notification)
4a71df50 1102{
4a71df50
FB		 1103 struct sk_buff *skb;
1104
b3332930
FB		 1105 if (skb_queue_empty(&buf->skb_list))
1106 goto out;
1107 skb = skb_peek(&buf->skb_list);
1108 while (skb) {
1109 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1110 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1111 if (skb->protocol == ETH_P_AF_IUCV) {
1112 if (skb->sk) {
1113 struct iucv_sock *iucv = iucv_sk(skb->sk);
1114 iucv->sk_txnotify(skb, notification);
1115 }
1116 }
1117 if (skb_queue_is_last(&buf->skb_list, skb))
1118 skb = NULL;
1119 else
1120 skb = skb_queue_next(&buf->skb_list, skb);
1121 }
1122out:
1123 return;
1124}
1125
1126static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1127{
1128 struct sk_buff *skb;
72861ae7
EL		 1129 struct iucv_sock *iucv;
1130 int notify_general_error = 0;
1131
1132 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1133 notify_general_error = 1;
1134
1135 /* release may never happen from within CQ tasklet scope */
1136 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1137
b67d801f
UB		 1138 skb = skb_dequeue(&buf->skb_list);
1139 while (skb) {
b3332930
FB		 1140 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1141 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1142 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1143 if (skb->sk) {
1144 iucv = iucv_sk(skb->sk);
1145 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1146 }
1147 }
b67d801f
UB		 1148 atomic_dec(&skb->users);
1149 dev_kfree_skb_any(skb);
4a71df50
FB		 1150 skb = skb_dequeue(&buf->skb_list);
1151 }
b3332930
FB		 1152}
1153
1154static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1155 struct qeth_qdio_out_buffer *buf,
1156 enum qeth_qdio_buffer_states newbufstate)
1157{
1158 int i;
1159
1160 /* is PCI flag set on buffer? */
1161 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1162 atomic_dec(&queue->set_pci_flags_count);
1163
1164 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1165 qeth_release_skbs(buf);
1166 }
4a71df50 1167 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1168 if (buf->buffer->element[i].addr && buf->is_header[i])
1169 kmem_cache_free(qeth_core_header_cache,
1170 buf->buffer->element[i].addr);
1171 buf->is_header[i] = 0;
4a71df50
FB		 1172 buf->buffer->element[i].length = 0;
1173 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1174 buf->buffer->element[i].eflags = 0;
1175 buf->buffer->element[i].sflags = 0;
4a71df50 1176 }
3ec90878
JG		 1177 buf->buffer->element[15].eflags = 0;
1178 buf->buffer->element[15].sflags = 0;
4a71df50 1179 buf->next_element_to_fill = 0;
0da9581d
EL		 1180 atomic_set(&buf->state, newbufstate);
1181}
1182
1183static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1184{
1185 int j;
1186
1187 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1188 if (!q->bufs[j])
1189 continue;
72861ae7 1190 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1191 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1192 if (free) {
1193 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1194 q->bufs[j] = NULL;
1195 }
1196 }
4a71df50
FB		 1197}
1198
1199void qeth_clear_qdio_buffers(struct qeth_card *card)
1200{
0da9581d 1201 int i;
4a71df50 1202
847a50fd 1203 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1204 /* clear outbound buffers to free skbs */
0da9581d 1205 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1206 if (card->qdio.out_qs[i]) {
0da9581d 1207 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1208 }
0da9581d 1209 }
4a71df50
FB		 1210}
1211EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1212
1213static void qeth_free_buffer_pool(struct qeth_card *card)
1214{
1215 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1216 int i = 0;
4a71df50
FB		 1217 list_for_each_entry_safe(pool_entry, tmp,
1218 &card->qdio.init_pool.entry_list, init_list){
1219 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1220 free_page((unsigned long)pool_entry->elements[i]);
1221 list_del(&pool_entry->init_list);
1222 kfree(pool_entry);
1223 }
1224}
1225
1226static void qeth_free_qdio_buffers(struct qeth_card *card)
1227{
b3332930 1228 int i, j;
4a71df50 1229
4a71df50
FB		 1230 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1231 QETH_QDIO_UNINITIALIZED)
1232 return;
0da9581d
EL		 1233
1234 qeth_free_cq(card);
b3332930
FB		 1235 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1236 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
72861ae7 1237 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
4a71df50
FB		 1238 kfree(card->qdio.in_q);
1239 card->qdio.in_q = NULL;
1240 /* inbound buffer pool */
1241 qeth_free_buffer_pool(card);
1242 /* free outbound qdio_qs */
1243 if (card->qdio.out_qs) {
1244 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1245 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1246 kfree(card->qdio.out_qs[i]);
1247 }
1248 kfree(card->qdio.out_qs);
1249 card->qdio.out_qs = NULL;
1250 }
1251}
1252
1253static void qeth_clean_channel(struct qeth_channel *channel)
1254{
1255 int cnt;
1256
d11ba0c4 1257 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1258 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1259 kfree(channel->iob[cnt].data);
1260}
1261
5113fec0 1262static void qeth_get_channel_path_desc(struct qeth_card *card)
4a71df50 1263{
4a71df50
FB		 1264 struct ccw_device *ccwdev;
1265 struct channelPath_dsc {
1266 u8 flags;
1267 u8 lsn;
1268 u8 desc;
1269 u8 chpid;
1270 u8 swla;
1271 u8 zeroes;
1272 u8 chla;
1273 u8 chpp;
1274 } *chp_dsc;
1275
5113fec0 1276 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1277
1278 ccwdev = card->data.ccwdev;
1279 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1280 if (chp_dsc != NULL) {
99558ea9
UB		 1281 if (card->info.type != QETH_CARD_TYPE_IQD) {
1282 /* CHPP field bit 6 == 1 -> single queue */
1283 if ((chp_dsc->chpp & 0x02) == 0x02) {
1284 if ((atomic_read(&card->qdio.state) !=
1285 QETH_QDIO_UNINITIALIZED) &&
1286 (card->qdio.no_out_queues == 4))
1287 /* change from 4 to 1 outbound queues */
1288 qeth_free_qdio_buffers(card);
1289 card->qdio.no_out_queues = 1;
1290 if (card->qdio.default_out_queue != 0)
1291 dev_info(&card->gdev->dev,
d0ff1f52 1292 "Priority Queueing not supported\n");
99558ea9
UB		 1293 card->qdio.default_out_queue = 0;
1294 } else {
1295 if ((atomic_read(&card->qdio.state) !=
1296 QETH_QDIO_UNINITIALIZED) &&
1297 (card->qdio.no_out_queues == 1)) {
1298 /* change from 1 to 4 outbound queues */
1299 qeth_free_qdio_buffers(card);
1300 card->qdio.default_out_queue = 2;
1301 }
1302 card->qdio.no_out_queues = 4;
d0ff1f52 1303 }
d0ff1f52 1304 }
5113fec0 1305 card->info.func_level = 0x4100 + chp_dsc->desc;
4a71df50
FB		 1306 kfree(chp_dsc);
1307 }
5113fec0
UB		 1308 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1309 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1310 return;
4a71df50
FB		 1311}
1312
1313static void qeth_init_qdio_info(struct qeth_card *card)
1314{
d11ba0c4 1315 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1316 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1317 /* inbound */
1318 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1319 if (card->info.type == QETH_CARD_TYPE_IQD)
1320 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1321 else
1322 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1323 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1324 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1325 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1326}
1327
1328static void qeth_set_intial_options(struct qeth_card *card)
1329{
1330 card->options.route4.type = NO_ROUTER;
1331 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1332 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1333 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1334 card->options.fake_broadcast = 0;
1335 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1336 card->options.performance_stats = 0;
1337 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1338 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1339 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1340}
1341
1342static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1343{
1344 unsigned long flags;
1345 int rc = 0;
1346
1347 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1348 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1349 (u8) card->thread_start_mask,
1350 (u8) card->thread_allowed_mask,
1351 (u8) card->thread_running_mask);
1352 rc = (card->thread_start_mask & thread);
1353 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1354 return rc;
1355}
1356
1357static void qeth_start_kernel_thread(struct work_struct *work)
1358{
3f36b890 1359 struct task_struct *ts;
4a71df50
FB		 1360 struct qeth_card *card = container_of(work, struct qeth_card,
1361 kernel_thread_starter);
847a50fd 1362 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1363
1364 if (card->read.state != CH_STATE_UP &&
1365 card->write.state != CH_STATE_UP)
1366 return;
3f36b890
FB		 1367 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1368 ts = kthread_run(card->discipline.recover, (void *)card,
4a71df50 1369 "qeth_recover");
3f36b890
FB		 1370 if (IS_ERR(ts)) {
1371 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1372 qeth_clear_thread_running_bit(card,
1373 QETH_RECOVER_THREAD);
1374 }
1375 }
4a71df50
FB		 1376}
1377
1378static int qeth_setup_card(struct qeth_card *card)
1379{
1380
d11ba0c4
PT		 1381 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1382 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1383
1384 card->read.state = CH_STATE_DOWN;
1385 card->write.state = CH_STATE_DOWN;
1386 card->data.state = CH_STATE_DOWN;
1387 card->state = CARD_STATE_DOWN;
1388 card->lan_online = 0;
908abbb5 1389 card->read_or_write_problem = 0;
4a71df50
FB		 1390 card->dev = NULL;
1391 spin_lock_init(&card->vlanlock);
1392 spin_lock_init(&card->mclock);
4a71df50
FB		 1393 spin_lock_init(&card->lock);
1394 spin_lock_init(&card->ip_lock);
1395 spin_lock_init(&card->thread_mask_lock);
c4949f07 1396 mutex_init(&card->conf_mutex);
9dc48ccc 1397 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1398 card->thread_start_mask = 0;
1399 card->thread_allowed_mask = 0;
1400 card->thread_running_mask = 0;
1401 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1402 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1403 INIT_LIST_HEAD(card->ip_tbd_list);
1404 INIT_LIST_HEAD(&card->cmd_waiter_list);
1405 init_waitqueue_head(&card->wait_q);
25985edc 1406 /* initial options */
4a71df50
FB		 1407 qeth_set_intial_options(card);
1408 /* IP address takeover */
1409 INIT_LIST_HEAD(&card->ipato.entries);
1410 card->ipato.enabled = 0;
1411 card->ipato.invert4 = 0;
1412 card->ipato.invert6 = 0;
1413 /* init QDIO stuff */
1414 qeth_init_qdio_info(card);
b3332930 1415 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
4a71df50
FB		 1416 return 0;
1417}
1418
6bcac508
MS		 1419static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1420{
1421 struct qeth_card *card = container_of(slr, struct qeth_card,
1422 qeth_service_level);
0d788c7d
KDW		 1423 if (card->info.mcl_level[0])
1424 seq_printf(m, "qeth: %s firmware level %s\n",
1425 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1426}
1427
4a71df50
FB		 1428static struct qeth_card *qeth_alloc_card(void)
1429{
1430 struct qeth_card *card;
1431
d11ba0c4 1432 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1433 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1434 if (!card)
76b11f8e 1435 goto out;
d11ba0c4 1436 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1437 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1438 if (!card->ip_tbd_list) {
1439 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1440 goto out_card;
4a71df50 1441 }
76b11f8e
UB		 1442 if (qeth_setup_channel(&card->read))
1443 goto out_ip;
1444 if (qeth_setup_channel(&card->write))
1445 goto out_channel;
4a71df50 1446 card->options.layer2 = -1;
6bcac508
MS		 1447 card->qeth_service_level.seq_print = qeth_core_sl_print;
1448 register_service_level(&card->qeth_service_level);
4a71df50 1449 return card;
76b11f8e
UB		 1450
1451out_channel:
1452 qeth_clean_channel(&card->read);
1453out_ip:
1454 kfree(card->ip_tbd_list);
1455out_card:
1456 kfree(card);
1457out:
1458 return NULL;
4a71df50
FB		 1459}
1460
1461static int qeth_determine_card_type(struct qeth_card *card)
1462{
1463 int i = 0;
1464
d11ba0c4 1465 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1466
1467 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1468 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1469 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1470 if ((CARD_RDEV(card)->id.dev_type ==
1471 known_devices[i][QETH_DEV_TYPE_IND]) &&
1472 (CARD_RDEV(card)->id.dev_model ==
1473 known_devices[i][QETH_DEV_MODEL_IND])) {
1474 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1475 card->qdio.no_out_queues =
1476 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1477 card->qdio.no_in_queues = 1;
5113fec0
UB		 1478 card->info.is_multicast_different =
1479 known_devices[i][QETH_MULTICAST_IND];
1480 qeth_get_channel_path_desc(card);
4a71df50
FB		 1481 return 0;
1482 }
1483 i++;
1484 }
1485 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1486 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1487 "unknown type\n");
4a71df50
FB		 1488 return -ENOENT;
1489}
1490
1491static int qeth_clear_channel(struct qeth_channel *channel)
1492{
1493 unsigned long flags;
1494 struct qeth_card *card;
1495 int rc;
1496
4a71df50 1497 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1498 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1499 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1500 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1501 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1502
1503 if (rc)
1504 return rc;
1505 rc = wait_event_interruptible_timeout(card->wait_q,
1506 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1507 if (rc == -ERESTARTSYS)
1508 return rc;
1509 if (channel->state != CH_STATE_STOPPED)
1510 return -ETIME;
1511 channel->state = CH_STATE_DOWN;
1512 return 0;
1513}
1514
1515static int qeth_halt_channel(struct qeth_channel *channel)
1516{
1517 unsigned long flags;
1518 struct qeth_card *card;
1519 int rc;
1520
4a71df50 1521 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1522 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1523 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1524 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1525 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1526
1527 if (rc)
1528 return rc;
1529 rc = wait_event_interruptible_timeout(card->wait_q,
1530 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1531 if (rc == -ERESTARTSYS)
1532 return rc;
1533 if (channel->state != CH_STATE_HALTED)
1534 return -ETIME;
1535 return 0;
1536}
1537
1538static int qeth_halt_channels(struct qeth_card *card)
1539{
1540 int rc1 = 0, rc2 = 0, rc3 = 0;
1541
847a50fd 1542 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1543 rc1 = qeth_halt_channel(&card->read);
1544 rc2 = qeth_halt_channel(&card->write);
1545 rc3 = qeth_halt_channel(&card->data);
1546 if (rc1)
1547 return rc1;
1548 if (rc2)
1549 return rc2;
1550 return rc3;
1551}
1552
1553static int qeth_clear_channels(struct qeth_card *card)
1554{
1555 int rc1 = 0, rc2 = 0, rc3 = 0;
1556
847a50fd 1557 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1558 rc1 = qeth_clear_channel(&card->read);
1559 rc2 = qeth_clear_channel(&card->write);
1560 rc3 = qeth_clear_channel(&card->data);
1561 if (rc1)
1562 return rc1;
1563 if (rc2)
1564 return rc2;
1565 return rc3;
1566}
1567
1568static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1569{
1570 int rc = 0;
1571
847a50fd 1572 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1573
1574 if (halt)
1575 rc = qeth_halt_channels(card);
1576 if (rc)
1577 return rc;
1578 return qeth_clear_channels(card);
1579}
1580
1581int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1582{
1583 int rc = 0;
1584
847a50fd 1585 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1586 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1587 QETH_QDIO_CLEANING)) {
1588 case QETH_QDIO_ESTABLISHED:
1589 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1590 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1591 QDIO_FLAG_CLEANUP_USING_HALT);
1592 else
cc961d40 1593 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1594 QDIO_FLAG_CLEANUP_USING_CLEAR);
1595 if (rc)
847a50fd 1596 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1597 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1598 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1599 break;
1600 case QETH_QDIO_CLEANING:
1601 return rc;
1602 default:
1603 break;
1604 }
1605 rc = qeth_clear_halt_card(card, use_halt);
1606 if (rc)
847a50fd 1607 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1608 card->state = CARD_STATE_DOWN;
1609 return rc;
1610}
1611EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1612
1613static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1614 int *length)
1615{
1616 struct ciw *ciw;
1617 char *rcd_buf;
1618 int ret;
1619 struct qeth_channel *channel = &card->data;
1620 unsigned long flags;
1621
1622 /*
1623 * scan for RCD command in extended SenseID data
1624 */
1625 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1626 if (!ciw || ciw->cmd == 0)
1627 return -EOPNOTSUPP;
1628 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1629 if (!rcd_buf)
1630 return -ENOMEM;
1631
1632 channel->ccw.cmd_code = ciw->cmd;
1633 channel->ccw.cda = (__u32) __pa(rcd_buf);
1634 channel->ccw.count = ciw->count;
1635 channel->ccw.flags = CCW_FLAG_SLI;
1636 channel->state = CH_STATE_RCD;
1637 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1638 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1639 QETH_RCD_PARM, LPM_ANYPATH, 0,
1640 QETH_RCD_TIMEOUT);
1641 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1642 if (!ret)
1643 wait_event(card->wait_q,
1644 (channel->state == CH_STATE_RCD_DONE ||
1645 channel->state == CH_STATE_DOWN));
1646 if (channel->state == CH_STATE_DOWN)
1647 ret = -EIO;
1648 else
1649 channel->state = CH_STATE_DOWN;
1650 if (ret) {
1651 kfree(rcd_buf);
1652 *buffer = NULL;
1653 *length = 0;
1654 } else {
1655 *length = ciw->count;
1656 *buffer = rcd_buf;
1657 }
1658 return ret;
1659}
1660
a60389ab 1661static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1662{
a60389ab 1663 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1664 card->info.chpid = prcd[30];
1665 card->info.unit_addr2 = prcd[31];
1666 card->info.cula = prcd[63];
1667 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1668 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1669}
1670
1671static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1672{
1673 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1674
1675 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1676 card->info.blkt.time_total = 250;
1677 card->info.blkt.inter_packet = 5;
1678 card->info.blkt.inter_packet_jumbo = 15;
1679 } else {
1680 card->info.blkt.time_total = 0;
1681 card->info.blkt.inter_packet = 0;
1682 card->info.blkt.inter_packet_jumbo = 0;
1683 }
4a71df50
FB		 1684}
1685
1686static void qeth_init_tokens(struct qeth_card *card)
1687{
1688 card->token.issuer_rm_w = 0x00010103UL;
1689 card->token.cm_filter_w = 0x00010108UL;
1690 card->token.cm_connection_w = 0x0001010aUL;
1691 card->token.ulp_filter_w = 0x0001010bUL;
1692 card->token.ulp_connection_w = 0x0001010dUL;
1693}
1694
1695static void qeth_init_func_level(struct qeth_card *card)
1696{
5113fec0
UB		 1697 switch (card->info.type) {
1698 case QETH_CARD_TYPE_IQD:
6298263a 1699 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1700 break;
1701 case QETH_CARD_TYPE_OSD:
0132951e 1702 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1703 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1704 break;
1705 default:
1706 break;
4a71df50
FB		 1707 }
1708}
1709
4a71df50
FB		 1710static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1711 void (*idx_reply_cb)(struct qeth_channel *,
1712 struct qeth_cmd_buffer *))
1713{
1714 struct qeth_cmd_buffer *iob;
1715 unsigned long flags;
1716 int rc;
1717 struct qeth_card *card;
1718
d11ba0c4 1719 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1720 card = CARD_FROM_CDEV(channel->ccwdev);
1721 iob = qeth_get_buffer(channel);
1722 iob->callback = idx_reply_cb;
1723 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1724 channel->ccw.count = QETH_BUFSIZE;
1725 channel->ccw.cda = (__u32) __pa(iob->data);
1726
1727 wait_event(card->wait_q,
1728 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1729 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1730 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1731 rc = ccw_device_start(channel->ccwdev,
1732 &channel->ccw, (addr_t) iob, 0, 0);
1733 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1734
1735 if (rc) {
14cc21b6 1736 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1737 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1738 atomic_set(&channel->irq_pending, 0);
1739 wake_up(&card->wait_q);
1740 return rc;
1741 }
1742 rc = wait_event_interruptible_timeout(card->wait_q,
1743 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1744 if (rc == -ERESTARTSYS)
1745 return rc;
1746 if (channel->state != CH_STATE_UP) {
1747 rc = -ETIME;
d11ba0c4 1748 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1749 qeth_clear_cmd_buffers(channel);
1750 } else
1751 rc = 0;
1752 return rc;
1753}
1754
1755static int qeth_idx_activate_channel(struct qeth_channel *channel,
1756 void (*idx_reply_cb)(struct qeth_channel *,
1757 struct qeth_cmd_buffer *))
1758{
1759 struct qeth_card *card;
1760 struct qeth_cmd_buffer *iob;
1761 unsigned long flags;
1762 __u16 temp;
1763 __u8 tmp;
1764 int rc;
f06f6f32 1765 struct ccw_dev_id temp_devid;
4a71df50
FB		 1766
1767 card = CARD_FROM_CDEV(channel->ccwdev);
1768
d11ba0c4 1769 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1770
1771 iob = qeth_get_buffer(channel);
1772 iob->callback = idx_reply_cb;
1773 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1774 channel->ccw.count = IDX_ACTIVATE_SIZE;
1775 channel->ccw.cda = (__u32) __pa(iob->data);
1776 if (channel == &card->write) {
1777 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1778 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1779 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1780 card->seqno.trans_hdr++;
1781 } else {
1782 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1783 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1784 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1785 }
1786 tmp = ((__u8)card->info.portno) | 0x80;
1787 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1788 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1789 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1790 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1791 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1792 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1793 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1794 temp = (card->info.cula << 8) + card->info.unit_addr2;
1795 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1796
1797 wait_event(card->wait_q,
1798 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1799 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1800 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1801 rc = ccw_device_start(channel->ccwdev,
1802 &channel->ccw, (addr_t) iob, 0, 0);
1803 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1804
1805 if (rc) {
14cc21b6
FB		 1806 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1807 rc);
d11ba0c4 1808 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1809 atomic_set(&channel->irq_pending, 0);
1810 wake_up(&card->wait_q);
1811 return rc;
1812 }
1813 rc = wait_event_interruptible_timeout(card->wait_q,
1814 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1815 if (rc == -ERESTARTSYS)
1816 return rc;
1817 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1818 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1819 " failed to recover an error on the device\n");
1820 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1821 dev_name(&channel->ccwdev->dev));
d11ba0c4 1822 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1823 qeth_clear_cmd_buffers(channel);
1824 return -ETIME;
1825 }
1826 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1827}
1828
1829static int qeth_peer_func_level(int level)
1830{
1831 if ((level & 0xff) == 8)
1832 return (level & 0xff) + 0x400;
1833 if (((level >> 8) & 3) == 1)
1834 return (level & 0xff) + 0x200;
1835 return level;
1836}
1837
1838static void qeth_idx_write_cb(struct qeth_channel *channel,
1839 struct qeth_cmd_buffer *iob)
1840{
1841 struct qeth_card *card;
1842 __u16 temp;
1843
d11ba0c4 1844 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1845
1846 if (channel->state == CH_STATE_DOWN) {
1847 channel->state = CH_STATE_ACTIVATING;
1848 goto out;
1849 }
1850 card = CARD_FROM_CDEV(channel->ccwdev);
1851
1852 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1853 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1854 dev_err(&card->write.ccwdev->dev,
1855 "The adapter is used exclusively by another "
1856 "host\n");
4a71df50 1857 else
74eacdb9
FB		 1858 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1859 " negative reply\n",
1860 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1861 goto out;
1862 }
1863 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1864 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1865 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1866 "function level mismatch (sent: 0x%x, received: "
1867 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1868 card->info.func_level, temp);
4a71df50
FB		 1869 goto out;
1870 }
1871 channel->state = CH_STATE_UP;
1872out:
1873 qeth_release_buffer(channel, iob);
1874}
1875
1876static void qeth_idx_read_cb(struct qeth_channel *channel,
1877 struct qeth_cmd_buffer *iob)
1878{
1879 struct qeth_card *card;
1880 __u16 temp;
1881
d11ba0c4 1882 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1883 if (channel->state == CH_STATE_DOWN) {
1884 channel->state = CH_STATE_ACTIVATING;
1885 goto out;
1886 }
1887
1888 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1889 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1890 goto out;
1891
1892 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1893 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1894 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1895 dev_err(&card->write.ccwdev->dev,
1896 "The adapter is used exclusively by another "
1897 "host\n");
5113fec0
UB		 1898 break;
1899 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1900 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1901 dev_err(&card->read.ccwdev->dev,
1902 "Setting the device online failed because of "
01fc3e86 1903 "insufficient authorization\n");
5113fec0
UB		 1904 break;
1905 default:
74eacdb9
FB		 1906 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1907 " negative reply\n",
1908 dev_name(&card->read.ccwdev->dev));
5113fec0 1909 }
01fc3e86
UB		 1910 QETH_CARD_TEXT_(card, 2, "idxread%c",
1911 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1912 goto out;
1913 }
1914
1915/**
5113fec0
UB		 1916 * * temporary fix for microcode bug
1917 * * to revert it,replace OR by AND
1918 * */
4a71df50 1919 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1920 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1921 card->info.portname_required = 1;
1922
1923 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1924 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1925 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1926 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1927 dev_name(&card->read.ccwdev->dev),
1928 card->info.func_level, temp);
4a71df50
FB		 1929 goto out;
1930 }
1931 memcpy(&card->token.issuer_rm_r,
1932 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1933 QETH_MPC_TOKEN_LENGTH);
1934 memcpy(&card->info.mcl_level[0],
1935 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1936 channel->state = CH_STATE_UP;
1937out:
1938 qeth_release_buffer(channel, iob);
1939}
1940
1941void qeth_prepare_control_data(struct qeth_card *card, int len,
1942 struct qeth_cmd_buffer *iob)
1943{
1944 qeth_setup_ccw(&card->write, iob->data, len);
1945 iob->callback = qeth_release_buffer;
1946
1947 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1948 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1949 card->seqno.trans_hdr++;
1950 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1951 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1952 card->seqno.pdu_hdr++;
1953 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1954 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1955 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1956}
1957EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1958
1959int qeth_send_control_data(struct qeth_card *card, int len,
1960 struct qeth_cmd_buffer *iob,
1961 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1962 unsigned long),
1963 void *reply_param)
1964{
1965 int rc;
1966 unsigned long flags;
1967 struct qeth_reply *reply = NULL;
7834cd5a 1968 unsigned long timeout, event_timeout;
5b54e16f 1969 struct qeth_ipa_cmd *cmd;
4a71df50 1970
847a50fd 1971 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1972
908abbb5
UB		 1973 if (card->read_or_write_problem) {
1974 qeth_release_buffer(iob->channel, iob);
1975 return -EIO;
1976 }
4a71df50
FB		 1977 reply = qeth_alloc_reply(card);
1978 if (!reply) {
4a71df50
FB		 1979 return -ENOMEM;
1980 }
1981 reply->callback = reply_cb;
1982 reply->param = reply_param;
1983 if (card->state == CARD_STATE_DOWN)
1984 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1985 else
1986 reply->seqno = card->seqno.ipa++;
1987 init_waitqueue_head(&reply->wait_q);
1988 spin_lock_irqsave(&card->lock, flags);
1989 list_add_tail(&reply->list, &card->cmd_waiter_list);
1990 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1991 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1992
1993 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1994 qeth_prepare_control_data(card, len, iob);
1995
1996 if (IS_IPA(iob->data))
7834cd5a 1997 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1998 else
7834cd5a
HC		 1999 event_timeout = QETH_TIMEOUT;
2000 timeout = jiffies + event_timeout;
4a71df50 2001
847a50fd 2002 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2003 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2004 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2005 (addr_t) iob, 0, 0);
2006 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2007 if (rc) {
74eacdb9
FB		 2008 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2009 "ccw_device_start rc = %i\n",
2010 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2011 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2012 spin_lock_irqsave(&card->lock, flags);
2013 list_del_init(&reply->list);
2014 qeth_put_reply(reply);
2015 spin_unlock_irqrestore(&card->lock, flags);
2016 qeth_release_buffer(iob->channel, iob);
2017 atomic_set(&card->write.irq_pending, 0);
2018 wake_up(&card->wait_q);
2019 return rc;
2020 }
5b54e16f
FB		 2021
2022 /* we have only one long running ipassist, since we can ensure
2023 process context of this command we can sleep */
2024 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2025 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2026 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2027 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2028 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2029 goto time_err;
2030 } else {
2031 while (!atomic_read(&reply->received)) {
2032 if (time_after(jiffies, timeout))
2033 goto time_err;
2034 cpu_relax();
2035 };
2036 }
2037
70919e23
UB		 2038 if (reply->rc == -EIO)
2039 goto error;
5b54e16f
FB		 2040 rc = reply->rc;
2041 qeth_put_reply(reply);
2042 return rc;
2043
2044time_err:
70919e23 2045 reply->rc = -ETIME;
5b54e16f
FB		 2046 spin_lock_irqsave(&reply->card->lock, flags);
2047 list_del_init(&reply->list);
2048 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2049 atomic_inc(&reply->received);
70919e23 2050error:
908abbb5
UB		 2051 atomic_set(&card->write.irq_pending, 0);
2052 qeth_release_buffer(iob->channel, iob);
2053 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2054 rc = reply->rc;
2055 qeth_put_reply(reply);
2056 return rc;
2057}
2058EXPORT_SYMBOL_GPL(qeth_send_control_data);
2059
2060static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2061 unsigned long data)
2062{
2063 struct qeth_cmd_buffer *iob;
2064
d11ba0c4 2065 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2066
2067 iob = (struct qeth_cmd_buffer *) data;
2068 memcpy(&card->token.cm_filter_r,
2069 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2070 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2071 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2072 return 0;
2073}
2074
2075static int qeth_cm_enable(struct qeth_card *card)
2076{
2077 int rc;
2078 struct qeth_cmd_buffer *iob;
2079
d11ba0c4 2080 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2081
2082 iob = qeth_wait_for_buffer(&card->write);
2083 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2084 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2085 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2086 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2087 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2088
2089 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2090 qeth_cm_enable_cb, NULL);
2091 return rc;
2092}
2093
2094static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2095 unsigned long data)
2096{
2097
2098 struct qeth_cmd_buffer *iob;
2099
d11ba0c4 2100 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2101
2102 iob = (struct qeth_cmd_buffer *) data;
2103 memcpy(&card->token.cm_connection_r,
2104 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2105 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2106 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2107 return 0;
2108}
2109
2110static int qeth_cm_setup(struct qeth_card *card)
2111{
2112 int rc;
2113 struct qeth_cmd_buffer *iob;
2114
d11ba0c4 2115 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2116
2117 iob = qeth_wait_for_buffer(&card->write);
2118 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2119 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2120 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2121 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2122 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2123 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2124 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2125 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2126 qeth_cm_setup_cb, NULL);
2127 return rc;
2128
2129}
2130
2131static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2132{
2133 switch (card->info.type) {
2134 case QETH_CARD_TYPE_UNKNOWN:
2135 return 1500;
2136 case QETH_CARD_TYPE_IQD:
2137 return card->info.max_mtu;
5113fec0 2138 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2139 switch (card->info.link_type) {
2140 case QETH_LINK_TYPE_HSTR:
2141 case QETH_LINK_TYPE_LANE_TR:
2142 return 2000;
2143 default:
2144 return 1492;
2145 }
5113fec0
UB		 2146 case QETH_CARD_TYPE_OSM:
2147 case QETH_CARD_TYPE_OSX:
2148 return 1492;
4a71df50
FB		 2149 default:
2150 return 1500;
2151 }
2152}
2153
4a71df50
FB		 2154static inline int qeth_get_mtu_outof_framesize(int framesize)
2155{
2156 switch (framesize) {
2157 case 0x4000:
2158 return 8192;
2159 case 0x6000:
2160 return 16384;
2161 case 0xa000:
2162 return 32768;
2163 case 0xffff:
2164 return 57344;
2165 default:
2166 return 0;
2167 }
2168}
2169
2170static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2171{
2172 switch (card->info.type) {
5113fec0
UB		 2173 case QETH_CARD_TYPE_OSD:
2174 case QETH_CARD_TYPE_OSM:
2175 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2176 case QETH_CARD_TYPE_IQD:
2177 return ((mtu >= 576) &&
9853b97b 2178 (mtu <= card->info.max_mtu));
4a71df50
FB		 2179 case QETH_CARD_TYPE_OSN:
2180 case QETH_CARD_TYPE_UNKNOWN:
2181 default:
2182 return 1;
2183 }
2184}
2185
2186static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2187 unsigned long data)
2188{
2189
2190 __u16 mtu, framesize;
2191 __u16 len;
2192 __u8 link_type;
2193 struct qeth_cmd_buffer *iob;
2194
d11ba0c4 2195 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2196
2197 iob = (struct qeth_cmd_buffer *) data;
2198 memcpy(&card->token.ulp_filter_r,
2199 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2200 QETH_MPC_TOKEN_LENGTH);
9853b97b 2201 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2202 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2203 mtu = qeth_get_mtu_outof_framesize(framesize);
2204 if (!mtu) {
2205 iob->rc = -EINVAL;
d11ba0c4 2206 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2207 return 0;
2208 }
8b2e18f6
UB		 2209 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2210 /* frame size has changed */
2211 if (card->dev &&
2212 ((card->dev->mtu == card->info.initial_mtu) ||
2213 (card->dev->mtu > mtu)))
2214 card->dev->mtu = mtu;
2215 qeth_free_qdio_buffers(card);
2216 }
4a71df50 2217 card->info.initial_mtu = mtu;
8b2e18f6 2218 card->info.max_mtu = mtu;
4a71df50
FB		 2219 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2220 } else {
2221 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2222 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2223 iob->data);
4a71df50
FB		 2224 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2225 }
2226
2227 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2228 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2229 memcpy(&link_type,
2230 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2231 card->info.link_type = link_type;
2232 } else
2233 card->info.link_type = 0;
01fc3e86 2234 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2235 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2236 return 0;
2237}
2238
2239static int qeth_ulp_enable(struct qeth_card *card)
2240{
2241 int rc;
2242 char prot_type;
2243 struct qeth_cmd_buffer *iob;
2244
2245 /*FIXME: trace view callbacks*/
d11ba0c4 2246 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2247
2248 iob = qeth_wait_for_buffer(&card->write);
2249 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2250
2251 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2252 (__u8) card->info.portno;
2253 if (card->options.layer2)
2254 if (card->info.type == QETH_CARD_TYPE_OSN)
2255 prot_type = QETH_PROT_OSN2;
2256 else
2257 prot_type = QETH_PROT_LAYER2;
2258 else
2259 prot_type = QETH_PROT_TCPIP;
2260
2261 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2262 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2263 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2264 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2265 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2266 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2267 card->info.portname, 9);
2268 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2269 qeth_ulp_enable_cb, NULL);
2270 return rc;
2271
2272}
2273
2274static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2275 unsigned long data)
2276{
2277 struct qeth_cmd_buffer *iob;
65a1f898 2278 int rc = 0;
4a71df50 2279
d11ba0c4 2280 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2281
2282 iob = (struct qeth_cmd_buffer *) data;
2283 memcpy(&card->token.ulp_connection_r,
2284 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2285 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2286 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2287 3)) {
2288 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2289 dev_err(&card->gdev->dev, "A connection could not be "
2290 "established because of an OLM limit\n");
bbb822a8 2291 iob->rc = -EMLINK;
65a1f898 2292 }
d11ba0c4 2293 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
65a1f898 2294 return rc;
4a71df50
FB		 2295}
2296
2297static int qeth_ulp_setup(struct qeth_card *card)
2298{
2299 int rc;
2300 __u16 temp;
2301 struct qeth_cmd_buffer *iob;
2302 struct ccw_dev_id dev_id;
2303
d11ba0c4 2304 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2305
2306 iob = qeth_wait_for_buffer(&card->write);
2307 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2308
2309 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2310 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2311 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2312 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2313 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2314 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2315
2316 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2317 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2318 temp = (card->info.cula << 8) + card->info.unit_addr2;
2319 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2320 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2321 qeth_ulp_setup_cb, NULL);
2322 return rc;
2323}
2324
0da9581d
EL		 2325static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2326{
2327 int rc;
2328 struct qeth_qdio_out_buffer *newbuf;
2329
2330 rc = 0;
2331 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2332 if (!newbuf) {
2333 rc = -ENOMEM;
2334 goto out;
2335 }
2336 newbuf->buffer = &q->qdio_bufs[bidx];
2337 skb_queue_head_init(&newbuf->skb_list);
2338 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2339 newbuf->q = q;
2340 newbuf->aob = NULL;
2341 newbuf->next_pending = q->bufs[bidx];
2342 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2343 q->bufs[bidx] = newbuf;
2344 if (q->bufstates) {
2345 q->bufstates[bidx].user = newbuf;
2346 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2347 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2348 QETH_CARD_TEXT_(q->card, 2, "%lx",
2349 (long) newbuf->next_pending);
2350 }
2351out:
2352 return rc;
2353}
2354
2355
4a71df50
FB		 2356static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2357{
2358 int i, j;
2359
d11ba0c4 2360 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2361
2362 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2363 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2364 return 0;
2365
b3332930 2366 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2367 GFP_KERNEL);
4a71df50
FB		 2368 if (!card->qdio.in_q)
2369 goto out_nomem;
d11ba0c4
PT		 2370 QETH_DBF_TEXT(SETUP, 2, "inq");
2371 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2372 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2373 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2374 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2375 card->qdio.in_q->bufs[i].buffer =
2376 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2377 card->qdio.in_q->bufs[i].rx_skb = NULL;
2378 }
4a71df50
FB		 2379 /* inbound buffer pool */
2380 if (qeth_alloc_buffer_pool(card))
2381 goto out_freeinq;
0da9581d 2382
4a71df50
FB		 2383 /* outbound */
2384 card->qdio.out_qs =
b3332930 2385 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2386 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2387 if (!card->qdio.out_qs)
2388 goto out_freepool;
2389 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2390 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2391 GFP_KERNEL);
4a71df50
FB		 2392 if (!card->qdio.out_qs[i])
2393 goto out_freeoutq;
d11ba0c4
PT		 2394 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2395 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2396 card->qdio.out_qs[i]->queue_no = i;
2397 /* give outbound qeth_qdio_buffers their qdio_buffers */
2398 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
0da9581d
EL		 2399 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2400 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2401 goto out_freeoutqbufs;
4a71df50
FB		 2402 }
2403 }
0da9581d
EL		 2404
2405 /* completion */
2406 if (qeth_alloc_cq(card))
2407 goto out_freeoutq;
2408
4a71df50
FB		 2409 return 0;
2410
0da9581d
EL		 2411out_freeoutqbufs:
2412 while (j > 0) {
2413 --j;
2414 kmem_cache_free(qeth_qdio_outbuf_cache,
2415 card->qdio.out_qs[i]->bufs[j]);
2416 card->qdio.out_qs[i]->bufs[j] = NULL;
2417 }
4a71df50 2418out_freeoutq:
0da9581d 2419 while (i > 0) {
4a71df50 2420 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2421 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2422 }
4a71df50
FB		 2423 kfree(card->qdio.out_qs);
2424 card->qdio.out_qs = NULL;
2425out_freepool:
2426 qeth_free_buffer_pool(card);
2427out_freeinq:
2428 kfree(card->qdio.in_q);
2429 card->qdio.in_q = NULL;
2430out_nomem:
2431 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2432 return -ENOMEM;
2433}
2434
2435static void qeth_create_qib_param_field(struct qeth_card *card,
2436 char *param_field)
2437{
2438
2439 param_field[0] = _ascebc['P'];
2440 param_field[1] = _ascebc['C'];
2441 param_field[2] = _ascebc['I'];
2442 param_field[3] = _ascebc['T'];
2443 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2444 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2445 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2446}
2447
2448static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2449 char *param_field)
2450{
2451 param_field[16] = _ascebc['B'];
2452 param_field[17] = _ascebc['L'];
2453 param_field[18] = _ascebc['K'];
2454 param_field[19] = _ascebc['T'];
2455 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2456 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2457 *((unsigned int *) (&param_field[28])) =
2458 card->info.blkt.inter_packet_jumbo;
2459}
2460
2461static int qeth_qdio_activate(struct qeth_card *card)
2462{
d11ba0c4 2463 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2464 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2465}
2466
2467static int qeth_dm_act(struct qeth_card *card)
2468{
2469 int rc;
2470 struct qeth_cmd_buffer *iob;
2471
d11ba0c4 2472 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2473
2474 iob = qeth_wait_for_buffer(&card->write);
2475 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2476
2477 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2478 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2479 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2480 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2481 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2482 return rc;
2483}
2484
2485static int qeth_mpc_initialize(struct qeth_card *card)
2486{
2487 int rc;
2488
d11ba0c4 2489 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2490
2491 rc = qeth_issue_next_read(card);
2492 if (rc) {
d11ba0c4 2493 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2494 return rc;
2495 }
2496 rc = qeth_cm_enable(card);
2497 if (rc) {
d11ba0c4 2498 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2499 goto out_qdio;
2500 }
2501 rc = qeth_cm_setup(card);
2502 if (rc) {
d11ba0c4 2503 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2504 goto out_qdio;
2505 }
2506 rc = qeth_ulp_enable(card);
2507 if (rc) {
d11ba0c4 2508 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2509 goto out_qdio;
2510 }
2511 rc = qeth_ulp_setup(card);
2512 if (rc) {
d11ba0c4 2513 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2514 goto out_qdio;
2515 }
2516 rc = qeth_alloc_qdio_buffers(card);
2517 if (rc) {
d11ba0c4 2518 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2519 goto out_qdio;
2520 }
2521 rc = qeth_qdio_establish(card);
2522 if (rc) {
d11ba0c4 2523 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2524 qeth_free_qdio_buffers(card);
2525 goto out_qdio;
2526 }
2527 rc = qeth_qdio_activate(card);
2528 if (rc) {
d11ba0c4 2529 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2530 goto out_qdio;
2531 }
2532 rc = qeth_dm_act(card);
2533 if (rc) {
d11ba0c4 2534 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2535 goto out_qdio;
2536 }
2537
2538 return 0;
2539out_qdio:
2540 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2541 return rc;
2542}
2543
2544static void qeth_print_status_with_portname(struct qeth_card *card)
2545{
2546 char dbf_text[15];
2547 int i;
2548
2549 sprintf(dbf_text, "%s", card->info.portname + 1);
2550 for (i = 0; i < 8; i++)
2551 dbf_text[i] =
2552 (char) _ebcasc[(__u8) dbf_text[i]];
2553 dbf_text[8] = 0;
74eacdb9 2554 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2555 "with link type %s (portname: %s)\n",
4a71df50
FB		 2556 qeth_get_cardname(card),
2557 (card->info.mcl_level[0]) ? " (level: " : "",
2558 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2559 (card->info.mcl_level[0]) ? ")" : "",
2560 qeth_get_cardname_short(card),
2561 dbf_text);
2562
2563}
2564
2565static void qeth_print_status_no_portname(struct qeth_card *card)
2566{
2567 if (card->info.portname[0])
74eacdb9 2568 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2569 "card%s%s%s\nwith link type %s "
2570 "(no portname needed by interface).\n",
4a71df50
FB		 2571 qeth_get_cardname(card),
2572 (card->info.mcl_level[0]) ? " (level: " : "",
2573 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2574 (card->info.mcl_level[0]) ? ")" : "",
2575 qeth_get_cardname_short(card));
2576 else
74eacdb9 2577 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2578 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2579 qeth_get_cardname(card),
2580 (card->info.mcl_level[0]) ? " (level: " : "",
2581 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2582 (card->info.mcl_level[0]) ? ")" : "",
2583 qeth_get_cardname_short(card));
2584}
2585
2586void qeth_print_status_message(struct qeth_card *card)
2587{
2588 switch (card->info.type) {
5113fec0
UB		 2589 case QETH_CARD_TYPE_OSD:
2590 case QETH_CARD_TYPE_OSM:
2591 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2592 /* VM will use a non-zero first character
2593 * to indicate a HiperSockets like reporting
2594 * of the level OSA sets the first character to zero
2595 * */
2596 if (!card->info.mcl_level[0]) {
2597 sprintf(card->info.mcl_level, "%02x%02x",
2598 card->info.mcl_level[2],
2599 card->info.mcl_level[3]);
2600
2601 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2602 break;
2603 }
2604 /* fallthrough */
2605 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2606 if ((card->info.guestlan) ||
2607 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2608 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2609 card->info.mcl_level[0]];
2610 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2611 card->info.mcl_level[1]];
2612 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2613 card->info.mcl_level[2]];
2614 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2615 card->info.mcl_level[3]];
2616 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2617 }
2618 break;
2619 default:
2620 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2621 }
2622 if (card->info.portname_required)
2623 qeth_print_status_with_portname(card);
2624 else
2625 qeth_print_status_no_portname(card);
2626}
2627EXPORT_SYMBOL_GPL(qeth_print_status_message);
2628
4a71df50
FB		 2629static void qeth_initialize_working_pool_list(struct qeth_card *card)
2630{
2631 struct qeth_buffer_pool_entry *entry;
2632
847a50fd 2633 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2634
2635 list_for_each_entry(entry,
2636 &card->qdio.init_pool.entry_list, init_list) {
2637 qeth_put_buffer_pool_entry(card, entry);
2638 }
2639}
2640
2641static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2642 struct qeth_card *card)
2643{
2644 struct list_head *plh;
2645 struct qeth_buffer_pool_entry *entry;
2646 int i, free;
2647 struct page *page;
2648
2649 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2650 return NULL;
2651
2652 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2653 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2654 free = 1;
2655 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2656 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2657 free = 0;
2658 break;
2659 }
2660 }
2661 if (free) {
2662 list_del_init(&entry->list);
2663 return entry;
2664 }
2665 }
2666
2667 /* no free buffer in pool so take first one and swap pages */
2668 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2669 struct qeth_buffer_pool_entry, list);
2670 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2671 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2672 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2673 if (!page) {
2674 return NULL;
2675 } else {
2676 free_page((unsigned long)entry->elements[i]);
2677 entry->elements[i] = page_address(page);
2678 if (card->options.performance_stats)
2679 card->perf_stats.sg_alloc_page_rx++;
2680 }
2681 }
2682 }
2683 list_del_init(&entry->list);
2684 return entry;
2685}
2686
2687static int qeth_init_input_buffer(struct qeth_card *card,
2688 struct qeth_qdio_buffer *buf)
2689{
2690 struct qeth_buffer_pool_entry *pool_entry;
2691 int i;
2692
b3332930
FB		 2693 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2694 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2695 if (!buf->rx_skb)
2696 return 1;
2697 }
2698
4a71df50
FB		 2699 pool_entry = qeth_find_free_buffer_pool_entry(card);
2700 if (!pool_entry)
2701 return 1;
2702
2703 /*
2704 * since the buffer is accessed only from the input_tasklet
2705 * there shouldn't be a need to synchronize; also, since we use
2706 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2707 * buffers
2708 */
4a71df50
FB		 2709
2710 buf->pool_entry = pool_entry;
2711 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2712 buf->buffer->element[i].length = PAGE_SIZE;
2713 buf->buffer->element[i].addr = pool_entry->elements[i];
2714 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2715 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2716 else
3ec90878
JG		 2717 buf->buffer->element[i].eflags = 0;
2718 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2719 }
2720 return 0;
2721}
2722
2723int qeth_init_qdio_queues(struct qeth_card *card)
2724{
2725 int i, j;
2726 int rc;
2727
d11ba0c4 2728 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2729
2730 /* inbound queue */
2731 memset(card->qdio.in_q->qdio_bufs, 0,
2732 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2733 qeth_initialize_working_pool_list(card);
2734 /*give only as many buffers to hardware as we have buffer pool entries*/
2735 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2736 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2737 card->qdio.in_q->next_buf_to_init =
2738 card->qdio.in_buf_pool.buf_count - 1;
2739 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2740 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2741 if (rc) {
d11ba0c4 2742 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2743 return rc;
2744 }
0da9581d
EL		 2745
2746 /* completion */
2747 rc = qeth_cq_init(card);
2748 if (rc) {
2749 return rc;
2750 }
2751
4a71df50
FB		 2752 /* outbound queue */
2753 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2754 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2755 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2756 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2757 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2758 card->qdio.out_qs[i]->bufs[j],
2759 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2760 }
2761 card->qdio.out_qs[i]->card = card;
2762 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2763 card->qdio.out_qs[i]->do_pack = 0;
2764 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2765 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2766 atomic_set(&card->qdio.out_qs[i]->state,
2767 QETH_OUT_Q_UNLOCKED);
2768 }
2769 return 0;
2770}
2771EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2772
2773static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2774{
2775 switch (link_type) {
2776 case QETH_LINK_TYPE_HSTR:
2777 return 2;
2778 default:
2779 return 1;
2780 }
2781}
2782
2783static void qeth_fill_ipacmd_header(struct qeth_card *card,
2784 struct qeth_ipa_cmd *cmd, __u8 command,
2785 enum qeth_prot_versions prot)
2786{
2787 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2788 cmd->hdr.command = command;
2789 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2790 cmd->hdr.seqno = card->seqno.ipa;
2791 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2792 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2793 if (card->options.layer2)
2794 cmd->hdr.prim_version_no = 2;
2795 else
2796 cmd->hdr.prim_version_no = 1;
2797 cmd->hdr.param_count = 1;
2798 cmd->hdr.prot_version = prot;
2799 cmd->hdr.ipa_supported = 0;
2800 cmd->hdr.ipa_enabled = 0;
2801}
2802
2803struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2804 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2805{
2806 struct qeth_cmd_buffer *iob;
2807 struct qeth_ipa_cmd *cmd;
2808
2809 iob = qeth_wait_for_buffer(&card->write);
2810 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2811 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2812
2813 return iob;
2814}
2815EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2816
2817void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2818 char prot_type)
2819{
2820 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2821 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2822 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2823 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2824}
2825EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2826
2827int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2828 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2829 unsigned long),
2830 void *reply_param)
2831{
2832 int rc;
2833 char prot_type;
4a71df50 2834
847a50fd 2835 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2836
2837 if (card->options.layer2)
2838 if (card->info.type == QETH_CARD_TYPE_OSN)
2839 prot_type = QETH_PROT_OSN2;
2840 else
2841 prot_type = QETH_PROT_LAYER2;
2842 else
2843 prot_type = QETH_PROT_TCPIP;
2844 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2845 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2846 iob, reply_cb, reply_param);
908abbb5
UB		 2847 if (rc == -ETIME) {
2848 qeth_clear_ipacmd_list(card);
2849 qeth_schedule_recovery(card);
2850 }
4a71df50
FB		 2851 return rc;
2852}
2853EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2854
4a71df50
FB		 2855int qeth_send_startlan(struct qeth_card *card)
2856{
2857 int rc;
70919e23 2858 struct qeth_cmd_buffer *iob;
4a71df50 2859
d11ba0c4 2860 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2861
70919e23
UB		 2862 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2863 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2864 return rc;
2865}
2866EXPORT_SYMBOL_GPL(qeth_send_startlan);
2867
4a71df50
FB		 2868int qeth_default_setadapterparms_cb(struct qeth_card *card,
2869 struct qeth_reply *reply, unsigned long data)
2870{
2871 struct qeth_ipa_cmd *cmd;
2872
847a50fd 2873 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2874
2875 cmd = (struct qeth_ipa_cmd *) data;
2876 if (cmd->hdr.return_code == 0)
2877 cmd->hdr.return_code =
2878 cmd->data.setadapterparms.hdr.return_code;
2879 return 0;
2880}
2881EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2882
2883static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2884 struct qeth_reply *reply, unsigned long data)
2885{
2886 struct qeth_ipa_cmd *cmd;
2887
847a50fd 2888 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2889
2890 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2891 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2892 card->info.link_type =
2893 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2894 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2895 }
4a71df50
FB		 2896 card->options.adp.supported_funcs =
2897 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2898 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2899}
2900
2901struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2902 __u32 command, __u32 cmdlen)
2903{
2904 struct qeth_cmd_buffer *iob;
2905 struct qeth_ipa_cmd *cmd;
2906
2907 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2908 QETH_PROT_IPV4);
2909 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2910 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2911 cmd->data.setadapterparms.hdr.command_code = command;
2912 cmd->data.setadapterparms.hdr.used_total = 1;
2913 cmd->data.setadapterparms.hdr.seq_no = 1;
2914
2915 return iob;
2916}
2917EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2918
2919int qeth_query_setadapterparms(struct qeth_card *card)
2920{
2921 int rc;
2922 struct qeth_cmd_buffer *iob;
2923
847a50fd 2924 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2925 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2926 sizeof(struct qeth_ipacmd_setadpparms));
2927 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2928 return rc;
2929}
2930EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2931
1da74b1c
FB		 2932static int qeth_query_ipassists_cb(struct qeth_card *card,
2933 struct qeth_reply *reply, unsigned long data)
2934{
2935 struct qeth_ipa_cmd *cmd;
2936
2937 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2938
2939 cmd = (struct qeth_ipa_cmd *) data;
2940 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2941 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2942 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2943 } else {
2944 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2945 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2946 }
2947 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
e0a8114c
UB		 2948 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported);
2949 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled);
1da74b1c
FB		 2950 return 0;
2951}
2952
2953int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2954{
2955 int rc;
2956 struct qeth_cmd_buffer *iob;
2957
2958 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2959 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2960 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2961 return rc;
2962}
2963EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2964
2965static int qeth_query_setdiagass_cb(struct qeth_card *card,
2966 struct qeth_reply *reply, unsigned long data)
2967{
2968 struct qeth_ipa_cmd *cmd;
2969 __u16 rc;
2970
2971 cmd = (struct qeth_ipa_cmd *)data;
2972 rc = cmd->hdr.return_code;
2973 if (rc)
2974 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2975 else
2976 card->info.diagass_support = cmd->data.diagass.ext;
2977 return 0;
2978}
2979
2980static int qeth_query_setdiagass(struct qeth_card *card)
2981{
2982 struct qeth_cmd_buffer *iob;
2983 struct qeth_ipa_cmd *cmd;
2984
2985 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2986 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2987 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2988 cmd->data.diagass.subcmd_len = 16;
2989 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2990 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2991}
2992
2993static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2994{
2995 unsigned long info = get_zeroed_page(GFP_KERNEL);
2996 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2997 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2998 struct ccw_dev_id ccwid;
2999 int level, rc;
3000
3001 tid->chpid = card->info.chpid;
3002 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3003 tid->ssid = ccwid.ssid;
3004 tid->devno = ccwid.devno;
3005 if (!info)
3006 return;
3007
3008 rc = stsi(NULL, 0, 0, 0);
3009 if (rc == -ENOSYS)
3010 level = rc;
3011 else
3012 level = (((unsigned int) rc) >> 28);
3013
3014 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
3015 tid->lparnr = info222->lpar_number;
3016
3017 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
3018 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3019 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3020 }
3021 free_page(info);
3022 return;
3023}
3024
3025static int qeth_hw_trap_cb(struct qeth_card *card,
3026 struct qeth_reply *reply, unsigned long data)
3027{
3028 struct qeth_ipa_cmd *cmd;
3029 __u16 rc;
3030
3031 cmd = (struct qeth_ipa_cmd *)data;
3032 rc = cmd->hdr.return_code;
3033 if (rc)
3034 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3035 return 0;
3036}
3037
3038int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3039{
3040 struct qeth_cmd_buffer *iob;
3041 struct qeth_ipa_cmd *cmd;
3042
3043 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3044 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3045 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3046 cmd->data.diagass.subcmd_len = 80;
3047 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3048 cmd->data.diagass.type = 1;
3049 cmd->data.diagass.action = action;
3050 switch (action) {
3051 case QETH_DIAGS_TRAP_ARM:
3052 cmd->data.diagass.options = 0x0003;
3053 cmd->data.diagass.ext = 0x00010000 +
3054 sizeof(struct qeth_trap_id);
3055 qeth_get_trap_id(card,
3056 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3057 break;
3058 case QETH_DIAGS_TRAP_DISARM:
3059 cmd->data.diagass.options = 0x0001;
3060 break;
3061 case QETH_DIAGS_TRAP_CAPTURE:
3062 break;
3063 }
3064 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3065}
3066EXPORT_SYMBOL_GPL(qeth_hw_trap);
3067
76b11f8e
UB		 3068int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3069 unsigned int qdio_error, const char *dbftext)
4a71df50 3070{
779e6e1c 3071 if (qdio_error) {
847a50fd 3072 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3073 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3074 buf->element[15].sflags);
38593d01 3075 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3076 buf->element[14].sflags);
38593d01 3077 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3078 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3079 card->stats.rx_dropped++;
3080 return 0;
3081 } else
3082 return 1;
4a71df50
FB		 3083 }
3084 return 0;
3085}
3086EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3087
b3332930
FB		 3088void qeth_buffer_reclaim_work(struct work_struct *work)
3089{
3090 struct qeth_card *card = container_of(work, struct qeth_card,
3091 buffer_reclaim_work.work);
3092
3093 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3094 qeth_queue_input_buffer(card, card->reclaim_index);
3095}
3096
4a71df50
FB		 3097void qeth_queue_input_buffer(struct qeth_card *card, int index)
3098{
3099 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3100 struct list_head *lh;
4a71df50
FB		 3101 int count;
3102 int i;
3103 int rc;
3104 int newcount = 0;
3105
4a71df50
FB		 3106 count = (index < queue->next_buf_to_init)?
3107 card->qdio.in_buf_pool.buf_count -
3108 (queue->next_buf_to_init - index) :
3109 card->qdio.in_buf_pool.buf_count -
3110 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3111 /* only requeue at a certain threshold to avoid SIGAs */
3112 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3113 for (i = queue->next_buf_to_init;
3114 i < queue->next_buf_to_init + count; ++i) {
3115 if (qeth_init_input_buffer(card,
3116 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3117 break;
3118 } else {
3119 newcount++;
3120 }
3121 }
3122
3123 if (newcount < count) {
3124 /* we are in memory shortage so we switch back to
3125 traditional skb allocation and drop packages */
4a71df50
FB		 3126 atomic_set(&card->force_alloc_skb, 3);
3127 count = newcount;
3128 } else {
4a71df50
FB		 3129 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3130 }
3131
b3332930
FB		 3132 if (!count) {
3133 i = 0;
3134 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3135 i++;
3136 if (i == card->qdio.in_buf_pool.buf_count) {
3137 QETH_CARD_TEXT(card, 2, "qsarbw");
3138 card->reclaim_index = index;
3139 schedule_delayed_work(
3140 &card->buffer_reclaim_work,
3141 QETH_RECLAIM_WORK_TIME);
3142 }
3143 return;
3144 }
3145
4a71df50
FB		 3146 /*
3147 * according to old code it should be avoided to requeue all
3148 * 128 buffers in order to benefit from PCI avoidance.
3149 * this function keeps at least one buffer (the buffer at
3150 * 'index') un-requeued -> this buffer is the first buffer that
3151 * will be requeued the next time
3152 */
3153 if (card->options.performance_stats) {
3154 card->perf_stats.inbound_do_qdio_cnt++;
3155 card->perf_stats.inbound_do_qdio_start_time =
3156 qeth_get_micros();
3157 }
779e6e1c
JG		 3158 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3159 queue->next_buf_to_init, count);
4a71df50
FB		 3160 if (card->options.performance_stats)
3161 card->perf_stats.inbound_do_qdio_time +=
3162 qeth_get_micros() -
3163 card->perf_stats.inbound_do_qdio_start_time;
3164 if (rc) {
847a50fd 3165 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3166 }
3167 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3168 QDIO_MAX_BUFFERS_PER_Q;
3169 }
3170}
3171EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3172
3173static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3174 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3175{
3ec90878 3176 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3177
847a50fd 3178 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3179 if (card->info.type == QETH_CARD_TYPE_IQD) {
3180 if (sbalf15 == 0) {
3181 qdio_err = 0;
3182 } else {
3183 qdio_err = 1;
3184 }
3185 }
76b11f8e 3186 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3187
3188 if (!qdio_err)
4a71df50 3189 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3190
3191 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3192 return QETH_SEND_ERROR_RETRY;
3193
847a50fd
CO		 3194 QETH_CARD_TEXT(card, 1, "lnkfail");
3195 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3196 (u16)qdio_err, (u8)sbalf15);
3197 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3198}
3199
3200/*
3201 * Switched to packing state if the number of used buffers on a queue
3202 * reaches a certain limit.
3203 */
3204static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3205{
3206 if (!queue->do_pack) {
3207 if (atomic_read(&queue->used_buffers)
3208 >= QETH_HIGH_WATERMARK_PACK){
3209 /* switch non-PACKING -> PACKING */
847a50fd 3210 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3211 if (queue->card->options.performance_stats)
3212 queue->card->perf_stats.sc_dp_p++;
3213 queue->do_pack = 1;
3214 }
3215 }
3216}
3217
3218/*
3219 * Switches from packing to non-packing mode. If there is a packing
3220 * buffer on the queue this buffer will be prepared to be flushed.
3221 * In that case 1 is returned to inform the caller. If no buffer
3222 * has to be flushed, zero is returned.
3223 */
3224static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3225{
3226 struct qeth_qdio_out_buffer *buffer;
3227 int flush_count = 0;
3228
3229 if (queue->do_pack) {
3230 if (atomic_read(&queue->used_buffers)
3231 <= QETH_LOW_WATERMARK_PACK) {
3232 /* switch PACKING -> non-PACKING */
847a50fd 3233 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3234 if (queue->card->options.performance_stats)
3235 queue->card->perf_stats.sc_p_dp++;
3236 queue->do_pack = 0;
3237 /* flush packing buffers */
0da9581d 3238 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3239 if ((atomic_read(&buffer->state) ==
3240 QETH_QDIO_BUF_EMPTY) &&
3241 (buffer->next_element_to_fill > 0)) {
3242 atomic_set(&buffer->state,
0da9581d 3243 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3244 flush_count++;
3245 queue->next_buf_to_fill =
3246 (queue->next_buf_to_fill + 1) %
3247 QDIO_MAX_BUFFERS_PER_Q;
3248 }
3249 }
3250 }
3251 return flush_count;
3252}
3253
0da9581d 3254
4a71df50
FB		 3255/*
3256 * Called to flush a packing buffer if no more pci flags are on the queue.
3257 * Checks if there is a packing buffer and prepares it to be flushed.
3258 * In that case returns 1, otherwise zero.
3259 */
3260static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3261{
3262 struct qeth_qdio_out_buffer *buffer;
3263
0da9581d 3264 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3265 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3266 (buffer->next_element_to_fill > 0)) {
3267 /* it's a packing buffer */
3268 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3269 queue->next_buf_to_fill =
3270 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3271 return 1;
3272 }
3273 return 0;
3274}
3275
779e6e1c
JG		 3276static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3277 int count)
4a71df50
FB		 3278{
3279 struct qeth_qdio_out_buffer *buf;
3280 int rc;
3281 int i;
3282 unsigned int qdio_flags;
3283
4a71df50 3284 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3285 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3286 buf = queue->bufs[bidx];
3ec90878
JG		 3287 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3288 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3289
0da9581d
EL		 3290 if (queue->bufstates)
3291 queue->bufstates[bidx].user = buf;
3292
4a71df50
FB		 3293 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3294 continue;
3295
3296 if (!queue->do_pack) {
3297 if ((atomic_read(&queue->used_buffers) >=
3298 (QETH_HIGH_WATERMARK_PACK -
3299 QETH_WATERMARK_PACK_FUZZ)) &&
3300 !atomic_read(&queue->set_pci_flags_count)) {
3301 /* it's likely that we'll go to packing
3302 * mode soon */
3303 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3304 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3305 }
3306 } else {
3307 if (!atomic_read(&queue->set_pci_flags_count)) {
3308 /*
3309 * there's no outstanding PCI any more, so we
3310 * have to request a PCI to be sure the the PCI
3311 * will wake at some time in the future then we
3312 * can flush packed buffers that might still be
3313 * hanging around, which can happen if no
3314 * further send was requested by the stack
3315 */
3316 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3317 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3318 }
3319 }
3320 }
3321
3322 queue->card->dev->trans_start = jiffies;
3323 if (queue->card->options.performance_stats) {
3324 queue->card->perf_stats.outbound_do_qdio_cnt++;
3325 queue->card->perf_stats.outbound_do_qdio_start_time =
3326 qeth_get_micros();
3327 }
3328 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3329 if (atomic_read(&queue->set_pci_flags_count))
3330 qdio_flags |= QDIO_FLAG_PCI_OUT;
3331 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3332 queue->queue_no, index, count);
4a71df50
FB		 3333 if (queue->card->options.performance_stats)
3334 queue->card->perf_stats.outbound_do_qdio_time +=
3335 qeth_get_micros() -
3336 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3337 atomic_add(count, &queue->used_buffers);
4a71df50 3338 if (rc) {
d303b6fd
JG		 3339 queue->card->stats.tx_errors += count;
3340 /* ignore temporary SIGA errors without busy condition */
3341 if (rc == QDIO_ERROR_SIGA_TARGET)
3342 return;
847a50fd 3343 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3344 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3345 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3346 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3347 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3348
4a71df50
FB		 3349 /* this must not happen under normal circumstances. if it
3350 * happens something is really wrong -> recover */
3351 qeth_schedule_recovery(queue->card);
3352 return;
3353 }
4a71df50
FB		 3354 if (queue->card->options.performance_stats)
3355 queue->card->perf_stats.bufs_sent += count;
3356}
3357
3358static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3359{
3360 int index;
3361 int flush_cnt = 0;
3362 int q_was_packing = 0;
3363
3364 /*
3365 * check if weed have to switch to non-packing mode or if
3366 * we have to get a pci flag out on the queue
3367 */
3368 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3369 !atomic_read(&queue->set_pci_flags_count)) {
3370 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3371 QETH_OUT_Q_UNLOCKED) {
3372 /*
3373 * If we get in here, there was no action in
3374 * do_send_packet. So, we check if there is a
3375 * packing buffer to be flushed here.
3376 */
3377 netif_stop_queue(queue->card->dev);
3378 index = queue->next_buf_to_fill;
3379 q_was_packing = queue->do_pack;
3380 /* queue->do_pack may change */
3381 barrier();
3382 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3383 if (!flush_cnt &&
3384 !atomic_read(&queue->set_pci_flags_count))
3385 flush_cnt +=
3386 qeth_flush_buffers_on_no_pci(queue);
3387 if (queue->card->options.performance_stats &&
3388 q_was_packing)
3389 queue->card->perf_stats.bufs_sent_pack +=
3390 flush_cnt;
3391 if (flush_cnt)
779e6e1c 3392 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3393 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3394 }
3395 }
3396}
3397
a1c3ed4c
FB		 3398void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3399 unsigned long card_ptr)
3400{
3401 struct qeth_card *card = (struct qeth_card *)card_ptr;
3402
0cffef48 3403 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3404 napi_schedule(&card->napi);
3405}
3406EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3407
0da9581d
EL		 3408int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3409{
3410 int rc;
3411
3412 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3413 rc = -1;
3414 goto out;
3415 } else {
3416 if (card->options.cq == cq) {
3417 rc = 0;
3418 goto out;
3419 }
3420
3421 if (card->state != CARD_STATE_DOWN &&
3422 card->state != CARD_STATE_RECOVER) {
3423 rc = -1;
3424 goto out;
3425 }
3426
3427 qeth_free_qdio_buffers(card);
3428 card->options.cq = cq;
3429 rc = 0;
3430 }
3431out:
3432 return rc;
3433
3434}
3435EXPORT_SYMBOL_GPL(qeth_configure_cq);
3436
3437
3438static void qeth_qdio_cq_handler(struct qeth_card *card,
3439 unsigned int qdio_err,
3440 unsigned int queue, int first_element, int count) {
3441 struct qeth_qdio_q *cq = card->qdio.c_q;
3442 int i;
3443 int rc;
3444
3445 if (!qeth_is_cq(card, queue))
3446 goto out;
3447
3448 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3449 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3450 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3451
3452 if (qdio_err) {
3453 netif_stop_queue(card->dev);
3454 qeth_schedule_recovery(card);
3455 goto out;
3456 }
3457
3458 if (card->options.performance_stats) {
3459 card->perf_stats.cq_cnt++;
3460 card->perf_stats.cq_start_time = qeth_get_micros();
3461 }
3462
3463 for (i = first_element; i < first_element + count; ++i) {
3464 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3465 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3466 int e;
3467
3468 e = 0;
3469 while (buffer->element[e].addr) {
3470 unsigned long phys_aob_addr;
3471
3472 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3473 qeth_qdio_handle_aob(card, phys_aob_addr);
3474 buffer->element[e].addr = NULL;
3475 buffer->element[e].eflags = 0;
3476 buffer->element[e].sflags = 0;
3477 buffer->element[e].length = 0;
3478
3479 ++e;
3480 }
3481
3482 buffer->element[15].eflags = 0;
3483 buffer->element[15].sflags = 0;
3484 }
3485 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3486 card->qdio.c_q->next_buf_to_init,
3487 count);
3488 if (rc) {
3489 dev_warn(&card->gdev->dev,
3490 "QDIO reported an error, rc=%i\n", rc);
3491 QETH_CARD_TEXT(card, 2, "qcqherr");
3492 }
3493 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3494 + count) % QDIO_MAX_BUFFERS_PER_Q;
3495
3496 netif_wake_queue(card->dev);
3497
3498 if (card->options.performance_stats) {
3499 int delta_t = qeth_get_micros();
3500 delta_t -= card->perf_stats.cq_start_time;
3501 card->perf_stats.cq_time += delta_t;
3502 }
3503out:
3504 return;
3505}
3506
a1c3ed4c 3507void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3508 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3509 unsigned long card_ptr)
3510{
3511 struct qeth_card *card = (struct qeth_card *)card_ptr;
3512
0da9581d
EL		 3513 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3514 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3515
3516 if (qeth_is_cq(card, queue))
3517 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3518 else if (qdio_err)
a1c3ed4c 3519 qeth_schedule_recovery(card);
0da9581d
EL		 3520
3521
a1c3ed4c
FB		 3522}
3523EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3524
779e6e1c
JG		 3525void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3526 unsigned int qdio_error, int __queue, int first_element,
3527 int count, unsigned long card_ptr)
4a71df50
FB		 3528{
3529 struct qeth_card *card = (struct qeth_card *) card_ptr;
3530 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3531 struct qeth_qdio_out_buffer *buffer;
3532 int i;
3533
847a50fd 3534 QETH_CARD_TEXT(card, 6, "qdouhdl");
779e6e1c 3535 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
847a50fd 3536 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3537 netif_stop_queue(card->dev);
3538 qeth_schedule_recovery(card);
3539 return;
4a71df50
FB		 3540 }
3541 if (card->options.performance_stats) {
3542 card->perf_stats.outbound_handler_cnt++;
3543 card->perf_stats.outbound_handler_start_time =
3544 qeth_get_micros();
3545 }
3546 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3547 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3548 buffer = queue->bufs[bidx];
b67d801f 3549 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3550
3551 if (queue->bufstates &&
3552 (queue->bufstates[bidx].flags &
3553 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
b3332930
FB		 3554 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3555
3556 if (atomic_cmpxchg(&buffer->state,
3557 QETH_QDIO_BUF_PRIMED,
3558 QETH_QDIO_BUF_PENDING) ==
3559 QETH_QDIO_BUF_PRIMED) {
3560 qeth_notify_skbs(queue, buffer,
3561 TX_NOTIFY_PENDING);
3562 }
0da9581d
EL		 3563 buffer->aob = queue->bufstates[bidx].aob;
3564 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3565 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3566 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3567 virt_to_phys(buffer->aob));
3568 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
b3332930
FB		 3569 if (qeth_init_qdio_out_buf(queue, bidx)) {
3570 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3571 qeth_schedule_recovery(card);
b3332930 3572 }
0da9581d 3573 } else {
b3332930
FB		 3574 if (card->options.cq == QETH_CQ_ENABLED) {
3575 enum iucv_tx_notify n;
3576
3577 n = qeth_compute_cq_notification(
3578 buffer->buffer->element[15].sflags, 0);
3579 qeth_notify_skbs(queue, buffer, n);
3580 }
3581
0da9581d
EL		 3582 qeth_clear_output_buffer(queue, buffer,
3583 QETH_QDIO_BUF_EMPTY);
3584 }
3585 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3586 }
3587 atomic_sub(count, &queue->used_buffers);
3588 /* check if we need to do something on this outbound queue */
3589 if (card->info.type != QETH_CARD_TYPE_IQD)
3590 qeth_check_outbound_queue(queue);
3591
3592 netif_wake_queue(queue->card->dev);
3593 if (card->options.performance_stats)
3594 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3595 card->perf_stats.outbound_handler_start_time;
3596}
3597EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3598
4a71df50
FB		 3599int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3600 int ipv, int cast_type)
3601{
5113fec0
UB		 3602 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3603 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3604 return card->qdio.default_out_queue;
3605 switch (card->qdio.no_out_queues) {
3606 case 4:
3607 if (cast_type && card->info.is_multicast_different)
3608 return card->info.is_multicast_different &
3609 (card->qdio.no_out_queues - 1);
3610 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3611 const u8 tos = ip_hdr(skb)->tos;
3612
3613 if (card->qdio.do_prio_queueing ==
3614 QETH_PRIO_Q_ING_TOS) {
3615 if (tos & IP_TOS_NOTIMPORTANT)
3616 return 3;
3617 if (tos & IP_TOS_HIGHRELIABILITY)
3618 return 2;
3619 if (tos & IP_TOS_HIGHTHROUGHPUT)
3620 return 1;
3621 if (tos & IP_TOS_LOWDELAY)
3622 return 0;
3623 }
3624 if (card->qdio.do_prio_queueing ==
3625 QETH_PRIO_Q_ING_PREC)
3626 return 3 - (tos >> 6);
3627 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3628 /* TODO: IPv6!!! */
3629 }
3630 return card->qdio.default_out_queue;
3631 case 1: /* fallthrough for single-out-queue 1920-device */
3632 default:
3633 return card->qdio.default_out_queue;
3634 }
3635}
3636EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3637
4a71df50
FB		 3638int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3639 struct sk_buff *skb, int elems)
3640{
51aa165c
FB		 3641 int dlen = skb->len - skb->data_len;
3642 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3643 PFN_DOWN((unsigned long)skb->data);
4a71df50 3644
51aa165c 3645 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3646 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3647 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3648 "(Number=%d / Length=%d). Discarded.\n",
3649 (elements_needed+elems), skb->len);
3650 return 0;
3651 }
3652 return elements_needed;
3653}
3654EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3655
51aa165c
FB		 3656int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3657{
3658 int hroom, inpage, rest;
3659
3660 if (((unsigned long)skb->data & PAGE_MASK) !=
3661 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3662 hroom = skb_headroom(skb);
3663 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3664 rest = len - inpage;
3665 if (rest > hroom)
3666 return 1;
3667 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3668 skb->data -= rest;
3669 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3670 }
3671 return 0;
3672}
3673EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3674
f90b744e 3675static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3676 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3677 int offset)
4a71df50 3678{
51aa165c 3679 int length = skb->len - skb->data_len;
4a71df50
FB		 3680 int length_here;
3681 int element;
3682 char *data;
51aa165c
FB		 3683 int first_lap, cnt;
3684 struct skb_frag_struct *frag;
4a71df50
FB		 3685
3686 element = *next_element_to_fill;
3687 data = skb->data;
3688 first_lap = (is_tso == 0 ? 1 : 0);
3689
683d718a
FB		 3690 if (offset >= 0) {
3691 data = skb->data + offset;
e1f03ae8 3692 length -= offset;
683d718a
FB		 3693 first_lap = 0;
3694 }
3695
4a71df50
FB		 3696 while (length > 0) {
3697 /* length_here is the remaining amount of data in this page */
3698 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3699 if (length < length_here)
3700 length_here = length;
3701
3702 buffer->element[element].addr = data;
3703 buffer->element[element].length = length_here;
3704 length -= length_here;
3705 if (!length) {
3706 if (first_lap)
51aa165c 3707 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3708 buffer->element[element].eflags =
3709 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3710 else
3ec90878 3711 buffer->element[element].eflags = 0;
4a71df50 3712 else
3ec90878
JG		 3713 buffer->element[element].eflags =
3714 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3715 } else {
3716 if (first_lap)
3ec90878
JG		 3717 buffer->element[element].eflags =
3718 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3719 else
3ec90878
JG		 3720 buffer->element[element].eflags =
3721 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3722 }
3723 data += length_here;
3724 element++;
3725 first_lap = 0;
3726 }
51aa165c
FB		 3727
3728 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3729 frag = &skb_shinfo(skb)->frags[cnt];
8d36bb0d
IC		 3730 buffer->element[element].addr = (char *)
3731 page_to_phys(skb_frag_page(frag))
51aa165c
FB		 3732 + frag->page_offset;
3733 buffer->element[element].length = frag->size;
3ec90878 3734 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3735 element++;
3736 }
3737
3ec90878
JG		 3738 if (buffer->element[element - 1].eflags)
3739 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3740 *next_element_to_fill = element;
3741}
3742
f90b744e 3743static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3744 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3745 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3746{
3747 struct qdio_buffer *buffer;
4a71df50
FB		 3748 int flush_cnt = 0, hdr_len, large_send = 0;
3749
4a71df50
FB		 3750 buffer = buf->buffer;
3751 atomic_inc(&skb->users);
3752 skb_queue_tail(&buf->skb_list, skb);
3753
4a71df50 3754 /*check first on TSO ....*/
683d718a 3755 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3756 int element = buf->next_element_to_fill;
3757
683d718a
FB		 3758 hdr_len = sizeof(struct qeth_hdr_tso) +
3759 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3760 /*fill first buffer entry only with header information */
3761 buffer->element[element].addr = skb->data;
3762 buffer->element[element].length = hdr_len;
3ec90878 3763 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3764 buf->next_element_to_fill++;
3765 skb->data += hdr_len;
3766 skb->len -= hdr_len;
3767 large_send = 1;
3768 }
683d718a
FB		 3769
3770 if (offset >= 0) {
3771 int element = buf->next_element_to_fill;
3772 buffer->element[element].addr = hdr;
3773 buffer->element[element].length = sizeof(struct qeth_hdr) +
3774 hd_len;
3ec90878 3775 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3776 buf->is_header[element] = 1;
3777 buf->next_element_to_fill++;
3778 }
3779
51aa165c
FB		 3780 __qeth_fill_buffer(skb, buffer, large_send,
3781 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3782
3783 if (!queue->do_pack) {
847a50fd 3784 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3785 /* set state to PRIMED -> will be flushed */
3786 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3787 flush_cnt = 1;
3788 } else {
847a50fd 3789 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3790 if (queue->card->options.performance_stats)
3791 queue->card->perf_stats.skbs_sent_pack++;
3792 if (buf->next_element_to_fill >=
3793 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3794 /*
3795 * packed buffer if full -> set state PRIMED
3796 * -> will be flushed
3797 */
3798 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3799 flush_cnt = 1;
3800 }
3801 }
3802 return flush_cnt;
3803}
3804
3805int qeth_do_send_packet_fast(struct qeth_card *card,
3806 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3807 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3808 int offset, int hd_len)
4a71df50
FB		 3809{
3810 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3811 int index;
3812
4a71df50
FB		 3813 /* spin until we get the queue ... */
3814 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3815 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3816 /* ... now we've got the queue */
3817 index = queue->next_buf_to_fill;
0da9581d 3818 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3819 /*
3820 * check if buffer is empty to make sure that we do not 'overtake'
3821 * ourselves and try to fill a buffer that is already primed
3822 */
3823 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3824 goto out;
64ef8957 3825 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3826 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3827 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3828 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3829 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3830 return 0;
3831out:
3832 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3833 return -EBUSY;
3834}
3835EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3836
3837int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3838 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3839 int elements_needed)
4a71df50
FB		 3840{
3841 struct qeth_qdio_out_buffer *buffer;
3842 int start_index;
3843 int flush_count = 0;
3844 int do_pack = 0;
3845 int tmp;
3846 int rc = 0;
3847
4a71df50
FB		 3848 /* spin until we get the queue ... */
3849 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3850 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3851 start_index = queue->next_buf_to_fill;
0da9581d 3852 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3853 /*
3854 * check if buffer is empty to make sure that we do not 'overtake'
3855 * ourselves and try to fill a buffer that is already primed
3856 */
3857 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3858 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3859 return -EBUSY;
3860 }
3861 /* check if we need to switch packing state of this queue */
3862 qeth_switch_to_packing_if_needed(queue);
3863 if (queue->do_pack) {
3864 do_pack = 1;
64ef8957
FB		 3865 /* does packet fit in current buffer? */
3866 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3867 buffer->next_element_to_fill) < elements_needed) {
3868 /* ... no -> set state PRIMED */
3869 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3870 flush_count++;
3871 queue->next_buf_to_fill =
3872 (queue->next_buf_to_fill + 1) %
3873 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3874 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3875 /* we did a step forward, so check buffer state
3876 * again */
3877 if (atomic_read(&buffer->state) !=
3878 QETH_QDIO_BUF_EMPTY) {
3879 qeth_flush_buffers(queue, start_index,
779e6e1c 3880 flush_count);
64ef8957 3881 atomic_set(&queue->state,
4a71df50 3882 QETH_OUT_Q_UNLOCKED);
64ef8957 3883 return -EBUSY;
4a71df50
FB		 3884 }
3885 }
3886 }
64ef8957 3887 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3888 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3889 QDIO_MAX_BUFFERS_PER_Q;
3890 flush_count += tmp;
4a71df50 3891 if (flush_count)
779e6e1c 3892 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3893 else if (!atomic_read(&queue->set_pci_flags_count))
3894 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3895 /*
3896 * queue->state will go from LOCKED -> UNLOCKED or from
3897 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3898 * (switch packing state or flush buffer to get another pci flag out).
3899 * In that case we will enter this loop
3900 */
3901 while (atomic_dec_return(&queue->state)) {
3902 flush_count = 0;
3903 start_index = queue->next_buf_to_fill;
3904 /* check if we can go back to non-packing state */
3905 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3906 /*
3907 * check if we need to flush a packing buffer to get a pci
3908 * flag out on the queue
3909 */
3910 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3911 flush_count += qeth_flush_buffers_on_no_pci(queue);
3912 if (flush_count)
779e6e1c 3913 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3914 }
3915 /* at this point the queue is UNLOCKED again */
3916 if (queue->card->options.performance_stats && do_pack)
3917 queue->card->perf_stats.bufs_sent_pack += flush_count;
3918
3919 return rc;
3920}
3921EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3922
3923static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3924 struct qeth_reply *reply, unsigned long data)
3925{
3926 struct qeth_ipa_cmd *cmd;
3927 struct qeth_ipacmd_setadpparms *setparms;
3928
847a50fd 3929 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3930
3931 cmd = (struct qeth_ipa_cmd *) data;
3932 setparms = &(cmd->data.setadapterparms);
3933
3934 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3935 if (cmd->hdr.return_code) {
847a50fd 3936 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3937 setparms->data.mode = SET_PROMISC_MODE_OFF;
3938 }
3939 card->info.promisc_mode = setparms->data.mode;
3940 return 0;
3941}
3942
3943void qeth_setadp_promisc_mode(struct qeth_card *card)
3944{
3945 enum qeth_ipa_promisc_modes mode;
3946 struct net_device *dev = card->dev;
3947 struct qeth_cmd_buffer *iob;
3948 struct qeth_ipa_cmd *cmd;
3949
847a50fd 3950 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3951
3952 if (((dev->flags & IFF_PROMISC) &&
3953 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3954 (!(dev->flags & IFF_PROMISC) &&
3955 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3956 return;
3957 mode = SET_PROMISC_MODE_OFF;
3958 if (dev->flags & IFF_PROMISC)
3959 mode = SET_PROMISC_MODE_ON;
847a50fd 3960 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3961
3962 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3963 sizeof(struct qeth_ipacmd_setadpparms));
3964 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3965 cmd->data.setadapterparms.data.mode = mode;
3966 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3967}
3968EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3969
3970int qeth_change_mtu(struct net_device *dev, int new_mtu)
3971{
3972 struct qeth_card *card;
3973 char dbf_text[15];
3974
509e2562 3975 card = dev->ml_priv;
4a71df50 3976
847a50fd 3977 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3978 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3979 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3980
3981 if (new_mtu < 64)
3982 return -EINVAL;
3983 if (new_mtu > 65535)
3984 return -EINVAL;
3985 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3986 (!qeth_mtu_is_valid(card, new_mtu)))
3987 return -EINVAL;
3988 dev->mtu = new_mtu;
3989 return 0;
3990}
3991EXPORT_SYMBOL_GPL(qeth_change_mtu);
3992
3993struct net_device_stats *qeth_get_stats(struct net_device *dev)
3994{
3995 struct qeth_card *card;
3996
509e2562 3997 card = dev->ml_priv;
4a71df50 3998
847a50fd 3999 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4000
4001 return &card->stats;
4002}
4003EXPORT_SYMBOL_GPL(qeth_get_stats);
4004
4005static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4006 struct qeth_reply *reply, unsigned long data)
4007{
4008 struct qeth_ipa_cmd *cmd;
4009
847a50fd 4010 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4011
4012 cmd = (struct qeth_ipa_cmd *) data;
4013 if (!card->options.layer2 ||
4014 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4015 memcpy(card->dev->dev_addr,
4016 &cmd->data.setadapterparms.data.change_addr.addr,
4017 OSA_ADDR_LEN);
4018 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4019 }
4020 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4021 return 0;
4022}
4023
4024int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4025{
4026 int rc;
4027 struct qeth_cmd_buffer *iob;
4028 struct qeth_ipa_cmd *cmd;
4029
847a50fd 4030 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4031
4032 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4033 sizeof(struct qeth_ipacmd_setadpparms));
4034 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4035 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4036 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4037 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4038 card->dev->dev_addr, OSA_ADDR_LEN);
4039 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4040 NULL);
4041 return rc;
4042}
4043EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4044
d64ecc22
EL		 4045static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4046 struct qeth_reply *reply, unsigned long data)
4047{
4048 struct qeth_ipa_cmd *cmd;
4049 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 4050
847a50fd 4051 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4052
4053 cmd = (struct qeth_ipa_cmd *) data;
4054 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4055 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4056 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4057 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4058 cmd->data.setadapterparms.hdr.return_code);
4059 switch (cmd->data.setadapterparms.hdr.return_code) {
4060 case SET_ACCESS_CTRL_RC_SUCCESS:
4061 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4062 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4063 {
4064 card->options.isolation = access_ctrl_req->subcmd_code;
4065 if (card->options.isolation == ISOLATION_MODE_NONE) {
4066 dev_info(&card->gdev->dev,
4067 "QDIO data connection isolation is deactivated\n");
4068 } else {
4069 dev_info(&card->gdev->dev,
4070 "QDIO data connection isolation is activated\n");
4071 }
4072 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4073 card->gdev->dev.kobj.name,
4074 access_ctrl_req->subcmd_code,
4075 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4076 break;
4077 }
4078 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4079 {
4080 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4081 card->gdev->dev.kobj.name,
4082 access_ctrl_req->subcmd_code,
4083 cmd->data.setadapterparms.hdr.return_code);
4084 dev_err(&card->gdev->dev, "Adapter does not "
4085 "support QDIO data connection isolation\n");
4086
4087 /* ensure isolation mode is "none" */
4088 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4089 break;
4090 }
4091 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4092 {
4093 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4094 card->gdev->dev.kobj.name,
4095 access_ctrl_req->subcmd_code,
4096 cmd->data.setadapterparms.hdr.return_code);
4097 dev_err(&card->gdev->dev,
4098 "Adapter is dedicated. "
4099 "QDIO data connection isolation not supported\n");
4100
4101 /* ensure isolation mode is "none" */
4102 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4103 break;
4104 }
4105 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4106 {
4107 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4108 card->gdev->dev.kobj.name,
4109 access_ctrl_req->subcmd_code,
4110 cmd->data.setadapterparms.hdr.return_code);
4111 dev_err(&card->gdev->dev,
4112 "TSO does not permit QDIO data connection isolation\n");
4113
4114 /* ensure isolation mode is "none" */
4115 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4116 break;
4117 }
4118 default:
4119 {
4120 /* this should never happen */
4121 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4122 "==UNKNOWN\n",
4123 card->gdev->dev.kobj.name,
4124 access_ctrl_req->subcmd_code,
4125 cmd->data.setadapterparms.hdr.return_code);
4126
4127 /* ensure isolation mode is "none" */
4128 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4129 break;
4130 }
4131 }
4132 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4133 return 0;
d64ecc22
EL		 4134}
4135
4136static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4137 enum qeth_ipa_isolation_modes isolation)
4138{
4139 int rc;
4140 struct qeth_cmd_buffer *iob;
4141 struct qeth_ipa_cmd *cmd;
4142 struct qeth_set_access_ctrl *access_ctrl_req;
4143
847a50fd 4144 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4145
4146 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4147 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4148
4149 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4150 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4151 sizeof(struct qeth_set_access_ctrl));
4152 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4153 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4154 access_ctrl_req->subcmd_code = isolation;
4155
4156 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4157 NULL);
4158 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4159 return rc;
4160}
4161
4162int qeth_set_access_ctrl_online(struct qeth_card *card)
4163{
4164 int rc = 0;
4165
847a50fd 4166 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4167
5113fec0
UB		 4168 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4169 card->info.type == QETH_CARD_TYPE_OSX) &&
4170 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 4171 rc = qeth_setadpparms_set_access_ctrl(card,
4172 card->options.isolation);
4173 if (rc) {
4174 QETH_DBF_MESSAGE(3,
5113fec0 4175 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4176 card->gdev->dev.kobj.name,
4177 rc);
4178 }
4179 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4180 card->options.isolation = ISOLATION_MODE_NONE;
4181
4182 dev_err(&card->gdev->dev, "Adapter does not "
4183 "support QDIO data connection isolation\n");
4184 rc = -EOPNOTSUPP;
4185 }
4186 return rc;
4187}
4188EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4189
4a71df50
FB		 4190void qeth_tx_timeout(struct net_device *dev)
4191{
4192 struct qeth_card *card;
4193
509e2562 4194 card = dev->ml_priv;
847a50fd 4195 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4196 card->stats.tx_errors++;
4197 qeth_schedule_recovery(card);
4198}
4199EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4200
4201int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4202{
509e2562 4203 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4204 int rc = 0;
4205
4206 switch (regnum) {
4207 case MII_BMCR: /* Basic mode control register */
4208 rc = BMCR_FULLDPLX;
4209 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4210 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4211 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4212 rc |= BMCR_SPEED100;
4213 break;
4214 case MII_BMSR: /* Basic mode status register */
4215 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4216 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4217 BMSR_100BASE4;
4218 break;
4219 case MII_PHYSID1: /* PHYS ID 1 */
4220 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4221 dev->dev_addr[2];
4222 rc = (rc >> 5) & 0xFFFF;
4223 break;
4224 case MII_PHYSID2: /* PHYS ID 2 */
4225 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4226 break;
4227 case MII_ADVERTISE: /* Advertisement control reg */
4228 rc = ADVERTISE_ALL;
4229 break;
4230 case MII_LPA: /* Link partner ability reg */
4231 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4232 LPA_100BASE4 | LPA_LPACK;
4233 break;
4234 case MII_EXPANSION: /* Expansion register */
4235 break;
4236 case MII_DCOUNTER: /* disconnect counter */
4237 break;
4238 case MII_FCSCOUNTER: /* false carrier counter */
4239 break;
4240 case MII_NWAYTEST: /* N-way auto-neg test register */
4241 break;
4242 case MII_RERRCOUNTER: /* rx error counter */
4243 rc = card->stats.rx_errors;
4244 break;
4245 case MII_SREVISION: /* silicon revision */
4246 break;
4247 case MII_RESV1: /* reserved 1 */
4248 break;
4249 case MII_LBRERROR: /* loopback, rx, bypass error */
4250 break;
4251 case MII_PHYADDR: /* physical address */
4252 break;
4253 case MII_RESV2: /* reserved 2 */
4254 break;
4255 case MII_TPISTATUS: /* TPI status for 10mbps */
4256 break;
4257 case MII_NCONFIG: /* network interface config */
4258 break;
4259 default:
4260 break;
4261 }
4262 return rc;
4263}
4264EXPORT_SYMBOL_GPL(qeth_mdio_read);
4265
4266static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4267 struct qeth_cmd_buffer *iob, int len,
4268 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4269 unsigned long),
4270 void *reply_param)
4271{
4272 u16 s1, s2;
4273
847a50fd 4274 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4275
4276 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4277 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4278 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4279 /* adjust PDU length fields in IPA_PDU_HEADER */
4280 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4281 s2 = (u32) len;
4282 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4283 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4284 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4285 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4286 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4287 reply_cb, reply_param);
4288}
4289
4290static int qeth_snmp_command_cb(struct qeth_card *card,
4291 struct qeth_reply *reply, unsigned long sdata)
4292{
4293 struct qeth_ipa_cmd *cmd;
4294 struct qeth_arp_query_info *qinfo;
4295 struct qeth_snmp_cmd *snmp;
4296 unsigned char *data;
4297 __u16 data_len;
4298
847a50fd 4299 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4300
4301 cmd = (struct qeth_ipa_cmd *) sdata;
4302 data = (unsigned char *)((char *)cmd - reply->offset);
4303 qinfo = (struct qeth_arp_query_info *) reply->param;
4304 snmp = &cmd->data.setadapterparms.data.snmp;
4305
4306 if (cmd->hdr.return_code) {
847a50fd 4307 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4308 return 0;
4309 }
4310 if (cmd->data.setadapterparms.hdr.return_code) {
4311 cmd->hdr.return_code =
4312 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4313 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4314 return 0;
4315 }
4316 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4317 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4318 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4319 else
4320 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4321
4322 /* check if there is enough room in userspace */
4323 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4324 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4325 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4326 return 0;
4327 }
847a50fd 4328 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4329 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4330 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4331 cmd->data.setadapterparms.hdr.seq_no);
4332 /*copy entries to user buffer*/
4333 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4334 memcpy(qinfo->udata + qinfo->udata_offset,
4335 (char *)snmp,
4336 data_len + offsetof(struct qeth_snmp_cmd, data));
4337 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4338 } else {
4339 memcpy(qinfo->udata + qinfo->udata_offset,
4340 (char *)&snmp->request, data_len);
4341 }
4342 qinfo->udata_offset += data_len;
4343 /* check if all replies received ... */
847a50fd 4344 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4345 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4346 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4347 cmd->data.setadapterparms.hdr.seq_no);
4348 if (cmd->data.setadapterparms.hdr.seq_no <
4349 cmd->data.setadapterparms.hdr.used_total)
4350 return 1;
4351 return 0;
4352}
4353
4354int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4355{
4356 struct qeth_cmd_buffer *iob;
4357 struct qeth_ipa_cmd *cmd;
4358 struct qeth_snmp_ureq *ureq;
4359 int req_len;
4360 struct qeth_arp_query_info qinfo = {0, };
4361 int rc = 0;
4362
847a50fd 4363 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4364
4365 if (card->info.guestlan)
4366 return -EOPNOTSUPP;
4367
4368 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4369 (!card->options.layer2)) {
4a71df50
FB		 4370 return -EOPNOTSUPP;
4371 }
4372 /* skip 4 bytes (data_len struct member) to get req_len */
4373 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4374 return -EFAULT;
4986f3f0
JL		 4375 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4376 if (IS_ERR(ureq)) {
847a50fd 4377 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4378 return PTR_ERR(ureq);
4a71df50
FB		 4379 }
4380 qinfo.udata_len = ureq->hdr.data_len;
4381 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4382 if (!qinfo.udata) {
4383 kfree(ureq);
4384 return -ENOMEM;
4385 }
4386 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4387
4388 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4389 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4390 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4391 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4392 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4393 qeth_snmp_command_cb, (void *)&qinfo);
4394 if (rc)
14cc21b6 4395 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4396 QETH_CARD_IFNAME(card), rc);
4397 else {
4398 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4399 rc = -EFAULT;
4400 }
4401
4402 kfree(ureq);
4403 kfree(qinfo.udata);
4404 return rc;
4405}
4406EXPORT_SYMBOL_GPL(qeth_snmp_command);
4407
c3ab96f3
FB		 4408static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4409 struct qeth_reply *reply, unsigned long data)
4410{
4411 struct qeth_ipa_cmd *cmd;
4412 struct qeth_qoat_priv *priv;
4413 char *resdata;
4414 int resdatalen;
4415
4416 QETH_CARD_TEXT(card, 3, "qoatcb");
4417
4418 cmd = (struct qeth_ipa_cmd *)data;
4419 priv = (struct qeth_qoat_priv *)reply->param;
4420 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4421 resdata = (char *)data + 28;
4422
4423 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4424 cmd->hdr.return_code = IPA_RC_FFFF;
4425 return 0;
4426 }
4427
4428 memcpy((priv->buffer + priv->response_len), resdata,
4429 resdatalen);
4430 priv->response_len += resdatalen;
4431
4432 if (cmd->data.setadapterparms.hdr.seq_no <
4433 cmd->data.setadapterparms.hdr.used_total)
4434 return 1;
4435 return 0;
4436}
4437
4438int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4439{
4440 int rc = 0;
4441 struct qeth_cmd_buffer *iob;
4442 struct qeth_ipa_cmd *cmd;
4443 struct qeth_query_oat *oat_req;
4444 struct qeth_query_oat_data oat_data;
4445 struct qeth_qoat_priv priv;
4446 void __user *tmp;
4447
4448 QETH_CARD_TEXT(card, 3, "qoatcmd");
4449
4450 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4451 rc = -EOPNOTSUPP;
4452 goto out;
4453 }
4454
4455 if (copy_from_user(&oat_data, udata,
4456 sizeof(struct qeth_query_oat_data))) {
4457 rc = -EFAULT;
4458 goto out;
4459 }
4460
4461 priv.buffer_len = oat_data.buffer_len;
4462 priv.response_len = 0;
4463 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4464 if (!priv.buffer) {
4465 rc = -ENOMEM;
4466 goto out;
4467 }
4468
4469 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4470 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4471 sizeof(struct qeth_query_oat));
4472 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4473 oat_req = &cmd->data.setadapterparms.data.query_oat;
4474 oat_req->subcmd_code = oat_data.command;
4475
4476 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4477 &priv);
4478 if (!rc) {
4479 if (is_compat_task())
4480 tmp = compat_ptr(oat_data.ptr);
4481 else
4482 tmp = (void __user *)(unsigned long)oat_data.ptr;
4483
4484 if (copy_to_user(tmp, priv.buffer,
4485 priv.response_len)) {
4486 rc = -EFAULT;
4487 goto out_free;
4488 }
4489
4490 oat_data.response_len = priv.response_len;
4491
4492 if (copy_to_user(udata, &oat_data,
4493 sizeof(struct qeth_query_oat_data)))
4494 rc = -EFAULT;
4495 } else
4496 if (rc == IPA_RC_FFFF)
4497 rc = -EFAULT;
4498
4499out_free:
4500 kfree(priv.buffer);
4501out:
4502 return rc;
4503}
4504EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4505
4a71df50
FB		 4506static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4507{
4508 switch (card->info.type) {
4509 case QETH_CARD_TYPE_IQD:
4510 return 2;
4511 default:
4512 return 0;
4513 }
4514}
4515
d0ff1f52
UB		 4516static void qeth_determine_capabilities(struct qeth_card *card)
4517{
4518 int rc;
4519 int length;
4520 char *prcd;
4521 struct ccw_device *ddev;
4522 int ddev_offline = 0;
4523
4524 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4525 ddev = CARD_DDEV(card);
4526 if (!ddev->online) {
4527 ddev_offline = 1;
4528 rc = ccw_device_set_online(ddev);
4529 if (rc) {
4530 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4531 goto out;
4532 }
4533 }
4534
4535 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4536 if (rc) {
4537 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4538 dev_name(&card->gdev->dev), rc);
4539 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4540 goto out_offline;
4541 }
4542 qeth_configure_unitaddr(card, prcd);
4543 qeth_configure_blkt_default(card, prcd);
4544 kfree(prcd);
4545
4546 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4547 if (rc)
4548 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4549
0da9581d
EL		 4550 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4551 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4552 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4553 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4554 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4555 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4556 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4557 dev_info(&card->gdev->dev,
4558 "Completion Queueing supported\n");
4559 } else {
4560 card->options.cq = QETH_CQ_NOTAVAILABLE;
4561 }
4562
4563
d0ff1f52
UB		 4564out_offline:
4565 if (ddev_offline == 1)
4566 ccw_device_set_offline(ddev);
4567out:
4568 return;
4569}
4570
0da9581d
EL		 4571static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4572 struct qdio_buffer **in_sbal_ptrs,
4573 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4574 int i;
4575
4576 if (card->options.cq == QETH_CQ_ENABLED) {
4577 int offset = QDIO_MAX_BUFFERS_PER_Q *
4578 (card->qdio.no_in_queues - 1);
4579 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4580 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4581 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4582 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4583 }
4584
4585 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4586 }
4587}
4588
4a71df50
FB		 4589static int qeth_qdio_establish(struct qeth_card *card)
4590{
4591 struct qdio_initialize init_data;
4592 char *qib_param_field;
4593 struct qdio_buffer **in_sbal_ptrs;
104ea556 4594 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4595 struct qdio_buffer **out_sbal_ptrs;
4596 int i, j, k;
4597 int rc = 0;
4598
d11ba0c4 4599 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4600
4601 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4602 GFP_KERNEL);
104ea556 4603 if (!qib_param_field) {
4604 rc = -ENOMEM;
4605 goto out_free_nothing;
4606 }
4a71df50
FB		 4607
4608 qeth_create_qib_param_field(card, qib_param_field);
4609 qeth_create_qib_param_field_blkt(card, qib_param_field);
4610
b3332930 4611 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4612 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4613 GFP_KERNEL);
4614 if (!in_sbal_ptrs) {
104ea556 4615 rc = -ENOMEM;
4616 goto out_free_qib_param;
4a71df50 4617 }
0da9581d 4618 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4619 in_sbal_ptrs[i] = (struct qdio_buffer *)
4620 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4621 }
4a71df50 4622
0da9581d
EL		 4623 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4624 GFP_KERNEL);
104ea556 4625 if (!queue_start_poll) {
4626 rc = -ENOMEM;
4627 goto out_free_in_sbals;
4628 }
0da9581d
EL		 4629 for (i = 0; i < card->qdio.no_in_queues; ++i)
4630 queue_start_poll[i] = card->discipline.start_poll;
4631
4632 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4633
4a71df50 4634 out_sbal_ptrs =
b3332930 4635 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4636 sizeof(void *), GFP_KERNEL);
4637 if (!out_sbal_ptrs) {
104ea556 4638 rc = -ENOMEM;
4639 goto out_free_queue_start_poll;
4a71df50
FB		 4640 }
4641 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4642 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4643 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4644 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4645 }
4646
4647 memset(&init_data, 0, sizeof(struct qdio_initialize));
4648 init_data.cdev = CARD_DDEV(card);
4649 init_data.q_format = qeth_get_qdio_q_format(card);
4650 init_data.qib_param_field_format = 0;
4651 init_data.qib_param_field = qib_param_field;
0da9581d 4652 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50
FB		 4653 init_data.no_output_qs = card->qdio.no_out_queues;
4654 init_data.input_handler = card->discipline.input_handler;
4655 init_data.output_handler = card->discipline.output_handler;
e58b0d90 4656 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4657 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4658 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4659 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4660 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4661 init_data.scan_threshold =
4662 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4663
4664 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4665 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4666 rc = qdio_allocate(&init_data);
4667 if (rc) {
4668 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4669 goto out;
4670 }
4671 rc = qdio_establish(&init_data);
4672 if (rc) {
4a71df50 4673 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4674 qdio_free(CARD_DDEV(card));
4675 }
4a71df50 4676 }
0da9581d
EL		 4677
4678 switch (card->options.cq) {
4679 case QETH_CQ_ENABLED:
4680 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4681 break;
4682 case QETH_CQ_DISABLED:
4683 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4684 break;
4685 default:
4686 break;
4687 }
cc961d40 4688out:
4a71df50 4689 kfree(out_sbal_ptrs);
104ea556 4690out_free_queue_start_poll:
4691 kfree(queue_start_poll);
4692out_free_in_sbals:
4a71df50 4693 kfree(in_sbal_ptrs);
104ea556 4694out_free_qib_param:
4a71df50 4695 kfree(qib_param_field);
104ea556 4696out_free_nothing:
4a71df50
FB		 4697 return rc;
4698}
4699
4700static void qeth_core_free_card(struct qeth_card *card)
4701{
4702
d11ba0c4
PT		 4703 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4704 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4705 qeth_clean_channel(&card->read);
4706 qeth_clean_channel(&card->write);
4707 if (card->dev)
4708 free_netdev(card->dev);
4709 kfree(card->ip_tbd_list);
4710 qeth_free_qdio_buffers(card);
6bcac508 4711 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4712 kfree(card);
4713}
4714
4715static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4716 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4717 .driver_info = QETH_CARD_TYPE_OSD},
4718 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4719 .driver_info = QETH_CARD_TYPE_IQD},
4720 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4721 .driver_info = QETH_CARD_TYPE_OSN},
4722 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4723 .driver_info = QETH_CARD_TYPE_OSM},
4724 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4725 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4726 {},
4727};
4728MODULE_DEVICE_TABLE(ccw, qeth_ids);
4729
4730static struct ccw_driver qeth_ccw_driver = {
3bda058b 4731 .driver = {
3e70b3b8 4732 .owner = THIS_MODULE,
3bda058b
SO		 4733 .name = "qeth",
4734 },
4a71df50
FB		 4735 .ids = qeth_ids,
4736 .probe = ccwgroup_probe_ccwdev,
4737 .remove = ccwgroup_remove_ccwdev,
4738};
4739
4740static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4741 unsigned long driver_id)
4742{
022b660a
UB		 4743 return ccwgroup_create_from_string(root_dev, driver_id,
4744 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 4745}
4746
4747int qeth_core_hardsetup_card(struct qeth_card *card)
4748{
aa909224 4749 int retries = 0;
4a71df50
FB		 4750 int rc;
4751
d11ba0c4 4752 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4753 atomic_set(&card->force_alloc_skb, 0);
d0ff1f52 4754 qeth_get_channel_path_desc(card);
4a71df50 4755retry:
aa909224 4756 if (retries)
74eacdb9
FB		 4757 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4758 dev_name(&card->gdev->dev));
aa909224
UB		 4759 ccw_device_set_offline(CARD_DDEV(card));
4760 ccw_device_set_offline(CARD_WDEV(card));
4761 ccw_device_set_offline(CARD_RDEV(card));
4762 rc = ccw_device_set_online(CARD_RDEV(card));
4763 if (rc)
4764 goto retriable;
4765 rc = ccw_device_set_online(CARD_WDEV(card));
4766 if (rc)
4767 goto retriable;
4768 rc = ccw_device_set_online(CARD_DDEV(card));
4769 if (rc)
4770 goto retriable;
4a71df50 4771 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4772retriable:
4a71df50 4773 if (rc == -ERESTARTSYS) {
d11ba0c4 4774 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4775 return rc;
4776 } else if (rc) {
d11ba0c4 4777 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 4778 if (++retries > 3)
4a71df50
FB		 4779 goto out;
4780 else
4781 goto retry;
4782 }
d0ff1f52 4783 qeth_determine_capabilities(card);
4a71df50
FB		 4784 qeth_init_tokens(card);
4785 qeth_init_func_level(card);
4786 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4787 if (rc == -ERESTARTSYS) {
d11ba0c4 4788 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4789 return rc;
4790 } else if (rc) {
d11ba0c4 4791 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4792 if (--retries < 0)
4793 goto out;
4794 else
4795 goto retry;
4796 }
4797 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4798 if (rc == -ERESTARTSYS) {
d11ba0c4 4799 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4800 return rc;
4801 } else if (rc) {
d11ba0c4 4802 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4803 if (--retries < 0)
4804 goto out;
4805 else
4806 goto retry;
4807 }
908abbb5 4808 card->read_or_write_problem = 0;
4a71df50
FB		 4809 rc = qeth_mpc_initialize(card);
4810 if (rc) {
d11ba0c4 4811 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4812 goto out;
4813 }
1da74b1c
FB		 4814
4815 card->options.ipa4.supported_funcs = 0;
4816 card->options.adp.supported_funcs = 0;
4817 card->info.diagass_support = 0;
4818 qeth_query_ipassists(card, QETH_PROT_IPV4);
4819 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4820 qeth_query_setadapterparms(card);
4821 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4822 qeth_query_setdiagass(card);
4a71df50
FB		 4823 return 0;
4824out:
74eacdb9
FB		 4825 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4826 "an error on the device\n");
4827 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4828 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4829 return rc;
4830}
4831EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4832
b3332930
FB		 4833static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4834 struct qdio_buffer_element *element,
4a71df50
FB		 4835 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4836{
4837 struct page *page = virt_to_page(element->addr);
4838 if (*pskb == NULL) {
b3332930
FB		 4839 if (qethbuffer->rx_skb) {
4840 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4841 *pskb = qethbuffer->rx_skb;
4842 qethbuffer->rx_skb = NULL;
4843 } else {
4844 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4845 if (!(*pskb))
4846 return -ENOMEM;
4847 }
4848
4a71df50 4849 skb_reserve(*pskb, ETH_HLEN);
b3332930 4850 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 4851 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4852 data_len);
4853 } else {
4854 get_page(page);
b3332930
FB		 4855 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4856 element->addr + offset, QETH_RX_PULL_LEN);
4857 skb_fill_page_desc(*pskb, *pfrag, page,
4858 offset + QETH_RX_PULL_LEN,
4859 data_len - QETH_RX_PULL_LEN);
4860 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4861 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4862 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 4863 (*pfrag)++;
4864 }
4865 } else {
4866 get_page(page);
4867 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4868 (*pskb)->data_len += data_len;
4869 (*pskb)->len += data_len;
4870 (*pskb)->truesize += data_len;
4871 (*pfrag)++;
4872 }
0da9581d
EL		 4873
4874
4a71df50
FB		 4875 return 0;
4876}
4877
4878struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 4879 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 4880 struct qdio_buffer_element **__element, int *__offset,
4881 struct qeth_hdr **hdr)
4882{
4883 struct qdio_buffer_element *element = *__element;
b3332930 4884 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 4885 int offset = *__offset;
4886 struct sk_buff *skb = NULL;
76b11f8e 4887 int skb_len = 0;
4a71df50
FB		 4888 void *data_ptr;
4889 int data_len;
4890 int headroom = 0;
4891 int use_rx_sg = 0;
4892 int frag = 0;
4893
4a71df50
FB		 4894 /* qeth_hdr must not cross element boundaries */
4895 if (element->length < offset + sizeof(struct qeth_hdr)) {
4896 if (qeth_is_last_sbale(element))
4897 return NULL;
4898 element++;
4899 offset = 0;
4900 if (element->length < sizeof(struct qeth_hdr))
4901 return NULL;
4902 }
4903 *hdr = element->addr + offset;
4904
4905 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4906 switch ((*hdr)->hdr.l2.id) {
4907 case QETH_HEADER_TYPE_LAYER2:
4908 skb_len = (*hdr)->hdr.l2.pkt_length;
4909 break;
4910 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4911 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4912 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4913 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4914 headroom = TR_HLEN;
4915 else
4916 headroom = ETH_HLEN;
76b11f8e
UB		 4917 break;
4918 case QETH_HEADER_TYPE_OSN:
4919 skb_len = (*hdr)->hdr.osn.pdu_length;
4920 headroom = sizeof(struct qeth_hdr);
4921 break;
4922 default:
4923 break;
4a71df50
FB		 4924 }
4925
4926 if (!skb_len)
4927 return NULL;
4928
b3332930
FB		 4929 if (((skb_len >= card->options.rx_sg_cb) &&
4930 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4931 (!atomic_read(&card->force_alloc_skb))) ||
4932 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 4933 use_rx_sg = 1;
4934 } else {
4935 skb = dev_alloc_skb(skb_len + headroom);
4936 if (!skb)
4937 goto no_mem;
4938 if (headroom)
4939 skb_reserve(skb, headroom);
4940 }
4941
4942 data_ptr = element->addr + offset;
4943 while (skb_len) {
4944 data_len = min(skb_len, (int)(element->length - offset));
4945 if (data_len) {
4946 if (use_rx_sg) {
b3332930
FB		 4947 if (qeth_create_skb_frag(qethbuffer, element,
4948 &skb, offset, &frag, data_len))
4a71df50
FB		 4949 goto no_mem;
4950 } else {
4951 memcpy(skb_put(skb, data_len), data_ptr,
4952 data_len);
4953 }
4954 }
4955 skb_len -= data_len;
4956 if (skb_len) {
4957 if (qeth_is_last_sbale(element)) {
847a50fd 4958 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4959 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4960 dev_kfree_skb_any(skb);
4961 card->stats.rx_errors++;
4962 return NULL;
4963 }
4964 element++;
4965 offset = 0;
4966 data_ptr = element->addr;
4967 } else {
4968 offset += data_len;
4969 }
4970 }
4971 *__element = element;
4972 *__offset = offset;
4973 if (use_rx_sg && card->options.performance_stats) {
4974 card->perf_stats.sg_skbs_rx++;
4975 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4976 }
4977 return skb;
4978no_mem:
4979 if (net_ratelimit()) {
847a50fd 4980 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4981 }
4982 card->stats.rx_dropped++;
4983 return NULL;
4984}
4985EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4986
4987static void qeth_unregister_dbf_views(void)
4988{
d11ba0c4
PT		 4989 int x;
4990 for (x = 0; x < QETH_DBF_INFOS; x++) {
4991 debug_unregister(qeth_dbf[x].id);
4992 qeth_dbf[x].id = NULL;
4993 }
4a71df50
FB		 4994}
4995
8e96c51c 4996void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 4997{
4998 char dbf_txt_buf[32];
345aa66e 4999 va_list args;
cd023216 5000
8e96c51c 5001 if (level > id->level)
cd023216 5002 return;
345aa66e
PT		 5003 va_start(args, fmt);
5004 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5005 va_end(args);
8e96c51c 5006 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5007}
5008EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5009
4a71df50
FB		 5010static int qeth_register_dbf_views(void)
5011{
d11ba0c4
PT		 5012 int ret;
5013 int x;
5014
5015 for (x = 0; x < QETH_DBF_INFOS; x++) {
5016 /* register the areas */
5017 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5018 qeth_dbf[x].pages,
5019 qeth_dbf[x].areas,
5020 qeth_dbf[x].len);
5021 if (qeth_dbf[x].id == NULL) {
5022 qeth_unregister_dbf_views();
5023 return -ENOMEM;
5024 }
4a71df50 5025
d11ba0c4
PT		 5026 /* register a view */
5027 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5028 if (ret) {
5029 qeth_unregister_dbf_views();
5030 return ret;
5031 }
4a71df50 5032
d11ba0c4
PT		 5033 /* set a passing level */
5034 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5035 }
4a71df50
FB		 5036
5037 return 0;
5038}
5039
5040int qeth_core_load_discipline(struct qeth_card *card,
5041 enum qeth_discipline_id discipline)
5042{
5043 int rc = 0;
2022e00c 5044 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5045 switch (discipline) {
5046 case QETH_DISCIPLINE_LAYER3:
5047 card->discipline.ccwgdriver = try_then_request_module(
5048 symbol_get(qeth_l3_ccwgroup_driver),
5049 "qeth_l3");
5050 break;
5051 case QETH_DISCIPLINE_LAYER2:
5052 card->discipline.ccwgdriver = try_then_request_module(
5053 symbol_get(qeth_l2_ccwgroup_driver),
5054 "qeth_l2");
5055 break;
5056 }
5057 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 5058 dev_err(&card->gdev->dev, "There is no kernel module to "
5059 "support discipline %d\n", discipline);
4a71df50
FB		 5060 rc = -EINVAL;
5061 }
2022e00c 5062 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5063 return rc;
5064}
5065
5066void qeth_core_free_discipline(struct qeth_card *card)
5067{
5068 if (card->options.layer2)
5069 symbol_put(qeth_l2_ccwgroup_driver);
5070 else
5071 symbol_put(qeth_l3_ccwgroup_driver);
5072 card->discipline.ccwgdriver = NULL;
5073}
5074
5075static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5076{
5077 struct qeth_card *card;
5078 struct device *dev;
5079 int rc;
5080 unsigned long flags;
af039068 5081 char dbf_name[20];
4a71df50 5082
d11ba0c4 5083 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5084
5085 dev = &gdev->dev;
5086 if (!get_device(dev))
5087 return -ENODEV;
5088
2a0217d5 5089 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5090
5091 card = qeth_alloc_card();
5092 if (!card) {
d11ba0c4 5093 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5094 rc = -ENOMEM;
5095 goto err_dev;
5096 }
af039068
CO		 5097
5098 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5099 dev_name(&gdev->dev));
5100 card->debug = debug_register(dbf_name, 2, 1, 8);
5101 if (!card->debug) {
5102 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5103 rc = -ENOMEM;
5104 goto err_card;
5105 }
5106 debug_register_view(card->debug, &debug_hex_ascii_view);
5107
4a71df50
FB		 5108 card->read.ccwdev = gdev->cdev[0];
5109 card->write.ccwdev = gdev->cdev[1];
5110 card->data.ccwdev = gdev->cdev[2];
5111 dev_set_drvdata(&gdev->dev, card);
5112 card->gdev = gdev;
5113 gdev->cdev[0]->handler = qeth_irq;
5114 gdev->cdev[1]->handler = qeth_irq;
5115 gdev->cdev[2]->handler = qeth_irq;
5116
5117 rc = qeth_determine_card_type(card);
5118 if (rc) {
d11ba0c4 5119 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 5120 goto err_dbf;
4a71df50
FB		 5121 }
5122 rc = qeth_setup_card(card);
5123 if (rc) {
d11ba0c4 5124 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 5125 goto err_dbf;
4a71df50
FB		 5126 }
5127
5113fec0 5128 if (card->info.type == QETH_CARD_TYPE_OSN)
4a71df50 5129 rc = qeth_core_create_osn_attributes(dev);
5113fec0
UB		 5130 else
5131 rc = qeth_core_create_device_attributes(dev);
5132 if (rc)
af039068 5133 goto err_dbf;
5113fec0
UB		 5134 switch (card->info.type) {
5135 case QETH_CARD_TYPE_OSN:
5136 case QETH_CARD_TYPE_OSM:
4a71df50 5137 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0
UB		 5138 if (rc)
5139 goto err_attr;
4a71df50 5140 rc = card->discipline.ccwgdriver->probe(card->gdev);
4a71df50 5141 if (rc)
5113fec0
UB		 5142 goto err_disc;
5143 case QETH_CARD_TYPE_OSD:
5144 case QETH_CARD_TYPE_OSX:
5145 default:
5146 break;
4a71df50
FB		 5147 }
5148
5149 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5150 list_add_tail(&card->list, &qeth_core_card_list.list);
5151 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5152
5153 qeth_determine_capabilities(card);
4a71df50
FB		 5154 return 0;
5155
5113fec0
UB		 5156err_disc:
5157 qeth_core_free_discipline(card);
5158err_attr:
5159 if (card->info.type == QETH_CARD_TYPE_OSN)
5160 qeth_core_remove_osn_attributes(dev);
5161 else
5162 qeth_core_remove_device_attributes(dev);
af039068
CO		 5163err_dbf:
5164 debug_unregister(card->debug);
4a71df50
FB		 5165err_card:
5166 qeth_core_free_card(card);
5167err_dev:
5168 put_device(dev);
5169 return rc;
5170}
5171
5172static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5173{
5174 unsigned long flags;
5175 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5176
28a7e4c9 5177 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 5178
5179 if (card->info.type == QETH_CARD_TYPE_OSN) {
5180 qeth_core_remove_osn_attributes(&gdev->dev);
5181 } else {
5182 qeth_core_remove_device_attributes(&gdev->dev);
5183 }
9dc48ccc
UB		 5184
5185 if (card->discipline.ccwgdriver) {
5186 card->discipline.ccwgdriver->remove(gdev);
5187 qeth_core_free_discipline(card);
5188 }
5189
af039068 5190 debug_unregister(card->debug);
4a71df50
FB		 5191 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5192 list_del(&card->list);
5193 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5194 qeth_core_free_card(card);
5195 dev_set_drvdata(&gdev->dev, NULL);
5196 put_device(&gdev->dev);
5197 return;
5198}
5199
5200static int qeth_core_set_online(struct ccwgroup_device *gdev)
5201{
5202 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5203 int rc = 0;
5204 int def_discipline;
5205
5206 if (!card->discipline.ccwgdriver) {
5207 if (card->info.type == QETH_CARD_TYPE_IQD)
5208 def_discipline = QETH_DISCIPLINE_LAYER3;
5209 else
5210 def_discipline = QETH_DISCIPLINE_LAYER2;
5211 rc = qeth_core_load_discipline(card, def_discipline);
5212 if (rc)
5213 goto err;
5214 rc = card->discipline.ccwgdriver->probe(card->gdev);
5215 if (rc)
5216 goto err;
5217 }
5218 rc = card->discipline.ccwgdriver->set_online(gdev);
5219err:
5220 return rc;
5221}
5222
5223static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5224{
5225 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5226 return card->discipline.ccwgdriver->set_offline(gdev);
5227}
5228
5229static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5230{
5231 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5232 if (card->discipline.ccwgdriver &&
5233 card->discipline.ccwgdriver->shutdown)
5234 card->discipline.ccwgdriver->shutdown(gdev);
5235}
5236
bbcfcdc8
FB		 5237static int qeth_core_prepare(struct ccwgroup_device *gdev)
5238{
5239 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5240 if (card->discipline.ccwgdriver &&
5241 card->discipline.ccwgdriver->prepare)
5242 return card->discipline.ccwgdriver->prepare(gdev);
5243 return 0;
5244}
5245
5246static void qeth_core_complete(struct ccwgroup_device *gdev)
5247{
5248 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5249 if (card->discipline.ccwgdriver &&
5250 card->discipline.ccwgdriver->complete)
5251 card->discipline.ccwgdriver->complete(gdev);
5252}
5253
5254static int qeth_core_freeze(struct ccwgroup_device *gdev)
5255{
5256 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5257 if (card->discipline.ccwgdriver &&
5258 card->discipline.ccwgdriver->freeze)
5259 return card->discipline.ccwgdriver->freeze(gdev);
5260 return 0;
5261}
5262
5263static int qeth_core_thaw(struct ccwgroup_device *gdev)
5264{
5265 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5266 if (card->discipline.ccwgdriver &&
5267 card->discipline.ccwgdriver->thaw)
5268 return card->discipline.ccwgdriver->thaw(gdev);
5269 return 0;
5270}
5271
5272static int qeth_core_restore(struct ccwgroup_device *gdev)
5273{
5274 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5275 if (card->discipline.ccwgdriver &&
5276 card->discipline.ccwgdriver->restore)
5277 return card->discipline.ccwgdriver->restore(gdev);
5278 return 0;
5279}
5280
4a71df50 5281static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5282 .driver = {
5283 .owner = THIS_MODULE,
5284 .name = "qeth",
5285 },
4a71df50
FB		 5286 .driver_id = 0xD8C5E3C8,
5287 .probe = qeth_core_probe_device,
5288 .remove = qeth_core_remove_device,
5289 .set_online = qeth_core_set_online,
5290 .set_offline = qeth_core_set_offline,
5291 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5292 .prepare = qeth_core_prepare,
5293 .complete = qeth_core_complete,
5294 .freeze = qeth_core_freeze,
5295 .thaw = qeth_core_thaw,
5296 .restore = qeth_core_restore,
4a71df50
FB		 5297};
5298
5299static ssize_t
5300qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
5301 size_t count)
5302{
5303 int err;
5304 err = qeth_core_driver_group(buf, qeth_core_root_dev,
5305 qeth_core_ccwgroup_driver.driver_id);
5306 if (err)
5307 return err;
5308 else
5309 return count;
5310}
5311
5312static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5313
5314static struct {
5315 const char str[ETH_GSTRING_LEN];
5316} qeth_ethtool_stats_keys[] = {
5317/* 0 */{"rx skbs"},
5318 {"rx buffers"},
5319 {"tx skbs"},
5320 {"tx buffers"},
5321 {"tx skbs no packing"},
5322 {"tx buffers no packing"},
5323 {"tx skbs packing"},
5324 {"tx buffers packing"},
5325 {"tx sg skbs"},
5326 {"tx sg frags"},
5327/* 10 */{"rx sg skbs"},
5328 {"rx sg frags"},
5329 {"rx sg page allocs"},
5330 {"tx large kbytes"},
5331 {"tx large count"},
5332 {"tx pk state ch n->p"},
5333 {"tx pk state ch p->n"},
5334 {"tx pk watermark low"},
5335 {"tx pk watermark high"},
5336 {"queue 0 buffer usage"},
5337/* 20 */{"queue 1 buffer usage"},
5338 {"queue 2 buffer usage"},
5339 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5340 {"rx poll time"},
5341 {"rx poll count"},
4a71df50
FB		 5342 {"rx do_QDIO time"},
5343 {"rx do_QDIO count"},
5344 {"tx handler time"},
5345 {"tx handler count"},
5346 {"tx time"},
5347/* 30 */{"tx count"},
5348 {"tx do_QDIO time"},
5349 {"tx do_QDIO count"},
f61a0d05 5350 {"tx csum"},
c3b4a740 5351 {"tx lin"},
0da9581d
EL		 5352 {"cq handler count"},
5353 {"cq handler time"}
4a71df50
FB		 5354};
5355
df8b4ec8 5356int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5357{
df8b4ec8
BH		 5358 switch (stringset) {
5359 case ETH_SS_STATS:
5360 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5361 default:
5362 return -EINVAL;
5363 }
4a71df50 5364}
df8b4ec8 5365EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5366
5367void qeth_core_get_ethtool_stats(struct net_device *dev,
5368 struct ethtool_stats *stats, u64 *data)
5369{
509e2562 5370 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5371 data[0] = card->stats.rx_packets -
5372 card->perf_stats.initial_rx_packets;
5373 data[1] = card->perf_stats.bufs_rec;
5374 data[2] = card->stats.tx_packets -
5375 card->perf_stats.initial_tx_packets;
5376 data[3] = card->perf_stats.bufs_sent;
5377 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5378 - card->perf_stats.skbs_sent_pack;
5379 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5380 data[6] = card->perf_stats.skbs_sent_pack;
5381 data[7] = card->perf_stats.bufs_sent_pack;
5382 data[8] = card->perf_stats.sg_skbs_sent;
5383 data[9] = card->perf_stats.sg_frags_sent;
5384 data[10] = card->perf_stats.sg_skbs_rx;
5385 data[11] = card->perf_stats.sg_frags_rx;
5386 data[12] = card->perf_stats.sg_alloc_page_rx;
5387 data[13] = (card->perf_stats.large_send_bytes >> 10);
5388 data[14] = card->perf_stats.large_send_cnt;
5389 data[15] = card->perf_stats.sc_dp_p;
5390 data[16] = card->perf_stats.sc_p_dp;
5391 data[17] = QETH_LOW_WATERMARK_PACK;
5392 data[18] = QETH_HIGH_WATERMARK_PACK;
5393 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5394 data[20] = (card->qdio.no_out_queues > 1) ?
5395 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5396 data[21] = (card->qdio.no_out_queues > 2) ?
5397 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5398 data[22] = (card->qdio.no_out_queues > 3) ?
5399 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5400 data[23] = card->perf_stats.inbound_time;
5401 data[24] = card->perf_stats.inbound_cnt;
5402 data[25] = card->perf_stats.inbound_do_qdio_time;
5403 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5404 data[27] = card->perf_stats.outbound_handler_time;
5405 data[28] = card->perf_stats.outbound_handler_cnt;
5406 data[29] = card->perf_stats.outbound_time;
5407 data[30] = card->perf_stats.outbound_cnt;
5408 data[31] = card->perf_stats.outbound_do_qdio_time;
5409 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5410 data[33] = card->perf_stats.tx_csum;
c3b4a740 5411 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5412 data[35] = card->perf_stats.cq_cnt;
5413 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5414}
5415EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5416
5417void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5418{
5419 switch (stringset) {
5420 case ETH_SS_STATS:
5421 memcpy(data, &qeth_ethtool_stats_keys,
5422 sizeof(qeth_ethtool_stats_keys));
5423 break;
5424 default:
5425 WARN_ON(1);
5426 break;
5427 }
5428}
5429EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5430
5431void qeth_core_get_drvinfo(struct net_device *dev,
5432 struct ethtool_drvinfo *info)
5433{
509e2562 5434 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5435 if (card->options.layer2)
5436 strcpy(info->driver, "qeth_l2");
5437 else
5438 strcpy(info->driver, "qeth_l3");
5439
5440 strcpy(info->version, "1.0");
5441 strcpy(info->fw_version, card->info.mcl_level);
5442 sprintf(info->bus_info, "%s/%s/%s",
5443 CARD_RDEV_ID(card),
5444 CARD_WDEV_ID(card),
5445 CARD_DDEV_ID(card));
5446}
5447EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5448
3f9975aa
FB		 5449int qeth_core_ethtool_get_settings(struct net_device *netdev,
5450 struct ethtool_cmd *ecmd)
5451{
509e2562 5452 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5453 enum qeth_link_types link_type;
5454
5455 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5456 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5457 else
5458 link_type = card->info.link_type;
5459
5460 ecmd->transceiver = XCVR_INTERNAL;
5461 ecmd->supported = SUPPORTED_Autoneg;
5462 ecmd->advertising = ADVERTISED_Autoneg;
5463 ecmd->duplex = DUPLEX_FULL;
5464 ecmd->autoneg = AUTONEG_ENABLE;
5465
5466 switch (link_type) {
5467 case QETH_LINK_TYPE_FAST_ETH:
5468 case QETH_LINK_TYPE_LANE_ETH100:
5469 ecmd->supported |= SUPPORTED_10baseT_Half |
5470 SUPPORTED_10baseT_Full |
5471 SUPPORTED_100baseT_Half |
5472 SUPPORTED_100baseT_Full |
5473 SUPPORTED_TP;
5474 ecmd->advertising |= ADVERTISED_10baseT_Half |
5475 ADVERTISED_10baseT_Full |
5476 ADVERTISED_100baseT_Half |
5477 ADVERTISED_100baseT_Full |
5478 ADVERTISED_TP;
5479 ecmd->speed = SPEED_100;
5480 ecmd->port = PORT_TP;
5481 break;
5482
5483 case QETH_LINK_TYPE_GBIT_ETH:
5484 case QETH_LINK_TYPE_LANE_ETH1000:
5485 ecmd->supported |= SUPPORTED_10baseT_Half |
5486 SUPPORTED_10baseT_Full |
5487 SUPPORTED_100baseT_Half |
5488 SUPPORTED_100baseT_Full |
5489 SUPPORTED_1000baseT_Half |
5490 SUPPORTED_1000baseT_Full |
5491 SUPPORTED_FIBRE;
5492 ecmd->advertising |= ADVERTISED_10baseT_Half |
5493 ADVERTISED_10baseT_Full |
5494 ADVERTISED_100baseT_Half |
5495 ADVERTISED_100baseT_Full |
5496 ADVERTISED_1000baseT_Half |
5497 ADVERTISED_1000baseT_Full |
5498 ADVERTISED_FIBRE;
5499 ecmd->speed = SPEED_1000;
5500 ecmd->port = PORT_FIBRE;
5501 break;
5502
5503 case QETH_LINK_TYPE_10GBIT_ETH:
5504 ecmd->supported |= SUPPORTED_10baseT_Half |
5505 SUPPORTED_10baseT_Full |
5506 SUPPORTED_100baseT_Half |
5507 SUPPORTED_100baseT_Full |
5508 SUPPORTED_1000baseT_Half |
5509 SUPPORTED_1000baseT_Full |
5510 SUPPORTED_10000baseT_Full |
5511 SUPPORTED_FIBRE;
5512 ecmd->advertising |= ADVERTISED_10baseT_Half |
5513 ADVERTISED_10baseT_Full |
5514 ADVERTISED_100baseT_Half |
5515 ADVERTISED_100baseT_Full |
5516 ADVERTISED_1000baseT_Half |
5517 ADVERTISED_1000baseT_Full |
5518 ADVERTISED_10000baseT_Full |
5519 ADVERTISED_FIBRE;
5520 ecmd->speed = SPEED_10000;
5521 ecmd->port = PORT_FIBRE;
5522 break;
5523
5524 default:
5525 ecmd->supported |= SUPPORTED_10baseT_Half |
5526 SUPPORTED_10baseT_Full |
5527 SUPPORTED_TP;
5528 ecmd->advertising |= ADVERTISED_10baseT_Half |
5529 ADVERTISED_10baseT_Full |
5530 ADVERTISED_TP;
5531 ecmd->speed = SPEED_10;
5532 ecmd->port = PORT_TP;
5533 }
5534
5535 return 0;
5536}
5537EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5538
4a71df50
FB		 5539static int __init qeth_core_init(void)
5540{
5541 int rc;
5542
74eacdb9 5543 pr_info("loading core functions\n");
4a71df50
FB		 5544 INIT_LIST_HEAD(&qeth_core_card_list.list);
5545 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 5546 mutex_init(&qeth_mod_mutex);
4a71df50
FB		 5547
5548 rc = qeth_register_dbf_views();
5549 if (rc)
5550 goto out_err;
5551 rc = ccw_driver_register(&qeth_ccw_driver);
5552 if (rc)
5553 goto ccw_err;
5554 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5555 if (rc)
5556 goto ccwgroup_err;
5557 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
5558 &driver_attr_group);
5559 if (rc)
5560 goto driver_err;
035da16f 5561 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5562 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5563 if (rc)
5564 goto register_err;
4a71df50 5565
683d718a
FB		 5566 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5567 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5568 if (!qeth_core_header_cache) {
5569 rc = -ENOMEM;
5570 goto slab_err;
5571 }
5572
0da9581d
EL		 5573 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5574 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5575 if (!qeth_qdio_outbuf_cache) {
5576 rc = -ENOMEM;
5577 goto cqslab_err;
5578 }
5579
683d718a 5580 return 0;
0da9581d
EL		 5581cqslab_err:
5582 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5583slab_err:
035da16f 5584 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5585register_err:
5586 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5587 &driver_attr_group);
5588driver_err:
5589 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5590ccwgroup_err:
5591 ccw_driver_unregister(&qeth_ccw_driver);
5592ccw_err:
74eacdb9 5593 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 5594 qeth_unregister_dbf_views();
5595out_err:
74eacdb9 5596 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5597 return rc;
5598}
5599
5600static void __exit qeth_core_exit(void)
5601{
035da16f 5602 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5603 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5604 &driver_attr_group);
5605 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5606 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5607 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5608 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 5609 qeth_unregister_dbf_views();
74eacdb9 5610 pr_info("core functions removed\n");
4a71df50
FB		 5611}
5612
5613module_init(qeth_core_init);
5614module_exit(qeth_core_exit);
5615MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5616MODULE_DESCRIPTION("qeth core functions");
5617MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)