[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / cio / qdio.h

#ifndef _CIO_QDIO_H
#define _CIO_QDIO_H

#include <asm/page.h>
#include <asm/isc.h>

#include "schid.h"

#ifdef CONFIG_QDIO_DEBUG
#define QDIO_VERBOSE_LEVEL 9
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_VERBOSE_LEVEL 5
#endif /* CONFIG_QDIO_DEBUG */
#define QDIO_USE_PROCESSING_STATE

#define QDIO_MINIMAL_BH_RELIEF_TIME 16
#define QDIO_TIMER_POLL_VALUE 1
#define IQDIO_TIMER_POLL_VALUE 1

/*
 * unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
 * we never know, whether we'll get initiative again, e.g. to give the
 * transmit skb's back to the stack, however the stack may be waiting for
 * them... therefore we define 4 as threshold to start polling (which
 * will stop as soon as the asynchronous queue catches up)
 * btw, this only applies to the asynchronous HiperSockets queue
 */
#define IQDIO_FILL_LEVEL_TO_POLL 4

#define TIQDIO_THININT_ISC QDIO_AIRQ_ISC
#define TIQDIO_DELAY_TARGET 0
#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
#define IQDIO_LOCAL_LAPS 4
#define IQDIO_LOCAL_LAPS_INT 1
#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
/*#define IQDIO_IQDC_INT_PARM 0x1234*/

#define QDIO_Q_LAPS 5

#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY

#define L2_CACHELINE_SIZE 256
#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))

#define QDIO_PERF "qdio_perf"

/* must be a power of 2 */
/*#define QDIO_STATS_NUMBER 4

#define QDIO_STATS_CLASSES 2
#define QDIO_STATS_COUNT_NEEDED 2*/

#define QDIO_NO_USE_COUNT_TIMEOUT (1*HZ) /* wait for 1 sec on each q before
					    exiting without having use_count
					    of the queue to 0 */

#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)
#define QDIO_FORCE_CHECK_TIMEOUT (10*HZ)
#define QDIO_ACTIVATE_TIMEOUT (5) /* 5 ms */

enum qdio_irq_states {
	QDIO_IRQ_STATE_INACTIVE,
	QDIO_IRQ_STATE_ESTABLISHED,
	QDIO_IRQ_STATE_ACTIVE,
	QDIO_IRQ_STATE_STOPPED,
	QDIO_IRQ_STATE_CLEANUP,
	QDIO_IRQ_STATE_ERR,
	NR_QDIO_IRQ_STATES,
};

/* used as intparm in do_IO: */
#define QDIO_DOING_SENSEID 0
#define QDIO_DOING_ESTABLISH 1
#define QDIO_DOING_ACTIVATE 2
#define QDIO_DOING_CLEANUP 3

/************************* DEBUG FACILITY STUFF *********************/

#define QDIO_DBF_HEX(ex,name,level,addr,len) \
	do { \
	if (ex) \
		debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
	else \
		debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
	} while (0)
#define QDIO_DBF_TEXT(ex,name,level,text) \
	do { \
	if (ex) \
		debug_text_exception(qdio_dbf_##name,level,text); \
	else \
		debug_text_event(qdio_dbf_##name,level,text); \
	} while (0)


#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SETUP_NAME "qdio_setup"
#define QDIO_DBF_SETUP_LEN 8
#define QDIO_DBF_SETUP_PAGES 4
#define QDIO_DBF_SETUP_NR_AREAS 1
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SETUP_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SETUP_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
#define QDIO_DBF_SBAL_LEN 256
#define QDIO_DBF_SBAL_PAGES 4
#define QDIO_DBF_SBAL_NR_AREAS 2
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SBAL_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SBAL_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_TRACE_NAME "qdio_trace"
#define QDIO_DBF_TRACE_LEN 8
#define QDIO_DBF_TRACE_NR_AREAS 2
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_TRACE_PAGES 16
#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_TRACE_PAGES 4
#define QDIO_DBF_TRACE_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SENSE_NAME "qdio_sense"
#define QDIO_DBF_SENSE_LEN 64
#define QDIO_DBF_SENSE_PAGES 2
#define QDIO_DBF_SENSE_NR_AREAS 1
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SENSE_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SENSE_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#ifdef CONFIG_QDIO_DEBUG
#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT

#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
#define QDIO_DBF_SLSB_OUT_PAGES 256
#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
#define QDIO_DBF_SLSB_OUT_LEVEL 6

#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
#define QDIO_DBF_SLSB_IN_PAGES 256
#define QDIO_DBF_SLSB_IN_NR_AREAS 1
#define QDIO_DBF_SLSB_IN_LEVEL 6
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_PRINTK_HEADER QDIO_NAME ": "

#if QDIO_VERBOSE_LEVEL>8
#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_STUPID(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>7
#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ALL(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>6
#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_INFO(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>5
#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_WARN(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>4
#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ERR(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>3
#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_CRIT(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>2
#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ALERT(x...) do { } while (0)
#endif

#if QDIO_VERBOSE_LEVEL>1
#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_EMERG(x...) do { } while (0)
#endif

#define QDIO_HEXDUMP16(importance,header,ptr) \
QDIO_PRINT_##importance(header "%02x %02x %02x %02x  " \
			"%02x %02x %02x %02x  %02x %02x %02x %02x  " \
			"%02x %02x %02x %02x\n",*(((char*)ptr)), \
			*(((char*)ptr)+1),*(((char*)ptr)+2), \
			*(((char*)ptr)+3),*(((char*)ptr)+4), \
			*(((char*)ptr)+5),*(((char*)ptr)+6), \
			*(((char*)ptr)+7),*(((char*)ptr)+8), \
			*(((char*)ptr)+9),*(((char*)ptr)+10), \
			*(((char*)ptr)+11),*(((char*)ptr)+12), \
			*(((char*)ptr)+13),*(((char*)ptr)+14), \
			*(((char*)ptr)+15)); \
QDIO_PRINT_##importance(header "%02x %02x %02x %02x  %02x %02x %02x %02x  " \
			"%02x %02x %02x %02x  %02x %02x %02x %02x\n", \
			*(((char*)ptr)+16),*(((char*)ptr)+17), \
			*(((char*)ptr)+18),*(((char*)ptr)+19), \
			*(((char*)ptr)+20),*(((char*)ptr)+21), \
			*(((char*)ptr)+22),*(((char*)ptr)+23), \
			*(((char*)ptr)+24),*(((char*)ptr)+25), \
			*(((char*)ptr)+26),*(((char*)ptr)+27), \
			*(((char*)ptr)+28),*(((char*)ptr)+29), \
			*(((char*)ptr)+30),*(((char*)ptr)+31));

/****************** END OF DEBUG FACILITY STUFF *********************/

/*
 * Some instructions as assembly
 */

static inline int
do_sqbs(unsigned long sch, unsigned char state, int queue,
       unsigned int *start, unsigned int *count)
{
#ifdef CONFIG_64BIT
       register unsigned long _ccq asm ("0") = *count;
       register unsigned long _sch asm ("1") = sch;
       unsigned long _queuestart = ((unsigned long)queue << 32) | *start;

       asm volatile(
	       "	.insn	rsy,0xeb000000008A,%1,0,0(%2)"
	       : "+d" (_ccq), "+d" (_queuestart)
	       : "d" ((unsigned long)state), "d" (_sch)
	       : "memory", "cc");
       *count = _ccq & 0xff;
       *start = _queuestart & 0xff;

       return (_ccq >> 32) & 0xff;
#else
       return 0;
#endif
}

static inline int
do_eqbs(unsigned long sch, unsigned char *state, int queue,
	unsigned int *start, unsigned int *count)
{
#ifdef CONFIG_64BIT
	register unsigned long _ccq asm ("0") = *count;
	register unsigned long _sch asm ("1") = sch;
	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
	unsigned long _state = 0;

	asm volatile(
		"	.insn	rrf,0xB99c0000,%1,%2,0,0"
		: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
		: "d" (_sch)
		: "memory", "cc" );
	*count = _ccq & 0xff;
	*start = _queuestart & 0xff;
	*state = _state & 0xff;

	return (_ccq >> 32) & 0xff;
#else
	return 0;
#endif
}


static inline int
do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2)
{
	register unsigned long reg0 asm ("0") = 2;
	register struct subchannel_id reg1 asm ("1") = schid;
	register unsigned long reg2 asm ("2") = mask1;
	register unsigned long reg3 asm ("3") = mask2;
	int cc;

	asm volatile(
		"	siga	0\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc)
		: "d" (reg0), "d" (reg1), "d" (reg2), "d" (reg3) : "cc");
	return cc;
}

static inline int
do_siga_input(struct subchannel_id schid, unsigned int mask)
{
	register unsigned long reg0 asm ("0") = 1;
	register struct subchannel_id reg1 asm ("1") = schid;
	register unsigned long reg2 asm ("2") = mask;
	int cc;

	asm volatile(
		"	siga	0\n"
		"	ipm	%0\n"
		"	srl	%0,28\n"
		: "=d" (cc)
		: "d" (reg0), "d" (reg1), "d" (reg2) : "cc", "memory");
	return cc;
}

static inline int
do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb,
	       unsigned int fc)
{
	register unsigned long __fc asm("0") = fc;
	register unsigned long __schid asm("1") = schid;
	register unsigned long __mask asm("2") = mask;
	int cc;

	asm volatile(
		"	siga	0\n"
		"0:	ipm	%0\n"
		"	srl	%0,28\n"
		"1:\n"
		EX_TABLE(0b,1b)
		: "=d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
		: "0" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
		: "cc", "memory");
	(*bb) = ((unsigned int) __fc) >> 31;
	return cc;
}

static inline unsigned long
do_clear_global_summary(void)
{
	register unsigned long __fn asm("1") = 3;
	register unsigned long __tmp asm("2");
	register unsigned long __time asm("3");

	asm volatile(
		"	.insn	rre,0xb2650000,2,0"
		: "+d" (__fn), "=d" (__tmp), "=d" (__time));
	return __time;
}
	
/*
 * QDIO device commands returned by extended Sense-ID
 */
#define DEFAULT_ESTABLISH_QS_CMD 0x1b
#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
#define DEFAULT_ACTIVATE_QS_CMD 0x1f
#define DEFAULT_ACTIVATE_QS_COUNT 0

/*
 * additional CIWs returned by extended Sense-ID
 */
#define CIW_TYPE_EQUEUE 0x3       /* establish QDIO queues */
#define CIW_TYPE_AQUEUE 0x4       /* activate QDIO queues */

#define QDIO_CHSC_RESPONSE_CODE_OK 1
/* flags for st qdio sch data */
#define CHSC_FLAG_QDIO_CAPABILITY 0x80
#define CHSC_FLAG_VALIDITY 0x40

#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04

struct qdio_chsc_ssqd {
	struct chsc_header request;
	u16 reserved1:10;
	u16 ssid:2;
	u16 fmt:4;
	u16 first_sch;
	u16 reserved2;
	u16 last_sch;
	u32 reserved3;
	struct chsc_header response;
	u32 reserved4;
	u8  flags;
	u8  reserved5;
	u16 sch;
	u8  qfmt;
	u8  parm;
	u8  qdioac1;
	u8  sch_class;
	u8  pct;
	u8  icnt;
	u8  reserved7;
	u8  ocnt;
	u8  reserved8;
	u8  mbccnt;
	u16 qdioac2;
	u64 sch_token;
};

struct qdio_perf_stats {
#ifdef CONFIG_64BIT
	atomic64_t tl_runs;
	atomic64_t outbound_tl_runs;
	atomic64_t outbound_tl_runs_resched;
	atomic64_t inbound_tl_runs;
	atomic64_t inbound_tl_runs_resched;
	atomic64_t inbound_thin_tl_runs;
	atomic64_t inbound_thin_tl_runs_resched;

	atomic64_t siga_outs;
	atomic64_t siga_ins;
	atomic64_t siga_syncs;
	atomic64_t pcis;
	atomic64_t thinints;
	atomic64_t fast_reqs;

	atomic64_t outbound_cnt;
	atomic64_t inbound_cnt;
#else /* CONFIG_64BIT */
	atomic_t tl_runs;
	atomic_t outbound_tl_runs;
	atomic_t outbound_tl_runs_resched;
	atomic_t inbound_tl_runs;
	atomic_t inbound_tl_runs_resched;
	atomic_t inbound_thin_tl_runs;
	atomic_t inbound_thin_tl_runs_resched;

	atomic_t siga_outs;
	atomic_t siga_ins;
	atomic_t siga_syncs;
	atomic_t pcis;
	atomic_t thinints;
	atomic_t fast_reqs;

	atomic_t outbound_cnt;
	atomic_t inbound_cnt;
#endif /* CONFIG_64BIT */
};

/* unlikely as the later the better */
#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
	qdio_siga_sync(q,~0U,~0U)
#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
	qdio_siga_sync(q,~0U,0)

#define NOW qdio_get_micros()
#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)

#define MY_MODULE_STRING(x) #x

#ifdef CONFIG_64BIT
#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
#else /* CONFIG_64BIT */
#define QDIO_GET_ADDR(x) ((__u32)(long)x)
#endif /* CONFIG_64BIT */

struct qdio_q {
	volatile struct slsb slsb;

	char unused[QDIO_MAX_BUFFERS_PER_Q];

	__u32 * dev_st_chg_ind;

	int is_input_q;
	struct subchannel_id schid;
	struct ccw_device *cdev;

	unsigned int is_iqdio_q;
	unsigned int is_thinint_q;

	/* bit 0 means queue 0, bit 1 means queue 1, ... */
	unsigned int mask;
	unsigned int q_no;

	qdio_handler_t (*handler);

	/* points to the next buffer to be checked for having
	 * been processed by the card (outbound)
	 * or to the next buffer the program should check for (inbound) */
	volatile int first_to_check;
	/* and the last time it was: */
	volatile int last_move_ftc;

	atomic_t number_of_buffers_used;
	atomic_t polling;

	unsigned int siga_in;
	unsigned int siga_out;
	unsigned int siga_sync;
	unsigned int siga_sync_done_on_thinints;
	unsigned int siga_sync_done_on_outb_tis;
	unsigned int hydra_gives_outbound_pcis;

	/* used to save beginning position when calling dd_handlers */
	int first_element_to_kick;

	atomic_t use_count;
	atomic_t is_in_shutdown;

	void *irq_ptr;

	struct timer_list timer;
#ifdef QDIO_USE_TIMERS_FOR_POLLING
	atomic_t timer_already_set;
	spinlock_t timer_lock;
#else /* QDIO_USE_TIMERS_FOR_POLLING */
	struct tasklet_struct tasklet;
#endif /* QDIO_USE_TIMERS_FOR_POLLING */


	enum qdio_irq_states state;

	/* used to store the error condition during a data transfer */
	unsigned int qdio_error;
	unsigned int siga_error;
	unsigned int error_status_flags;

	/* list of interesting queues */
	volatile struct qdio_q *list_next;
	volatile struct qdio_q *list_prev;

	struct sl *sl;
	volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];

	struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];

	unsigned long int_parm;

	/*struct {
		int in_bh_check_limit;
		int threshold;
	} threshold_classes[QDIO_STATS_CLASSES];*/

	struct {
		/* inbound: the time to stop polling
		   outbound: the time to kick peer */
		int threshold; /* the real value */

		/* outbound: last time of do_QDIO
		   inbound: last time of noticing incoming data */
		/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
		int last_transfer_index; */

		__u64 last_transfer_time;
		__u64 busy_start;
	} timing;
	atomic_t busy_siga_counter;
        unsigned int queue_type;
	unsigned int is_pci_out;

	/* leave this member at the end. won't be cleared in qdio_fill_qs */
	struct slib *slib; /* a page is allocated under this pointer,
			      sl points into this page, offset PAGE_SIZE/2
			      (after slib) */
} __attribute__ ((aligned(256)));

struct qdio_irq {
	__u32 * volatile dev_st_chg_ind;

	unsigned long int_parm;
	struct subchannel_id schid;

	unsigned int is_iqdio_irq;
	unsigned int is_thinint_irq;
	unsigned int hydra_gives_outbound_pcis;
	unsigned int sync_done_on_outb_pcis;

	/* QEBSM facility */
	unsigned int is_qebsm;
	unsigned long sch_token;

	enum qdio_irq_states state;

	unsigned int no_input_qs;
	unsigned int no_output_qs;

	unsigned char qdioac;

	struct ccw1 ccw;

	struct ciw equeue;
	struct ciw aqueue;

	struct qib qib;
	
 	void (*original_int_handler) (struct ccw_device *,
 				      unsigned long, struct irb *);

	/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
	struct qdr *qdr;
	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
	struct semaphore setting_up_sema;
};
#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef _CIO_QDIO_H
	2	#define _CIO_QDIO_H
	3
0b642ede	4	#include <asm/page.h>
3a3fc29a	5	#include <asm/isc.h>
0b642ede	6
a8237fc4 CH	7	#include "schid.h"
a8237fc4 CH	8
1da177e4 LT	9	#ifdef CONFIG_QDIO_DEBUG
	10	#define QDIO_VERBOSE_LEVEL 9
	11	#else /* CONFIG_QDIO_DEBUG */
	12	#define QDIO_VERBOSE_LEVEL 5
	13	#endif /* CONFIG_QDIO_DEBUG */
1da177e4 LT	14	#define QDIO_USE_PROCESSING_STATE
1da177e4 LT	15
1da177e4 LT	16	#define QDIO_MINIMAL_BH_RELIEF_TIME 16
	17	#define QDIO_TIMER_POLL_VALUE 1
	18	#define IQDIO_TIMER_POLL_VALUE 1
	19
	20	/*
	21	* unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
	22	* we never know, whether we'll get initiative again, e.g. to give the
	23	* transmit skb's back to the stack, however the stack may be waiting for
	24	* them... therefore we define 4 as threshold to start polling (which
	25	* will stop as soon as the asynchronous queue catches up)
	26	* btw, this only applies to the asynchronous HiperSockets queue
	27	*/
	28	#define IQDIO_FILL_LEVEL_TO_POLL 4
	29
3a3fc29a	30	#define TIQDIO_THININT_ISC QDIO_AIRQ_ISC
1da177e4 LT	31	#define TIQDIO_DELAY_TARGET 0
	32	#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
	33	#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
	34	#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
	35	#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
	36	#define IQDIO_LOCAL_LAPS 4
	37	#define IQDIO_LOCAL_LAPS_INT 1
	38	#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
	39	/#define IQDIO_IQDC_INT_PARM 0x1234/
	40
	41	#define QDIO_Q_LAPS 5
	42
0b642ede	43	#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY
1da177e4 LT	44
	45	#define L2_CACHELINE_SIZE 256
	46	#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))
	47
	48	#define QDIO_PERF "qdio_perf"
	49
	50	/* must be a power of 2 */
	51	/*#define QDIO_STATS_NUMBER 4
	52
	53	#define QDIO_STATS_CLASSES 2
	54	#define QDIO_STATS_COUNT_NEEDED 2*/
	55
	56	#define QDIO_NO_USE_COUNT_TIMEOUT (1HZ) / wait for 1 sec on each q before
	57	exiting without having use_count
	58	of the queue to 0 */
	59
	60	#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
1da177e4 LT	61	#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
1da177e4 LT	62	#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)
1f8bdae9	63	#define QDIO_FORCE_CHECK_TIMEOUT (10*HZ)
b32ecdb7	64	#define QDIO_ACTIVATE_TIMEOUT (5) /* 5 ms */
1da177e4 LT	65
	66	enum qdio_irq_states {
	67	QDIO_IRQ_STATE_INACTIVE,
	68	QDIO_IRQ_STATE_ESTABLISHED,
	69	QDIO_IRQ_STATE_ACTIVE,
	70	QDIO_IRQ_STATE_STOPPED,
	71	QDIO_IRQ_STATE_CLEANUP,
	72	QDIO_IRQ_STATE_ERR,
	73	NR_QDIO_IRQ_STATES,
	74	};
	75
	76	/* used as intparm in do_IO: */
	77	#define QDIO_DOING_SENSEID 0
	78	#define QDIO_DOING_ESTABLISH 1
	79	#define QDIO_DOING_ACTIVATE 2
	80	#define QDIO_DOING_CLEANUP 3
	81
	82	/*********************** DEBUG FACILITY STUFF *******************/
	83
	84	#define QDIO_DBF_HEX(ex,name,level,addr,len) \
	85	do { \
	86	if (ex) \
	87	debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
	88	else \
	89	debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
	90	} while (0)
	91	#define QDIO_DBF_TEXT(ex,name,level,text) \
	92	do { \
	93	if (ex) \
	94	debug_text_exception(qdio_dbf_##name,level,text); \
	95	else \
	96	debug_text_event(qdio_dbf_##name,level,text); \
	97	} while (0)
	98
	99
	100	#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
	101	#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
	102	#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
	103	#ifdef CONFIG_QDIO_DEBUG
	104	#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
	105	#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
	106	#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
	107	#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
	108	#else /* CONFIG_QDIO_DEBUG */
	109	#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
	110	#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
	111	#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
	112	#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
	113	#endif /* CONFIG_QDIO_DEBUG */
	114
	115	#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
	116	#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
	117	#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
	118	#ifdef CONFIG_QDIO_DEBUG
	119	#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
	120	#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
	121	#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
	122	#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
	123	#else /* CONFIG_QDIO_DEBUG */
	124	#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
	125	#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
	126	#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
	127	#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
	128	#endif /* CONFIG_QDIO_DEBUG */
129
130	#define QDIO_DBF_SETUP_NAME "qdio_setup"
131	#define QDIO_DBF_SETUP_LEN 8
66a464db	132	#define QDIO_DBF_SETUP_PAGES 4
1da177e4 LT	133	#define QDIO_DBF_SETUP_NR_AREAS 1
	134	#ifdef CONFIG_QDIO_DEBUG
	135	#define QDIO_DBF_SETUP_LEVEL 6
	136	#else /* CONFIG_QDIO_DEBUG */
	137	#define QDIO_DBF_SETUP_LEVEL 2
	138	#endif /* CONFIG_QDIO_DEBUG */
	139
	140	#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
	141	#define QDIO_DBF_SBAL_LEN 256
66a464db	142	#define QDIO_DBF_SBAL_PAGES 4
1da177e4 LT	143	#define QDIO_DBF_SBAL_NR_AREAS 2
	144	#ifdef CONFIG_QDIO_DEBUG
	145	#define QDIO_DBF_SBAL_LEVEL 6
	146	#else /* CONFIG_QDIO_DEBUG */
	147	#define QDIO_DBF_SBAL_LEVEL 2
	148	#endif /* CONFIG_QDIO_DEBUG */
	149
	150	#define QDIO_DBF_TRACE_NAME "qdio_trace"
	151	#define QDIO_DBF_TRACE_LEN 8
	152	#define QDIO_DBF_TRACE_NR_AREAS 2
	153	#ifdef CONFIG_QDIO_DEBUG
66a464db	154	#define QDIO_DBF_TRACE_PAGES 16
1da177e4 LT	155	#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
1da177e4 LT	156	#else /* CONFIG_QDIO_DEBUG */
66a464db	157	#define QDIO_DBF_TRACE_PAGES 4
1da177e4 LT	158	#define QDIO_DBF_TRACE_LEVEL 2
	159	#endif /* CONFIG_QDIO_DEBUG */
	160
	161	#define QDIO_DBF_SENSE_NAME "qdio_sense"
	162	#define QDIO_DBF_SENSE_LEN 64
66a464db	163	#define QDIO_DBF_SENSE_PAGES 2
1da177e4 LT	164	#define QDIO_DBF_SENSE_NR_AREAS 1
	165	#ifdef CONFIG_QDIO_DEBUG
	166	#define QDIO_DBF_SENSE_LEVEL 6
	167	#else /* CONFIG_QDIO_DEBUG */
	168	#define QDIO_DBF_SENSE_LEVEL 2
	169	#endif /* CONFIG_QDIO_DEBUG */
	170
	171	#ifdef CONFIG_QDIO_DEBUG
	172	#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT
	173
	174	#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
	175	#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
66a464db	176	#define QDIO_DBF_SLSB_OUT_PAGES 256
1da177e4 LT	177	#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
	178	#define QDIO_DBF_SLSB_OUT_LEVEL 6
	179
	180	#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
	181	#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
66a464db	182	#define QDIO_DBF_SLSB_IN_PAGES 256
1da177e4 LT	183	#define QDIO_DBF_SLSB_IN_NR_AREAS 1
	184	#define QDIO_DBF_SLSB_IN_LEVEL 6
	185	#endif /* CONFIG_QDIO_DEBUG */
	186
	187	#define QDIO_PRINTK_HEADER QDIO_NAME ": "
	188
	189	#if QDIO_VERBOSE_LEVEL>8
	190	#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
	191	#else
39b083fe	192	#define QDIO_PRINT_STUPID(x...) do { } while (0)
1da177e4 LT	193	#endif
	194
	195	#if QDIO_VERBOSE_LEVEL>7
	196	#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
	197	#else
39b083fe	198	#define QDIO_PRINT_ALL(x...) do { } while (0)
1da177e4 LT	199	#endif
	200
	201	#if QDIO_VERBOSE_LEVEL>6
	202	#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
	203	#else
39b083fe	204	#define QDIO_PRINT_INFO(x...) do { } while (0)
1da177e4 LT	205	#endif
	206
	207	#if QDIO_VERBOSE_LEVEL>5
	208	#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
	209	#else
39b083fe	210	#define QDIO_PRINT_WARN(x...) do { } while (0)
1da177e4 LT	211	#endif
	212
	213	#if QDIO_VERBOSE_LEVEL>4
	214	#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
	215	#else
39b083fe	216	#define QDIO_PRINT_ERR(x...) do { } while (0)
1da177e4 LT	217	#endif
	218
	219	#if QDIO_VERBOSE_LEVEL>3
	220	#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
	221	#else
39b083fe	222	#define QDIO_PRINT_CRIT(x...) do { } while (0)
1da177e4 LT	223	#endif
	224
	225	#if QDIO_VERBOSE_LEVEL>2
	226	#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
	227	#else
39b083fe	228	#define QDIO_PRINT_ALERT(x...) do { } while (0)
1da177e4 LT	229	#endif
	230
	231	#if QDIO_VERBOSE_LEVEL>1
	232	#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
	233	#else
39b083fe	234	#define QDIO_PRINT_EMERG(x...) do { } while (0)
1da177e4 LT	235	#endif
1da177e4 LT	236
9163bb2e	237	#define QDIO_HEXDUMP16(importance,header,ptr) \
1da177e4 LT	238	QDIO_PRINT_##importance(header "%02x %02x %02x %02x " \
	239	"%02x %02x %02x %02x %02x %02x %02x %02x " \
	240	"%02x %02x %02x %02x\n",(((char)ptr)), \
	241	(((char)ptr)+1),(((char)ptr)+2), \
	242	(((char)ptr)+3),(((char)ptr)+4), \
	243	(((char)ptr)+5),(((char)ptr)+6), \
	244	(((char)ptr)+7),(((char)ptr)+8), \
	245	(((char)ptr)+9),(((char)ptr)+10), \
	246	(((char)ptr)+11),(((char)ptr)+12), \
	247	(((char)ptr)+13),(((char)ptr)+14), \
	248	(((char)ptr)+15)); \
	249	QDIO_PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \
	250	"%02x %02x %02x %02x %02x %02x %02x %02x\n", \
	251	(((char)ptr)+16),(((char)ptr)+17), \
	252	(((char)ptr)+18),(((char)ptr)+19), \
	253	(((char)ptr)+20),(((char)ptr)+21), \
	254	(((char)ptr)+22),(((char)ptr)+23), \
	255	(((char)ptr)+24),(((char)ptr)+25), \
	256	(((char)ptr)+26),(((char)ptr)+27), \
	257	(((char)ptr)+28),(((char)ptr)+29), \
	258	(((char)ptr)+30),(((char)ptr)+31));
	259
	260	/**************** END OF DEBUG FACILITY STUFF *******************/
	261
	262	/*
	263	* Some instructions as assembly
	264	*/
8129ee16 FP	265
	266	static inline int
	267	do_sqbs(unsigned long sch, unsigned char state, int queue,
	268	unsigned int start, unsigned int count)
	269	{
347a8dc3	270	#ifdef CONFIG_64BIT
8129ee16 FP	271	register unsigned long _ccq asm ("0") = *count;
	272	register unsigned long _sch asm ("1") = sch;
	273	unsigned long _queuestart = ((unsigned long)queue << 32) \| *start;
	274
94c12cc7 MS	275	asm volatile(
	276	" .insn rsy,0xeb000000008A,%1,0,0(%2)"
	277	: "+d" (_ccq), "+d" (_queuestart)
	278	: "d" ((unsigned long)state), "d" (_sch)
	279	: "memory", "cc");
8129ee16 FP	280	*count = _ccq & 0xff;
	281	*start = _queuestart & 0xff;
	282
	283	return (_ccq >> 32) & 0xff;
	284	#else
	285	return 0;
	286	#endif
	287	}
	288
	289	static inline int
	290	do_eqbs(unsigned long sch, unsigned char *state, int queue,
	291	unsigned int start, unsigned int count)
	292	{
347a8dc3	293	#ifdef CONFIG_64BIT
8129ee16 FP	294	register unsigned long _ccq asm ("0") = *count;
	295	register unsigned long _sch asm ("1") = sch;
	296	unsigned long _queuestart = ((unsigned long)queue << 32) \| *start;
	297	unsigned long _state = 0;
	298
94c12cc7 MS	299	asm volatile(
	300	" .insn rrf,0xB99c0000,%1,%2,0,0"
	301	: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
	302	: "d" (_sch)
	303	: "memory", "cc" );
8129ee16 FP	304	*count = _ccq & 0xff;
	305	*start = _queuestart & 0xff;
	306	*state = _state & 0xff;
	307
	308	return (_ccq >> 32) & 0xff;
	309	#else
	310	return 0;
	311	#endif
	312	}
	313
	314
4448aaf0	315	static inline int
a8237fc4	316	do_siga_sync(struct subchannel_id schid, unsigned int mask1, unsigned int mask2)
1da177e4	317	{
94c12cc7 MS	318	register unsigned long reg0 asm ("0") = 2;
	319	register struct subchannel_id reg1 asm ("1") = schid;
	320	register unsigned long reg2 asm ("2") = mask1;
	321	register unsigned long reg3 asm ("3") = mask2;
1da177e4 LT	322	int cc;
1da177e4 LT	323
94c12cc7 MS	324	asm volatile(
	325	" siga 0\n"
	326	" ipm %0\n"
	327	" srl %0,28\n"
1da177e4	328	: "=d" (cc)
94c12cc7	329	: "d" (reg0), "d" (reg1), "d" (reg2), "d" (reg3) : "cc");
1da177e4 LT	330	return cc;
	331	}
	332
4448aaf0	333	static inline int
a8237fc4	334	do_siga_input(struct subchannel_id schid, unsigned int mask)
1da177e4	335	{
94c12cc7 MS	336	register unsigned long reg0 asm ("0") = 1;
	337	register struct subchannel_id reg1 asm ("1") = schid;
	338	register unsigned long reg2 asm ("2") = mask;
1da177e4 LT	339	int cc;
1da177e4 LT	340
94c12cc7 MS	341	asm volatile(
	342	" siga 0\n"
	343	" ipm %0\n"
	344	" srl %0,28\n"
1da177e4	345	: "=d" (cc)
94c12cc7	346	: "d" (reg0), "d" (reg1), "d" (reg2) : "cc", "memory");
1da177e4 LT	347	return cc;
	348	}
	349
4448aaf0	350	static inline int
a8237fc4	351	do_siga_output(unsigned long schid, unsigned long mask, __u32 *bb,
8129ee16	352	unsigned int fc)
1da177e4	353	{
94c12cc7 MS	354	register unsigned long __fc asm("0") = fc;
	355	register unsigned long __schid asm("1") = schid;
	356	register unsigned long __mask asm("2") = mask;
1da177e4	357	int cc;
94c12cc7 MS	358
	359	asm volatile(
	360	" siga 0\n"
	361	"0: ipm %0\n"
	362	" srl %0,28\n"
	363	"1:\n"
	364	EX_TABLE(0b,1b)
	365	: "=d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
	366	: "0" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
	367	: "cc", "memory");
	368	(*bb) = ((unsigned int) __fc) >> 31;
1da177e4 LT	369	return cc;
	370	}
	371
4448aaf0	372	static inline unsigned long
1da177e4 LT	373	do_clear_global_summary(void)
1da177e4 LT	374	{
94c12cc7 MS	375	register unsigned long __fn asm("1") = 3;
	376	register unsigned long __tmp asm("2");
	377	register unsigned long __time asm("3");
	378
	379	asm volatile(
	380	" .insn rre,0xb2650000,2,0"
	381	: "+d" (__fn), "=d" (__tmp), "=d" (__time));
	382	return __time;
1da177e4 LT	383	}
	384
	385	/*
	386	* QDIO device commands returned by extended Sense-ID
	387	*/
	388	#define DEFAULT_ESTABLISH_QS_CMD 0x1b
	389	#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
	390	#define DEFAULT_ACTIVATE_QS_CMD 0x1f
	391	#define DEFAULT_ACTIVATE_QS_COUNT 0
	392
	393	/*
	394	* additional CIWs returned by extended Sense-ID
	395	*/
	396	#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
	397	#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
	398
	399	#define QDIO_CHSC_RESPONSE_CODE_OK 1
	400	/* flags for st qdio sch data */
	401	#define CHSC_FLAG_QDIO_CAPABILITY 0x80
	402	#define CHSC_FLAG_VALIDITY 0x40
	403
	404	#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
	405	#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
	406	#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
	407	#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
	408	#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04
	409
e1776856 UB	410	struct qdio_chsc_ssqd {
	411	struct chsc_header request;
	412	u16 reserved1:10;
	413	u16 ssid:2;
	414	u16 fmt:4;
	415	u16 first_sch;
	416	u16 reserved2;
	417	u16 last_sch;
	418	u32 reserved3;
	419	struct chsc_header response;
	420	u32 reserved4;
	421	u8 flags;
	422	u8 reserved5;
	423	u16 sch;
	424	u8 qfmt;
	425	u8 parm;
	426	u8 qdioac1;
	427	u8 sch_class;
	428	u8 pct;
	429	u8 icnt;
	430	u8 reserved7;
	431	u8 ocnt;
	432	u8 reserved8;
	433	u8 mbccnt;
	434	u16 qdioac2;
	435	u64 sch_token;
	436	};
	437
1da177e4	438	struct qdio_perf_stats {
00c0c646 UB	439	#ifdef CONFIG_64BIT
	440	atomic64_t tl_runs;
	441	atomic64_t outbound_tl_runs;
	442	atomic64_t outbound_tl_runs_resched;
	443	atomic64_t inbound_tl_runs;
	444	atomic64_t inbound_tl_runs_resched;
	445	atomic64_t inbound_thin_tl_runs;
	446	atomic64_t inbound_thin_tl_runs_resched;
	447
	448	atomic64_t siga_outs;
	449	atomic64_t siga_ins;
	450	atomic64_t siga_syncs;
	451	atomic64_t pcis;
	452	atomic64_t thinints;
	453	atomic64_t fast_reqs;
	454
	455	atomic64_t outbound_cnt;
	456	atomic64_t inbound_cnt;
	457	#else /* CONFIG_64BIT */
	458	atomic_t tl_runs;
	459	atomic_t outbound_tl_runs;
	460	atomic_t outbound_tl_runs_resched;
	461	atomic_t inbound_tl_runs;
	462	atomic_t inbound_tl_runs_resched;
	463	atomic_t inbound_thin_tl_runs;
	464	atomic_t inbound_thin_tl_runs_resched;
	465
	466	atomic_t siga_outs;
	467	atomic_t siga_ins;
	468	atomic_t siga_syncs;
	469	atomic_t pcis;
	470	atomic_t thinints;
	471	atomic_t fast_reqs;
	472
	473	atomic_t outbound_cnt;
	474	atomic_t inbound_cnt;
	475	#endif /* CONFIG_64BIT */
1da177e4	476	};
1da177e4	477
1da177e4 LT	478	/* unlikely as the later the better */
	479	#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
	480	#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
	481	qdio_siga_sync(q,~0U,~0U)
	482	#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
	483	qdio_siga_sync(q,~0U,0)
	484
	485	#define NOW qdio_get_micros()
	486	#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
	487	#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
	488	#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
	489	#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)
	490
	491	#define MY_MODULE_STRING(x) #x
	492
347a8dc3	493	#ifdef CONFIG_64BIT
1da177e4	494	#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
347a8dc3	495	#else /* CONFIG_64BIT */
1da177e4	496	#define QDIO_GET_ADDR(x) ((__u32)(long)x)
347a8dc3	497	#endif /* CONFIG_64BIT */
1da177e4	498
1da177e4 LT	499	struct qdio_q {
	500	volatile struct slsb slsb;
	501
	502	char unused[QDIO_MAX_BUFFERS_PER_Q];
	503
8129ee16	504	__u32 * dev_st_chg_ind;
1da177e4 LT	505
1da177e4 LT	506	int is_input_q;
a8237fc4	507	struct subchannel_id schid;
1da177e4 LT	508	struct ccw_device *cdev;
	509
	510	unsigned int is_iqdio_q;
	511	unsigned int is_thinint_q;
	512
	513	/* bit 0 means queue 0, bit 1 means queue 1, ... */
	514	unsigned int mask;
	515	unsigned int q_no;
	516
	517	qdio_handler_t (*handler);
	518
	519	/* points to the next buffer to be checked for having
	520	* been processed by the card (outbound)
	521	* or to the next buffer the program should check for (inbound) */
	522	volatile int first_to_check;
	523	/* and the last time it was: */
	524	volatile int last_move_ftc;
	525
	526	atomic_t number_of_buffers_used;
	527	atomic_t polling;
	528
	529	unsigned int siga_in;
	530	unsigned int siga_out;
	531	unsigned int siga_sync;
	532	unsigned int siga_sync_done_on_thinints;
	533	unsigned int siga_sync_done_on_outb_tis;
	534	unsigned int hydra_gives_outbound_pcis;
	535
	536	/* used to save beginning position when calling dd_handlers */
	537	int first_element_to_kick;
	538
	539	atomic_t use_count;
	540	atomic_t is_in_shutdown;
	541
	542	void *irq_ptr;
	543
1da177e4	544	struct timer_list timer;
1f8bdae9	545	#ifdef QDIO_USE_TIMERS_FOR_POLLING
1da177e4 LT	546	atomic_t timer_already_set;
	547	spinlock_t timer_lock;
	548	#else /* QDIO_USE_TIMERS_FOR_POLLING */
	549	struct tasklet_struct tasklet;
	550	#endif /* QDIO_USE_TIMERS_FOR_POLLING */
	551
8129ee16	552
1da177e4 LT	553	enum qdio_irq_states state;
	554
	555	/* used to store the error condition during a data transfer */
	556	unsigned int qdio_error;
	557	unsigned int siga_error;
	558	unsigned int error_status_flags;
	559
	560	/* list of interesting queues */
	561	volatile struct qdio_q *list_next;
	562	volatile struct qdio_q *list_prev;
	563
	564	struct sl *sl;
	565	volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];
	566
	567	struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];
	568
	569	unsigned long int_parm;
	570
	571	/*struct {
	572	int in_bh_check_limit;
	573	int threshold;
	574	} threshold_classes[QDIO_STATS_CLASSES];*/
	575
	576	struct {
	577	/* inbound: the time to stop polling
	578	outbound: the time to kick peer */
	579	int threshold; /* the real value */
	580
	581	/* outbound: last time of do_QDIO
	582	inbound: last time of noticing incoming data */
	583	/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
	584	int last_transfer_index; */
	585
	586	__u64 last_transfer_time;
	587	__u64 busy_start;
	588	} timing;
	589	atomic_t busy_siga_counter;
	590	unsigned int queue_type;
1f8bdae9	591	unsigned int is_pci_out;
1da177e4 LT	592
	593	/* leave this member at the end. won't be cleared in qdio_fill_qs */
	594	struct slib slib; / a page is allocated under this pointer,
	595	sl points into this page, offset PAGE_SIZE/2
	596	(after slib) */
	597	} __attribute__ ((aligned(256)));
	598
	599	struct qdio_irq {
	600	__u32 * volatile dev_st_chg_ind;
	601
	602	unsigned long int_parm;
a8237fc4	603	struct subchannel_id schid;
1da177e4 LT	604
	605	unsigned int is_iqdio_irq;
	606	unsigned int is_thinint_irq;
	607	unsigned int hydra_gives_outbound_pcis;
	608	unsigned int sync_done_on_outb_pcis;
	609
8129ee16 FP	610	/* QEBSM facility */
	611	unsigned int is_qebsm;
	612	unsigned long sch_token;
	613
1da177e4 LT	614	enum qdio_irq_states state;
	615
	616	unsigned int no_input_qs;
	617	unsigned int no_output_qs;
	618
	619	unsigned char qdioac;
	620
	621	struct ccw1 ccw;
	622
	623	struct ciw equeue;
	624	struct ciw aqueue;
	625
	626	struct qib qib;
	627
	628	void (original_int_handler) (struct ccw_device ,
	629	unsigned long, struct irb *);
	630
	631	/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
	632	struct qdr *qdr;
	633	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
	634	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
	635	struct semaphore setting_up_sema;
	636	};
	637	#endif