[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / s390 / cio / qdio.h

#ifndef _CIO_QDIO_H
#define _CIO_QDIO_H

#include <asm/page.h>

#define VERSION_CIO_QDIO_H "$Revision: 1.33 $"

#ifdef CONFIG_QDIO_DEBUG
#define QDIO_VERBOSE_LEVEL 9
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_VERBOSE_LEVEL 5
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_USE_PROCESSING_STATE

#ifdef CONFIG_QDIO_PERF_STATS
#define QDIO_PERFORMANCE_STATS
#endif /* CONFIG_QDIO_PERF_STATS */

#define QDIO_MINIMAL_BH_RELIEF_TIME 16
#define QDIO_TIMER_POLL_VALUE 1
#define IQDIO_TIMER_POLL_VALUE 1

/*
 * unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
 * we never know, whether we'll get initiative again, e.g. to give the
 * transmit skb's back to the stack, however the stack may be waiting for
 * them... therefore we define 4 as threshold to start polling (which
 * will stop as soon as the asynchronous queue catches up)
 * btw, this only applies to the asynchronous HiperSockets queue
 */
#define IQDIO_FILL_LEVEL_TO_POLL 4

#define TIQDIO_THININT_ISC 3
#define TIQDIO_DELAY_TARGET 0
#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
#define IQDIO_LOCAL_LAPS 4
#define IQDIO_LOCAL_LAPS_INT 1
#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
/*#define IQDIO_IQDC_INT_PARM 0x1234*/

#define QDIO_Q_LAPS 5

#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY

#define L2_CACHELINE_SIZE 256
#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))

#define QDIO_PERF "qdio_perf"

/* must be a power of 2 */
/*#define QDIO_STATS_NUMBER 4

#define QDIO_STATS_CLASSES 2
#define QDIO_STATS_COUNT_NEEDED 2*/

#define QDIO_NO_USE_COUNT_TIMEOUT (1*HZ) /* wait for 1 sec on each q before
					    exiting without having use_count
					    of the queue to 0 */

#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
#define QDIO_ACTIVATE_TIMEOUT ((5*HZ)>>10)
#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)

enum qdio_irq_states {
	QDIO_IRQ_STATE_INACTIVE,
	QDIO_IRQ_STATE_ESTABLISHED,
	QDIO_IRQ_STATE_ACTIVE,
	QDIO_IRQ_STATE_STOPPED,
	QDIO_IRQ_STATE_CLEANUP,
	QDIO_IRQ_STATE_ERR,
	NR_QDIO_IRQ_STATES,
};

/* used as intparm in do_IO: */
#define QDIO_DOING_SENSEID 0
#define QDIO_DOING_ESTABLISH 1
#define QDIO_DOING_ACTIVATE 2
#define QDIO_DOING_CLEANUP 3

/************************* DEBUG FACILITY STUFF *********************/

#define QDIO_DBF_HEX(ex,name,level,addr,len) \
	do { \
	if (ex) \
		debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
	else \
		debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
	} while (0)
#define QDIO_DBF_TEXT(ex,name,level,text) \
	do { \
	if (ex) \
		debug_text_exception(qdio_dbf_##name,level,text); \
	else \
		debug_text_event(qdio_dbf_##name,level,text); \
	} while (0)


#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SETUP_NAME "qdio_setup"
#define QDIO_DBF_SETUP_LEN 8
#define QDIO_DBF_SETUP_PAGES 4
#define QDIO_DBF_SETUP_NR_AREAS 1
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SETUP_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SETUP_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
#define QDIO_DBF_SBAL_LEN 256
#define QDIO_DBF_SBAL_PAGES 4
#define QDIO_DBF_SBAL_NR_AREAS 2
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SBAL_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SBAL_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_TRACE_NAME "qdio_trace"
#define QDIO_DBF_TRACE_LEN 8
#define QDIO_DBF_TRACE_NR_AREAS 2
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_TRACE_PAGES 16
#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_TRACE_PAGES 4
#define QDIO_DBF_TRACE_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_DBF_SENSE_NAME "qdio_sense"
#define QDIO_DBF_SENSE_LEN 64
#define QDIO_DBF_SENSE_PAGES 2
#define QDIO_DBF_SENSE_NR_AREAS 1
#ifdef CONFIG_QDIO_DEBUG
#define QDIO_DBF_SENSE_LEVEL 6
#else /* CONFIG_QDIO_DEBUG */
#define QDIO_DBF_SENSE_LEVEL 2
#endif /* CONFIG_QDIO_DEBUG */

#ifdef CONFIG_QDIO_DEBUG
#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT

#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
#define QDIO_DBF_SLSB_OUT_PAGES 256
#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
#define QDIO_DBF_SLSB_OUT_LEVEL 6

#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
#define QDIO_DBF_SLSB_IN_PAGES 256
#define QDIO_DBF_SLSB_IN_NR_AREAS 1
#define QDIO_DBF_SLSB_IN_LEVEL 6
#endif /* CONFIG_QDIO_DEBUG */

#define QDIO_PRINTK_HEADER QDIO_NAME ": "

#if QDIO_VERBOSE_LEVEL>8
#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_STUPID(x...)
#endif

#if QDIO_VERBOSE_LEVEL>7
#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ALL(x...)
#endif

#if QDIO_VERBOSE_LEVEL>6
#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_INFO(x...)
#endif

#if QDIO_VERBOSE_LEVEL>5
#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_WARN(x...)
#endif

#if QDIO_VERBOSE_LEVEL>4
#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ERR(x...)
#endif

#if QDIO_VERBOSE_LEVEL>3
#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_CRIT(x...)
#endif

#if QDIO_VERBOSE_LEVEL>2
#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_ALERT(x...)
#endif

#if QDIO_VERBOSE_LEVEL>1
#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
#else
#define QDIO_PRINT_EMERG(x...)
#endif

#define HEXDUMP16(importance,header,ptr) \
QDIO_PRINT_##importance(header "%02x %02x %02x %02x  " \
			"%02x %02x %02x %02x  %02x %02x %02x %02x  " \
			"%02x %02x %02x %02x\n",*(((char*)ptr)), \
			*(((char*)ptr)+1),*(((char*)ptr)+2), \
			*(((char*)ptr)+3),*(((char*)ptr)+4), \
			*(((char*)ptr)+5),*(((char*)ptr)+6), \
			*(((char*)ptr)+7),*(((char*)ptr)+8), \
			*(((char*)ptr)+9),*(((char*)ptr)+10), \
			*(((char*)ptr)+11),*(((char*)ptr)+12), \
			*(((char*)ptr)+13),*(((char*)ptr)+14), \
			*(((char*)ptr)+15)); \
QDIO_PRINT_##importance(header "%02x %02x %02x %02x  %02x %02x %02x %02x  " \
			"%02x %02x %02x %02x  %02x %02x %02x %02x\n", \
			*(((char*)ptr)+16),*(((char*)ptr)+17), \
			*(((char*)ptr)+18),*(((char*)ptr)+19), \
			*(((char*)ptr)+20),*(((char*)ptr)+21), \
			*(((char*)ptr)+22),*(((char*)ptr)+23), \
			*(((char*)ptr)+24),*(((char*)ptr)+25), \
			*(((char*)ptr)+26),*(((char*)ptr)+27), \
			*(((char*)ptr)+28),*(((char*)ptr)+29), \
			*(((char*)ptr)+30),*(((char*)ptr)+31));

/****************** END OF DEBUG FACILITY STUFF *********************/

/*
 * Some instructions as assembly
 */
static inline int
do_siga_sync(unsigned int irq, unsigned int mask1, unsigned int mask2)
{
	int cc;

#ifndef CONFIG_ARCH_S390X
	asm volatile (
		"lhi	0,2	\n\t"
		"lr	1,%1	\n\t"
		"lr	2,%2	\n\t"
		"lr	3,%3	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (0x10000|irq), "d" (mask1), "d" (mask2)
		: "cc", "0", "1", "2", "3"
		);
#else /* CONFIG_ARCH_S390X */
	asm volatile (
		"lghi	0,2	\n\t"
		"llgfr	1,%1	\n\t"
		"llgfr	2,%2	\n\t"
		"llgfr	3,%3	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (0x10000|irq), "d" (mask1), "d" (mask2)
		: "cc", "0", "1", "2", "3"
		);
#endif /* CONFIG_ARCH_S390X */
	return cc;
}

static inline int
do_siga_input(unsigned int irq, unsigned int mask)
{
	int cc;

#ifndef CONFIG_ARCH_S390X
	asm volatile (
		"lhi	0,1	\n\t"
		"lr	1,%1	\n\t"
		"lr	2,%2	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (0x10000|irq), "d" (mask)
		: "cc", "0", "1", "2", "memory"
		);
#else /* CONFIG_ARCH_S390X */
	asm volatile (
		"lghi	0,1	\n\t"
		"llgfr	1,%1	\n\t"
		"llgfr	2,%2	\n\t"
		"siga   0	\n\t"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		: "=d" (cc)
		: "d" (0x10000|irq), "d" (mask)
		: "cc", "0", "1", "2", "memory"
		);
#endif /* CONFIG_ARCH_S390X */
	
	return cc;
}

static inline int
do_siga_output(unsigned long irq, unsigned long mask, __u32 *bb)
{
	int cc;
	__u32 busy_bit;

#ifndef CONFIG_ARCH_S390X
	asm volatile (
		"lhi	0,0	\n\t"
		"lr	1,%2	\n\t"
		"lr	2,%3	\n\t"
		"siga	0	\n\t"
		"0:"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		"srl	0,31	\n\t"
		"lr	%1,0	\n\t"
		"1:	\n\t"
		".section .fixup,\"ax\"\n\t"
		"2:	\n\t"
		"lhi	%0,%4	\n\t"
		"bras	1,3f	\n\t"
		".long 1b	\n\t"
		"3:	\n\t"
		"l	1,0(1)	\n\t"
		"br	1	\n\t"
		".previous	\n\t"
		".section __ex_table,\"a\"\n\t"
		".align 4	\n\t"
		".long	0b,2b	\n\t"
		".previous	\n\t"
		: "=d" (cc), "=d" (busy_bit)
		: "d" (0x10000|irq), "d" (mask),
		"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
		: "cc", "0", "1", "2", "memory"
		);
#else /* CONFIG_ARCH_S390X */
	asm volatile (
		"lghi	0,0	\n\t"
		"llgfr	1,%2	\n\t"
		"llgfr	2,%3	\n\t"
		"siga	0	\n\t"
		"0:"
		"ipm	%0	\n\t"
		"srl	%0,28	\n\t"
		"srl	0,31	\n\t"
		"llgfr	%1,0	\n\t"
		"1:	\n\t"
		".section .fixup,\"ax\"\n\t"
		"lghi	%0,%4	\n\t"
		"jg	1b	\n\t"
		".previous\n\t"
		".section __ex_table,\"a\"\n\t"
		".align 8	\n\t"
		".quad	0b,1b	\n\t"
		".previous	\n\t"
		: "=d" (cc), "=d" (busy_bit)
		: "d" (0x10000|irq), "d" (mask),
		"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
		: "cc", "0", "1", "2", "memory"
		);
#endif /* CONFIG_ARCH_S390X */
	
	(*bb) = busy_bit;
	return cc;
}

static inline unsigned long
do_clear_global_summary(void)
{

	unsigned long time;

#ifndef CONFIG_ARCH_S390X
	asm volatile (
		"lhi	1,3	\n\t"
		".insn	rre,0xb2650000,2,0	\n\t"
		"lr	%0,3	\n\t"
		: "=d" (time) : : "cc", "1", "2", "3"
		);
#else /* CONFIG_ARCH_S390X */
	asm volatile (
		"lghi	1,3	\n\t"
		".insn	rre,0xb2650000,2,0	\n\t"
		"lgr	%0,3	\n\t"
		: "=d" (time) : : "cc", "1", "2", "3"
		);
#endif /* CONFIG_ARCH_S390X */
	
	return time;
}
	
/*
 * QDIO device commands returned by extended Sense-ID
 */
#define DEFAULT_ESTABLISH_QS_CMD 0x1b
#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
#define DEFAULT_ACTIVATE_QS_CMD 0x1f
#define DEFAULT_ACTIVATE_QS_COUNT 0

/*
 * additional CIWs returned by extended Sense-ID
 */
#define CIW_TYPE_EQUEUE 0x3       /* establish QDIO queues */
#define CIW_TYPE_AQUEUE 0x4       /* activate QDIO queues */

#define QDIO_CHSC_RESPONSE_CODE_OK 1
/* flags for st qdio sch data */
#define CHSC_FLAG_QDIO_CAPABILITY 0x80
#define CHSC_FLAG_VALIDITY 0x40

#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04

#ifdef QDIO_PERFORMANCE_STATS
struct qdio_perf_stats {
	unsigned int tl_runs;

	unsigned int siga_outs;
	unsigned int siga_ins;
	unsigned int siga_syncs;
	unsigned int pcis;
	unsigned int thinints;
	unsigned int fast_reqs;

	__u64 start_time_outbound;
	unsigned int outbound_cnt;
	unsigned int outbound_time;
	__u64 start_time_inbound;
	unsigned int inbound_cnt;
	unsigned int inbound_time;
};
#endif /* QDIO_PERFORMANCE_STATS */

#define atomic_swap(a,b) xchg((int*)a.counter,b)

/* unlikely as the later the better */
#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
	qdio_siga_sync(q,~0U,~0U)
#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
	qdio_siga_sync(q,~0U,0)

#define NOW qdio_get_micros()
#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)

#define MY_MODULE_STRING(x) #x

#ifdef CONFIG_ARCH_S390X
#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
#else /* CONFIG_ARCH_S390X */
#define QDIO_GET_ADDR(x) ((__u32)(long)x)
#endif /* CONFIG_ARCH_S390X */

#ifdef CONFIG_QDIO_DEBUG
#define set_slsb(x,y) \
  if(q->queue_type==QDIO_TRACE_QTYPE) { \
        if(q->is_input_q) { \
            QDIO_DBF_HEX2(0,slsb_in,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
        } else { \
            QDIO_DBF_HEX2(0,slsb_out,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
        } \
  } \
  qdio_set_slsb(x,y); \
  if(q->queue_type==QDIO_TRACE_QTYPE) { \
        if(q->is_input_q) { \
            QDIO_DBF_HEX2(0,slsb_in,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
        } else { \
            QDIO_DBF_HEX2(0,slsb_out,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
        } \
  }
#else /* CONFIG_QDIO_DEBUG */
#define set_slsb(x,y) qdio_set_slsb(x,y)
#endif /* CONFIG_QDIO_DEBUG */

struct qdio_q {
	volatile struct slsb slsb;

	char unused[QDIO_MAX_BUFFERS_PER_Q];

	__u32 * volatile dev_st_chg_ind;

	int is_input_q;
	int irq;
	struct ccw_device *cdev;

	unsigned int is_iqdio_q;
	unsigned int is_thinint_q;

	/* bit 0 means queue 0, bit 1 means queue 1, ... */
	unsigned int mask;
	unsigned int q_no;

	qdio_handler_t (*handler);

	/* points to the next buffer to be checked for having
	 * been processed by the card (outbound)
	 * or to the next buffer the program should check for (inbound) */
	volatile int first_to_check;
	/* and the last time it was: */
	volatile int last_move_ftc;

	atomic_t number_of_buffers_used;
	atomic_t polling;

	unsigned int siga_in;
	unsigned int siga_out;
	unsigned int siga_sync;
	unsigned int siga_sync_done_on_thinints;
	unsigned int siga_sync_done_on_outb_tis;
	unsigned int hydra_gives_outbound_pcis;

	/* used to save beginning position when calling dd_handlers */
	int first_element_to_kick;

	atomic_t use_count;
	atomic_t is_in_shutdown;

	void *irq_ptr;

#ifdef QDIO_USE_TIMERS_FOR_POLLING
	struct timer_list timer;
	atomic_t timer_already_set;
	spinlock_t timer_lock;
#else /* QDIO_USE_TIMERS_FOR_POLLING */
	struct tasklet_struct tasklet;
#endif /* QDIO_USE_TIMERS_FOR_POLLING */

	enum qdio_irq_states state;

	/* used to store the error condition during a data transfer */
	unsigned int qdio_error;
	unsigned int siga_error;
	unsigned int error_status_flags;

	/* list of interesting queues */
	volatile struct qdio_q *list_next;
	volatile struct qdio_q *list_prev;

	struct sl *sl;
	volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];

	struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];

	unsigned long int_parm;

	/*struct {
		int in_bh_check_limit;
		int threshold;
	} threshold_classes[QDIO_STATS_CLASSES];*/

	struct {
		/* inbound: the time to stop polling
		   outbound: the time to kick peer */
		int threshold; /* the real value */

		/* outbound: last time of do_QDIO
		   inbound: last time of noticing incoming data */
		/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
		int last_transfer_index; */

		__u64 last_transfer_time;
		__u64 busy_start;
	} timing;
	atomic_t busy_siga_counter;
        unsigned int queue_type;

	/* leave this member at the end. won't be cleared in qdio_fill_qs */
	struct slib *slib; /* a page is allocated under this pointer,
			      sl points into this page, offset PAGE_SIZE/2
			      (after slib) */
} __attribute__ ((aligned(256)));

struct qdio_irq {
	__u32 * volatile dev_st_chg_ind;

	unsigned long int_parm;
	int irq;

	unsigned int is_iqdio_irq;
	unsigned int is_thinint_irq;
	unsigned int hydra_gives_outbound_pcis;
	unsigned int sync_done_on_outb_pcis;

	enum qdio_irq_states state;

	unsigned int no_input_qs;
	unsigned int no_output_qs;

	unsigned char qdioac;

	struct ccw1 ccw;

	struct ciw equeue;
	struct ciw aqueue;

	struct qib qib;
	
 	void (*original_int_handler) (struct ccw_device *,
 				      unsigned long, struct irb *);

	/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
	struct qdr *qdr;
	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
	struct semaphore setting_up_sema;
};
#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef _CIO_QDIO_H
	2	#define _CIO_QDIO_H
	3
0b642ede PO	4	#include <asm/page.h>
0b642ede PO	5
66a464db	6	#define VERSION_CIO_QDIO_H "$Revision: 1.33 $"
1da177e4 LT	7
	8	#ifdef CONFIG_QDIO_DEBUG
	9	#define QDIO_VERBOSE_LEVEL 9
	10	#else /* CONFIG_QDIO_DEBUG */
	11	#define QDIO_VERBOSE_LEVEL 5
	12	#endif /* CONFIG_QDIO_DEBUG */
	13
	14	#define QDIO_USE_PROCESSING_STATE
	15
	16	#ifdef CONFIG_QDIO_PERF_STATS
	17	#define QDIO_PERFORMANCE_STATS
	18	#endif /* CONFIG_QDIO_PERF_STATS */
	19
	20	#define QDIO_MINIMAL_BH_RELIEF_TIME 16
	21	#define QDIO_TIMER_POLL_VALUE 1
	22	#define IQDIO_TIMER_POLL_VALUE 1
	23
	24	/*
	25	* unfortunately this can't be (QDIO_MAX_BUFFERS_PER_Q*4/3) or so -- as
	26	* we never know, whether we'll get initiative again, e.g. to give the
	27	* transmit skb's back to the stack, however the stack may be waiting for
	28	* them... therefore we define 4 as threshold to start polling (which
	29	* will stop as soon as the asynchronous queue catches up)
	30	* btw, this only applies to the asynchronous HiperSockets queue
	31	*/
	32	#define IQDIO_FILL_LEVEL_TO_POLL 4
	33
	34	#define TIQDIO_THININT_ISC 3
	35	#define TIQDIO_DELAY_TARGET 0
	36	#define QDIO_BUSY_BIT_PATIENCE 100 /* in microsecs */
	37	#define QDIO_BUSY_BIT_GIVE_UP 10000000 /* 10 seconds */
	38	#define IQDIO_GLOBAL_LAPS 2 /* GLOBAL_LAPS are not used as we */
	39	#define IQDIO_GLOBAL_LAPS_INT 1 /* don't global summary */
	40	#define IQDIO_LOCAL_LAPS 4
	41	#define IQDIO_LOCAL_LAPS_INT 1
	42	#define IQDIO_GLOBAL_SUMMARY_CC_MASK 2
	43	/#define IQDIO_IQDC_INT_PARM 0x1234/
	44
	45	#define QDIO_Q_LAPS 5
	46
0b642ede	47	#define QDIO_STORAGE_KEY PAGE_DEFAULT_KEY
1da177e4 LT	48
	49	#define L2_CACHELINE_SIZE 256
	50	#define INDICATORS_PER_CACHELINE (L2_CACHELINE_SIZE/sizeof(__u32))
	51
	52	#define QDIO_PERF "qdio_perf"
	53
	54	/* must be a power of 2 */
	55	/*#define QDIO_STATS_NUMBER 4
	56
	57	#define QDIO_STATS_CLASSES 2
	58	#define QDIO_STATS_COUNT_NEEDED 2*/
	59
	60	#define QDIO_NO_USE_COUNT_TIMEOUT (1HZ) / wait for 1 sec on each q before
	61	exiting without having use_count
	62	of the queue to 0 */
	63
	64	#define QDIO_ESTABLISH_TIMEOUT (1*HZ)
	65	#define QDIO_ACTIVATE_TIMEOUT ((5*HZ)>>10)
	66	#define QDIO_CLEANUP_CLEAR_TIMEOUT (20*HZ)
	67	#define QDIO_CLEANUP_HALT_TIMEOUT (10*HZ)
	68
	69	enum qdio_irq_states {
	70	QDIO_IRQ_STATE_INACTIVE,
	71	QDIO_IRQ_STATE_ESTABLISHED,
	72	QDIO_IRQ_STATE_ACTIVE,
	73	QDIO_IRQ_STATE_STOPPED,
	74	QDIO_IRQ_STATE_CLEANUP,
	75	QDIO_IRQ_STATE_ERR,
	76	NR_QDIO_IRQ_STATES,
	77	};
	78
	79	/* used as intparm in do_IO: */
	80	#define QDIO_DOING_SENSEID 0
	81	#define QDIO_DOING_ESTABLISH 1
	82	#define QDIO_DOING_ACTIVATE 2
	83	#define QDIO_DOING_CLEANUP 3
	84
	85	/*********************** DEBUG FACILITY STUFF *******************/
	86
	87	#define QDIO_DBF_HEX(ex,name,level,addr,len) \
	88	do { \
	89	if (ex) \
	90	debug_exception(qdio_dbf_##name,level,(void*)(addr),len); \
	91	else \
	92	debug_event(qdio_dbf_##name,level,(void*)(addr),len); \
	93	} while (0)
	94	#define QDIO_DBF_TEXT(ex,name,level,text) \
	95	do { \
	96	if (ex) \
	97	debug_text_exception(qdio_dbf_##name,level,text); \
	98	else \
	99	debug_text_event(qdio_dbf_##name,level,text); \
	100	} while (0)
	101
	102
	103	#define QDIO_DBF_HEX0(ex,name,addr,len) QDIO_DBF_HEX(ex,name,0,addr,len)
	104	#define QDIO_DBF_HEX1(ex,name,addr,len) QDIO_DBF_HEX(ex,name,1,addr,len)
	105	#define QDIO_DBF_HEX2(ex,name,addr,len) QDIO_DBF_HEX(ex,name,2,addr,len)
	106	#ifdef CONFIG_QDIO_DEBUG
	107	#define QDIO_DBF_HEX3(ex,name,addr,len) QDIO_DBF_HEX(ex,name,3,addr,len)
	108	#define QDIO_DBF_HEX4(ex,name,addr,len) QDIO_DBF_HEX(ex,name,4,addr,len)
	109	#define QDIO_DBF_HEX5(ex,name,addr,len) QDIO_DBF_HEX(ex,name,5,addr,len)
	110	#define QDIO_DBF_HEX6(ex,name,addr,len) QDIO_DBF_HEX(ex,name,6,addr,len)
	111	#else /* CONFIG_QDIO_DEBUG */
112	#define QDIO_DBF_HEX3(ex,name,addr,len) do {} while (0)
113	#define QDIO_DBF_HEX4(ex,name,addr,len) do {} while (0)
114	#define QDIO_DBF_HEX5(ex,name,addr,len) do {} while (0)
115	#define QDIO_DBF_HEX6(ex,name,addr,len) do {} while (0)
116	#endif /* CONFIG_QDIO_DEBUG */
117
118	#define QDIO_DBF_TEXT0(ex,name,text) QDIO_DBF_TEXT(ex,name,0,text)
119	#define QDIO_DBF_TEXT1(ex,name,text) QDIO_DBF_TEXT(ex,name,1,text)
120	#define QDIO_DBF_TEXT2(ex,name,text) QDIO_DBF_TEXT(ex,name,2,text)
121	#ifdef CONFIG_QDIO_DEBUG
122	#define QDIO_DBF_TEXT3(ex,name,text) QDIO_DBF_TEXT(ex,name,3,text)
123	#define QDIO_DBF_TEXT4(ex,name,text) QDIO_DBF_TEXT(ex,name,4,text)
124	#define QDIO_DBF_TEXT5(ex,name,text) QDIO_DBF_TEXT(ex,name,5,text)
125	#define QDIO_DBF_TEXT6(ex,name,text) QDIO_DBF_TEXT(ex,name,6,text)
126	#else /* CONFIG_QDIO_DEBUG */
127	#define QDIO_DBF_TEXT3(ex,name,text) do {} while (0)
128	#define QDIO_DBF_TEXT4(ex,name,text) do {} while (0)
129	#define QDIO_DBF_TEXT5(ex,name,text) do {} while (0)
130	#define QDIO_DBF_TEXT6(ex,name,text) do {} while (0)
131	#endif /* CONFIG_QDIO_DEBUG */
132
133	#define QDIO_DBF_SETUP_NAME "qdio_setup"
134	#define QDIO_DBF_SETUP_LEN 8
66a464db	135	#define QDIO_DBF_SETUP_PAGES 4
1da177e4 LT	136	#define QDIO_DBF_SETUP_NR_AREAS 1
	137	#ifdef CONFIG_QDIO_DEBUG
	138	#define QDIO_DBF_SETUP_LEVEL 6
	139	#else /* CONFIG_QDIO_DEBUG */
	140	#define QDIO_DBF_SETUP_LEVEL 2
	141	#endif /* CONFIG_QDIO_DEBUG */
	142
	143	#define QDIO_DBF_SBAL_NAME "qdio_labs" /* sbal */
	144	#define QDIO_DBF_SBAL_LEN 256
66a464db	145	#define QDIO_DBF_SBAL_PAGES 4
1da177e4 LT	146	#define QDIO_DBF_SBAL_NR_AREAS 2
	147	#ifdef CONFIG_QDIO_DEBUG
	148	#define QDIO_DBF_SBAL_LEVEL 6
	149	#else /* CONFIG_QDIO_DEBUG */
	150	#define QDIO_DBF_SBAL_LEVEL 2
	151	#endif /* CONFIG_QDIO_DEBUG */
	152
	153	#define QDIO_DBF_TRACE_NAME "qdio_trace"
	154	#define QDIO_DBF_TRACE_LEN 8
	155	#define QDIO_DBF_TRACE_NR_AREAS 2
	156	#ifdef CONFIG_QDIO_DEBUG
66a464db	157	#define QDIO_DBF_TRACE_PAGES 16
1da177e4 LT	158	#define QDIO_DBF_TRACE_LEVEL 4 /* -------- could be even more verbose here */
1da177e4 LT	159	#else /* CONFIG_QDIO_DEBUG */
66a464db	160	#define QDIO_DBF_TRACE_PAGES 4
1da177e4 LT	161	#define QDIO_DBF_TRACE_LEVEL 2
	162	#endif /* CONFIG_QDIO_DEBUG */
	163
	164	#define QDIO_DBF_SENSE_NAME "qdio_sense"
	165	#define QDIO_DBF_SENSE_LEN 64
66a464db	166	#define QDIO_DBF_SENSE_PAGES 2
1da177e4 LT	167	#define QDIO_DBF_SENSE_NR_AREAS 1
	168	#ifdef CONFIG_QDIO_DEBUG
	169	#define QDIO_DBF_SENSE_LEVEL 6
	170	#else /* CONFIG_QDIO_DEBUG */
	171	#define QDIO_DBF_SENSE_LEVEL 2
	172	#endif /* CONFIG_QDIO_DEBUG */
	173
	174	#ifdef CONFIG_QDIO_DEBUG
	175	#define QDIO_TRACE_QTYPE QDIO_ZFCP_QFMT
	176
	177	#define QDIO_DBF_SLSB_OUT_NAME "qdio_slsb_out"
	178	#define QDIO_DBF_SLSB_OUT_LEN QDIO_MAX_BUFFERS_PER_Q
66a464db	179	#define QDIO_DBF_SLSB_OUT_PAGES 256
1da177e4 LT	180	#define QDIO_DBF_SLSB_OUT_NR_AREAS 1
	181	#define QDIO_DBF_SLSB_OUT_LEVEL 6
	182
	183	#define QDIO_DBF_SLSB_IN_NAME "qdio_slsb_in"
	184	#define QDIO_DBF_SLSB_IN_LEN QDIO_MAX_BUFFERS_PER_Q
66a464db	185	#define QDIO_DBF_SLSB_IN_PAGES 256
1da177e4 LT	186	#define QDIO_DBF_SLSB_IN_NR_AREAS 1
	187	#define QDIO_DBF_SLSB_IN_LEVEL 6
	188	#endif /* CONFIG_QDIO_DEBUG */
	189
	190	#define QDIO_PRINTK_HEADER QDIO_NAME ": "
	191
	192	#if QDIO_VERBOSE_LEVEL>8
	193	#define QDIO_PRINT_STUPID(x...) printk( KERN_DEBUG QDIO_PRINTK_HEADER x)
	194	#else
	195	#define QDIO_PRINT_STUPID(x...)
	196	#endif
	197
	198	#if QDIO_VERBOSE_LEVEL>7
	199	#define QDIO_PRINT_ALL(x...) printk( QDIO_PRINTK_HEADER x)
	200	#else
	201	#define QDIO_PRINT_ALL(x...)
	202	#endif
	203
	204	#if QDIO_VERBOSE_LEVEL>6
	205	#define QDIO_PRINT_INFO(x...) printk( QDIO_PRINTK_HEADER x)
	206	#else
	207	#define QDIO_PRINT_INFO(x...)
	208	#endif
	209
	210	#if QDIO_VERBOSE_LEVEL>5
	211	#define QDIO_PRINT_WARN(x...) printk( QDIO_PRINTK_HEADER x)
	212	#else
	213	#define QDIO_PRINT_WARN(x...)
	214	#endif
	215
	216	#if QDIO_VERBOSE_LEVEL>4
	217	#define QDIO_PRINT_ERR(x...) printk( QDIO_PRINTK_HEADER x)
	218	#else
	219	#define QDIO_PRINT_ERR(x...)
	220	#endif
	221
	222	#if QDIO_VERBOSE_LEVEL>3
	223	#define QDIO_PRINT_CRIT(x...) printk( QDIO_PRINTK_HEADER x)
	224	#else
	225	#define QDIO_PRINT_CRIT(x...)
	226	#endif
	227
	228	#if QDIO_VERBOSE_LEVEL>2
	229	#define QDIO_PRINT_ALERT(x...) printk( QDIO_PRINTK_HEADER x)
	230	#else
	231	#define QDIO_PRINT_ALERT(x...)
	232	#endif
	233
	234	#if QDIO_VERBOSE_LEVEL>1
	235	#define QDIO_PRINT_EMERG(x...) printk( QDIO_PRINTK_HEADER x)
	236	#else
	237	#define QDIO_PRINT_EMERG(x...)
	238	#endif
	239
	240	#define HEXDUMP16(importance,header,ptr) \
	241	QDIO_PRINT_##importance(header "%02x %02x %02x %02x " \
	242	"%02x %02x %02x %02x %02x %02x %02x %02x " \
	243	"%02x %02x %02x %02x\n",(((char)ptr)), \
	244	(((char)ptr)+1),(((char)ptr)+2), \
	245	(((char)ptr)+3),(((char)ptr)+4), \
	246	(((char)ptr)+5),(((char)ptr)+6), \
	247	(((char)ptr)+7),(((char)ptr)+8), \
	248	(((char)ptr)+9),(((char)ptr)+10), \
	249	(((char)ptr)+11),(((char)ptr)+12), \
250	(((char)ptr)+13),(((char)ptr)+14), \
251	(((char)ptr)+15)); \
252	QDIO_PRINT_##importance(header "%02x %02x %02x %02x %02x %02x %02x %02x " \
253	"%02x %02x %02x %02x %02x %02x %02x %02x\n", \
254	(((char)ptr)+16),(((char)ptr)+17), \
255	(((char)ptr)+18),(((char)ptr)+19), \
256	(((char)ptr)+20),(((char)ptr)+21), \
257	(((char)ptr)+22),(((char)ptr)+23), \
258	(((char)ptr)+24),(((char)ptr)+25), \
259	(((char)ptr)+26),(((char)ptr)+27), \
260	(((char)ptr)+28),(((char)ptr)+29), \
261	(((char)ptr)+30),(((char)ptr)+31));
262
263	/**************** END OF DEBUG FACILITY STUFF *******************/
264
265	/*
266	* Some instructions as assembly
267	*/
4448aaf0	268	static inline int
1da177e4 LT	269	do_siga_sync(unsigned int irq, unsigned int mask1, unsigned int mask2)
	270	{
	271	int cc;
	272
	273	#ifndef CONFIG_ARCH_S390X
	274	asm volatile (
	275	"lhi 0,2 \n\t"
	276	"lr 1,%1 \n\t"
	277	"lr 2,%2 \n\t"
	278	"lr 3,%3 \n\t"
	279	"siga 0 \n\t"
	280	"ipm %0 \n\t"
	281	"srl %0,28 \n\t"
	282	: "=d" (cc)
	283	: "d" (0x10000\|irq), "d" (mask1), "d" (mask2)
	284	: "cc", "0", "1", "2", "3"
	285	);
	286	#else /* CONFIG_ARCH_S390X */
	287	asm volatile (
	288	"lghi 0,2 \n\t"
	289	"llgfr 1,%1 \n\t"
	290	"llgfr 2,%2 \n\t"
	291	"llgfr 3,%3 \n\t"
	292	"siga 0 \n\t"
	293	"ipm %0 \n\t"
	294	"srl %0,28 \n\t"
	295	: "=d" (cc)
	296	: "d" (0x10000\|irq), "d" (mask1), "d" (mask2)
	297	: "cc", "0", "1", "2", "3"
	298	);
	299	#endif /* CONFIG_ARCH_S390X */
	300	return cc;
	301	}
	302
4448aaf0	303	static inline int
1da177e4 LT	304	do_siga_input(unsigned int irq, unsigned int mask)
	305	{
	306	int cc;
	307
	308	#ifndef CONFIG_ARCH_S390X
	309	asm volatile (
	310	"lhi 0,1 \n\t"
	311	"lr 1,%1 \n\t"
	312	"lr 2,%2 \n\t"
	313	"siga 0 \n\t"
	314	"ipm %0 \n\t"
	315	"srl %0,28 \n\t"
	316	: "=d" (cc)
	317	: "d" (0x10000\|irq), "d" (mask)
	318	: "cc", "0", "1", "2", "memory"
	319	);
	320	#else /* CONFIG_ARCH_S390X */
	321	asm volatile (
	322	"lghi 0,1 \n\t"
	323	"llgfr 1,%1 \n\t"
	324	"llgfr 2,%2 \n\t"
	325	"siga 0 \n\t"
	326	"ipm %0 \n\t"
	327	"srl %0,28 \n\t"
	328	: "=d" (cc)
	329	: "d" (0x10000\|irq), "d" (mask)
	330	: "cc", "0", "1", "2", "memory"
	331	);
	332	#endif /* CONFIG_ARCH_S390X */
	333
	334	return cc;
	335	}
	336
4448aaf0	337	static inline int
1da177e4 LT	338	do_siga_output(unsigned long irq, unsigned long mask, __u32 *bb)
	339	{
	340	int cc;
	341	__u32 busy_bit;
	342
	343	#ifndef CONFIG_ARCH_S390X
	344	asm volatile (
	345	"lhi 0,0 \n\t"
	346	"lr 1,%2 \n\t"
	347	"lr 2,%3 \n\t"
	348	"siga 0 \n\t"
	349	"0:"
	350	"ipm %0 \n\t"
	351	"srl %0,28 \n\t"
	352	"srl 0,31 \n\t"
	353	"lr %1,0 \n\t"
	354	"1: \n\t"
	355	".section .fixup,\"ax\"\n\t"
	356	"2: \n\t"
	357	"lhi %0,%4 \n\t"
	358	"bras 1,3f \n\t"
	359	".long 1b \n\t"
	360	"3: \n\t"
	361	"l 1,0(1) \n\t"
	362	"br 1 \n\t"
	363	".previous \n\t"
	364	".section __ex_table,\"a\"\n\t"
	365	".align 4 \n\t"
	366	".long 0b,2b \n\t"
	367	".previous \n\t"
	368	: "=d" (cc), "=d" (busy_bit)
	369	: "d" (0x10000\|irq), "d" (mask),
	370	"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
	371	: "cc", "0", "1", "2", "memory"
	372	);
	373	#else /* CONFIG_ARCH_S390X */
	374	asm volatile (
	375	"lghi 0,0 \n\t"
	376	"llgfr 1,%2 \n\t"
	377	"llgfr 2,%3 \n\t"
	378	"siga 0 \n\t"
	379	"0:"
	380	"ipm %0 \n\t"
	381	"srl %0,28 \n\t"
	382	"srl 0,31 \n\t"
	383	"llgfr %1,0 \n\t"
	384	"1: \n\t"
	385	".section .fixup,\"ax\"\n\t"
	386	"lghi %0,%4 \n\t"
	387	"jg 1b \n\t"
	388	".previous\n\t"
	389	".section __ex_table,\"a\"\n\t"
	390	".align 8 \n\t"
	391	".quad 0b,1b \n\t"
	392	".previous \n\t"
	393	: "=d" (cc), "=d" (busy_bit)
	394	: "d" (0x10000\|irq), "d" (mask),
	395	"i" (QDIO_SIGA_ERROR_ACCESS_EXCEPTION)
	396	: "cc", "0", "1", "2", "memory"
	397	);
	398	#endif /* CONFIG_ARCH_S390X */
	399
	400	(*bb) = busy_bit;
	401	return cc;
402	}
403
4448aaf0	404	static inline unsigned long
1da177e4 LT	405	do_clear_global_summary(void)
	406	{
	407
	408	unsigned long time;
	409
	410	#ifndef CONFIG_ARCH_S390X
	411	asm volatile (
	412	"lhi 1,3 \n\t"
	413	".insn rre,0xb2650000,2,0 \n\t"
	414	"lr %0,3 \n\t"
	415	: "=d" (time) : : "cc", "1", "2", "3"
	416	);
	417	#else /* CONFIG_ARCH_S390X */
	418	asm volatile (
	419	"lghi 1,3 \n\t"
	420	".insn rre,0xb2650000,2,0 \n\t"
	421	"lgr %0,3 \n\t"
	422	: "=d" (time) : : "cc", "1", "2", "3"
	423	);
	424	#endif /* CONFIG_ARCH_S390X */
	425
	426	return time;
	427	}
	428
	429	/*
	430	* QDIO device commands returned by extended Sense-ID
	431	*/
	432	#define DEFAULT_ESTABLISH_QS_CMD 0x1b
	433	#define DEFAULT_ESTABLISH_QS_COUNT 0x1000
	434	#define DEFAULT_ACTIVATE_QS_CMD 0x1f
	435	#define DEFAULT_ACTIVATE_QS_COUNT 0
	436
	437	/*
	438	* additional CIWs returned by extended Sense-ID
	439	*/
	440	#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
	441	#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
	442
	443	#define QDIO_CHSC_RESPONSE_CODE_OK 1
	444	/* flags for st qdio sch data */
	445	#define CHSC_FLAG_QDIO_CAPABILITY 0x80
	446	#define CHSC_FLAG_VALIDITY 0x40
	447
	448	#define CHSC_FLAG_SIGA_INPUT_NECESSARY 0x40
	449	#define CHSC_FLAG_SIGA_OUTPUT_NECESSARY 0x20
	450	#define CHSC_FLAG_SIGA_SYNC_NECESSARY 0x10
	451	#define CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS 0x08
	452	#define CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS 0x04
	453
	454	#ifdef QDIO_PERFORMANCE_STATS
	455	struct qdio_perf_stats {
	456	unsigned int tl_runs;
	457
	458	unsigned int siga_outs;
	459	unsigned int siga_ins;
	460	unsigned int siga_syncs;
	461	unsigned int pcis;
	462	unsigned int thinints;
	463	unsigned int fast_reqs;
	464
	465	__u64 start_time_outbound;
	466	unsigned int outbound_cnt;
	467	unsigned int outbound_time;
	468	__u64 start_time_inbound;
469	unsigned int inbound_cnt;
470	unsigned int inbound_time;
471	};
472	#endif /* QDIO_PERFORMANCE_STATS */
473
474	#define atomic_swap(a,b) xchg((int*)a.counter,b)
475
476	/* unlikely as the later the better */
477	#define SYNC_MEMORY if (unlikely(q->siga_sync)) qdio_siga_sync_q(q)
478	#define SYNC_MEMORY_ALL if (unlikely(q->siga_sync)) \
479	qdio_siga_sync(q,~0U,~0U)
480	#define SYNC_MEMORY_ALL_OUTB if (unlikely(q->siga_sync)) \
481	qdio_siga_sync(q,~0U,0)
482
483	#define NOW qdio_get_micros()
484	#define SAVE_TIMESTAMP(q) q->timing.last_transfer_time=NOW
485	#define GET_SAVED_TIMESTAMP(q) (q->timing.last_transfer_time)
486	#define SAVE_FRONTIER(q,val) q->last_move_ftc=val
487	#define GET_SAVED_FRONTIER(q) (q->last_move_ftc)
488
489	#define MY_MODULE_STRING(x) #x
490
491	#ifdef CONFIG_ARCH_S390X
492	#define QDIO_GET_ADDR(x) ((__u32)(unsigned long)x)
493	#else /* CONFIG_ARCH_S390X */
494	#define QDIO_GET_ADDR(x) ((__u32)(long)x)
495	#endif /* CONFIG_ARCH_S390X */
496
497	#ifdef CONFIG_QDIO_DEBUG
498	#define set_slsb(x,y) \
499	if(q->queue_type==QDIO_TRACE_QTYPE) { \
500	if(q->is_input_q) { \
501	QDIO_DBF_HEX2(0,slsb_in,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
502	} else { \
503	QDIO_DBF_HEX2(0,slsb_out,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
504	} \
505	} \
506	qdio_set_slsb(x,y); \
507	if(q->queue_type==QDIO_TRACE_QTYPE) { \
508	if(q->is_input_q) { \
509	QDIO_DBF_HEX2(0,slsb_in,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
510	} else { \
511	QDIO_DBF_HEX2(0,slsb_out,&q->slsb,QDIO_MAX_BUFFERS_PER_Q); \
512	} \
513	}
514	#else /* CONFIG_QDIO_DEBUG */
515	#define set_slsb(x,y) qdio_set_slsb(x,y)
516	#endif /* CONFIG_QDIO_DEBUG */
517
518	struct qdio_q {
519	volatile struct slsb slsb;
520
521	char unused[QDIO_MAX_BUFFERS_PER_Q];
522
523	__u32 * volatile dev_st_chg_ind;
524
525	int is_input_q;
526	int irq;
527	struct ccw_device *cdev;
528
529	unsigned int is_iqdio_q;
530	unsigned int is_thinint_q;
531
532	/* bit 0 means queue 0, bit 1 means queue 1, ... */
533	unsigned int mask;
534	unsigned int q_no;
535
536	qdio_handler_t (*handler);
537
538	/* points to the next buffer to be checked for having
539	* been processed by the card (outbound)
540	* or to the next buffer the program should check for (inbound) */
541	volatile int first_to_check;
542	/* and the last time it was: */
543	volatile int last_move_ftc;
544
545	atomic_t number_of_buffers_used;
546	atomic_t polling;
547
548	unsigned int siga_in;
549	unsigned int siga_out;
550	unsigned int siga_sync;
551	unsigned int siga_sync_done_on_thinints;
552	unsigned int siga_sync_done_on_outb_tis;
553	unsigned int hydra_gives_outbound_pcis;
554
555	/* used to save beginning position when calling dd_handlers */
556	int first_element_to_kick;
557
558	atomic_t use_count;
559	atomic_t is_in_shutdown;
560
561	void *irq_ptr;
562
563	#ifdef QDIO_USE_TIMERS_FOR_POLLING
564	struct timer_list timer;
565	atomic_t timer_already_set;
566	spinlock_t timer_lock;
567	#else /* QDIO_USE_TIMERS_FOR_POLLING */
568	struct tasklet_struct tasklet;
569	#endif /* QDIO_USE_TIMERS_FOR_POLLING */
570
571	enum qdio_irq_states state;
572
573	/* used to store the error condition during a data transfer */
574	unsigned int qdio_error;
575	unsigned int siga_error;
576	unsigned int error_status_flags;
577
578	/* list of interesting queues */
579	volatile struct qdio_q *list_next;
580	volatile struct qdio_q *list_prev;
581
582	struct sl *sl;
583	volatile struct sbal *sbal[QDIO_MAX_BUFFERS_PER_Q];
584
585	struct qdio_buffer *qdio_buffers[QDIO_MAX_BUFFERS_PER_Q];
586
587	unsigned long int_parm;
588
589	/*struct {
590	int in_bh_check_limit;
591	int threshold;
592	} threshold_classes[QDIO_STATS_CLASSES];*/
593
594	struct {
595	/* inbound: the time to stop polling
596	outbound: the time to kick peer */
597	int threshold; /* the real value */
598
599	/* outbound: last time of do_QDIO
600	inbound: last time of noticing incoming data */
601	/*__u64 last_transfer_times[QDIO_STATS_NUMBER];
602	int last_transfer_index; */
603
604	__u64 last_transfer_time;
605	__u64 busy_start;
606	} timing;
607	atomic_t busy_siga_counter;
608	unsigned int queue_type;
609
610	/* leave this member at the end. won't be cleared in qdio_fill_qs */
611	struct slib slib; / a page is allocated under this pointer,
612	sl points into this page, offset PAGE_SIZE/2
613	(after slib) */
614	} __attribute__ ((aligned(256)));
615
616	struct qdio_irq {
617	__u32 * volatile dev_st_chg_ind;
618
619	unsigned long int_parm;
620	int irq;
621
622	unsigned int is_iqdio_irq;
623	unsigned int is_thinint_irq;
624	unsigned int hydra_gives_outbound_pcis;
625	unsigned int sync_done_on_outb_pcis;
626
627	enum qdio_irq_states state;
628
629	unsigned int no_input_qs;
630	unsigned int no_output_qs;
631
632	unsigned char qdioac;
633
634	struct ccw1 ccw;
635
636	struct ciw equeue;
637	struct ciw aqueue;
638
639	struct qib qib;
640
641	void (original_int_handler) (struct ccw_device ,
642	unsigned long, struct irb *);
643
644	/* leave these four members together at the end. won't be cleared in qdio_fill_irq */
645	struct qdr *qdr;
646	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
647	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
648	struct semaphore setting_up_sema;
649	};
650	#endif