[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / rtc / rtc-pl031.c

/*
 * drivers/rtc/rtc-pl031.c
 *
 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
 *
 * Author: Deepak Saxena <dsaxena@plexity.net>
 *
 * Copyright 2006 (c) MontaVista Software, Inc.
 *
 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
 * Copyright 2010 (c) ST-Ericsson AB
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/amba/bus.h>
#include <linux/io.h>
#include <linux/bcd.h>
#include <linux/delay.h>
#include <linux/slab.h>

/*
 * Register definitions
 */
#define	RTC_DR		0x00	/* Data read register */
#define	RTC_MR		0x04	/* Match register */
#define	RTC_LR		0x08	/* Data load register */
#define	RTC_CR		0x0c	/* Control register */
#define	RTC_IMSC	0x10	/* Interrupt mask and set register */
#define	RTC_RIS		0x14	/* Raw interrupt status register */
#define	RTC_MIS		0x18	/* Masked interrupt status register */
#define	RTC_ICR		0x1c	/* Interrupt clear register */
/* ST variants have additional timer functionality */
#define RTC_TDR		0x20	/* Timer data read register */
#define RTC_TLR		0x24	/* Timer data load register */
#define RTC_TCR		0x28	/* Timer control register */
#define RTC_YDR		0x30	/* Year data read register */
#define RTC_YMR		0x34	/* Year match register */
#define RTC_YLR		0x38	/* Year data load register */

#define RTC_CR_EN	(1 << 0)	/* counter enable bit */
#define RTC_CR_CWEN	(1 << 26)	/* Clockwatch enable bit */

#define RTC_TCR_EN	(1 << 1) /* Periodic timer enable bit */

/* Common bit definitions for Interrupt status and control registers */
#define RTC_BIT_AI	(1 << 0) /* Alarm interrupt bit */
#define RTC_BIT_PI	(1 << 1) /* Periodic interrupt bit. ST variants only. */

/* Common bit definations for ST v2 for reading/writing time */
#define RTC_SEC_SHIFT 0
#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
#define RTC_MIN_SHIFT 6
#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
#define RTC_HOUR_SHIFT 12
#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
#define RTC_WDAY_SHIFT 17
#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
#define RTC_MDAY_SHIFT 20
#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
#define RTC_MON_SHIFT 25
#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */

#define RTC_TIMER_FREQ 32768

/**
 * struct pl031_vendor_data - per-vendor variations
 * @ops: the vendor-specific operations used on this silicon version
 * @clockwatch: if this is an ST Microelectronics silicon version with a
 *	clockwatch function
 * @st_weekday: if this is an ST Microelectronics silicon version that need
 *	the weekday fix
 * @irqflags: special IRQ flags per variant
 */
struct pl031_vendor_data {
	struct rtc_class_ops ops;
	bool clockwatch;
	bool st_weekday;
	unsigned long irqflags;
};

struct pl031_local {
	struct pl031_vendor_data *vendor;
	struct rtc_device *rtc;
	void __iomem *base;
};

static int pl031_alarm_irq_enable(struct device *dev,
	unsigned int enabled)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long imsc;

	/* Clear any pending alarm interrupts. */
	writel(RTC_BIT_AI, ldata->base + RTC_ICR);

	imsc = readl(ldata->base + RTC_IMSC);

	if (enabled == 1)
		writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
	else
		writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);

	return 0;
}

/*
 * Convert Gregorian date to ST v2 RTC format.
 */
static int pl031_stv2_tm_to_time(struct device *dev,
				 struct rtc_time *tm, unsigned long *st_time,
	unsigned long *bcd_year)
{
	int year = tm->tm_year + 1900;
	int wday = tm->tm_wday;

	/* wday masking is not working in hardware so wday must be valid */
	if (wday < -1 || wday > 6) {
		dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
		return -EINVAL;
	} else if (wday == -1) {
		/* wday is not provided, calculate it here */
		unsigned long time;
		struct rtc_time calc_tm;

		rtc_tm_to_time(tm, &time);
		rtc_time_to_tm(time, &calc_tm);
		wday = calc_tm.tm_wday;
	}

	*bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);

	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
			|	(tm->tm_mday << RTC_MDAY_SHIFT)
			|	((wday + 1) << RTC_WDAY_SHIFT)
			|	(tm->tm_hour << RTC_HOUR_SHIFT)
			|	(tm->tm_min << RTC_MIN_SHIFT)
			|	(tm->tm_sec << RTC_SEC_SHIFT);

	return 0;
}

/*
 * Convert ST v2 RTC format to Gregorian date.
 */
static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
	struct rtc_time *tm)
{
	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
	tm->tm_mon  = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
	tm->tm_min  = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
	tm->tm_sec  = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);

	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	tm->tm_year -= 1900;

	return 0;
}

static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
			readl(ldata->base + RTC_YDR), tm);

	return 0;
}

static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	unsigned long bcd_year;
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
	if (ret == 0) {
		writel(bcd_year, ldata->base + RTC_YLR);
		writel(time, ldata->base + RTC_LR);
	}

	return ret;
}

static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
			readl(ldata->base + RTC_YMR), &alarm->time);

	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;

	return ret;
}

static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long time;
	unsigned long bcd_year;
	int ret;

	/* At the moment, we can only deal with non-wildcarded alarm times. */
	ret = rtc_valid_tm(&alarm->time);
	if (ret == 0) {
		ret = pl031_stv2_tm_to_time(dev, &alarm->time,
					    &time, &bcd_year);
		if (ret == 0) {
			writel(bcd_year, ldata->base + RTC_YMR);
			writel(time, ldata->base + RTC_MR);

			pl031_alarm_irq_enable(dev, alarm->enabled);
		}
	}

	return ret;
}

static irqreturn_t pl031_interrupt(int irq, void *dev_id)
{
	struct pl031_local *ldata = dev_id;
	unsigned long rtcmis;
	unsigned long events = 0;

	rtcmis = readl(ldata->base + RTC_MIS);
	if (rtcmis & RTC_BIT_AI) {
		writel(RTC_BIT_AI, ldata->base + RTC_ICR);
		events |= (RTC_AF | RTC_IRQF);
		rtc_update_irq(ldata->rtc, 1, events);

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int pl031_read_time(struct device *dev, struct rtc_time *tm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);

	return 0;
}

static int pl031_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	struct pl031_local *ldata = dev_get_drvdata(dev);
	int ret;

	ret = rtc_tm_to_time(tm, &time);

	if (ret == 0)
		writel(time, ldata->base + RTC_LR);

	return ret;
}

static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);

	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);

	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;

	return 0;
}

static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct pl031_local *ldata = dev_get_drvdata(dev);
	unsigned long time;
	int ret;

	/* At the moment, we can only deal with non-wildcarded alarm times. */
	ret = rtc_valid_tm(&alarm->time);
	if (ret == 0) {
		ret = rtc_tm_to_time(&alarm->time, &time);
		if (ret == 0) {
			writel(time, ldata->base + RTC_MR);
			pl031_alarm_irq_enable(dev, alarm->enabled);
		}
	}

	return ret;
}

static int pl031_remove(struct amba_device *adev)
{
	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);

	amba_set_drvdata(adev, NULL);
	free_irq(adev->irq[0], ldata);
	rtc_device_unregister(ldata->rtc);
	iounmap(ldata->base);
	kfree(ldata);
	amba_release_regions(adev);

	return 0;
}

static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
{
	int ret;
	struct pl031_local *ldata;
	struct pl031_vendor_data *vendor = id->data;
	struct rtc_class_ops *ops = &vendor->ops;
	unsigned long time, data;

	ret = amba_request_regions(adev, NULL);
	if (ret)
		goto err_req;

	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
	if (!ldata) {
		ret = -ENOMEM;
		goto out;
	}
	ldata->vendor = vendor;

	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));

	if (!ldata->base) {
		ret = -ENOMEM;
		goto out_no_remap;
	}

	amba_set_drvdata(adev, ldata);

	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
	dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));

	data = readl(ldata->base + RTC_CR);
	/* Enable the clockwatch on ST Variants */
	if (vendor->clockwatch)
		data |= RTC_CR_CWEN;
	else
		data |= RTC_CR_EN;
	writel(data, ldata->base + RTC_CR);

	/*
	 * On ST PL031 variants, the RTC reset value does not provide correct
	 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
	 */
	if (vendor->st_weekday) {
		if (readl(ldata->base + RTC_YDR) == 0x2000) {
			time = readl(ldata->base + RTC_DR);
			if ((time &
			     (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
			    == 0x02120000) {
				time = time | (0x7 << RTC_WDAY_SHIFT);
				writel(0x2000, ldata->base + RTC_YLR);
				writel(time, ldata->base + RTC_LR);
			}
		}
	}

	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
					THIS_MODULE);
	if (IS_ERR(ldata->rtc)) {
		ret = PTR_ERR(ldata->rtc);
		goto out_no_rtc;
	}

	if (request_irq(adev->irq[0], pl031_interrupt,
			vendor->irqflags, "rtc-pl031", ldata)) {
		ret = -EIO;
		goto out_no_irq;
	}

	device_init_wakeup(&adev->dev, 1);

	return 0;

out_no_irq:
	rtc_device_unregister(ldata->rtc);
out_no_rtc:
	iounmap(ldata->base);
	amba_set_drvdata(adev, NULL);
out_no_remap:
	kfree(ldata);
out:
	amba_release_regions(adev);
err_req:

	return ret;
}

/* Operations for the original ARM version */
static struct pl031_vendor_data arm_pl031 = {
	.ops = {
		.read_time = pl031_read_time,
		.set_time = pl031_set_time,
		.read_alarm = pl031_read_alarm,
		.set_alarm = pl031_set_alarm,
		.alarm_irq_enable = pl031_alarm_irq_enable,
	},
	.irqflags = IRQF_NO_SUSPEND,
};

/* The First ST derivative */
static struct pl031_vendor_data stv1_pl031 = {
	.ops = {
		.read_time = pl031_read_time,
		.set_time = pl031_set_time,
		.read_alarm = pl031_read_alarm,
		.set_alarm = pl031_set_alarm,
		.alarm_irq_enable = pl031_alarm_irq_enable,
	},
	.clockwatch = true,
	.st_weekday = true,
	.irqflags = IRQF_NO_SUSPEND,
};

/* And the second ST derivative */
static struct pl031_vendor_data stv2_pl031 = {
	.ops = {
		.read_time = pl031_stv2_read_time,
		.set_time = pl031_stv2_set_time,
		.read_alarm = pl031_stv2_read_alarm,
		.set_alarm = pl031_stv2_set_alarm,
		.alarm_irq_enable = pl031_alarm_irq_enable,
	},
	.clockwatch = true,
	.st_weekday = true,
	/*
	 * This variant shares the IRQ with another block and must not
	 * suspend that IRQ line.
	 */
	.irqflags = IRQF_SHARED | IRQF_NO_SUSPEND,
};

static struct amba_id pl031_ids[] = {
	{
		.id = 0x00041031,
		.mask = 0x000fffff,
		.data = &arm_pl031,
	},
	/* ST Micro variants */
	{
		.id = 0x00180031,
		.mask = 0x00ffffff,
		.data = &stv1_pl031,
	},
	{
		.id = 0x00280031,
		.mask = 0x00ffffff,
		.data = &stv2_pl031,
	},
	{0, 0},
};

MODULE_DEVICE_TABLE(amba, pl031_ids);

static struct amba_driver pl031_driver = {
	.drv = {
		.name = "rtc-pl031",
	},
	.id_table = pl031_ids,
	.probe = pl031_probe,
	.remove = pl031_remove,
};

module_amba_driver(pl031_driver);

MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
8ae6e163 DS	1	/*
	2	* drivers/rtc/rtc-pl031.c
	3	*
	4	* Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
	5	*
	6	* Author: Deepak Saxena <dsaxena@plexity.net>
	7	*
	8	* Copyright 2006 (c) MontaVista Software, Inc.
	9	*
c72881e8 LW	10	* Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
	11	* Copyright 2010 (c) ST-Ericsson AB
	12	*
8ae6e163 DS	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License
	15	* as published by the Free Software Foundation; either version
	16	* 2 of the License, or (at your option) any later version.
	17	*/
8ae6e163 DS	18	#include <linux/module.h>
	19	#include <linux/rtc.h>
	20	#include <linux/init.h>
8ae6e163	21	#include <linux/interrupt.h>
8ae6e163	22	#include <linux/amba/bus.h>
2dba8518	23	#include <linux/io.h>
c72881e8 LW	24	#include <linux/bcd.h>
c72881e8 LW	25	#include <linux/delay.h>
5a0e3ad6	26	#include <linux/slab.h>
8ae6e163 DS	27
	28	/*
	29	* Register definitions
	30	*/
	31	#define RTC_DR 0x00 /* Data read register */
	32	#define RTC_MR 0x04 /* Match register */
	33	#define RTC_LR 0x08 /* Data load register */
	34	#define RTC_CR 0x0c /* Control register */
	35	#define RTC_IMSC 0x10 /* Interrupt mask and set register */
	36	#define RTC_RIS 0x14 /* Raw interrupt status register */
	37	#define RTC_MIS 0x18 /* Masked interrupt status register */
	38	#define RTC_ICR 0x1c /* Interrupt clear register */
c72881e8 LW	39	/* ST variants have additional timer functionality */
	40	#define RTC_TDR 0x20 /* Timer data read register */
	41	#define RTC_TLR 0x24 /* Timer data load register */
	42	#define RTC_TCR 0x28 /* Timer control register */
	43	#define RTC_YDR 0x30 /* Year data read register */
	44	#define RTC_YMR 0x34 /* Year match register */
	45	#define RTC_YLR 0x38 /* Year data load register */
	46
e7e034e1	47	#define RTC_CR_EN (1 << 0) /* counter enable bit */
c72881e8 LW	48	#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
	49
	50	#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
	51
	52	/* Common bit definitions for Interrupt status and control registers */
	53	#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
	54	#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
	55
	56	/* Common bit definations for ST v2 for reading/writing time */
	57	#define RTC_SEC_SHIFT 0
	58	#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
	59	#define RTC_MIN_SHIFT 6
	60	#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
	61	#define RTC_HOUR_SHIFT 12
	62	#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
	63	#define RTC_WDAY_SHIFT 17
	64	#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
	65	#define RTC_MDAY_SHIFT 20
	66	#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
	67	#define RTC_MON_SHIFT 25
	68	#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
	69
	70	#define RTC_TIMER_FREQ 32768
8ae6e163	71
aff05ed5 LW	72	/**
	73	* struct pl031_vendor_data - per-vendor variations
	74	* @ops: the vendor-specific operations used on this silicon version
1bb457fc LW	75	* @clockwatch: if this is an ST Microelectronics silicon version with a
	76	* clockwatch function
	77	* @st_weekday: if this is an ST Microelectronics silicon version that need
	78	* the weekday fix
559a6fc0	79	* @irqflags: special IRQ flags per variant
aff05ed5 LW	80	*/
	81	struct pl031_vendor_data {
	82	struct rtc_class_ops ops;
1bb457fc LW	83	bool clockwatch;
1bb457fc LW	84	bool st_weekday;
559a6fc0	85	unsigned long irqflags;
aff05ed5 LW	86	};
aff05ed5 LW	87
8ae6e163	88	struct pl031_local {
aff05ed5	89	struct pl031_vendor_data *vendor;
8ae6e163 DS	90	struct rtc_device *rtc;
	91	void __iomem *base;
	92	};
	93
c72881e8 LW	94	static int pl031_alarm_irq_enable(struct device *dev,
	95	unsigned int enabled)
	96	{
	97	struct pl031_local *ldata = dev_get_drvdata(dev);
	98	unsigned long imsc;
	99
	100	/* Clear any pending alarm interrupts. */
	101	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
	102
	103	imsc = readl(ldata->base + RTC_IMSC);
	104
	105	if (enabled == 1)
	106	writel(imsc \| RTC_BIT_AI, ldata->base + RTC_IMSC);
	107	else
	108	writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
	109
	110	return 0;
	111	}
	112
	113	/*
	114	* Convert Gregorian date to ST v2 RTC format.
	115	*/
	116	static int pl031_stv2_tm_to_time(struct device *dev,
	117	struct rtc_time tm, unsigned long st_time,
	118	unsigned long *bcd_year)
	119	{
	120	int year = tm->tm_year + 1900;
	121	int wday = tm->tm_wday;
	122
	123	/* wday masking is not working in hardware so wday must be valid */
	124	if (wday < -1 \|\| wday > 6) {
	125	dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
	126	return -EINVAL;
	127	} else if (wday == -1) {
	128	/* wday is not provided, calculate it here */
	129	unsigned long time;
	130	struct rtc_time calc_tm;
	131
	132	rtc_tm_to_time(tm, &time);
	133	rtc_time_to_tm(time, &calc_tm);
	134	wday = calc_tm.tm_wday;
	135	}
	136
	137	*bcd_year = (bin2bcd(year % 100) \| bin2bcd(year / 100) << 8);
	138
	139	*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
	140	\| (tm->tm_mday << RTC_MDAY_SHIFT)
	141	\| ((wday + 1) << RTC_WDAY_SHIFT)
	142	\| (tm->tm_hour << RTC_HOUR_SHIFT)
	143	\| (tm->tm_min << RTC_MIN_SHIFT)
	144	\| (tm->tm_sec << RTC_SEC_SHIFT);
	145
	146	return 0;
	147	}
	148
	149	/*
	150	* Convert ST v2 RTC format to Gregorian date.
	151	*/
	152	static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
	153	struct rtc_time *tm)
	154	{
	155	tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
	156	tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
	157	tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
158	tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
159	tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
160	tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
161	tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
162
163	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
164	tm->tm_year -= 1900;
165
166	return 0;
167	}
168
169	static int pl031_stv2_read_time(struct device dev, struct rtc_time tm)
170	{
171	struct pl031_local *ldata = dev_get_drvdata(dev);
172
173	pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
174	readl(ldata->base + RTC_YDR), tm);
175
176	return 0;
177	}
178
179	static int pl031_stv2_set_time(struct device dev, struct rtc_time tm)
180	{
181	unsigned long time;
182	unsigned long bcd_year;
183	struct pl031_local *ldata = dev_get_drvdata(dev);
184	int ret;
185
186	ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
187	if (ret == 0) {
188	writel(bcd_year, ldata->base + RTC_YLR);
189	writel(time, ldata->base + RTC_LR);
190	}
191
192	return ret;
193	}
194
195	static int pl031_stv2_read_alarm(struct device dev, struct rtc_wkalrm alarm)
8ae6e163	196	{
c72881e8 LW	197	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 LW	198	int ret;
8ae6e163	199
c72881e8 LW	200	ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
c72881e8 LW	201	readl(ldata->base + RTC_YMR), &alarm->time);
8ae6e163	202
c72881e8 LW	203	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	204	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
	205
	206	return ret;
8ae6e163 DS	207	}
8ae6e163 DS	208
c72881e8	209	static int pl031_stv2_set_alarm(struct device dev, struct rtc_wkalrm alarm)
8ae6e163 DS	210	{
8ae6e163 DS	211	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 LW	212	unsigned long time;
	213	unsigned long bcd_year;
	214	int ret;
	215
	216	/* At the moment, we can only deal with non-wildcarded alarm times. */
	217	ret = rtc_valid_tm(&alarm->time);
	218	if (ret == 0) {
	219	ret = pl031_stv2_tm_to_time(dev, &alarm->time,
	220	&time, &bcd_year);
	221	if (ret == 0) {
	222	writel(bcd_year, ldata->base + RTC_YMR);
	223	writel(time, ldata->base + RTC_MR);
	224
	225	pl031_alarm_irq_enable(dev, alarm->enabled);
	226	}
	227	}
	228
	229	return ret;
	230	}
	231
	232	static irqreturn_t pl031_interrupt(int irq, void *dev_id)
	233	{
	234	struct pl031_local *ldata = dev_id;
	235	unsigned long rtcmis;
	236	unsigned long events = 0;
	237
	238	rtcmis = readl(ldata->base + RTC_MIS);
ac2dee59 RK	239	if (rtcmis & RTC_BIT_AI) {
	240	writel(RTC_BIT_AI, ldata->base + RTC_ICR);
	241	events \|= (RTC_AF \| RTC_IRQF);
c72881e8	242	rtc_update_irq(ldata->rtc, 1, events);
8ae6e163	243
c72881e8	244	return IRQ_HANDLED;
8ae6e163 DS	245	}
8ae6e163 DS	246
c72881e8	247	return IRQ_NONE;
8ae6e163 DS	248	}
	249
	250	static int pl031_read_time(struct device dev, struct rtc_time tm)
	251	{
	252	struct pl031_local *ldata = dev_get_drvdata(dev);
	253
2934d6a8	254	rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
8ae6e163 DS	255
	256	return 0;
	257	}
	258
	259	static int pl031_set_time(struct device dev, struct rtc_time tm)
	260	{
	261	unsigned long time;
	262	struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8	263	int ret;
8ae6e163	264
c72881e8	265	ret = rtc_tm_to_time(tm, &time);
8ae6e163	266
c72881e8 LW	267	if (ret == 0)
	268	writel(time, ldata->base + RTC_LR);
	269
	270	return ret;
8ae6e163 DS	271	}
	272
	273	static int pl031_read_alarm(struct device dev, struct rtc_wkalrm alarm)
	274	{
	275	struct pl031_local *ldata = dev_get_drvdata(dev);
	276
2934d6a8	277	rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
c72881e8 LW	278
	279	alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
	280	alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
8ae6e163 DS	281
	282	return 0;
	283	}
	284
	285	static int pl031_set_alarm(struct device dev, struct rtc_wkalrm alarm)
	286	{
	287	struct pl031_local *ldata = dev_get_drvdata(dev);
	288	unsigned long time;
c72881e8 LW	289	int ret;
	290
	291	/* At the moment, we can only deal with non-wildcarded alarm times. */
	292	ret = rtc_valid_tm(&alarm->time);
	293	if (ret == 0) {
	294	ret = rtc_tm_to_time(&alarm->time, &time);
	295	if (ret == 0) {
	296	writel(time, ldata->base + RTC_MR);
	297	pl031_alarm_irq_enable(dev, alarm->enabled);
	298	}
	299	}
	300
	301	return ret;
	302	}
	303
8ae6e163 DS	304	static int pl031_remove(struct amba_device *adev)
	305	{
	306	struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
	307
2dba8518	308	amba_set_drvdata(adev, NULL);
cac29af6	309	free_irq(adev->irq[0], ldata);
2dba8518 RK	310	rtc_device_unregister(ldata->rtc);
	311	iounmap(ldata->base);
	312	kfree(ldata);
	313	amba_release_regions(adev);
8ae6e163 DS	314
	315	return 0;
	316	}
	317
aa25afad	318	static int pl031_probe(struct amba_device adev, const struct amba_id id)
8ae6e163 DS	319	{
	320	int ret;
	321	struct pl031_local *ldata;
aff05ed5 LW	322	struct pl031_vendor_data *vendor = id->data;
aff05ed5 LW	323	struct rtc_class_ops *ops = &vendor->ops;
e7e034e1	324	unsigned long time, data;
8ae6e163	325
2dba8518 RK	326	ret = amba_request_regions(adev, NULL);
	327	if (ret)
	328	goto err_req;
8ae6e163	329
c72881e8	330	ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
8ae6e163 DS	331	if (!ldata) {
	332	ret = -ENOMEM;
	333	goto out;
	334	}
aff05ed5	335	ldata->vendor = vendor;
8ae6e163	336
dc890c2d	337	ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
c72881e8	338
8ae6e163 DS	339	if (!ldata->base) {
	340	ret = -ENOMEM;
	341	goto out_no_remap;
	342	}
	343
2dba8518 RK	344	amba_set_drvdata(adev, ldata);
2dba8518 RK	345
1bb457fc LW	346	dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
1bb457fc LW	347	dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
8ae6e163	348
e7e034e1	349	data = readl(ldata->base + RTC_CR);
c72881e8	350	/* Enable the clockwatch on ST Variants */
1bb457fc	351	if (vendor->clockwatch)
e7e034e1	352	data \|= RTC_CR_CWEN;
3399cfb5 LW	353	else
	354	data \|= RTC_CR_EN;
	355	writel(data, ldata->base + RTC_CR);
c72881e8	356
c0a5f4a0 RK	357	/*
	358	* On ST PL031 variants, the RTC reset value does not provide correct
	359	* weekday for 2000-01-01. Correct the erroneous sunday to saturday.
	360	*/
1bb457fc	361	if (vendor->st_weekday) {
c0a5f4a0 RK	362	if (readl(ldata->base + RTC_YDR) == 0x2000) {
	363	time = readl(ldata->base + RTC_DR);
	364	if ((time &
	365	(RTC_MON_MASK \| RTC_MDAY_MASK \| RTC_WDAY_MASK))
	366	== 0x02120000) {
	367	time = time \| (0x7 << RTC_WDAY_SHIFT);
	368	writel(0x2000, ldata->base + RTC_YLR);
	369	writel(time, ldata->base + RTC_LR);
	370	}
	371	}
	372	}
	373
c72881e8 LW	374	ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
c72881e8 LW	375	THIS_MODULE);
8ae6e163 DS	376	if (IS_ERR(ldata->rtc)) {
	377	ret = PTR_ERR(ldata->rtc);
	378	goto out_no_rtc;
	379	}
	380
c72881e8	381	if (request_irq(adev->irq[0], pl031_interrupt,
559a6fc0	382	vendor->irqflags, "rtc-pl031", ldata)) {
c72881e8 LW	383	ret = -EIO;
	384	goto out_no_irq;
	385	}
	386
b06eef45 RH	387	device_init_wakeup(&adev->dev, 1);
b06eef45 RH	388
8ae6e163 DS	389	return 0;
8ae6e163 DS	390
8ae6e163	391	out_no_irq:
c72881e8 LW	392	rtc_device_unregister(ldata->rtc);
c72881e8 LW	393	out_no_rtc:
8ae6e163	394	iounmap(ldata->base);
2dba8518	395	amba_set_drvdata(adev, NULL);
8ae6e163	396	out_no_remap:
8ae6e163 DS	397	kfree(ldata);
8ae6e163 DS	398	out:
2dba8518 RK	399	amba_release_regions(adev);
2dba8518 RK	400	err_req:
c72881e8	401
8ae6e163 DS	402	return ret;
	403	}
	404
c72881e8	405	/* Operations for the original ARM version */
aff05ed5 LW	406	static struct pl031_vendor_data arm_pl031 = {
	407	.ops = {
	408	.read_time = pl031_read_time,
	409	.set_time = pl031_set_time,
	410	.read_alarm = pl031_read_alarm,
	411	.set_alarm = pl031_set_alarm,
	412	.alarm_irq_enable = pl031_alarm_irq_enable,
	413	},
559a6fc0	414	.irqflags = IRQF_NO_SUSPEND,
c72881e8 LW	415	};
	416
	417	/* The First ST derivative */
aff05ed5 LW	418	static struct pl031_vendor_data stv1_pl031 = {
	419	.ops = {
	420	.read_time = pl031_read_time,
	421	.set_time = pl031_set_time,
	422	.read_alarm = pl031_read_alarm,
	423	.set_alarm = pl031_set_alarm,
	424	.alarm_irq_enable = pl031_alarm_irq_enable,
	425	},
1bb457fc LW	426	.clockwatch = true,
1bb457fc LW	427	.st_weekday = true,
559a6fc0	428	.irqflags = IRQF_NO_SUSPEND,
c72881e8 LW	429	};
	430
	431	/* And the second ST derivative */
aff05ed5 LW	432	static struct pl031_vendor_data stv2_pl031 = {
	433	.ops = {
	434	.read_time = pl031_stv2_read_time,
	435	.set_time = pl031_stv2_set_time,
	436	.read_alarm = pl031_stv2_read_alarm,
	437	.set_alarm = pl031_stv2_set_alarm,
	438	.alarm_irq_enable = pl031_alarm_irq_enable,
	439	},
1bb457fc LW	440	.clockwatch = true,
1bb457fc LW	441	.st_weekday = true,
559a6fc0 MW	442	/*
	443	* This variant shares the IRQ with another block and must not
	444	* suspend that IRQ line.
	445	*/
	446	.irqflags = IRQF_SHARED \| IRQF_NO_SUSPEND,
c72881e8 LW	447	};
c72881e8 LW	448
2c39c9e1	449	static struct amba_id pl031_ids[] = {
8ae6e163	450	{
2934d6a8 LW	451	.id = 0x00041031,
2934d6a8 LW	452	.mask = 0x000fffff,
aff05ed5	453	.data = &arm_pl031,
c72881e8 LW	454	},
	455	/* ST Micro variants */
	456	{
	457	.id = 0x00180031,
	458	.mask = 0x00ffffff,
aff05ed5	459	.data = &stv1_pl031,
c72881e8 LW	460	},
	461	{
	462	.id = 0x00280031,
	463	.mask = 0x00ffffff,
aff05ed5	464	.data = &stv2_pl031,
2934d6a8	465	},
8ae6e163 DS	466	{0, 0},
	467	};
	468
f5feac2a DM	469	MODULE_DEVICE_TABLE(amba, pl031_ids);
f5feac2a DM	470
8ae6e163 DS	471	static struct amba_driver pl031_driver = {
	472	.drv = {
	473	.name = "rtc-pl031",
	474	},
	475	.id_table = pl031_ids,
	476	.probe = pl031_probe,
	477	.remove = pl031_remove,
	478	};
	479
9e5ed094	480	module_amba_driver(pl031_driver);
8ae6e163 DS	481
	482	MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
	483	MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
	484	MODULE_LICENSE("GPL");