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739d340d PM |
1 | /* |
2 | * Dallas DS1302 RTC Support | |
3 | * | |
2bfc3305 AZ |
4 | * Copyright (C) 2002 David McCullough |
5 | * Copyright (C) 2003 - 2007 Paul Mundt | |
739d340d PM |
6 | * |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
2bfc3305 | 8 | * License version 2. See the file "COPYING" in the main directory of |
739d340d PM |
9 | * this archive for more details. |
10 | */ | |
2bfc3305 | 11 | |
739d340d PM |
12 | #include <linux/init.h> |
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/platform_device.h> | |
739d340d | 16 | #include <linux/rtc.h> |
739d340d PM |
17 | #include <linux/io.h> |
18 | #include <linux/bcd.h> | |
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19 | |
20 | #define DRV_NAME "rtc-ds1302" | |
2bfc3305 | 21 | #define DRV_VERSION "0.1.1" |
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22 | |
23 | #define RTC_CMD_READ 0x81 /* Read command */ | |
24 | #define RTC_CMD_WRITE 0x80 /* Write command */ | |
25 | ||
26 | #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */ | |
27 | #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */ | |
28 | #define RTC_ADDR_YEAR 0x06 /* Address of year register */ | |
29 | #define RTC_ADDR_DAY 0x05 /* Address of day of week register */ | |
30 | #define RTC_ADDR_MON 0x04 /* Address of month register */ | |
31 | #define RTC_ADDR_DATE 0x03 /* Address of day of month register */ | |
32 | #define RTC_ADDR_HOUR 0x02 /* Address of hour register */ | |
33 | #define RTC_ADDR_MIN 0x01 /* Address of minute register */ | |
34 | #define RTC_ADDR_SEC 0x00 /* Address of second register */ | |
35 | ||
72cc8e51 MZ |
36 | #ifdef CONFIG_SH_SECUREEDGE5410 |
37 | #include <asm/rtc.h> | |
f6eec8d6 | 38 | #include <mach/secureedge5410.h> |
72cc8e51 | 39 | |
739d340d PM |
40 | #define RTC_RESET 0x1000 |
41 | #define RTC_IODATA 0x0800 | |
42 | #define RTC_SCLK 0x0400 | |
43 | ||
739d340d PM |
44 | #define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00) |
45 | #define get_dp() SECUREEDGE_READ_IOPORT() | |
72cc8e51 MZ |
46 | #define ds1302_set_tx() |
47 | #define ds1302_set_rx() | |
48 | ||
49 | static inline int ds1302_hw_init(void) | |
50 | { | |
51 | return 0; | |
52 | } | |
53 | ||
54 | static inline void ds1302_reset(void) | |
55 | { | |
56 | set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); | |
57 | } | |
58 | ||
59 | static inline void ds1302_clock(void) | |
60 | { | |
61 | set_dp(get_dp() | RTC_SCLK); /* clock high */ | |
62 | set_dp(get_dp() & ~RTC_SCLK); /* clock low */ | |
63 | } | |
64 | ||
65 | static inline void ds1302_start(void) | |
66 | { | |
67 | set_dp(get_dp() | RTC_RESET); | |
68 | } | |
69 | ||
70 | static inline void ds1302_stop(void) | |
71 | { | |
72 | set_dp(get_dp() & ~RTC_RESET); | |
73 | } | |
74 | ||
75 | static inline void ds1302_txbit(int bit) | |
76 | { | |
77 | set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0)); | |
78 | } | |
79 | ||
80 | static inline int ds1302_rxbit(void) | |
81 | { | |
82 | return !!(get_dp() & RTC_IODATA); | |
83 | } | |
84 | ||
739d340d PM |
85 | #else |
86 | #error "Add support for your platform" | |
87 | #endif | |
88 | ||
739d340d PM |
89 | static void ds1302_sendbits(unsigned int val) |
90 | { | |
91 | int i; | |
92 | ||
72cc8e51 MZ |
93 | ds1302_set_tx(); |
94 | ||
739d340d | 95 | for (i = 8; (i); i--, val >>= 1) { |
72cc8e51 MZ |
96 | ds1302_txbit(val & 0x1); |
97 | ds1302_clock(); | |
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98 | } |
99 | } | |
100 | ||
101 | static unsigned int ds1302_recvbits(void) | |
102 | { | |
103 | unsigned int val; | |
104 | int i; | |
105 | ||
72cc8e51 MZ |
106 | ds1302_set_rx(); |
107 | ||
739d340d | 108 | for (i = 0, val = 0; (i < 8); i++) { |
72cc8e51 MZ |
109 | val |= (ds1302_rxbit() << i); |
110 | ds1302_clock(); | |
739d340d PM |
111 | } |
112 | ||
113 | return val; | |
114 | } | |
115 | ||
116 | static unsigned int ds1302_readbyte(unsigned int addr) | |
117 | { | |
118 | unsigned int val; | |
119 | ||
72cc8e51 | 120 | ds1302_reset(); |
739d340d | 121 | |
72cc8e51 | 122 | ds1302_start(); |
739d340d PM |
123 | ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ); |
124 | val = ds1302_recvbits(); | |
72cc8e51 | 125 | ds1302_stop(); |
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126 | |
127 | return val; | |
128 | } | |
129 | ||
130 | static void ds1302_writebyte(unsigned int addr, unsigned int val) | |
131 | { | |
72cc8e51 MZ |
132 | ds1302_reset(); |
133 | ||
134 | ds1302_start(); | |
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135 | ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE); |
136 | ds1302_sendbits(val); | |
72cc8e51 | 137 | ds1302_stop(); |
739d340d PM |
138 | } |
139 | ||
140 | static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
141 | { | |
fe20ba70 AB |
142 | tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC)); |
143 | tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN)); | |
144 | tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR)); | |
145 | tm->tm_wday = bcd2bin(ds1302_readbyte(RTC_ADDR_DAY)); | |
146 | tm->tm_mday = bcd2bin(ds1302_readbyte(RTC_ADDR_DATE)); | |
147 | tm->tm_mon = bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1; | |
148 | tm->tm_year = bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR)); | |
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149 | |
150 | if (tm->tm_year < 70) | |
151 | tm->tm_year += 100; | |
152 | ||
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153 | dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
154 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 155 | __func__, |
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156 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
157 | tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); | |
158 | ||
2bfc3305 | 159 | return rtc_valid_tm(tm); |
739d340d PM |
160 | } |
161 | ||
162 | static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
163 | { | |
739d340d PM |
164 | /* Stop RTC */ |
165 | ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); | |
166 | ||
fe20ba70 AB |
167 | ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec)); |
168 | ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min)); | |
169 | ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour)); | |
170 | ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday)); | |
171 | ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday)); | |
172 | ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1)); | |
173 | ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100)); | |
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174 | |
175 | /* Start RTC */ | |
176 | ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); | |
177 | ||
739d340d PM |
178 | return 0; |
179 | } | |
180 | ||
181 | static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd, | |
182 | unsigned long arg) | |
183 | { | |
184 | switch (cmd) { | |
185 | #ifdef RTC_SET_CHARGE | |
186 | case RTC_SET_CHARGE: | |
187 | { | |
739d340d PM |
188 | int tcs_val; |
189 | ||
190 | if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int))) | |
191 | return -EFAULT; | |
192 | ||
739d340d | 193 | ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf)); |
739d340d PM |
194 | return 0; |
195 | } | |
196 | #endif | |
197 | } | |
198 | ||
199 | return -ENOIOCTLCMD; | |
200 | } | |
201 | ||
202 | static struct rtc_class_ops ds1302_rtc_ops = { | |
203 | .read_time = ds1302_rtc_read_time, | |
204 | .set_time = ds1302_rtc_set_time, | |
205 | .ioctl = ds1302_rtc_ioctl, | |
206 | }; | |
207 | ||
2bfc3305 | 208 | static int __init ds1302_rtc_probe(struct platform_device *pdev) |
739d340d | 209 | { |
2bfc3305 | 210 | struct rtc_device *rtc; |
739d340d | 211 | |
72cc8e51 MZ |
212 | if (ds1302_hw_init()) { |
213 | dev_err(&pdev->dev, "Failed to init communication channel"); | |
214 | return -EINVAL; | |
215 | } | |
216 | ||
739d340d | 217 | /* Reset */ |
72cc8e51 | 218 | ds1302_reset(); |
739d340d PM |
219 | |
220 | /* Write a magic value to the DS1302 RAM, and see if it sticks. */ | |
221 | ds1302_writebyte(RTC_ADDR_RAM0, 0x42); | |
72cc8e51 MZ |
222 | if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) { |
223 | dev_err(&pdev->dev, "Failed to probe"); | |
739d340d | 224 | return -ENODEV; |
72cc8e51 | 225 | } |
739d340d | 226 | |
0ea9a0e7 | 227 | rtc = devm_rtc_device_register(&pdev->dev, "ds1302", |
739d340d | 228 | &ds1302_rtc_ops, THIS_MODULE); |
2bfc3305 AZ |
229 | if (IS_ERR(rtc)) |
230 | return PTR_ERR(rtc); | |
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231 | |
232 | platform_set_drvdata(pdev, rtc); | |
233 | ||
234 | return 0; | |
739d340d PM |
235 | } |
236 | ||
e3c70624 | 237 | static int __exit ds1302_rtc_remove(struct platform_device *pdev) |
739d340d | 238 | { |
739d340d PM |
239 | platform_set_drvdata(pdev, NULL); |
240 | ||
739d340d PM |
241 | return 0; |
242 | } | |
243 | ||
244 | static struct platform_driver ds1302_platform_driver = { | |
245 | .driver = { | |
246 | .name = DRV_NAME, | |
247 | .owner = THIS_MODULE, | |
248 | }, | |
e3c70624 | 249 | .remove = __exit_p(ds1302_rtc_remove), |
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250 | }; |
251 | ||
625f5225 | 252 | module_platform_driver_probe(ds1302_platform_driver, ds1302_rtc_probe); |
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253 | |
254 | MODULE_DESCRIPTION("Dallas DS1302 RTC driver"); | |
255 | MODULE_VERSION(DRV_VERSION); | |
256 | MODULE_AUTHOR("Paul Mundt, David McCullough"); | |
257 | MODULE_LICENSE("GPL v2"); |