Commit | Line | Data |
---|---|---|
788b1fc6 AV |
1 | /* |
2 | * Real Time Clock interface for Linux on Atmel AT91RM9200 | |
3 | * | |
4 | * Copyright (C) 2002 Rick Bronson | |
5 | * | |
6 | * Converted to RTC class model by Andrew Victor | |
7 | * | |
8 | * Ported to Linux 2.6 by Steven Scholz | |
9 | * Based on s3c2410-rtc.c Simtec Electronics | |
10 | * | |
11 | * Based on sa1100-rtc.c by Nils Faerber | |
12 | * Based on rtc.c by Paul Gortmaker | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License | |
16 | * as published by the Free Software Foundation; either version | |
17 | * 2 of the License, or (at your option) any later version. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/time.h> | |
25 | #include <linux/rtc.h> | |
26 | #include <linux/bcd.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/ioctl.h> | |
29 | #include <linux/completion.h> | |
14070ade | 30 | #include <linux/io.h> |
7c1b68d4 JE |
31 | #include <linux/of.h> |
32 | #include <linux/of_device.h> | |
788b1fc6 AV |
33 | |
34 | #include <asm/uaccess.h> | |
fb0d4ec4 | 35 | |
75984df0 | 36 | #include "rtc-at91rm9200.h" |
d73e3cd7 | 37 | |
d28bdfc5 JCPV |
38 | #define at91_rtc_read(field) \ |
39 | __raw_readl(at91_rtc_regs + field) | |
40 | #define at91_rtc_write(field, val) \ | |
41 | __raw_writel((val), at91_rtc_regs + field) | |
788b1fc6 | 42 | |
788b1fc6 AV |
43 | #define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ |
44 | ||
45 | static DECLARE_COMPLETION(at91_rtc_updated); | |
46 | static unsigned int at91_alarm_year = AT91_RTC_EPOCH; | |
d28bdfc5 JCPV |
47 | static void __iomem *at91_rtc_regs; |
48 | static int irq; | |
788b1fc6 | 49 | |
788b1fc6 AV |
50 | /* |
51 | * Decode time/date into rtc_time structure | |
52 | */ | |
e7a8bb12 AM |
53 | static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg, |
54 | struct rtc_time *tm) | |
788b1fc6 AV |
55 | { |
56 | unsigned int time, date; | |
57 | ||
58 | /* must read twice in case it changes */ | |
59 | do { | |
d28bdfc5 JCPV |
60 | time = at91_rtc_read(timereg); |
61 | date = at91_rtc_read(calreg); | |
62 | } while ((time != at91_rtc_read(timereg)) || | |
63 | (date != at91_rtc_read(calreg))); | |
788b1fc6 | 64 | |
fe20ba70 AB |
65 | tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0); |
66 | tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8); | |
67 | tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16); | |
788b1fc6 AV |
68 | |
69 | /* | |
70 | * The Calendar Alarm register does not have a field for | |
71 | * the year - so these will return an invalid value. When an | |
25985edc | 72 | * alarm is set, at91_alarm_year will store the current year. |
788b1fc6 | 73 | */ |
fe20ba70 AB |
74 | tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */ |
75 | tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */ | |
788b1fc6 | 76 | |
fe20ba70 AB |
77 | tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */ |
78 | tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1; | |
79 | tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24); | |
788b1fc6 AV |
80 | } |
81 | ||
82 | /* | |
83 | * Read current time and date in RTC | |
84 | */ | |
85 | static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) | |
86 | { | |
87 | at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm); | |
88 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); | |
89 | tm->tm_year = tm->tm_year - 1900; | |
90 | ||
6588208c | 91 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
92 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
93 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
788b1fc6 AV |
94 | |
95 | return 0; | |
96 | } | |
97 | ||
98 | /* | |
99 | * Set current time and date in RTC | |
100 | */ | |
101 | static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) | |
102 | { | |
103 | unsigned long cr; | |
104 | ||
6588208c | 105 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
106 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
107 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
788b1fc6 AV |
108 | |
109 | /* Stop Time/Calendar from counting */ | |
d28bdfc5 JCPV |
110 | cr = at91_rtc_read(AT91_RTC_CR); |
111 | at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); | |
788b1fc6 | 112 | |
d28bdfc5 | 113 | at91_rtc_write(AT91_RTC_IER, AT91_RTC_ACKUPD); |
e7a8bb12 | 114 | wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ |
d28bdfc5 | 115 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); |
788b1fc6 | 116 | |
d28bdfc5 | 117 | at91_rtc_write(AT91_RTC_TIMR, |
fe20ba70 AB |
118 | bin2bcd(tm->tm_sec) << 0 |
119 | | bin2bcd(tm->tm_min) << 8 | |
120 | | bin2bcd(tm->tm_hour) << 16); | |
788b1fc6 | 121 | |
d28bdfc5 | 122 | at91_rtc_write(AT91_RTC_CALR, |
fe20ba70 AB |
123 | bin2bcd((tm->tm_year + 1900) / 100) /* century */ |
124 | | bin2bcd(tm->tm_year % 100) << 8 /* year */ | |
125 | | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */ | |
126 | | bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */ | |
127 | | bin2bcd(tm->tm_mday) << 24); | |
788b1fc6 AV |
128 | |
129 | /* Restart Time/Calendar */ | |
d28bdfc5 JCPV |
130 | cr = at91_rtc_read(AT91_RTC_CR); |
131 | at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); | |
788b1fc6 AV |
132 | |
133 | return 0; | |
134 | } | |
135 | ||
136 | /* | |
137 | * Read alarm time and date in RTC | |
138 | */ | |
139 | static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
140 | { | |
141 | struct rtc_time *tm = &alrm->time; | |
142 | ||
143 | at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm); | |
144 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); | |
145 | tm->tm_year = at91_alarm_year - 1900; | |
146 | ||
e24b0bfa | 147 | alrm->enabled = (at91_rtc_read(AT91_RTC_IMR) & AT91_RTC_ALARM) |
a2db8dfc DB |
148 | ? 1 : 0; |
149 | ||
6588208c | 150 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
151 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
152 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
788b1fc6 AV |
153 | |
154 | return 0; | |
155 | } | |
156 | ||
157 | /* | |
158 | * Set alarm time and date in RTC | |
159 | */ | |
160 | static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
161 | { | |
162 | struct rtc_time tm; | |
163 | ||
164 | at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm); | |
165 | ||
166 | at91_alarm_year = tm.tm_year; | |
167 | ||
168 | tm.tm_hour = alrm->time.tm_hour; | |
169 | tm.tm_min = alrm->time.tm_min; | |
170 | tm.tm_sec = alrm->time.tm_sec; | |
171 | ||
d28bdfc5 JCPV |
172 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); |
173 | at91_rtc_write(AT91_RTC_TIMALR, | |
fe20ba70 AB |
174 | bin2bcd(tm.tm_sec) << 0 |
175 | | bin2bcd(tm.tm_min) << 8 | |
176 | | bin2bcd(tm.tm_hour) << 16 | |
788b1fc6 | 177 | | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN); |
d28bdfc5 | 178 | at91_rtc_write(AT91_RTC_CALALR, |
fe20ba70 AB |
179 | bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */ |
180 | | bin2bcd(tm.tm_mday) << 24 | |
788b1fc6 AV |
181 | | AT91_RTC_DATEEN | AT91_RTC_MTHEN); |
182 | ||
449321b3 | 183 | if (alrm->enabled) { |
d28bdfc5 JCPV |
184 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
185 | at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); | |
449321b3 | 186 | } |
5d4675a8 | 187 | |
6588208c | 188 | dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, |
e7a8bb12 AM |
189 | at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, |
190 | tm.tm_min, tm.tm_sec); | |
788b1fc6 AV |
191 | |
192 | return 0; | |
193 | } | |
194 | ||
16380c15 JS |
195 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
196 | { | |
6588208c | 197 | dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled); |
16380c15 JS |
198 | |
199 | if (enabled) { | |
d28bdfc5 JCPV |
200 | at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); |
201 | at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); | |
e24b0bfa | 202 | } else |
d28bdfc5 | 203 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); |
16380c15 JS |
204 | |
205 | return 0; | |
206 | } | |
788b1fc6 AV |
207 | /* |
208 | * Provide additional RTC information in /proc/driver/rtc | |
209 | */ | |
210 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) | |
211 | { | |
e24b0bfa JH |
212 | unsigned long imr = at91_rtc_read(AT91_RTC_IMR); |
213 | ||
e7a8bb12 | 214 | seq_printf(seq, "update_IRQ\t: %s\n", |
e24b0bfa | 215 | (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); |
e7a8bb12 | 216 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
e24b0bfa | 217 | (imr & AT91_RTC_SECEV) ? "yes" : "no"); |
788b1fc6 AV |
218 | |
219 | return 0; | |
220 | } | |
221 | ||
222 | /* | |
223 | * IRQ handler for the RTC | |
224 | */ | |
7d12e780 | 225 | static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) |
788b1fc6 | 226 | { |
e7a8bb12 | 227 | struct platform_device *pdev = dev_id; |
788b1fc6 AV |
228 | struct rtc_device *rtc = platform_get_drvdata(pdev); |
229 | unsigned int rtsr; | |
230 | unsigned long events = 0; | |
231 | ||
e24b0bfa | 232 | rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read(AT91_RTC_IMR); |
788b1fc6 AV |
233 | if (rtsr) { /* this interrupt is shared! Is it ours? */ |
234 | if (rtsr & AT91_RTC_ALARM) | |
235 | events |= (RTC_AF | RTC_IRQF); | |
236 | if (rtsr & AT91_RTC_SECEV) | |
237 | events |= (RTC_UF | RTC_IRQF); | |
238 | if (rtsr & AT91_RTC_ACKUPD) | |
239 | complete(&at91_rtc_updated); | |
240 | ||
d28bdfc5 | 241 | at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ |
788b1fc6 | 242 | |
ab6a2d70 | 243 | rtc_update_irq(rtc, 1, events); |
788b1fc6 | 244 | |
6588208c | 245 | dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", __func__, |
788b1fc6 AV |
246 | events >> 8, events & 0x000000FF); |
247 | ||
248 | return IRQ_HANDLED; | |
249 | } | |
250 | return IRQ_NONE; /* not handled */ | |
251 | } | |
252 | ||
ff8371ac | 253 | static const struct rtc_class_ops at91_rtc_ops = { |
788b1fc6 AV |
254 | .read_time = at91_rtc_readtime, |
255 | .set_time = at91_rtc_settime, | |
256 | .read_alarm = at91_rtc_readalarm, | |
257 | .set_alarm = at91_rtc_setalarm, | |
258 | .proc = at91_rtc_proc, | |
16380c15 | 259 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, |
788b1fc6 AV |
260 | }; |
261 | ||
262 | /* | |
263 | * Initialize and install RTC driver | |
264 | */ | |
265 | static int __init at91_rtc_probe(struct platform_device *pdev) | |
266 | { | |
267 | struct rtc_device *rtc; | |
d28bdfc5 JCPV |
268 | struct resource *regs; |
269 | int ret = 0; | |
788b1fc6 | 270 | |
d28bdfc5 JCPV |
271 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
272 | if (!regs) { | |
273 | dev_err(&pdev->dev, "no mmio resource defined\n"); | |
274 | return -ENXIO; | |
275 | } | |
276 | ||
277 | irq = platform_get_irq(pdev, 0); | |
278 | if (irq < 0) { | |
279 | dev_err(&pdev->dev, "no irq resource defined\n"); | |
280 | return -ENXIO; | |
281 | } | |
282 | ||
283 | at91_rtc_regs = ioremap(regs->start, resource_size(regs)); | |
284 | if (!at91_rtc_regs) { | |
285 | dev_err(&pdev->dev, "failed to map registers, aborting.\n"); | |
286 | return -ENOMEM; | |
287 | } | |
288 | ||
289 | at91_rtc_write(AT91_RTC_CR, 0); | |
290 | at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */ | |
788b1fc6 AV |
291 | |
292 | /* Disable all interrupts */ | |
d28bdfc5 | 293 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
e7a8bb12 AM |
294 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
295 | AT91_RTC_CALEV); | |
788b1fc6 | 296 | |
d28bdfc5 | 297 | ret = request_irq(irq, at91_rtc_interrupt, |
dac94d9e | 298 | IRQF_SHARED, |
d728b1e6 | 299 | "at91_rtc", pdev); |
788b1fc6 | 300 | if (ret) { |
6588208c | 301 | dev_err(&pdev->dev, "IRQ %d already in use.\n", irq); |
788b1fc6 AV |
302 | return ret; |
303 | } | |
304 | ||
5d4675a8 DB |
305 | /* cpu init code should really have flagged this device as |
306 | * being wake-capable; if it didn't, do that here. | |
307 | */ | |
308 | if (!device_can_wakeup(&pdev->dev)) | |
309 | device_init_wakeup(&pdev->dev, 1); | |
310 | ||
e7a8bb12 AM |
311 | rtc = rtc_device_register(pdev->name, &pdev->dev, |
312 | &at91_rtc_ops, THIS_MODULE); | |
788b1fc6 | 313 | if (IS_ERR(rtc)) { |
d28bdfc5 | 314 | free_irq(irq, pdev); |
788b1fc6 AV |
315 | return PTR_ERR(rtc); |
316 | } | |
317 | platform_set_drvdata(pdev, rtc); | |
318 | ||
6588208c | 319 | dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n"); |
788b1fc6 AV |
320 | return 0; |
321 | } | |
322 | ||
323 | /* | |
324 | * Disable and remove the RTC driver | |
325 | */ | |
5d4675a8 | 326 | static int __exit at91_rtc_remove(struct platform_device *pdev) |
788b1fc6 AV |
327 | { |
328 | struct rtc_device *rtc = platform_get_drvdata(pdev); | |
329 | ||
330 | /* Disable all interrupts */ | |
d28bdfc5 | 331 | at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | |
e7a8bb12 AM |
332 | AT91_RTC_SECEV | AT91_RTC_TIMEV | |
333 | AT91_RTC_CALEV); | |
d28bdfc5 | 334 | free_irq(irq, pdev); |
788b1fc6 AV |
335 | |
336 | rtc_device_unregister(rtc); | |
337 | platform_set_drvdata(pdev, NULL); | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
6975a9c1 | 342 | #ifdef CONFIG_PM_SLEEP |
788b1fc6 AV |
343 | |
344 | /* AT91RM9200 RTC Power management control */ | |
345 | ||
e24b0bfa | 346 | static u32 at91_rtc_imr; |
788b1fc6 | 347 | |
dac94d9e | 348 | static int at91_rtc_suspend(struct device *dev) |
788b1fc6 | 349 | { |
90b4d648 DB |
350 | /* this IRQ is shared with DBGU and other hardware which isn't |
351 | * necessarily doing PM like we are... | |
352 | */ | |
e24b0bfa JH |
353 | at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR) |
354 | & (AT91_RTC_ALARM|AT91_RTC_SECEV); | |
355 | if (at91_rtc_imr) { | |
356 | if (device_may_wakeup(dev)) | |
d28bdfc5 | 357 | enable_irq_wake(irq); |
e24b0bfa JH |
358 | else |
359 | at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr); | |
360 | } | |
788b1fc6 AV |
361 | return 0; |
362 | } | |
363 | ||
dac94d9e | 364 | static int at91_rtc_resume(struct device *dev) |
788b1fc6 | 365 | { |
e24b0bfa JH |
366 | if (at91_rtc_imr) { |
367 | if (device_may_wakeup(dev)) | |
d28bdfc5 | 368 | disable_irq_wake(irq); |
e24b0bfa JH |
369 | else |
370 | at91_rtc_write(AT91_RTC_IER, at91_rtc_imr); | |
90b4d648 | 371 | } |
788b1fc6 AV |
372 | return 0; |
373 | } | |
788b1fc6 AV |
374 | #endif |
375 | ||
6975a9c1 JH |
376 | static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); |
377 | ||
7c1b68d4 JE |
378 | static const struct of_device_id at91_rtc_dt_ids[] = { |
379 | { .compatible = "atmel,at91rm9200-rtc" }, | |
380 | { /* sentinel */ } | |
381 | }; | |
382 | MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids); | |
383 | ||
788b1fc6 | 384 | static struct platform_driver at91_rtc_driver = { |
5d4675a8 | 385 | .remove = __exit_p(at91_rtc_remove), |
788b1fc6 AV |
386 | .driver = { |
387 | .name = "at91_rtc", | |
388 | .owner = THIS_MODULE, | |
6975a9c1 | 389 | .pm = &at91_rtc_pm_ops, |
7c1b68d4 | 390 | .of_match_table = of_match_ptr(at91_rtc_dt_ids), |
788b1fc6 AV |
391 | }, |
392 | }; | |
393 | ||
ac36960f | 394 | module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe); |
788b1fc6 AV |
395 | |
396 | MODULE_AUTHOR("Rick Bronson"); | |
397 | MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200"); | |
398 | MODULE_LICENSE("GPL"); | |
ad28a07b | 399 | MODULE_ALIAS("platform:at91_rtc"); |