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regulator: wm831x-ldo: Set up supply names
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
e4ee831f
MB		 1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
e24a04c4
MB		 22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
5a0e3ad6 24#include <linux/slab.h>
e4ee831f
MB		 25
26#include <linux/mfd/wm831x/core.h>
27#include <linux/mfd/wm831x/regulator.h>
28#include <linux/mfd/wm831x/pdata.h>
29
30#define WM831X_BUCKV_MAX_SELECTOR 0x68
31#define WM831X_BUCKP_MAX_SELECTOR 0x66
32
33#define WM831X_DCDC_MODE_FAST 0
34#define WM831X_DCDC_MODE_NORMAL 1
35#define WM831X_DCDC_MODE_IDLE 2
36#define WM831X_DCDC_MODE_STANDBY 3
37
38#define WM831X_DCDC_MAX_NAME 6
39
40/* Register offsets in control block */
41#define WM831X_DCDC_CONTROL_1 0
42#define WM831X_DCDC_CONTROL_2 1
43#define WM831X_DCDC_ON_CONFIG 2
44#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 45#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 46
47/*
48 * Shared
49 */
50
51struct wm831x_dcdc {
52 char name[WM831X_DCDC_MAX_NAME];
53 struct regulator_desc desc;
54 int base;
55 struct wm831x *wm831x;
56 struct regulator_dev *regulator;
e24a04c4
MB		 57 int dvs_gpio;
58 int dvs_gpio_state;
59 int on_vsel;
60 int dvs_vsel;
e4ee831f
MB		 61};
62
63static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
64{
65 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
66 struct wm831x *wm831x = dcdc->wm831x;
67 int mask = 1 << rdev_get_id(rdev);
68 int reg;
69
70 reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
71 if (reg < 0)
72 return reg;
73
74 if (reg & mask)
75 return 1;
76 else
77 return 0;
78}
79
80static int wm831x_dcdc_enable(struct regulator_dev *rdev)
81{
82 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
83 struct wm831x *wm831x = dcdc->wm831x;
84 int mask = 1 << rdev_get_id(rdev);
85
86 return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
87}
88
89static int wm831x_dcdc_disable(struct regulator_dev *rdev)
90{
91 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
92 struct wm831x *wm831x = dcdc->wm831x;
93 int mask = 1 << rdev_get_id(rdev);
94
95 return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
96}
97
98static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
99
100{
101 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
102 struct wm831x *wm831x = dcdc->wm831x;
103 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
104 int val;
105
106 val = wm831x_reg_read(wm831x, reg);
107 if (val < 0)
108 return val;
109
110 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
111
112 switch (val) {
113 case WM831X_DCDC_MODE_FAST:
114 return REGULATOR_MODE_FAST;
115 case WM831X_DCDC_MODE_NORMAL:
116 return REGULATOR_MODE_NORMAL;
117 case WM831X_DCDC_MODE_STANDBY:
118 return REGULATOR_MODE_STANDBY;
119 case WM831X_DCDC_MODE_IDLE:
120 return REGULATOR_MODE_IDLE;
121 default:
122 BUG();
9ee291a4 123 return -EINVAL;
e4ee831f
MB		 124 }
125}
126
127static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
128 unsigned int mode)
129{
130 int val;
131
132 switch (mode) {
133 case REGULATOR_MODE_FAST:
134 val = WM831X_DCDC_MODE_FAST;
135 break;
136 case REGULATOR_MODE_NORMAL:
137 val = WM831X_DCDC_MODE_NORMAL;
138 break;
139 case REGULATOR_MODE_STANDBY:
140 val = WM831X_DCDC_MODE_STANDBY;
141 break;
142 case REGULATOR_MODE_IDLE:
143 val = WM831X_DCDC_MODE_IDLE;
144 break;
145 default:
146 return -EINVAL;
147 }
148
149 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
150 val << WM831X_DC1_ON_MODE_SHIFT);
151}
152
153static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
154{
155 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
156 struct wm831x *wm831x = dcdc->wm831x;
157 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
158
159 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
160}
161
162static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
163 unsigned int mode)
164{
165 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
166 struct wm831x *wm831x = dcdc->wm831x;
167 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
168
169 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
170}
171
172static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
173{
174 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
175 struct wm831x *wm831x = dcdc->wm831x;
176 int ret;
177
178 /* First, check for errors */
179 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
180 if (ret < 0)
181 return ret;
182
183 if (ret & (1 << rdev_get_id(rdev))) {
184 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
185 rdev_get_id(rdev) + 1);
186 return REGULATOR_STATUS_ERROR;
187 }
188
189 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
190 if (rdev_get_id(rdev) < 2) {
191 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
192 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
193 rdev_get_id(rdev) + 1);
194 return REGULATOR_STATUS_ERROR;
195 }
196
197 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
198 dev_dbg(wm831x->dev, "DCDC%d over current\n",
199 rdev_get_id(rdev) + 1);
200 return REGULATOR_STATUS_ERROR;
201 }
202 }
203
204 /* Is the regulator on? */
205 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
206 if (ret < 0)
207 return ret;
208 if (!(ret & (1 << rdev_get_id(rdev))))
209 return REGULATOR_STATUS_OFF;
210
211 /* TODO: When we handle hardware control modes so we can report the
212 * current mode. */
213 return REGULATOR_STATUS_ON;
214}
215
216static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
217{
218 struct wm831x_dcdc *dcdc = data;
219
220 regulator_notifier_call_chain(dcdc->regulator,
221 REGULATOR_EVENT_UNDER_VOLTAGE,
222 NULL);
223
224 return IRQ_HANDLED;
225}
226
227static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
228{
229 struct wm831x_dcdc *dcdc = data;
230
231 regulator_notifier_call_chain(dcdc->regulator,
232 REGULATOR_EVENT_OVER_CURRENT,
233 NULL);
234
235 return IRQ_HANDLED;
236}
237
238/*
239 * BUCKV specifics
240 */
241
242static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
243 unsigned selector)
244{
245 if (selector <= 0x8)
246 return 600000;
247 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
248 return 600000 + ((selector - 0x8) * 12500);
249 return -EINVAL;
250}
251
e24a04c4
MB		 252static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
253 int min_uV, int max_uV)
e4ee831f 254{
e4ee831f
MB		 255 u16 vsel;
256
257 if (min_uV < 600000)
258 vsel = 0;
259 else if (min_uV <= 1800000)
260 vsel = ((min_uV - 600000) / 12500) + 8;
261 else
262 return -EINVAL;
263
264 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
265 return -EINVAL;
266
e24a04c4
MB		 267 return vsel;
268}
269
e24a04c4
MB		 270static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
271{
272 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
273
274 if (state == dcdc->dvs_gpio_state)
275 return 0;
276
277 dcdc->dvs_gpio_state = state;
278 gpio_set_value(dcdc->dvs_gpio, state);
279
280 /* Should wait for DVS state change to be asserted if we have
281 * a GPIO for it, for now assume the device is configured
282 * for the fastest possible transition.
283 */
284
285 return 0;
e4ee831f
MB		 286}
287
288static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
3a93f2a9 289 int min_uV, int max_uV, unsigned *selector)
e4ee831f
MB		 290{
291 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 292 struct wm831x *wm831x = dcdc->wm831x;
293 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
294 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
295 int vsel, ret;
296
297 vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
298 if (vsel < 0)
299 return vsel;
300
3a93f2a9
MB		 301 *selector = vsel;
302
e24a04c4
MB		 303 /* If this value is already set then do a GPIO update if we can */
304 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
305 return wm831x_buckv_set_dvs(rdev, 0);
306
307 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
308 return wm831x_buckv_set_dvs(rdev, 1);
309
310 /* Always set the ON status to the minimum voltage */
311 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
312 if (ret < 0)
313 return ret;
314 dcdc->on_vsel = vsel;
315
316 if (!dcdc->dvs_gpio)
317 return ret;
318
319 /* Kick the voltage transition now */
320 ret = wm831x_buckv_set_dvs(rdev, 0);
321 if (ret < 0)
322 return ret;
323
88cda60e
MB		 324 /*
325 * If this VSEL is higher than the last one we've seen then
326 * remember it as the DVS VSEL. This is optimised for CPUfreq
327 * usage where we want to get to the highest voltage very
328 * quickly.
329 */
330 if (vsel > dcdc->dvs_vsel) {
331 ret = wm831x_set_bits(wm831x, dvs_reg,
332 WM831X_DC1_DVS_VSEL_MASK,
333 dcdc->dvs_vsel);
334 if (ret == 0)
335 dcdc->dvs_vsel = vsel;
336 else
337 dev_warn(wm831x->dev,
338 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 339 }
340
e24a04c4 341 return 0;
e4ee831f
MB		 342}
343
344static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 345 int uV)
e4ee831f
MB		 346{
347 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 348 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 349 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 350 int vsel;
351
352 vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
353 if (vsel < 0)
354 return vsel;
e4ee831f 355
e24a04c4 356 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 357}
358
afb8bb80 359static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 360{
361 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 362
e24a04c4 363 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 364 return dcdc->dvs_vsel;
e24a04c4 365 else
afb8bb80 366 return dcdc->on_vsel;
e4ee831f
MB		 367}
368
369/* Current limit options */
370static u16 wm831x_dcdc_ilim[] = {
371 125, 250, 375, 500, 625, 750, 875, 1000
372};
373
374static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
375 int min_uA, int max_uA)
376{
377 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
378 struct wm831x *wm831x = dcdc->wm831x;
379 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
380 int i;
381
382 for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
a171e782
AL		 383 if ((min_uA <= wm831x_dcdc_ilim[i]) &&
384 (wm831x_dcdc_ilim[i] <= max_uA))
e4ee831f
MB		 385 break;
386 }
387 if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
388 return -EINVAL;
389
09bf14b9
AL		 390 return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK,
391 i << WM831X_DC1_HC_THR_SHIFT);
e4ee831f
MB		 392}
393
394static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
395{
396 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
397 struct wm831x *wm831x = dcdc->wm831x;
398 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
399 int val;
400
401 val = wm831x_reg_read(wm831x, reg);
402 if (val < 0)
403 return val;
404
09bf14b9
AL		 405 val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
406 return wm831x_dcdc_ilim[val];
e4ee831f
MB		 407}
408
409static struct regulator_ops wm831x_buckv_ops = {
410 .set_voltage = wm831x_buckv_set_voltage,
afb8bb80 411 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
e4ee831f
MB		 412 .list_voltage = wm831x_buckv_list_voltage,
413 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
414 .set_current_limit = wm831x_buckv_set_current_limit,
415 .get_current_limit = wm831x_buckv_get_current_limit,
416
417 .is_enabled = wm831x_dcdc_is_enabled,
418 .enable = wm831x_dcdc_enable,
419 .disable = wm831x_dcdc_disable,
420 .get_status = wm831x_dcdc_get_status,
421 .get_mode = wm831x_dcdc_get_mode,
422 .set_mode = wm831x_dcdc_set_mode,
423 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
424};
425
e24a04c4
MB		 426/*
427 * Set up DVS control. We just log errors since we can still run
428 * (with reduced performance) if we fail.
429 */
430static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
431 struct wm831x_buckv_pdata *pdata)
432{
433 struct wm831x *wm831x = dcdc->wm831x;
434 int ret;
435 u16 ctrl;
436
437 if (!pdata || !pdata->dvs_gpio)
438 return;
439
e24a04c4
MB		 440 ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
441 if (ret < 0) {
442 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
443 dcdc->name, ret);
444 return;
445 }
446
447 /* gpiolib won't let us read the GPIO status so pick the higher
448 * of the two existing voltages so we take it as platform data.
449 */
450 dcdc->dvs_gpio_state = pdata->dvs_init_state;
451
452 ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
453 if (ret < 0) {
454 dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
455 dcdc->name, ret);
456 gpio_free(pdata->dvs_gpio);
457 return;
458 }
459
460 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
MB		 461
462 switch (pdata->dvs_control_src) {
463 case 1:
464 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
465 break;
466 case 2:
467 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
468 break;
469 default:
470 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
471 pdata->dvs_control_src, dcdc->name);
472 return;
473 }
474
c439b8f4
MB		 475 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
476 * to make bootstrapping a bit smoother.
477 */
478 if (!dcdc->dvs_vsel) {
479 ret = wm831x_set_bits(wm831x,
480 dcdc->base + WM831X_DCDC_DVS_CONTROL,
481 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
482 if (ret == 0)
483 dcdc->dvs_vsel = dcdc->on_vsel;
484 else
485 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
486 ret);
487 }
488
b47ba9fd
MB		 489 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
490 WM831X_DC1_DVS_SRC_MASK, ctrl);
491 if (ret < 0) {
492 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
493 dcdc->name, ret);
494 }
e24a04c4
MB		 495}
496
e4ee831f
MB		 497static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
498{
499 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
500 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 501 struct regulator_config config = { };
137a6354 502 int id;
e4ee831f
MB		 503 struct wm831x_dcdc *dcdc;
504 struct resource *res;
505 int ret, irq;
506
137a6354
MB		 507 if (pdata && pdata->wm831x_num)
508 id = (pdata->wm831x_num * 10) + 1;
509 else
510 id = 0;
511 id = pdev->id - id;
512
e4ee831f
MB		 513 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
514
515 if (pdata == NULL || pdata->dcdc[id] == NULL)
516 return -ENODEV;
517
fded2f4f
MB		 518 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
519 GFP_KERNEL);
e4ee831f
MB		 520 if (dcdc == NULL) {
521 dev_err(&pdev->dev, "Unable to allocate private data\n");
522 return -ENOMEM;
523 }
524
525 dcdc->wm831x = wm831x;
526
527 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
528 if (res == NULL) {
529 dev_err(&pdev->dev, "No I/O resource\n");
530 ret = -EINVAL;
531 goto err;
532 }
533 dcdc->base = res->start;
534
535 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
536 dcdc->desc.name = dcdc->name;
537 dcdc->desc.id = id;
538 dcdc->desc.type = REGULATOR_VOLTAGE;
539 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
540 dcdc->desc.ops = &wm831x_buckv_ops;
541 dcdc->desc.owner = THIS_MODULE;
542
e24a04c4
MB		 543 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
544 if (ret < 0) {
545 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
546 goto err;
547 }
548 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
549
a1b81dd3 550 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 551 if (ret < 0) {
552 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
553 goto err;
554 }
555 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
556
557 if (pdata->dcdc[id])
558 wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
559
c172708d
MB		 560 config.dev = pdev->dev.parent;
561 config.init_data = pdata->dcdc[id];
562 config.driver_data = dcdc;
563
564 dcdc->regulator = regulator_register(&dcdc->desc, &config);
e4ee831f
MB		 565 if (IS_ERR(dcdc->regulator)) {
566 ret = PTR_ERR(dcdc->regulator);
567 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
568 id + 1, ret);
569 goto err;
570 }
571
572 irq = platform_get_irq_byname(pdev, "UV");
dfda9c27
MB		 573 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
574 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 575 if (ret != 0) {
576 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
577 irq, ret);
578 goto err_regulator;
579 }
580
581 irq = platform_get_irq_byname(pdev, "HC");
dfda9c27
MB		 582 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,
583 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 584 if (ret != 0) {
585 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
586 irq, ret);
587 goto err_uv;
588 }
589
590 platform_set_drvdata(pdev, dcdc);
591
592 return 0;
593
594err_uv:
dfda9c27 595 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
e4ee831f
MB		 596err_regulator:
597 regulator_unregister(dcdc->regulator);
598err:
e24a04c4
MB		 599 if (dcdc->dvs_gpio)
600 gpio_free(dcdc->dvs_gpio);
e4ee831f
MB		 601 return ret;
602}
603
604static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
605{
606 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
e4ee831f 607
eb66d565
DT		 608 platform_set_drvdata(pdev, NULL);
609
69952369
MB		 610 free_irq(platform_get_irq_byname(pdev, "HC"), dcdc);
611 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
e4ee831f 612 regulator_unregister(dcdc->regulator);
e24a04c4
MB		 613 if (dcdc->dvs_gpio)
614 gpio_free(dcdc->dvs_gpio);
e4ee831f
MB		 615
616 return 0;
617}
618
619static struct platform_driver wm831x_buckv_driver = {
620 .probe = wm831x_buckv_probe,
621 .remove = __devexit_p(wm831x_buckv_remove),
622 .driver = {
623 .name = "wm831x-buckv",
eb66d565 624 .owner = THIS_MODULE,
e4ee831f
MB		 625 },
626};
627
628/*
629 * BUCKP specifics
630 */
631
632static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
633 unsigned selector)
634{
635 if (selector <= WM831X_BUCKP_MAX_SELECTOR)
636 return 850000 + (selector * 25000);
637 else
638 return -EINVAL;
639}
640
641static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
3a93f2a9 642 int min_uV, int max_uV, int *selector)
e4ee831f
MB		 643{
644 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
645 struct wm831x *wm831x = dcdc->wm831x;
646 u16 vsel;
647
648 if (min_uV <= 34000000)
649 vsel = (min_uV - 850000) / 25000;
650 else
651 return -EINVAL;
652
653 if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
654 return -EINVAL;
655
3a93f2a9
MB		 656 *selector = vsel;
657
e4ee831f
MB		 658 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
659}
660
661static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
3a93f2a9
MB		 662 int min_uV, int max_uV,
663 unsigned *selector)
e4ee831f
MB		 664{
665 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
666 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
667
3a93f2a9
MB		 668 return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV,
669 selector);
e4ee831f
MB		 670}
671
672static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
673 int uV)
674{
675 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
676 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
3a93f2a9 677 unsigned selector;
e4ee831f 678
3a93f2a9 679 return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector);
e4ee831f
MB		 680}
681
afb8bb80 682static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 683{
684 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
685 struct wm831x *wm831x = dcdc->wm831x;
686 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
687 int val;
688
689 val = wm831x_reg_read(wm831x, reg);
690 if (val < 0)
691 return val;
692
afb8bb80 693 return val & WM831X_DC3_ON_VSEL_MASK;
e4ee831f
MB		 694}
695
696static struct regulator_ops wm831x_buckp_ops = {
697 .set_voltage = wm831x_buckp_set_voltage,
afb8bb80 698 .get_voltage_sel = wm831x_buckp_get_voltage_sel,
e4ee831f
MB		 699 .list_voltage = wm831x_buckp_list_voltage,
700 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
701
702 .is_enabled = wm831x_dcdc_is_enabled,
703 .enable = wm831x_dcdc_enable,
704 .disable = wm831x_dcdc_disable,
705 .get_status = wm831x_dcdc_get_status,
706 .get_mode = wm831x_dcdc_get_mode,
707 .set_mode = wm831x_dcdc_set_mode,
708 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
709};
710
711static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
712{
713 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
714 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 715 struct regulator_config config = { };
137a6354 716 int id;
e4ee831f
MB		 717 struct wm831x_dcdc *dcdc;
718 struct resource *res;
719 int ret, irq;
720
137a6354
MB		 721 if (pdata && pdata->wm831x_num)
722 id = (pdata->wm831x_num * 10) + 1;
723 else
724 id = 0;
725 id = pdev->id - id;
726
e4ee831f
MB		 727 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
728
729 if (pdata == NULL || pdata->dcdc[id] == NULL)
730 return -ENODEV;
731
fded2f4f
MB		 732 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
733 GFP_KERNEL);
e4ee831f
MB		 734 if (dcdc == NULL) {
735 dev_err(&pdev->dev, "Unable to allocate private data\n");
736 return -ENOMEM;
737 }
738
739 dcdc->wm831x = wm831x;
740
741 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
742 if (res == NULL) {
743 dev_err(&pdev->dev, "No I/O resource\n");
744 ret = -EINVAL;
745 goto err;
746 }
747 dcdc->base = res->start;
748
749 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
750 dcdc->desc.name = dcdc->name;
751 dcdc->desc.id = id;
752 dcdc->desc.type = REGULATOR_VOLTAGE;
753 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
754 dcdc->desc.ops = &wm831x_buckp_ops;
755 dcdc->desc.owner = THIS_MODULE;
756
c172708d
MB		 757 config.dev = pdev->dev.parent;
758 config.init_data = pdata->dcdc[id];
759 config.driver_data = dcdc;
760
761 dcdc->regulator = regulator_register(&dcdc->desc, &config);
e4ee831f
MB		 762 if (IS_ERR(dcdc->regulator)) {
763 ret = PTR_ERR(dcdc->regulator);
764 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
765 id + 1, ret);
766 goto err;
767 }
768
769 irq = platform_get_irq_byname(pdev, "UV");
dfda9c27
MB		 770 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
771 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 772 if (ret != 0) {
773 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
774 irq, ret);
775 goto err_regulator;
776 }
777
778 platform_set_drvdata(pdev, dcdc);
779
780 return 0;
781
782err_regulator:
783 regulator_unregister(dcdc->regulator);
784err:
e4ee831f
MB		 785 return ret;
786}
787
788static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
789{
790 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
e4ee831f 791
eb66d565
DT		 792 platform_set_drvdata(pdev, NULL);
793
69952369 794 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
e4ee831f 795 regulator_unregister(dcdc->regulator);
e4ee831f
MB		 796
797 return 0;
798}
799
800static struct platform_driver wm831x_buckp_driver = {
801 .probe = wm831x_buckp_probe,
802 .remove = __devexit_p(wm831x_buckp_remove),
803 .driver = {
804 .name = "wm831x-buckp",
eb66d565 805 .owner = THIS_MODULE,
e4ee831f
MB		 806 },
807};
808
1304850d
MB		 809/*
810 * DCDC boost convertors
811 */
812
813static int wm831x_boostp_get_status(struct regulator_dev *rdev)
814{
815 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
816 struct wm831x *wm831x = dcdc->wm831x;
817 int ret;
818
819 /* First, check for errors */
820 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
821 if (ret < 0)
822 return ret;
823
824 if (ret & (1 << rdev_get_id(rdev))) {
825 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
826 rdev_get_id(rdev) + 1);
827 return REGULATOR_STATUS_ERROR;
828 }
829
830 /* Is the regulator on? */
831 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
832 if (ret < 0)
833 return ret;
834 if (ret & (1 << rdev_get_id(rdev)))
835 return REGULATOR_STATUS_ON;
836 else
837 return REGULATOR_STATUS_OFF;
838}
839
840static struct regulator_ops wm831x_boostp_ops = {
841 .get_status = wm831x_boostp_get_status,
842
843 .is_enabled = wm831x_dcdc_is_enabled,
844 .enable = wm831x_dcdc_enable,
845 .disable = wm831x_dcdc_disable,
846};
847
848static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
849{
850 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
851 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 852 struct regulator_config config = { };
1304850d
MB		 853 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
854 struct wm831x_dcdc *dcdc;
855 struct resource *res;
856 int ret, irq;
857
858 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
859
860 if (pdata == NULL || pdata->dcdc[id] == NULL)
861 return -ENODEV;
862
4c60165d 863 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
1304850d
MB		 864 if (dcdc == NULL) {
865 dev_err(&pdev->dev, "Unable to allocate private data\n");
866 return -ENOMEM;
867 }
868
869 dcdc->wm831x = wm831x;
870
871 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
872 if (res == NULL) {
873 dev_err(&pdev->dev, "No I/O resource\n");
874 ret = -EINVAL;
875 goto err;
876 }
877 dcdc->base = res->start;
878
879 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
880 dcdc->desc.name = dcdc->name;
881 dcdc->desc.id = id;
882 dcdc->desc.type = REGULATOR_VOLTAGE;
883 dcdc->desc.ops = &wm831x_boostp_ops;
884 dcdc->desc.owner = THIS_MODULE;
885
c172708d
MB		 886 config.dev = pdev->dev.parent;
887 config.init_data = pdata->dcdc[id];
888 config.driver_data = dcdc;
889
890 dcdc->regulator = regulator_register(&dcdc->desc, &config);
1304850d
MB		 891 if (IS_ERR(dcdc->regulator)) {
892 ret = PTR_ERR(dcdc->regulator);
893 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
894 id + 1, ret);
895 goto err;
896 }
897
898 irq = platform_get_irq_byname(pdev, "UV");
dfda9c27
MB		 899 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
900 IRQF_TRIGGER_RISING, dcdc->name,
901 dcdc);
1304850d
MB		 902 if (ret != 0) {
903 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
904 irq, ret);
905 goto err_regulator;
906 }
907
908 platform_set_drvdata(pdev, dcdc);
909
910 return 0;
911
912err_regulator:
913 regulator_unregister(dcdc->regulator);
914err:
1304850d
MB		 915 return ret;
916}
917
918static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
919{
920 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
1304850d 921
eb66d565
DT		 922 platform_set_drvdata(pdev, NULL);
923
dfda9c27 924 free_irq(platform_get_irq_byname(pdev, "UV"), dcdc);
1304850d 925 regulator_unregister(dcdc->regulator);
1304850d
MB		 926
927 return 0;
928}
929
930static struct platform_driver wm831x_boostp_driver = {
931 .probe = wm831x_boostp_probe,
932 .remove = __devexit_p(wm831x_boostp_remove),
933 .driver = {
934 .name = "wm831x-boostp",
eb66d565 935 .owner = THIS_MODULE,
1304850d
MB		 936 },
937};
938
8267a9ba
MB		 939/*
940 * External Power Enable
941 *
942 * These aren't actually DCDCs but look like them in hardware so share
943 * code.
944 */
945
946#define WM831X_EPE_BASE 6
947
948static struct regulator_ops wm831x_epe_ops = {
949 .is_enabled = wm831x_dcdc_is_enabled,
950 .enable = wm831x_dcdc_enable,
951 .disable = wm831x_dcdc_disable,
952 .get_status = wm831x_dcdc_get_status,
953};
954
955static __devinit int wm831x_epe_probe(struct platform_device *pdev)
956{
957 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
958 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 959 struct regulator_config config = { };
8267a9ba
MB		 960 int id = pdev->id % ARRAY_SIZE(pdata->epe);
961 struct wm831x_dcdc *dcdc;
962 int ret;
963
964 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
965
966 if (pdata == NULL || pdata->epe[id] == NULL)
967 return -ENODEV;
968
4c60165d 969 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
8267a9ba
MB		 970 if (dcdc == NULL) {
971 dev_err(&pdev->dev, "Unable to allocate private data\n");
972 return -ENOMEM;
973 }
974
975 dcdc->wm831x = wm831x;
976
977 /* For current parts this is correct; probably need to revisit
978 * in future.
979 */
980 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
981 dcdc->desc.name = dcdc->name;
982 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
983 dcdc->desc.ops = &wm831x_epe_ops;
984 dcdc->desc.type = REGULATOR_VOLTAGE;
985 dcdc->desc.owner = THIS_MODULE;
986
c172708d
MB		 987 config.dev = pdev->dev.parent;
988 config.init_data = pdata->epe[id];
989 config.driver_data = dcdc;
990
991 dcdc->regulator = regulator_register(&dcdc->desc, &config);
8267a9ba
MB		 992 if (IS_ERR(dcdc->regulator)) {
993 ret = PTR_ERR(dcdc->regulator);
994 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
995 id + 1, ret);
996 goto err;
997 }
998
999 platform_set_drvdata(pdev, dcdc);
1000
1001 return 0;
1002
1003err:
8267a9ba
MB		 1004 return ret;
1005}
1006
1007static __devexit int wm831x_epe_remove(struct platform_device *pdev)
1008{
1009 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
1010
eb66d565 1011 platform_set_drvdata(pdev, NULL);
8267a9ba 1012 regulator_unregister(dcdc->regulator);
8267a9ba
MB		 1013
1014 return 0;
1015}
1016
1017static struct platform_driver wm831x_epe_driver = {
1018 .probe = wm831x_epe_probe,
1019 .remove = __devexit_p(wm831x_epe_remove),
1020 .driver = {
1021 .name = "wm831x-epe",
eb66d565 1022 .owner = THIS_MODULE,
8267a9ba
MB		 1023 },
1024};
1025
e4ee831f
MB		 1026static int __init wm831x_dcdc_init(void)
1027{
1028 int ret;
1029 ret = platform_driver_register(&wm831x_buckv_driver);
1030 if (ret != 0)
1031 pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
1032
1033 ret = platform_driver_register(&wm831x_buckp_driver);
1034 if (ret != 0)
1035 pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
1036
1304850d
MB		 1037 ret = platform_driver_register(&wm831x_boostp_driver);
1038 if (ret != 0)
1039 pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
1040
8267a9ba
MB		 1041 ret = platform_driver_register(&wm831x_epe_driver);
1042 if (ret != 0)
1043 pr_err("Failed to register WM831x EPE driver: %d\n", ret);
1044
e4ee831f
MB		 1045 return 0;
1046}
1047subsys_initcall(wm831x_dcdc_init);
1048
1049static void __exit wm831x_dcdc_exit(void)
1050{
8267a9ba 1051 platform_driver_unregister(&wm831x_epe_driver);
1304850d 1052 platform_driver_unregister(&wm831x_boostp_driver);
e4ee831f
MB		 1053 platform_driver_unregister(&wm831x_buckp_driver);
1054 platform_driver_unregister(&wm831x_buckv_driver);
1055}
1056module_exit(wm831x_dcdc_exit);
1057
1058/* Module information */
1059MODULE_AUTHOR("Mark Brown");
1060MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
1061MODULE_LICENSE("GPL");
1062MODULE_ALIAS("platform:wm831x-buckv");
1063MODULE_ALIAS("platform:wm831x-buckp");
24b43150 1064MODULE_ALIAS("platform:wm831x-epe");
kernel source for telekom puls (alcatel/mediatek)