Commit | Line | Data |
---|---|---|
e4ee831f MB |
1 | /* |
2 | * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/bitops.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/driver.h> | |
e24a04c4 MB |
22 | #include <linux/regulator/machine.h> |
23 | #include <linux/gpio.h> | |
5a0e3ad6 | 24 | #include <linux/slab.h> |
e4ee831f MB |
25 | |
26 | #include <linux/mfd/wm831x/core.h> | |
27 | #include <linux/mfd/wm831x/regulator.h> | |
28 | #include <linux/mfd/wm831x/pdata.h> | |
29 | ||
30 | #define WM831X_BUCKV_MAX_SELECTOR 0x68 | |
31 | #define WM831X_BUCKP_MAX_SELECTOR 0x66 | |
32 | ||
33 | #define WM831X_DCDC_MODE_FAST 0 | |
34 | #define WM831X_DCDC_MODE_NORMAL 1 | |
35 | #define WM831X_DCDC_MODE_IDLE 2 | |
36 | #define WM831X_DCDC_MODE_STANDBY 3 | |
37 | ||
82caa978 | 38 | #define WM831X_DCDC_MAX_NAME 9 |
e4ee831f MB |
39 | |
40 | /* Register offsets in control block */ | |
41 | #define WM831X_DCDC_CONTROL_1 0 | |
42 | #define WM831X_DCDC_CONTROL_2 1 | |
43 | #define WM831X_DCDC_ON_CONFIG 2 | |
44 | #define WM831X_DCDC_SLEEP_CONTROL 3 | |
e24a04c4 | 45 | #define WM831X_DCDC_DVS_CONTROL 4 |
e4ee831f MB |
46 | |
47 | /* | |
48 | * Shared | |
49 | */ | |
50 | ||
51 | struct wm831x_dcdc { | |
52 | char name[WM831X_DCDC_MAX_NAME]; | |
82caa978 | 53 | char supply_name[WM831X_DCDC_MAX_NAME]; |
e4ee831f MB |
54 | struct regulator_desc desc; |
55 | int base; | |
56 | struct wm831x *wm831x; | |
57 | struct regulator_dev *regulator; | |
e24a04c4 MB |
58 | int dvs_gpio; |
59 | int dvs_gpio_state; | |
60 | int on_vsel; | |
61 | int dvs_vsel; | |
e4ee831f MB |
62 | }; |
63 | ||
64 | static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) | |
65 | { | |
66 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
67 | struct wm831x *wm831x = dcdc->wm831x; | |
68 | int mask = 1 << rdev_get_id(rdev); | |
69 | int reg; | |
70 | ||
71 | reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE); | |
72 | if (reg < 0) | |
73 | return reg; | |
74 | ||
75 | if (reg & mask) | |
76 | return 1; | |
77 | else | |
78 | return 0; | |
79 | } | |
80 | ||
81 | static int wm831x_dcdc_enable(struct regulator_dev *rdev) | |
82 | { | |
83 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
84 | struct wm831x *wm831x = dcdc->wm831x; | |
85 | int mask = 1 << rdev_get_id(rdev); | |
86 | ||
87 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask); | |
88 | } | |
89 | ||
90 | static int wm831x_dcdc_disable(struct regulator_dev *rdev) | |
91 | { | |
92 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
93 | struct wm831x *wm831x = dcdc->wm831x; | |
94 | int mask = 1 << rdev_get_id(rdev); | |
95 | ||
96 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0); | |
97 | } | |
98 | ||
99 | static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) | |
100 | ||
101 | { | |
102 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
103 | struct wm831x *wm831x = dcdc->wm831x; | |
104 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
105 | int val; | |
106 | ||
107 | val = wm831x_reg_read(wm831x, reg); | |
108 | if (val < 0) | |
109 | return val; | |
110 | ||
111 | val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT; | |
112 | ||
113 | switch (val) { | |
114 | case WM831X_DCDC_MODE_FAST: | |
115 | return REGULATOR_MODE_FAST; | |
116 | case WM831X_DCDC_MODE_NORMAL: | |
117 | return REGULATOR_MODE_NORMAL; | |
118 | case WM831X_DCDC_MODE_STANDBY: | |
119 | return REGULATOR_MODE_STANDBY; | |
120 | case WM831X_DCDC_MODE_IDLE: | |
121 | return REGULATOR_MODE_IDLE; | |
122 | default: | |
123 | BUG(); | |
9ee291a4 | 124 | return -EINVAL; |
e4ee831f MB |
125 | } |
126 | } | |
127 | ||
128 | static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg, | |
129 | unsigned int mode) | |
130 | { | |
131 | int val; | |
132 | ||
133 | switch (mode) { | |
134 | case REGULATOR_MODE_FAST: | |
135 | val = WM831X_DCDC_MODE_FAST; | |
136 | break; | |
137 | case REGULATOR_MODE_NORMAL: | |
138 | val = WM831X_DCDC_MODE_NORMAL; | |
139 | break; | |
140 | case REGULATOR_MODE_STANDBY: | |
141 | val = WM831X_DCDC_MODE_STANDBY; | |
142 | break; | |
143 | case REGULATOR_MODE_IDLE: | |
144 | val = WM831X_DCDC_MODE_IDLE; | |
145 | break; | |
146 | default: | |
147 | return -EINVAL; | |
148 | } | |
149 | ||
150 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK, | |
151 | val << WM831X_DC1_ON_MODE_SHIFT); | |
152 | } | |
153 | ||
154 | static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) | |
155 | { | |
156 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
157 | struct wm831x *wm831x = dcdc->wm831x; | |
158 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
159 | ||
160 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | |
161 | } | |
162 | ||
163 | static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev, | |
164 | unsigned int mode) | |
165 | { | |
166 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
167 | struct wm831x *wm831x = dcdc->wm831x; | |
168 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | |
169 | ||
170 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | |
171 | } | |
172 | ||
173 | static int wm831x_dcdc_get_status(struct regulator_dev *rdev) | |
174 | { | |
175 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
176 | struct wm831x *wm831x = dcdc->wm831x; | |
177 | int ret; | |
178 | ||
179 | /* First, check for errors */ | |
180 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | |
181 | if (ret < 0) | |
182 | return ret; | |
183 | ||
184 | if (ret & (1 << rdev_get_id(rdev))) { | |
185 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | |
186 | rdev_get_id(rdev) + 1); | |
187 | return REGULATOR_STATUS_ERROR; | |
188 | } | |
189 | ||
190 | /* DCDC1 and DCDC2 can additionally detect high voltage/current */ | |
191 | if (rdev_get_id(rdev) < 2) { | |
192 | if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) { | |
193 | dev_dbg(wm831x->dev, "DCDC%d over voltage\n", | |
194 | rdev_get_id(rdev) + 1); | |
195 | return REGULATOR_STATUS_ERROR; | |
196 | } | |
197 | ||
198 | if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) { | |
199 | dev_dbg(wm831x->dev, "DCDC%d over current\n", | |
200 | rdev_get_id(rdev) + 1); | |
201 | return REGULATOR_STATUS_ERROR; | |
202 | } | |
203 | } | |
204 | ||
205 | /* Is the regulator on? */ | |
206 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | |
207 | if (ret < 0) | |
208 | return ret; | |
209 | if (!(ret & (1 << rdev_get_id(rdev)))) | |
210 | return REGULATOR_STATUS_OFF; | |
211 | ||
212 | /* TODO: When we handle hardware control modes so we can report the | |
213 | * current mode. */ | |
214 | return REGULATOR_STATUS_ON; | |
215 | } | |
216 | ||
217 | static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data) | |
218 | { | |
219 | struct wm831x_dcdc *dcdc = data; | |
220 | ||
221 | regulator_notifier_call_chain(dcdc->regulator, | |
222 | REGULATOR_EVENT_UNDER_VOLTAGE, | |
223 | NULL); | |
224 | ||
225 | return IRQ_HANDLED; | |
226 | } | |
227 | ||
228 | static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data) | |
229 | { | |
230 | struct wm831x_dcdc *dcdc = data; | |
231 | ||
232 | regulator_notifier_call_chain(dcdc->regulator, | |
233 | REGULATOR_EVENT_OVER_CURRENT, | |
234 | NULL); | |
235 | ||
236 | return IRQ_HANDLED; | |
237 | } | |
238 | ||
239 | /* | |
240 | * BUCKV specifics | |
241 | */ | |
242 | ||
243 | static int wm831x_buckv_list_voltage(struct regulator_dev *rdev, | |
244 | unsigned selector) | |
245 | { | |
246 | if (selector <= 0x8) | |
247 | return 600000; | |
248 | if (selector <= WM831X_BUCKV_MAX_SELECTOR) | |
249 | return 600000 + ((selector - 0x8) * 12500); | |
250 | return -EINVAL; | |
251 | } | |
252 | ||
e24a04c4 MB |
253 | static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev, |
254 | int min_uV, int max_uV) | |
e4ee831f | 255 | { |
e4ee831f MB |
256 | u16 vsel; |
257 | ||
258 | if (min_uV < 600000) | |
259 | vsel = 0; | |
260 | else if (min_uV <= 1800000) | |
261 | vsel = ((min_uV - 600000) / 12500) + 8; | |
262 | else | |
263 | return -EINVAL; | |
264 | ||
265 | if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) | |
266 | return -EINVAL; | |
267 | ||
e24a04c4 MB |
268 | return vsel; |
269 | } | |
270 | ||
e24a04c4 MB |
271 | static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state) |
272 | { | |
273 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
274 | ||
275 | if (state == dcdc->dvs_gpio_state) | |
276 | return 0; | |
277 | ||
278 | dcdc->dvs_gpio_state = state; | |
279 | gpio_set_value(dcdc->dvs_gpio, state); | |
280 | ||
281 | /* Should wait for DVS state change to be asserted if we have | |
282 | * a GPIO for it, for now assume the device is configured | |
283 | * for the fastest possible transition. | |
284 | */ | |
285 | ||
286 | return 0; | |
e4ee831f MB |
287 | } |
288 | ||
289 | static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, | |
3a93f2a9 | 290 | int min_uV, int max_uV, unsigned *selector) |
e4ee831f MB |
291 | { |
292 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e24a04c4 MB |
293 | struct wm831x *wm831x = dcdc->wm831x; |
294 | int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
295 | int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL; | |
296 | int vsel, ret; | |
297 | ||
298 | vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV); | |
299 | if (vsel < 0) | |
300 | return vsel; | |
301 | ||
3a93f2a9 MB |
302 | *selector = vsel; |
303 | ||
e24a04c4 MB |
304 | /* If this value is already set then do a GPIO update if we can */ |
305 | if (dcdc->dvs_gpio && dcdc->on_vsel == vsel) | |
306 | return wm831x_buckv_set_dvs(rdev, 0); | |
307 | ||
308 | if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel) | |
309 | return wm831x_buckv_set_dvs(rdev, 1); | |
310 | ||
311 | /* Always set the ON status to the minimum voltage */ | |
312 | ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel); | |
313 | if (ret < 0) | |
314 | return ret; | |
315 | dcdc->on_vsel = vsel; | |
316 | ||
317 | if (!dcdc->dvs_gpio) | |
318 | return ret; | |
319 | ||
320 | /* Kick the voltage transition now */ | |
321 | ret = wm831x_buckv_set_dvs(rdev, 0); | |
322 | if (ret < 0) | |
323 | return ret; | |
324 | ||
88cda60e MB |
325 | /* |
326 | * If this VSEL is higher than the last one we've seen then | |
327 | * remember it as the DVS VSEL. This is optimised for CPUfreq | |
328 | * usage where we want to get to the highest voltage very | |
329 | * quickly. | |
330 | */ | |
331 | if (vsel > dcdc->dvs_vsel) { | |
332 | ret = wm831x_set_bits(wm831x, dvs_reg, | |
333 | WM831X_DC1_DVS_VSEL_MASK, | |
334 | dcdc->dvs_vsel); | |
335 | if (ret == 0) | |
336 | dcdc->dvs_vsel = vsel; | |
337 | else | |
338 | dev_warn(wm831x->dev, | |
339 | "Failed to set DCDC DVS VSEL: %d\n", ret); | |
e24a04c4 MB |
340 | } |
341 | ||
e24a04c4 | 342 | return 0; |
e4ee831f MB |
343 | } |
344 | ||
345 | static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, | |
e24a04c4 | 346 | int uV) |
e4ee831f MB |
347 | { |
348 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e24a04c4 | 349 | struct wm831x *wm831x = dcdc->wm831x; |
e4ee831f | 350 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; |
e24a04c4 MB |
351 | int vsel; |
352 | ||
353 | vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV); | |
354 | if (vsel < 0) | |
355 | return vsel; | |
e4ee831f | 356 | |
e24a04c4 | 357 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel); |
e4ee831f MB |
358 | } |
359 | ||
afb8bb80 | 360 | static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev) |
e4ee831f MB |
361 | { |
362 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e4ee831f | 363 | |
e24a04c4 | 364 | if (dcdc->dvs_gpio && dcdc->dvs_gpio_state) |
afb8bb80 | 365 | return dcdc->dvs_vsel; |
e24a04c4 | 366 | else |
afb8bb80 | 367 | return dcdc->on_vsel; |
e4ee831f MB |
368 | } |
369 | ||
370 | /* Current limit options */ | |
371 | static u16 wm831x_dcdc_ilim[] = { | |
372 | 125, 250, 375, 500, 625, 750, 875, 1000 | |
373 | }; | |
374 | ||
375 | static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev, | |
376 | int min_uA, int max_uA) | |
377 | { | |
378 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
379 | struct wm831x *wm831x = dcdc->wm831x; | |
380 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | |
381 | int i; | |
382 | ||
383 | for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) { | |
a171e782 AL |
384 | if ((min_uA <= wm831x_dcdc_ilim[i]) && |
385 | (wm831x_dcdc_ilim[i] <= max_uA)) | |
e4ee831f MB |
386 | break; |
387 | } | |
388 | if (i == ARRAY_SIZE(wm831x_dcdc_ilim)) | |
389 | return -EINVAL; | |
390 | ||
09bf14b9 AL |
391 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, |
392 | i << WM831X_DC1_HC_THR_SHIFT); | |
e4ee831f MB |
393 | } |
394 | ||
395 | static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev) | |
396 | { | |
397 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
398 | struct wm831x *wm831x = dcdc->wm831x; | |
399 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | |
400 | int val; | |
401 | ||
402 | val = wm831x_reg_read(wm831x, reg); | |
403 | if (val < 0) | |
404 | return val; | |
405 | ||
09bf14b9 AL |
406 | val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT; |
407 | return wm831x_dcdc_ilim[val]; | |
e4ee831f MB |
408 | } |
409 | ||
410 | static struct regulator_ops wm831x_buckv_ops = { | |
411 | .set_voltage = wm831x_buckv_set_voltage, | |
afb8bb80 | 412 | .get_voltage_sel = wm831x_buckv_get_voltage_sel, |
e4ee831f MB |
413 | .list_voltage = wm831x_buckv_list_voltage, |
414 | .set_suspend_voltage = wm831x_buckv_set_suspend_voltage, | |
415 | .set_current_limit = wm831x_buckv_set_current_limit, | |
416 | .get_current_limit = wm831x_buckv_get_current_limit, | |
417 | ||
418 | .is_enabled = wm831x_dcdc_is_enabled, | |
419 | .enable = wm831x_dcdc_enable, | |
420 | .disable = wm831x_dcdc_disable, | |
421 | .get_status = wm831x_dcdc_get_status, | |
422 | .get_mode = wm831x_dcdc_get_mode, | |
423 | .set_mode = wm831x_dcdc_set_mode, | |
424 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | |
425 | }; | |
426 | ||
e24a04c4 MB |
427 | /* |
428 | * Set up DVS control. We just log errors since we can still run | |
429 | * (with reduced performance) if we fail. | |
430 | */ | |
431 | static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc, | |
432 | struct wm831x_buckv_pdata *pdata) | |
433 | { | |
434 | struct wm831x *wm831x = dcdc->wm831x; | |
435 | int ret; | |
436 | u16 ctrl; | |
437 | ||
438 | if (!pdata || !pdata->dvs_gpio) | |
439 | return; | |
440 | ||
e24a04c4 MB |
441 | ret = gpio_request(pdata->dvs_gpio, "DCDC DVS"); |
442 | if (ret < 0) { | |
443 | dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n", | |
444 | dcdc->name, ret); | |
445 | return; | |
446 | } | |
447 | ||
448 | /* gpiolib won't let us read the GPIO status so pick the higher | |
449 | * of the two existing voltages so we take it as platform data. | |
450 | */ | |
451 | dcdc->dvs_gpio_state = pdata->dvs_init_state; | |
452 | ||
453 | ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state); | |
454 | if (ret < 0) { | |
455 | dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n", | |
456 | dcdc->name, ret); | |
457 | gpio_free(pdata->dvs_gpio); | |
458 | return; | |
459 | } | |
460 | ||
461 | dcdc->dvs_gpio = pdata->dvs_gpio; | |
b47ba9fd MB |
462 | |
463 | switch (pdata->dvs_control_src) { | |
464 | case 1: | |
465 | ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT; | |
466 | break; | |
467 | case 2: | |
468 | ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT; | |
469 | break; | |
470 | default: | |
471 | dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n", | |
472 | pdata->dvs_control_src, dcdc->name); | |
473 | return; | |
474 | } | |
475 | ||
c439b8f4 MB |
476 | /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL |
477 | * to make bootstrapping a bit smoother. | |
478 | */ | |
479 | if (!dcdc->dvs_vsel) { | |
480 | ret = wm831x_set_bits(wm831x, | |
481 | dcdc->base + WM831X_DCDC_DVS_CONTROL, | |
482 | WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel); | |
483 | if (ret == 0) | |
484 | dcdc->dvs_vsel = dcdc->on_vsel; | |
485 | else | |
486 | dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n", | |
487 | ret); | |
488 | } | |
489 | ||
b47ba9fd MB |
490 | ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL, |
491 | WM831X_DC1_DVS_SRC_MASK, ctrl); | |
492 | if (ret < 0) { | |
493 | dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n", | |
494 | dcdc->name, ret); | |
495 | } | |
e24a04c4 MB |
496 | } |
497 | ||
e4ee831f MB |
498 | static __devinit int wm831x_buckv_probe(struct platform_device *pdev) |
499 | { | |
500 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
501 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
c172708d | 502 | struct regulator_config config = { }; |
137a6354 | 503 | int id; |
e4ee831f MB |
504 | struct wm831x_dcdc *dcdc; |
505 | struct resource *res; | |
506 | int ret, irq; | |
507 | ||
137a6354 MB |
508 | if (pdata && pdata->wm831x_num) |
509 | id = (pdata->wm831x_num * 10) + 1; | |
510 | else | |
511 | id = 0; | |
512 | id = pdev->id - id; | |
513 | ||
e4ee831f MB |
514 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); |
515 | ||
516 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
517 | return -ENODEV; | |
518 | ||
fded2f4f MB |
519 | dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), |
520 | GFP_KERNEL); | |
e4ee831f MB |
521 | if (dcdc == NULL) { |
522 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
523 | return -ENOMEM; | |
524 | } | |
525 | ||
526 | dcdc->wm831x = wm831x; | |
527 | ||
528 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
529 | if (res == NULL) { | |
530 | dev_err(&pdev->dev, "No I/O resource\n"); | |
531 | ret = -EINVAL; | |
532 | goto err; | |
533 | } | |
534 | dcdc->base = res->start; | |
535 | ||
536 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
537 | dcdc->desc.name = dcdc->name; | |
82caa978 MB |
538 | |
539 | snprintf(dcdc->supply_name, sizeof(dcdc->supply_name), | |
540 | "DC%dVDD", id + 1); | |
541 | dcdc->desc.supply_name = dcdc->supply_name; | |
542 | ||
e4ee831f MB |
543 | dcdc->desc.id = id; |
544 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
545 | dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1; | |
546 | dcdc->desc.ops = &wm831x_buckv_ops; | |
547 | dcdc->desc.owner = THIS_MODULE; | |
548 | ||
e24a04c4 MB |
549 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG); |
550 | if (ret < 0) { | |
551 | dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret); | |
552 | goto err; | |
553 | } | |
554 | dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK; | |
555 | ||
a1b81dd3 | 556 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL); |
e24a04c4 MB |
557 | if (ret < 0) { |
558 | dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret); | |
559 | goto err; | |
560 | } | |
561 | dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK; | |
562 | ||
563 | if (pdata->dcdc[id]) | |
564 | wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data); | |
565 | ||
c172708d MB |
566 | config.dev = pdev->dev.parent; |
567 | config.init_data = pdata->dcdc[id]; | |
568 | config.driver_data = dcdc; | |
569 | ||
570 | dcdc->regulator = regulator_register(&dcdc->desc, &config); | |
e4ee831f MB |
571 | if (IS_ERR(dcdc->regulator)) { |
572 | ret = PTR_ERR(dcdc->regulator); | |
573 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
574 | id + 1, ret); | |
575 | goto err; | |
576 | } | |
577 | ||
578 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
579 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
580 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
581 | if (ret != 0) { |
582 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
583 | irq, ret); | |
584 | goto err_regulator; | |
585 | } | |
586 | ||
587 | irq = platform_get_irq_byname(pdev, "HC"); | |
dfda9c27 MB |
588 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq, |
589 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
590 | if (ret != 0) { |
591 | dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n", | |
592 | irq, ret); | |
593 | goto err_uv; | |
594 | } | |
595 | ||
596 | platform_set_drvdata(pdev, dcdc); | |
597 | ||
598 | return 0; | |
599 | ||
600 | err_uv: | |
dfda9c27 | 601 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
e4ee831f MB |
602 | err_regulator: |
603 | regulator_unregister(dcdc->regulator); | |
604 | err: | |
e24a04c4 MB |
605 | if (dcdc->dvs_gpio) |
606 | gpio_free(dcdc->dvs_gpio); | |
e4ee831f MB |
607 | return ret; |
608 | } | |
609 | ||
610 | static __devexit int wm831x_buckv_remove(struct platform_device *pdev) | |
611 | { | |
612 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
e4ee831f | 613 | |
eb66d565 DT |
614 | platform_set_drvdata(pdev, NULL); |
615 | ||
69952369 MB |
616 | free_irq(platform_get_irq_byname(pdev, "HC"), dcdc); |
617 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); | |
e4ee831f | 618 | regulator_unregister(dcdc->regulator); |
e24a04c4 MB |
619 | if (dcdc->dvs_gpio) |
620 | gpio_free(dcdc->dvs_gpio); | |
e4ee831f MB |
621 | |
622 | return 0; | |
623 | } | |
624 | ||
625 | static struct platform_driver wm831x_buckv_driver = { | |
626 | .probe = wm831x_buckv_probe, | |
627 | .remove = __devexit_p(wm831x_buckv_remove), | |
628 | .driver = { | |
629 | .name = "wm831x-buckv", | |
eb66d565 | 630 | .owner = THIS_MODULE, |
e4ee831f MB |
631 | }, |
632 | }; | |
633 | ||
634 | /* | |
635 | * BUCKP specifics | |
636 | */ | |
637 | ||
638 | static int wm831x_buckp_list_voltage(struct regulator_dev *rdev, | |
639 | unsigned selector) | |
640 | { | |
641 | if (selector <= WM831X_BUCKP_MAX_SELECTOR) | |
642 | return 850000 + (selector * 25000); | |
643 | else | |
644 | return -EINVAL; | |
645 | } | |
646 | ||
647 | static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg, | |
3a93f2a9 | 648 | int min_uV, int max_uV, int *selector) |
e4ee831f MB |
649 | { |
650 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
651 | struct wm831x *wm831x = dcdc->wm831x; | |
652 | u16 vsel; | |
653 | ||
654 | if (min_uV <= 34000000) | |
655 | vsel = (min_uV - 850000) / 25000; | |
656 | else | |
657 | return -EINVAL; | |
658 | ||
659 | if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV) | |
660 | return -EINVAL; | |
661 | ||
3a93f2a9 MB |
662 | *selector = vsel; |
663 | ||
e4ee831f MB |
664 | return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel); |
665 | } | |
666 | ||
667 | static int wm831x_buckp_set_voltage(struct regulator_dev *rdev, | |
3a93f2a9 MB |
668 | int min_uV, int max_uV, |
669 | unsigned *selector) | |
e4ee831f MB |
670 | { |
671 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
672 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
673 | ||
3a93f2a9 MB |
674 | return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV, |
675 | selector); | |
e4ee831f MB |
676 | } |
677 | ||
678 | static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, | |
679 | int uV) | |
680 | { | |
681 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
682 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | |
3a93f2a9 | 683 | unsigned selector; |
e4ee831f | 684 | |
3a93f2a9 | 685 | return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector); |
e4ee831f MB |
686 | } |
687 | ||
afb8bb80 | 688 | static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev) |
e4ee831f MB |
689 | { |
690 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
691 | struct wm831x *wm831x = dcdc->wm831x; | |
692 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
693 | int val; | |
694 | ||
695 | val = wm831x_reg_read(wm831x, reg); | |
696 | if (val < 0) | |
697 | return val; | |
698 | ||
afb8bb80 | 699 | return val & WM831X_DC3_ON_VSEL_MASK; |
e4ee831f MB |
700 | } |
701 | ||
702 | static struct regulator_ops wm831x_buckp_ops = { | |
703 | .set_voltage = wm831x_buckp_set_voltage, | |
afb8bb80 | 704 | .get_voltage_sel = wm831x_buckp_get_voltage_sel, |
e4ee831f MB |
705 | .list_voltage = wm831x_buckp_list_voltage, |
706 | .set_suspend_voltage = wm831x_buckp_set_suspend_voltage, | |
707 | ||
708 | .is_enabled = wm831x_dcdc_is_enabled, | |
709 | .enable = wm831x_dcdc_enable, | |
710 | .disable = wm831x_dcdc_disable, | |
711 | .get_status = wm831x_dcdc_get_status, | |
712 | .get_mode = wm831x_dcdc_get_mode, | |
713 | .set_mode = wm831x_dcdc_set_mode, | |
714 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | |
715 | }; | |
716 | ||
717 | static __devinit int wm831x_buckp_probe(struct platform_device *pdev) | |
718 | { | |
719 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
720 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
c172708d | 721 | struct regulator_config config = { }; |
137a6354 | 722 | int id; |
e4ee831f MB |
723 | struct wm831x_dcdc *dcdc; |
724 | struct resource *res; | |
725 | int ret, irq; | |
726 | ||
137a6354 MB |
727 | if (pdata && pdata->wm831x_num) |
728 | id = (pdata->wm831x_num * 10) + 1; | |
729 | else | |
730 | id = 0; | |
731 | id = pdev->id - id; | |
732 | ||
e4ee831f MB |
733 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); |
734 | ||
735 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
736 | return -ENODEV; | |
737 | ||
fded2f4f MB |
738 | dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), |
739 | GFP_KERNEL); | |
e4ee831f MB |
740 | if (dcdc == NULL) { |
741 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
742 | return -ENOMEM; | |
743 | } | |
744 | ||
745 | dcdc->wm831x = wm831x; | |
746 | ||
747 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
748 | if (res == NULL) { | |
749 | dev_err(&pdev->dev, "No I/O resource\n"); | |
750 | ret = -EINVAL; | |
751 | goto err; | |
752 | } | |
753 | dcdc->base = res->start; | |
754 | ||
755 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
756 | dcdc->desc.name = dcdc->name; | |
82caa978 MB |
757 | |
758 | snprintf(dcdc->supply_name, sizeof(dcdc->supply_name), | |
759 | "DC%dVDD", id + 1); | |
760 | dcdc->desc.supply_name = dcdc->supply_name; | |
761 | ||
e4ee831f MB |
762 | dcdc->desc.id = id; |
763 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
764 | dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1; | |
765 | dcdc->desc.ops = &wm831x_buckp_ops; | |
766 | dcdc->desc.owner = THIS_MODULE; | |
767 | ||
c172708d MB |
768 | config.dev = pdev->dev.parent; |
769 | config.init_data = pdata->dcdc[id]; | |
770 | config.driver_data = dcdc; | |
771 | ||
772 | dcdc->regulator = regulator_register(&dcdc->desc, &config); | |
e4ee831f MB |
773 | if (IS_ERR(dcdc->regulator)) { |
774 | ret = PTR_ERR(dcdc->regulator); | |
775 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
776 | id + 1, ret); | |
777 | goto err; | |
778 | } | |
779 | ||
780 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
781 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
782 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
783 | if (ret != 0) { |
784 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
785 | irq, ret); | |
786 | goto err_regulator; | |
787 | } | |
788 | ||
789 | platform_set_drvdata(pdev, dcdc); | |
790 | ||
791 | return 0; | |
792 | ||
793 | err_regulator: | |
794 | regulator_unregister(dcdc->regulator); | |
795 | err: | |
e4ee831f MB |
796 | return ret; |
797 | } | |
798 | ||
799 | static __devexit int wm831x_buckp_remove(struct platform_device *pdev) | |
800 | { | |
801 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
e4ee831f | 802 | |
eb66d565 DT |
803 | platform_set_drvdata(pdev, NULL); |
804 | ||
69952369 | 805 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
e4ee831f | 806 | regulator_unregister(dcdc->regulator); |
e4ee831f MB |
807 | |
808 | return 0; | |
809 | } | |
810 | ||
811 | static struct platform_driver wm831x_buckp_driver = { | |
812 | .probe = wm831x_buckp_probe, | |
813 | .remove = __devexit_p(wm831x_buckp_remove), | |
814 | .driver = { | |
815 | .name = "wm831x-buckp", | |
eb66d565 | 816 | .owner = THIS_MODULE, |
e4ee831f MB |
817 | }, |
818 | }; | |
819 | ||
1304850d MB |
820 | /* |
821 | * DCDC boost convertors | |
822 | */ | |
823 | ||
824 | static int wm831x_boostp_get_status(struct regulator_dev *rdev) | |
825 | { | |
826 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
827 | struct wm831x *wm831x = dcdc->wm831x; | |
828 | int ret; | |
829 | ||
830 | /* First, check for errors */ | |
831 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | |
832 | if (ret < 0) | |
833 | return ret; | |
834 | ||
835 | if (ret & (1 << rdev_get_id(rdev))) { | |
836 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | |
837 | rdev_get_id(rdev) + 1); | |
838 | return REGULATOR_STATUS_ERROR; | |
839 | } | |
840 | ||
841 | /* Is the regulator on? */ | |
842 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | |
843 | if (ret < 0) | |
844 | return ret; | |
845 | if (ret & (1 << rdev_get_id(rdev))) | |
846 | return REGULATOR_STATUS_ON; | |
847 | else | |
848 | return REGULATOR_STATUS_OFF; | |
849 | } | |
850 | ||
851 | static struct regulator_ops wm831x_boostp_ops = { | |
852 | .get_status = wm831x_boostp_get_status, | |
853 | ||
854 | .is_enabled = wm831x_dcdc_is_enabled, | |
855 | .enable = wm831x_dcdc_enable, | |
856 | .disable = wm831x_dcdc_disable, | |
857 | }; | |
858 | ||
859 | static __devinit int wm831x_boostp_probe(struct platform_device *pdev) | |
860 | { | |
861 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
862 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
c172708d | 863 | struct regulator_config config = { }; |
1304850d MB |
864 | int id = pdev->id % ARRAY_SIZE(pdata->dcdc); |
865 | struct wm831x_dcdc *dcdc; | |
866 | struct resource *res; | |
867 | int ret, irq; | |
868 | ||
869 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); | |
870 | ||
871 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
872 | return -ENODEV; | |
873 | ||
4c60165d | 874 | dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL); |
1304850d MB |
875 | if (dcdc == NULL) { |
876 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
877 | return -ENOMEM; | |
878 | } | |
879 | ||
880 | dcdc->wm831x = wm831x; | |
881 | ||
882 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
883 | if (res == NULL) { | |
884 | dev_err(&pdev->dev, "No I/O resource\n"); | |
885 | ret = -EINVAL; | |
886 | goto err; | |
887 | } | |
888 | dcdc->base = res->start; | |
889 | ||
890 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
891 | dcdc->desc.name = dcdc->name; | |
892 | dcdc->desc.id = id; | |
893 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
894 | dcdc->desc.ops = &wm831x_boostp_ops; | |
895 | dcdc->desc.owner = THIS_MODULE; | |
896 | ||
c172708d MB |
897 | config.dev = pdev->dev.parent; |
898 | config.init_data = pdata->dcdc[id]; | |
899 | config.driver_data = dcdc; | |
900 | ||
901 | dcdc->regulator = regulator_register(&dcdc->desc, &config); | |
1304850d MB |
902 | if (IS_ERR(dcdc->regulator)) { |
903 | ret = PTR_ERR(dcdc->regulator); | |
904 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
905 | id + 1, ret); | |
906 | goto err; | |
907 | } | |
908 | ||
909 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
910 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
911 | IRQF_TRIGGER_RISING, dcdc->name, | |
912 | dcdc); | |
1304850d MB |
913 | if (ret != 0) { |
914 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
915 | irq, ret); | |
916 | goto err_regulator; | |
917 | } | |
918 | ||
919 | platform_set_drvdata(pdev, dcdc); | |
920 | ||
921 | return 0; | |
922 | ||
923 | err_regulator: | |
924 | regulator_unregister(dcdc->regulator); | |
925 | err: | |
1304850d MB |
926 | return ret; |
927 | } | |
928 | ||
929 | static __devexit int wm831x_boostp_remove(struct platform_device *pdev) | |
930 | { | |
931 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
1304850d | 932 | |
eb66d565 DT |
933 | platform_set_drvdata(pdev, NULL); |
934 | ||
dfda9c27 | 935 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
1304850d | 936 | regulator_unregister(dcdc->regulator); |
1304850d MB |
937 | |
938 | return 0; | |
939 | } | |
940 | ||
941 | static struct platform_driver wm831x_boostp_driver = { | |
942 | .probe = wm831x_boostp_probe, | |
943 | .remove = __devexit_p(wm831x_boostp_remove), | |
944 | .driver = { | |
945 | .name = "wm831x-boostp", | |
eb66d565 | 946 | .owner = THIS_MODULE, |
1304850d MB |
947 | }, |
948 | }; | |
949 | ||
8267a9ba MB |
950 | /* |
951 | * External Power Enable | |
952 | * | |
953 | * These aren't actually DCDCs but look like them in hardware so share | |
954 | * code. | |
955 | */ | |
956 | ||
957 | #define WM831X_EPE_BASE 6 | |
958 | ||
959 | static struct regulator_ops wm831x_epe_ops = { | |
960 | .is_enabled = wm831x_dcdc_is_enabled, | |
961 | .enable = wm831x_dcdc_enable, | |
962 | .disable = wm831x_dcdc_disable, | |
963 | .get_status = wm831x_dcdc_get_status, | |
964 | }; | |
965 | ||
966 | static __devinit int wm831x_epe_probe(struct platform_device *pdev) | |
967 | { | |
968 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
969 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
c172708d | 970 | struct regulator_config config = { }; |
8267a9ba MB |
971 | int id = pdev->id % ARRAY_SIZE(pdata->epe); |
972 | struct wm831x_dcdc *dcdc; | |
973 | int ret; | |
974 | ||
975 | dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1); | |
976 | ||
977 | if (pdata == NULL || pdata->epe[id] == NULL) | |
978 | return -ENODEV; | |
979 | ||
4c60165d | 980 | dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL); |
8267a9ba MB |
981 | if (dcdc == NULL) { |
982 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
983 | return -ENOMEM; | |
984 | } | |
985 | ||
986 | dcdc->wm831x = wm831x; | |
987 | ||
988 | /* For current parts this is correct; probably need to revisit | |
989 | * in future. | |
990 | */ | |
991 | snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1); | |
992 | dcdc->desc.name = dcdc->name; | |
993 | dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */ | |
994 | dcdc->desc.ops = &wm831x_epe_ops; | |
995 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
996 | dcdc->desc.owner = THIS_MODULE; | |
997 | ||
c172708d MB |
998 | config.dev = pdev->dev.parent; |
999 | config.init_data = pdata->epe[id]; | |
1000 | config.driver_data = dcdc; | |
1001 | ||
1002 | dcdc->regulator = regulator_register(&dcdc->desc, &config); | |
8267a9ba MB |
1003 | if (IS_ERR(dcdc->regulator)) { |
1004 | ret = PTR_ERR(dcdc->regulator); | |
1005 | dev_err(wm831x->dev, "Failed to register EPE%d: %d\n", | |
1006 | id + 1, ret); | |
1007 | goto err; | |
1008 | } | |
1009 | ||
1010 | platform_set_drvdata(pdev, dcdc); | |
1011 | ||
1012 | return 0; | |
1013 | ||
1014 | err: | |
8267a9ba MB |
1015 | return ret; |
1016 | } | |
1017 | ||
1018 | static __devexit int wm831x_epe_remove(struct platform_device *pdev) | |
1019 | { | |
1020 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
1021 | ||
eb66d565 | 1022 | platform_set_drvdata(pdev, NULL); |
8267a9ba | 1023 | regulator_unregister(dcdc->regulator); |
8267a9ba MB |
1024 | |
1025 | return 0; | |
1026 | } | |
1027 | ||
1028 | static struct platform_driver wm831x_epe_driver = { | |
1029 | .probe = wm831x_epe_probe, | |
1030 | .remove = __devexit_p(wm831x_epe_remove), | |
1031 | .driver = { | |
1032 | .name = "wm831x-epe", | |
eb66d565 | 1033 | .owner = THIS_MODULE, |
8267a9ba MB |
1034 | }, |
1035 | }; | |
1036 | ||
e4ee831f MB |
1037 | static int __init wm831x_dcdc_init(void) |
1038 | { | |
1039 | int ret; | |
1040 | ret = platform_driver_register(&wm831x_buckv_driver); | |
1041 | if (ret != 0) | |
1042 | pr_err("Failed to register WM831x BUCKV driver: %d\n", ret); | |
1043 | ||
1044 | ret = platform_driver_register(&wm831x_buckp_driver); | |
1045 | if (ret != 0) | |
1046 | pr_err("Failed to register WM831x BUCKP driver: %d\n", ret); | |
1047 | ||
1304850d MB |
1048 | ret = platform_driver_register(&wm831x_boostp_driver); |
1049 | if (ret != 0) | |
1050 | pr_err("Failed to register WM831x BOOST driver: %d\n", ret); | |
1051 | ||
8267a9ba MB |
1052 | ret = platform_driver_register(&wm831x_epe_driver); |
1053 | if (ret != 0) | |
1054 | pr_err("Failed to register WM831x EPE driver: %d\n", ret); | |
1055 | ||
e4ee831f MB |
1056 | return 0; |
1057 | } | |
1058 | subsys_initcall(wm831x_dcdc_init); | |
1059 | ||
1060 | static void __exit wm831x_dcdc_exit(void) | |
1061 | { | |
8267a9ba | 1062 | platform_driver_unregister(&wm831x_epe_driver); |
1304850d | 1063 | platform_driver_unregister(&wm831x_boostp_driver); |
e4ee831f MB |
1064 | platform_driver_unregister(&wm831x_buckp_driver); |
1065 | platform_driver_unregister(&wm831x_buckv_driver); | |
1066 | } | |
1067 | module_exit(wm831x_dcdc_exit); | |
1068 | ||
1069 | /* Module information */ | |
1070 | MODULE_AUTHOR("Mark Brown"); | |
1071 | MODULE_DESCRIPTION("WM831x DC-DC convertor driver"); | |
1072 | MODULE_LICENSE("GPL"); | |
1073 | MODULE_ALIAS("platform:wm831x-buckv"); | |
1074 | MODULE_ALIAS("platform:wm831x-buckp"); | |
24b43150 | 1075 | MODULE_ALIAS("platform:wm831x-epe"); |