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[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
e4ee831f
MB		 1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
e24a04c4
MB		 22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
5a0e3ad6 24#include <linux/slab.h>
e4ee831f
MB		 25
26#include <linux/mfd/wm831x/core.h>
27#include <linux/mfd/wm831x/regulator.h>
28#include <linux/mfd/wm831x/pdata.h>
29
30#define WM831X_BUCKV_MAX_SELECTOR 0x68
31#define WM831X_BUCKP_MAX_SELECTOR 0x66
32
33#define WM831X_DCDC_MODE_FAST 0
34#define WM831X_DCDC_MODE_NORMAL 1
35#define WM831X_DCDC_MODE_IDLE 2
36#define WM831X_DCDC_MODE_STANDBY 3
37
82caa978 38#define WM831X_DCDC_MAX_NAME 9
e4ee831f
MB		 39
40/* Register offsets in control block */
41#define WM831X_DCDC_CONTROL_1 0
42#define WM831X_DCDC_CONTROL_2 1
43#define WM831X_DCDC_ON_CONFIG 2
44#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 45#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 46
47/*
48 * Shared
49 */
50
51struct wm831x_dcdc {
52 char name[WM831X_DCDC_MAX_NAME];
82caa978 53 char supply_name[WM831X_DCDC_MAX_NAME];
e4ee831f
MB		 54 struct regulator_desc desc;
55 int base;
56 struct wm831x *wm831x;
57 struct regulator_dev *regulator;
e24a04c4
MB		 58 int dvs_gpio;
59 int dvs_gpio_state;
60 int on_vsel;
61 int dvs_vsel;
e4ee831f
MB		 62};
63
e4ee831f
MB		 64static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
65
66{
67 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
68 struct wm831x *wm831x = dcdc->wm831x;
69 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
70 int val;
71
72 val = wm831x_reg_read(wm831x, reg);
73 if (val < 0)
74 return val;
75
76 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
77
78 switch (val) {
79 case WM831X_DCDC_MODE_FAST:
80 return REGULATOR_MODE_FAST;
81 case WM831X_DCDC_MODE_NORMAL:
82 return REGULATOR_MODE_NORMAL;
83 case WM831X_DCDC_MODE_STANDBY:
84 return REGULATOR_MODE_STANDBY;
85 case WM831X_DCDC_MODE_IDLE:
86 return REGULATOR_MODE_IDLE;
87 default:
88 BUG();
9ee291a4 89 return -EINVAL;
e4ee831f
MB		 90 }
91}
92
93static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
94 unsigned int mode)
95{
96 int val;
97
98 switch (mode) {
99 case REGULATOR_MODE_FAST:
100 val = WM831X_DCDC_MODE_FAST;
101 break;
102 case REGULATOR_MODE_NORMAL:
103 val = WM831X_DCDC_MODE_NORMAL;
104 break;
105 case REGULATOR_MODE_STANDBY:
106 val = WM831X_DCDC_MODE_STANDBY;
107 break;
108 case REGULATOR_MODE_IDLE:
109 val = WM831X_DCDC_MODE_IDLE;
110 break;
111 default:
112 return -EINVAL;
113 }
114
115 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
116 val << WM831X_DC1_ON_MODE_SHIFT);
117}
118
119static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
120{
121 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
122 struct wm831x *wm831x = dcdc->wm831x;
123 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
124
125 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
126}
127
128static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
129 unsigned int mode)
130{
131 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
132 struct wm831x *wm831x = dcdc->wm831x;
133 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
134
135 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
136}
137
138static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
139{
140 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
141 struct wm831x *wm831x = dcdc->wm831x;
142 int ret;
143
144 /* First, check for errors */
145 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
146 if (ret < 0)
147 return ret;
148
149 if (ret & (1 << rdev_get_id(rdev))) {
150 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
151 rdev_get_id(rdev) + 1);
152 return REGULATOR_STATUS_ERROR;
153 }
154
155 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
156 if (rdev_get_id(rdev) < 2) {
157 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
158 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
159 rdev_get_id(rdev) + 1);
160 return REGULATOR_STATUS_ERROR;
161 }
162
163 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
164 dev_dbg(wm831x->dev, "DCDC%d over current\n",
165 rdev_get_id(rdev) + 1);
166 return REGULATOR_STATUS_ERROR;
167 }
168 }
169
170 /* Is the regulator on? */
171 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
172 if (ret < 0)
173 return ret;
174 if (!(ret & (1 << rdev_get_id(rdev))))
175 return REGULATOR_STATUS_OFF;
176
177 /* TODO: When we handle hardware control modes so we can report the
178 * current mode. */
179 return REGULATOR_STATUS_ON;
180}
181
182static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
183{
184 struct wm831x_dcdc *dcdc = data;
185
186 regulator_notifier_call_chain(dcdc->regulator,
187 REGULATOR_EVENT_UNDER_VOLTAGE,
188 NULL);
189
190 return IRQ_HANDLED;
191}
192
193static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
194{
195 struct wm831x_dcdc *dcdc = data;
196
197 regulator_notifier_call_chain(dcdc->regulator,
198 REGULATOR_EVENT_OVER_CURRENT,
199 NULL);
200
201 return IRQ_HANDLED;
202}
203
204/*
205 * BUCKV specifics
206 */
207
208static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
209 unsigned selector)
210{
211 if (selector <= 0x8)
212 return 600000;
213 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
214 return 600000 + ((selector - 0x8) * 12500);
215 return -EINVAL;
216}
217
b5fb77e0
AL		 218static int wm831x_buckv_map_voltage(struct regulator_dev *rdev,
219 int min_uV, int max_uV)
e4ee831f 220{
e4ee831f
MB		 221 u16 vsel;
222
223 if (min_uV < 600000)
224 vsel = 0;
225 else if (min_uV <= 1800000)
1a679930 226 vsel = DIV_ROUND_UP(min_uV - 600000, 12500) + 8;
e4ee831f
MB		 227 else
228 return -EINVAL;
229
230 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
231 return -EINVAL;
232
e24a04c4
MB		 233 return vsel;
234}
235
e24a04c4
MB		 236static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
237{
238 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
239
240 if (state == dcdc->dvs_gpio_state)
241 return 0;
242
243 dcdc->dvs_gpio_state = state;
244 gpio_set_value(dcdc->dvs_gpio, state);
245
246 /* Should wait for DVS state change to be asserted if we have
247 * a GPIO for it, for now assume the device is configured
248 * for the fastest possible transition.
249 */
250
251 return 0;
e4ee831f
MB		 252}
253
b5fb77e0
AL		 254static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
255 unsigned vsel)
e4ee831f
MB		 256{
257 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 258 struct wm831x *wm831x = dcdc->wm831x;
259 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
260 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
b5fb77e0 261 int ret;
3a93f2a9 262
e24a04c4
MB		 263 /* If this value is already set then do a GPIO update if we can */
264 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
265 return wm831x_buckv_set_dvs(rdev, 0);
266
267 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
268 return wm831x_buckv_set_dvs(rdev, 1);
269
270 /* Always set the ON status to the minimum voltage */
271 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
272 if (ret < 0)
273 return ret;
274 dcdc->on_vsel = vsel;
275
276 if (!dcdc->dvs_gpio)
277 return ret;
278
279 /* Kick the voltage transition now */
280 ret = wm831x_buckv_set_dvs(rdev, 0);
281 if (ret < 0)
282 return ret;
283
88cda60e
MB		 284 /*
285 * If this VSEL is higher than the last one we've seen then
286 * remember it as the DVS VSEL. This is optimised for CPUfreq
287 * usage where we want to get to the highest voltage very
288 * quickly.
289 */
290 if (vsel > dcdc->dvs_vsel) {
291 ret = wm831x_set_bits(wm831x, dvs_reg,
292 WM831X_DC1_DVS_VSEL_MASK,
13ae633c 293 vsel);
88cda60e
MB		 294 if (ret == 0)
295 dcdc->dvs_vsel = vsel;
296 else
297 dev_warn(wm831x->dev,
298 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 299 }
300
e24a04c4 301 return 0;
e4ee831f
MB		 302}
303
304static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 305 int uV)
e4ee831f
MB		 306{
307 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 308 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 309 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 310 int vsel;
311
b5fb77e0 312 vsel = wm831x_buckv_map_voltage(rdev, uV, uV);
e24a04c4
MB		 313 if (vsel < 0)
314 return vsel;
e4ee831f 315
e24a04c4 316 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 317}
318
afb8bb80 319static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 320{
321 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 322
e24a04c4 323 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 324 return dcdc->dvs_vsel;
e24a04c4 325 else
afb8bb80 326 return dcdc->on_vsel;
e4ee831f
MB		 327}
328
329/* Current limit options */
330static u16 wm831x_dcdc_ilim[] = {
331 125, 250, 375, 500, 625, 750, 875, 1000
332};
333
334static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
335 int min_uA, int max_uA)
336{
337 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
338 struct wm831x *wm831x = dcdc->wm831x;
339 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
340 int i;
341
422294de 342 for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
a171e782
AL		 343 if ((min_uA <= wm831x_dcdc_ilim[i]) &&
344 (wm831x_dcdc_ilim[i] <= max_uA))
422294de
AL		 345 return wm831x_set_bits(wm831x, reg,
346 WM831X_DC1_HC_THR_MASK,
347 i << WM831X_DC1_HC_THR_SHIFT);
e4ee831f 348 }
e4ee831f 349
422294de 350 return -EINVAL;
e4ee831f
MB		 351}
352
353static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
354{
355 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
356 struct wm831x *wm831x = dcdc->wm831x;
357 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
358 int val;
359
360 val = wm831x_reg_read(wm831x, reg);
361 if (val < 0)
362 return val;
363
09bf14b9
AL		 364 val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
365 return wm831x_dcdc_ilim[val];
e4ee831f
MB		 366}
367
368static struct regulator_ops wm831x_buckv_ops = {
b5fb77e0 369 .set_voltage_sel = wm831x_buckv_set_voltage_sel,
afb8bb80 370 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
e4ee831f 371 .list_voltage = wm831x_buckv_list_voltage,
b5fb77e0 372 .map_voltage = wm831x_buckv_map_voltage,
e4ee831f
MB		 373 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
374 .set_current_limit = wm831x_buckv_set_current_limit,
375 .get_current_limit = wm831x_buckv_get_current_limit,
376
3d138fcc
MB		 377 .is_enabled = regulator_is_enabled_regmap,
378 .enable = regulator_enable_regmap,
379 .disable = regulator_disable_regmap,
e4ee831f
MB		 380 .get_status = wm831x_dcdc_get_status,
381 .get_mode = wm831x_dcdc_get_mode,
382 .set_mode = wm831x_dcdc_set_mode,
383 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
384};
385
e24a04c4
MB		 386/*
387 * Set up DVS control. We just log errors since we can still run
388 * (with reduced performance) if we fail.
389 */
a5023574 390static void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
e24a04c4
MB		 391 struct wm831x_buckv_pdata *pdata)
392{
393 struct wm831x *wm831x = dcdc->wm831x;
394 int ret;
395 u16 ctrl;
396
397 if (!pdata || !pdata->dvs_gpio)
398 return;
399
e24a04c4
MB		 400 /* gpiolib won't let us read the GPIO status so pick the higher
401 * of the two existing voltages so we take it as platform data.
402 */
403 dcdc->dvs_gpio_state = pdata->dvs_init_state;
404
053fa1b7
MB		 405 ret = gpio_request_one(pdata->dvs_gpio,
406 dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
407 "DCDC DVS");
e24a04c4 408 if (ret < 0) {
053fa1b7 409 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
e24a04c4 410 dcdc->name, ret);
e24a04c4
MB		 411 return;
412 }
413
414 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
MB		 415
416 switch (pdata->dvs_control_src) {
417 case 1:
418 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
419 break;
420 case 2:
421 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
422 break;
423 default:
424 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
425 pdata->dvs_control_src, dcdc->name);
426 return;
427 }
428
c439b8f4
MB		 429 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
430 * to make bootstrapping a bit smoother.
431 */
432 if (!dcdc->dvs_vsel) {
433 ret = wm831x_set_bits(wm831x,
434 dcdc->base + WM831X_DCDC_DVS_CONTROL,
435 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
436 if (ret == 0)
437 dcdc->dvs_vsel = dcdc->on_vsel;
438 else
439 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
440 ret);
441 }
442
b47ba9fd
MB		 443 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
444 WM831X_DC1_DVS_SRC_MASK, ctrl);
445 if (ret < 0) {
446 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
447 dcdc->name, ret);
448 }
e24a04c4
MB		 449}
450
a5023574 451static int wm831x_buckv_probe(struct platform_device *pdev)
e4ee831f
MB		 452{
453 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
454 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 455 struct regulator_config config = { };
137a6354 456 int id;
e4ee831f
MB		 457 struct wm831x_dcdc *dcdc;
458 struct resource *res;
459 int ret, irq;
460
137a6354
MB		 461 if (pdata && pdata->wm831x_num)
462 id = (pdata->wm831x_num * 10) + 1;
463 else
464 id = 0;
465 id = pdev->id - id;
466
e4ee831f
MB		 467 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
468
fded2f4f
MB		 469 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
470 GFP_KERNEL);
e4ee831f
MB		 471 if (dcdc == NULL) {
472 dev_err(&pdev->dev, "Unable to allocate private data\n");
473 return -ENOMEM;
474 }
475
476 dcdc->wm831x = wm831x;
477
5656098e 478 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 479 if (res == NULL) {
5656098e 480 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 481 ret = -EINVAL;
482 goto err;
483 }
484 dcdc->base = res->start;
485
486 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
487 dcdc->desc.name = dcdc->name;
82caa978
MB		 488
489 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
490 "DC%dVDD", id + 1);
491 dcdc->desc.supply_name = dcdc->supply_name;
492
e4ee831f
MB		 493 dcdc->desc.id = id;
494 dcdc->desc.type = REGULATOR_VOLTAGE;
495 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
496 dcdc->desc.ops = &wm831x_buckv_ops;
497 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 498 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
499 dcdc->desc.enable_mask = 1 << id;
e4ee831f 500
e24a04c4
MB		 501 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
502 if (ret < 0) {
503 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
504 goto err;
505 }
506 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
507
a1b81dd3 508 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 509 if (ret < 0) {
510 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
511 goto err;
512 }
513 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
514
f0b067d9 515 if (pdata && pdata->dcdc[id])
e24a04c4
MB		 516 wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
517
c172708d 518 config.dev = pdev->dev.parent;
b7ca8788
MB		 519 if (pdata)
520 config.init_data = pdata->dcdc[id];
c172708d 521 config.driver_data = dcdc;
3d138fcc 522 config.regmap = wm831x->regmap;
c172708d
MB		 523
524 dcdc->regulator = regulator_register(&dcdc->desc, &config);
e4ee831f
MB		 525 if (IS_ERR(dcdc->regulator)) {
526 ret = PTR_ERR(dcdc->regulator);
527 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
528 id + 1, ret);
529 goto err;
530 }
531
cd99758b 532 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
dfda9c27
MB		 533 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
534 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 535 if (ret != 0) {
536 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
537 irq, ret);
538 goto err_regulator;
539 }
540
cd99758b 541 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
dfda9c27
MB		 542 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq,
543 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 544 if (ret != 0) {
545 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
546 irq, ret);
547 goto err_uv;
548 }
549
550 platform_set_drvdata(pdev, dcdc);
551
552 return 0;
553
554err_uv:
cd99758b
MB		 555 free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),
556 dcdc);
e4ee831f
MB		 557err_regulator:
558 regulator_unregister(dcdc->regulator);
559err:
e24a04c4
MB		 560 if (dcdc->dvs_gpio)
561 gpio_free(dcdc->dvs_gpio);
e4ee831f
MB		 562 return ret;
563}
564
8dc995f5 565static int wm831x_buckv_remove(struct platform_device *pdev)
e4ee831f
MB		 566{
567 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
cd99758b 568 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 569
eb66d565
DT		 570 platform_set_drvdata(pdev, NULL);
571
cd99758b
MB		 572 free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC")),
573 dcdc);
574 free_irq(wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV")),
575 dcdc);
e4ee831f 576 regulator_unregister(dcdc->regulator);
e24a04c4
MB		 577 if (dcdc->dvs_gpio)
578 gpio_free(dcdc->dvs_gpio);
e4ee831f
MB		 579
580 return 0;
581}
582
583static struct platform_driver wm831x_buckv_driver = {
584 .probe = wm831x_buckv_probe,
5eb9f2b9 585 .remove = wm831x_buckv_remove,
e4ee831f
MB		 586 .driver = {
587 .name = "wm831x-buckv",
eb66d565 588 .owner = THIS_MODULE,
e4ee831f
MB		 589 },
590};
591
592/*
593 * BUCKP specifics
594 */
595
d580cb5e 596static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
e4ee831f
MB		 597{
598 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
599 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 600 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
d580cb5e
AL		 601 int sel;
602
603 sel = regulator_map_voltage_linear(rdev, uV, uV);
604 if (sel < 0)
605 return sel;
e4ee831f 606
d580cb5e 607 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
e4ee831f
MB		 608}
609
e4ee831f 610static struct regulator_ops wm831x_buckp_ops = {
d580cb5e 611 .set_voltage_sel = regulator_set_voltage_sel_regmap,
817436e7 612 .get_voltage_sel = regulator_get_voltage_sel_regmap,
c70ad9dc 613 .list_voltage = regulator_list_voltage_linear,
d580cb5e 614 .map_voltage = regulator_map_voltage_linear,
e4ee831f
MB		 615 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
616
3d138fcc
MB		 617 .is_enabled = regulator_is_enabled_regmap,
618 .enable = regulator_enable_regmap,
619 .disable = regulator_disable_regmap,
e4ee831f
MB		 620 .get_status = wm831x_dcdc_get_status,
621 .get_mode = wm831x_dcdc_get_mode,
622 .set_mode = wm831x_dcdc_set_mode,
623 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
624};
625
a5023574 626static int wm831x_buckp_probe(struct platform_device *pdev)
e4ee831f
MB		 627{
628 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
629 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 630 struct regulator_config config = { };
137a6354 631 int id;
e4ee831f
MB		 632 struct wm831x_dcdc *dcdc;
633 struct resource *res;
634 int ret, irq;
635
137a6354
MB		 636 if (pdata && pdata->wm831x_num)
637 id = (pdata->wm831x_num * 10) + 1;
638 else
639 id = 0;
640 id = pdev->id - id;
641
e4ee831f
MB		 642 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
643
fded2f4f
MB		 644 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
645 GFP_KERNEL);
e4ee831f
MB		 646 if (dcdc == NULL) {
647 dev_err(&pdev->dev, "Unable to allocate private data\n");
648 return -ENOMEM;
649 }
650
651 dcdc->wm831x = wm831x;
652
5656098e 653 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 654 if (res == NULL) {
5656098e 655 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 656 ret = -EINVAL;
657 goto err;
658 }
659 dcdc->base = res->start;
660
661 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
662 dcdc->desc.name = dcdc->name;
82caa978
MB		 663
664 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
665 "DC%dVDD", id + 1);
666 dcdc->desc.supply_name = dcdc->supply_name;
667
e4ee831f
MB		 668 dcdc->desc.id = id;
669 dcdc->desc.type = REGULATOR_VOLTAGE;
670 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
671 dcdc->desc.ops = &wm831x_buckp_ops;
672 dcdc->desc.owner = THIS_MODULE;
817436e7
MB		 673 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
674 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
3d138fcc
MB		 675 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
676 dcdc->desc.enable_mask = 1 << id;
c70ad9dc
AL		 677 dcdc->desc.min_uV = 850000;
678 dcdc->desc.uV_step = 25000;
e4ee831f 679
c172708d 680 config.dev = pdev->dev.parent;
b7ca8788
MB		 681 if (pdata)
682 config.init_data = pdata->dcdc[id];
c172708d 683 config.driver_data = dcdc;
817436e7 684 config.regmap = wm831x->regmap;
c172708d
MB		 685
686 dcdc->regulator = regulator_register(&dcdc->desc, &config);
e4ee831f
MB		 687 if (IS_ERR(dcdc->regulator)) {
688 ret = PTR_ERR(dcdc->regulator);
689 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
690 id + 1, ret);
691 goto err;
692 }
693
cd99758b 694 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
dfda9c27
MB		 695 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
696 IRQF_TRIGGER_RISING, dcdc->name, dcdc);
e4ee831f
MB		 697 if (ret != 0) {
698 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
699 irq, ret);
700 goto err_regulator;
701 }
702
703 platform_set_drvdata(pdev, dcdc);
704
705 return 0;
706
707err_regulator:
708 regulator_unregister(dcdc->regulator);
709err:
e4ee831f
MB		 710 return ret;
711}
712
8dc995f5 713static int wm831x_buckp_remove(struct platform_device *pdev)
e4ee831f
MB		 714{
715 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
e4ee831f 716
eb66d565
DT		 717 platform_set_drvdata(pdev, NULL);
718
cd99758b
MB		 719 free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")),
720 dcdc);
e4ee831f 721 regulator_unregister(dcdc->regulator);
e4ee831f
MB		 722
723 return 0;
724}
725
726static struct platform_driver wm831x_buckp_driver = {
727 .probe = wm831x_buckp_probe,
5eb9f2b9 728 .remove = wm831x_buckp_remove,
e4ee831f
MB		 729 .driver = {
730 .name = "wm831x-buckp",
eb66d565 731 .owner = THIS_MODULE,
e4ee831f
MB		 732 },
733};
734
1304850d
MB		 735/*
736 * DCDC boost convertors
737 */
738
739static int wm831x_boostp_get_status(struct regulator_dev *rdev)
740{
741 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
742 struct wm831x *wm831x = dcdc->wm831x;
743 int ret;
744
745 /* First, check for errors */
746 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
747 if (ret < 0)
748 return ret;
749
750 if (ret & (1 << rdev_get_id(rdev))) {
751 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
752 rdev_get_id(rdev) + 1);
753 return REGULATOR_STATUS_ERROR;
754 }
755
756 /* Is the regulator on? */
757 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
758 if (ret < 0)
759 return ret;
760 if (ret & (1 << rdev_get_id(rdev)))
761 return REGULATOR_STATUS_ON;
762 else
763 return REGULATOR_STATUS_OFF;
764}
765
766static struct regulator_ops wm831x_boostp_ops = {
767 .get_status = wm831x_boostp_get_status,
768
3d138fcc
MB		 769 .is_enabled = regulator_is_enabled_regmap,
770 .enable = regulator_enable_regmap,
771 .disable = regulator_disable_regmap,
1304850d
MB		 772};
773
a5023574 774static int wm831x_boostp_probe(struct platform_device *pdev)
1304850d
MB		 775{
776 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
777 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 778 struct regulator_config config = { };
1304850d
MB		 779 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
780 struct wm831x_dcdc *dcdc;
781 struct resource *res;
782 int ret, irq;
783
784 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
785
786 if (pdata == NULL || pdata->dcdc[id] == NULL)
787 return -ENODEV;
788
4c60165d 789 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
1304850d
MB		 790 if (dcdc == NULL) {
791 dev_err(&pdev->dev, "Unable to allocate private data\n");
792 return -ENOMEM;
793 }
794
795 dcdc->wm831x = wm831x;
796
5656098e 797 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
1304850d 798 if (res == NULL) {
5656098e 799 dev_err(&pdev->dev, "No REG resource\n");
1304850d
MB		 800 ret = -EINVAL;
801 goto err;
802 }
803 dcdc->base = res->start;
804
805 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
806 dcdc->desc.name = dcdc->name;
807 dcdc->desc.id = id;
808 dcdc->desc.type = REGULATOR_VOLTAGE;
809 dcdc->desc.ops = &wm831x_boostp_ops;
810 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 811 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
812 dcdc->desc.enable_mask = 1 << id;
1304850d 813
c172708d 814 config.dev = pdev->dev.parent;
f0b067d9
MB		 815 if (pdata)
816 config.init_data = pdata->dcdc[id];
c172708d 817 config.driver_data = dcdc;
3d138fcc 818 config.regmap = wm831x->regmap;
c172708d
MB		 819
820 dcdc->regulator = regulator_register(&dcdc->desc, &config);
1304850d
MB		 821 if (IS_ERR(dcdc->regulator)) {
822 ret = PTR_ERR(dcdc->regulator);
823 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
824 id + 1, ret);
825 goto err;
826 }
827
cd99758b 828 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
dfda9c27
MB		 829 ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq,
830 IRQF_TRIGGER_RISING, dcdc->name,
831 dcdc);
1304850d
MB		 832 if (ret != 0) {
833 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
834 irq, ret);
835 goto err_regulator;
836 }
837
838 platform_set_drvdata(pdev, dcdc);
839
840 return 0;
841
842err_regulator:
843 regulator_unregister(dcdc->regulator);
844err:
1304850d
MB		 845 return ret;
846}
847
8dc995f5 848static int wm831x_boostp_remove(struct platform_device *pdev)
1304850d
MB		 849{
850 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
1304850d 851
eb66d565
DT		 852 platform_set_drvdata(pdev, NULL);
853
cd99758b
MB		 854 free_irq(wm831x_irq(dcdc->wm831x, platform_get_irq_byname(pdev, "UV")),
855 dcdc);
1304850d 856 regulator_unregister(dcdc->regulator);
1304850d
MB		 857
858 return 0;
859}
860
861static struct platform_driver wm831x_boostp_driver = {
862 .probe = wm831x_boostp_probe,
5eb9f2b9 863 .remove = wm831x_boostp_remove,
1304850d
MB		 864 .driver = {
865 .name = "wm831x-boostp",
eb66d565 866 .owner = THIS_MODULE,
1304850d
MB		 867 },
868};
869
8267a9ba
MB		 870/*
871 * External Power Enable
872 *
873 * These aren't actually DCDCs but look like them in hardware so share
874 * code.
875 */
876
877#define WM831X_EPE_BASE 6
878
879static struct regulator_ops wm831x_epe_ops = {
3d138fcc
MB		 880 .is_enabled = regulator_is_enabled_regmap,
881 .enable = regulator_enable_regmap,
882 .disable = regulator_disable_regmap,
8267a9ba
MB		 883 .get_status = wm831x_dcdc_get_status,
884};
885
a5023574 886static int wm831x_epe_probe(struct platform_device *pdev)
8267a9ba
MB		 887{
888 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
889 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
c172708d 890 struct regulator_config config = { };
8267a9ba
MB		 891 int id = pdev->id % ARRAY_SIZE(pdata->epe);
892 struct wm831x_dcdc *dcdc;
893 int ret;
894
895 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
896
4c60165d 897 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
8267a9ba
MB		 898 if (dcdc == NULL) {
899 dev_err(&pdev->dev, "Unable to allocate private data\n");
900 return -ENOMEM;
901 }
902
903 dcdc->wm831x = wm831x;
904
905 /* For current parts this is correct; probably need to revisit
906 * in future.
907 */
908 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
909 dcdc->desc.name = dcdc->name;
910 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
911 dcdc->desc.ops = &wm831x_epe_ops;
912 dcdc->desc.type = REGULATOR_VOLTAGE;
913 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 914 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
915 dcdc->desc.enable_mask = 1 << dcdc->desc.id;
8267a9ba 916
c172708d 917 config.dev = pdev->dev.parent;
b7ca8788
MB		 918 if (pdata)
919 config.init_data = pdata->epe[id];
c172708d 920 config.driver_data = dcdc;
3d138fcc 921 config.regmap = wm831x->regmap;
c172708d
MB		 922
923 dcdc->regulator = regulator_register(&dcdc->desc, &config);
8267a9ba
MB		 924 if (IS_ERR(dcdc->regulator)) {
925 ret = PTR_ERR(dcdc->regulator);
926 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
927 id + 1, ret);
928 goto err;
929 }
930
931 platform_set_drvdata(pdev, dcdc);
932
933 return 0;
934
935err:
8267a9ba
MB		 936 return ret;
937}
938
8dc995f5 939static int wm831x_epe_remove(struct platform_device *pdev)
8267a9ba
MB		 940{
941 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
942
eb66d565 943 platform_set_drvdata(pdev, NULL);
8267a9ba 944 regulator_unregister(dcdc->regulator);
8267a9ba
MB		 945
946 return 0;
947}
948
949static struct platform_driver wm831x_epe_driver = {
950 .probe = wm831x_epe_probe,
5eb9f2b9 951 .remove = wm831x_epe_remove,
8267a9ba
MB		 952 .driver = {
953 .name = "wm831x-epe",
eb66d565 954 .owner = THIS_MODULE,
8267a9ba
MB		 955 },
956};
957
e4ee831f
MB		 958static int __init wm831x_dcdc_init(void)
959{
960 int ret;
961 ret = platform_driver_register(&wm831x_buckv_driver);
962 if (ret != 0)
963 pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
964
965 ret = platform_driver_register(&wm831x_buckp_driver);
966 if (ret != 0)
967 pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
968
1304850d
MB		 969 ret = platform_driver_register(&wm831x_boostp_driver);
970 if (ret != 0)
971 pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
972
8267a9ba
MB		 973 ret = platform_driver_register(&wm831x_epe_driver);
974 if (ret != 0)
975 pr_err("Failed to register WM831x EPE driver: %d\n", ret);
976
e4ee831f
MB		 977 return 0;
978}
979subsys_initcall(wm831x_dcdc_init);
980
981static void __exit wm831x_dcdc_exit(void)
982{
8267a9ba 983 platform_driver_unregister(&wm831x_epe_driver);
1304850d 984 platform_driver_unregister(&wm831x_boostp_driver);
e4ee831f
MB		 985 platform_driver_unregister(&wm831x_buckp_driver);
986 platform_driver_unregister(&wm831x_buckv_driver);
987}
988module_exit(wm831x_dcdc_exit);
989
990/* Module information */
991MODULE_AUTHOR("Mark Brown");
992MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
993MODULE_LICENSE("GPL");
994MODULE_ALIAS("platform:wm831x-buckv");
995MODULE_ALIAS("platform:wm831x-buckp");
43f1f216 996MODULE_ALIAS("platform:wm831x-boostp");
24b43150 997MODULE_ALIAS("platform:wm831x-epe");
kernel source for telekom puls (alcatel/mediatek)