regulator: twl: Fix the formula to calculate vsel and voltage for twl6030ldo
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
2098e95c
RN
16#include <linux/of.h>
17#include <linux/of_device.h>
fa16a5c1
DB
18#include <linux/regulator/driver.h>
19#include <linux/regulator/machine.h>
2098e95c 20#include <linux/regulator/of_regulator.h>
b07682b6 21#include <linux/i2c/twl.h>
fa16a5c1
DB
22
23
24/*
c4aa6f31 25 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
26 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
27 * include an audio codec, battery charger, and more voltage regulators.
28 * These chips are often used in OMAP-based systems.
29 *
30 * This driver implements software-based resource control for various
31 * voltage regulators. This is usually augmented with state machine
32 * based control.
33 */
34
35struct twlreg_info {
36 /* start of regulator's PM_RECEIVER control register bank */
37 u8 base;
38
c4aa6f31 39 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
40 u8 id;
41
42 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
43 u8 table_len;
44 const u16 *table;
45
045f972f
JKS
46 /* State REMAP default configuration */
47 u8 remap;
48
fa16a5c1
DB
49 /* chip constraints on regulator behavior */
50 u16 min_mV;
3e3d3be7 51 u16 max_mV;
fa16a5c1 52
4d94aee5
GG
53 u8 flags;
54
fa16a5c1
DB
55 /* used by regulator core */
56 struct regulator_desc desc;
4d94aee5
GG
57
58 /* chip specific features */
59 unsigned long features;
63bfff4e
TK
60
61 /*
62 * optional override functions for voltage set/get
63 * these are currently only used for SMPS regulators
64 */
65 int (*get_voltage)(void *data);
66 int (*set_voltage)(void *data, int target_uV);
67
68 /* data passed from board for external get/set voltage */
69 void *data;
fa16a5c1
DB
70};
71
72
73/* LDO control registers ... offset is from the base of its register bank.
74 * The first three registers of all power resource banks help hardware to
75 * manage the various resource groups.
76 */
441a4505 77/* Common offset in TWL4030/6030 */
fa16a5c1 78#define VREG_GRP 0
441a4505 79/* TWL4030 register offsets */
fa16a5c1
DB
80#define VREG_TYPE 1
81#define VREG_REMAP 2
82#define VREG_DEDICATED 3 /* LDO control */
ba305e31 83#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
84/* TWL6030 register offsets */
85#define VREG_TRANS 1
86#define VREG_STATE 2
87#define VREG_VOLTAGE 3
4d94aee5 88#define VREG_VOLTAGE_SMPS 4
441a4505
RN
89/* TWL6030 Misc register offsets */
90#define VREG_BC_ALL 1
91#define VREG_BC_REF 2
92#define VREG_BC_PROC 3
93#define VREG_BC_CLK_RST 4
fa16a5c1 94
21657ebf
SH
95/* TWL6030 LDO register values for CFG_STATE */
96#define TWL6030_CFG_STATE_OFF 0x00
97#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
98#define TWL6030_CFG_STATE_OFF2 0x02
99#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 100#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
101#define TWL6030_CFG_STATE_APP_SHIFT 2
102#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
103#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
104 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 105
4d94aee5
GG
106/* Flags for SMPS Voltage reading */
107#define SMPS_OFFSET_EN BIT(0)
108#define SMPS_EXTENDED_EN BIT(1)
109
110/* twl6025 SMPS EPROM values */
111#define TWL6030_SMPS_OFFSET 0xB0
112#define TWL6030_SMPS_MULT 0xB3
113#define SMPS_MULTOFFSET_SMPS4 BIT(0)
114#define SMPS_MULTOFFSET_VIO BIT(1)
115#define SMPS_MULTOFFSET_SMPS3 BIT(6)
116
fa16a5c1 117static inline int
441a4505 118twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
119{
120 u8 value;
121 int status;
122
441a4505 123 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
124 &value, info->base + offset);
125 return (status < 0) ? status : value;
126}
127
128static inline int
441a4505
RN
129twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
130 u8 value)
fa16a5c1 131{
441a4505 132 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
133 value, info->base + offset);
134}
135
136/*----------------------------------------------------------------------*/
137
138/* generic power resource operations, which work on all regulators */
139
c4aa6f31 140static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 141{
441a4505
RN
142 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
143 VREG_GRP);
fa16a5c1
DB
144}
145
146/*
147 * Enable/disable regulators by joining/leaving the P1 (processor) group.
148 * We assume nobody else is updating the DEV_GRP registers.
149 */
441a4505
RN
150/* definition for 4030 family */
151#define P3_GRP_4030 BIT(7) /* "peripherals" */
152#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
153#define P1_GRP_4030 BIT(5) /* CPU/Linux */
154/* definition for 6030 family */
155#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
156#define P2_GRP_6030 BIT(1) /* "peripherals" */
157#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 158
b2456779 159static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 160{
c4aa6f31 161 int state = twlreg_grp(rdev);
fa16a5c1
DB
162
163 if (state < 0)
164 return state;
165
b2456779
SH
166 return state & P1_GRP_4030;
167}
168
169static int twl6030reg_is_enabled(struct regulator_dev *rdev)
170{
171 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 172 int grp = 0, val;
b2456779 173
b6f476c2
AL
174 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS))) {
175 grp = twlreg_grp(rdev);
176 if (grp < 0)
177 return grp;
4d94aee5 178 grp &= P1_GRP_6030;
b6f476c2 179 } else {
4d94aee5 180 grp = 1;
b6f476c2 181 }
b2456779
SH
182
183 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
184 val = TWL6030_CFG_STATE_APP(val);
185
186 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
187}
188
f8c2940b 189static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
190{
191 struct twlreg_info *info = rdev_get_drvdata(rdev);
192 int grp;
53b8a9d9 193 int ret;
fa16a5c1 194
b6f476c2 195 grp = twlreg_grp(rdev);
fa16a5c1
DB
196 if (grp < 0)
197 return grp;
198
f8c2940b 199 grp |= P1_GRP_4030;
441a4505 200
53b8a9d9
JKS
201 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
202
f8c2940b
B
203 return ret;
204}
205
206static int twl6030reg_enable(struct regulator_dev *rdev)
207{
208 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 209 int grp = 0;
f8c2940b
B
210 int ret;
211
4d94aee5 212 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 213 grp = twlreg_grp(rdev);
f8c2940b
B
214 if (grp < 0)
215 return grp;
216
217 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
218 grp << TWL6030_CFG_STATE_GRP_SHIFT |
219 TWL6030_CFG_STATE_ON);
48c936d6
AL
220 return ret;
221}
21657ebf 222
0ff3897d 223static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
224{
225 struct twlreg_info *info = rdev_get_drvdata(rdev);
226 int grp;
21657ebf 227 int ret;
fa16a5c1 228
b6f476c2 229 grp = twlreg_grp(rdev);
fa16a5c1
DB
230 if (grp < 0)
231 return grp;
232
0ff3897d 233 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 234
21657ebf
SH
235 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
236
0ff3897d
B
237 return ret;
238}
239
240static int twl6030reg_disable(struct regulator_dev *rdev)
241{
242 struct twlreg_info *info = rdev_get_drvdata(rdev);
243 int grp = 0;
244 int ret;
245
4d94aee5
GG
246 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
247 grp = P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030;
0ff3897d
B
248
249 /* For 6030, set the off state for all grps enabled */
250 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
251 (grp) << TWL6030_CFG_STATE_GRP_SHIFT |
252 TWL6030_CFG_STATE_OFF);
21657ebf
SH
253
254 return ret;
fa16a5c1
DB
255}
256
9a0244ad 257static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 258{
c4aa6f31 259 int state = twlreg_grp(rdev);
fa16a5c1
DB
260
261 if (state < 0)
262 return state;
263 state &= 0x0f;
264
265 /* assume state != WARM_RESET; we'd not be running... */
266 if (!state)
267 return REGULATOR_STATUS_OFF;
268 return (state & BIT(3))
269 ? REGULATOR_STATUS_NORMAL
270 : REGULATOR_STATUS_STANDBY;
271}
272
9a0244ad
SH
273static int twl6030reg_get_status(struct regulator_dev *rdev)
274{
275 struct twlreg_info *info = rdev_get_drvdata(rdev);
276 int val;
277
278 val = twlreg_grp(rdev);
279 if (val < 0)
280 return val;
281
282 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
283
284 switch (TWL6030_CFG_STATE_APP(val)) {
285 case TWL6030_CFG_STATE_ON:
286 return REGULATOR_STATUS_NORMAL;
287
288 case TWL6030_CFG_STATE_SLEEP:
289 return REGULATOR_STATUS_STANDBY;
290
291 case TWL6030_CFG_STATE_OFF:
292 case TWL6030_CFG_STATE_OFF2:
293 default:
294 break;
295 }
296
297 return REGULATOR_STATUS_OFF;
298}
299
1a39962f 300static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
301{
302 struct twlreg_info *info = rdev_get_drvdata(rdev);
303 unsigned message;
304 int status;
305
306 /* We can only set the mode through state machine commands... */
307 switch (mode) {
308 case REGULATOR_MODE_NORMAL:
309 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
310 break;
311 case REGULATOR_MODE_STANDBY:
312 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
313 break;
314 default:
315 return -EINVAL;
316 }
317
318 /* Ensure the resource is associated with some group */
c4aa6f31 319 status = twlreg_grp(rdev);
fa16a5c1
DB
320 if (status < 0)
321 return status;
441a4505 322 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
323 return -EACCES;
324
c4aa6f31 325 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
326 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
327 if (status < 0)
fa16a5c1
DB
328 return status;
329
c4aa6f31 330 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 331 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
332}
333
1a39962f
SH
334static int twl6030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
335{
336 struct twlreg_info *info = rdev_get_drvdata(rdev);
4d94aee5 337 int grp = 0;
1a39962f
SH
338 int val;
339
4d94aee5 340 if (!(twl_class_is_6030() && (info->features & TWL6025_SUBCLASS)))
b6f476c2 341 grp = twlreg_grp(rdev);
1a39962f
SH
342
343 if (grp < 0)
344 return grp;
345
346 /* Compose the state register settings */
347 val = grp << TWL6030_CFG_STATE_GRP_SHIFT;
348 /* We can only set the mode through state machine commands... */
349 switch (mode) {
350 case REGULATOR_MODE_NORMAL:
351 val |= TWL6030_CFG_STATE_ON;
352 break;
353 case REGULATOR_MODE_STANDBY:
354 val |= TWL6030_CFG_STATE_SLEEP;
355 break;
356
357 default:
358 return -EINVAL;
359 }
360
361 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE, val);
362}
363
fa16a5c1
DB
364/*----------------------------------------------------------------------*/
365
366/*
367 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
368 * select field in its control register. We use tables indexed by VSEL
369 * to record voltages in milliVolts. (Accuracy is about three percent.)
370 *
371 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
372 * currently handled by listing two slightly different VAUX2 regulators,
373 * only one of which will be configured.
374 *
375 * VSEL values documented as "TI cannot support these values" are flagged
376 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
377 *
378 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
379 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 380 */
fa16a5c1 381#define UNSUP_MASK 0x8000
fa16a5c1
DB
382
383#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N
384#define IS_UNSUP(info, x) \
385 ((UNSUP_MASK & (x)) && \
386 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB
387#define LDO_MV(x) (~UNSUP_MASK & (x))
388
389
390static const u16 VAUX1_VSEL_table[] = {
391 UNSUP(1500), UNSUP(1800), 2500, 2800,
392 3000, 3000, 3000, 3000,
393};
394static const u16 VAUX2_4030_VSEL_table[] = {
395 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
396 1500, 1800, UNSUP(1850), 2500,
397 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
398 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
399};
400static const u16 VAUX2_VSEL_table[] = {
401 1700, 1700, 1900, 1300,
402 1500, 1800, 2000, 2500,
403 2100, 2800, 2200, 2300,
404 2400, 2400, 2400, 2400,
405};
406static const u16 VAUX3_VSEL_table[] = {
407 1500, 1800, 2500, 2800,
d6bb69cf 408 3000, 3000, 3000, 3000,
fa16a5c1
DB
409};
410static const u16 VAUX4_VSEL_table[] = {
411 700, 1000, 1200, UNSUP(1300),
412 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
413 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
414 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
415};
416static const u16 VMMC1_VSEL_table[] = {
417 1850, 2850, 3000, 3150,
418};
419static const u16 VMMC2_VSEL_table[] = {
420 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
421 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
422 2600, 2800, 2850, 3000,
423 3150, 3150, 3150, 3150,
424};
425static const u16 VPLL1_VSEL_table[] = {
426 1000, 1200, 1300, 1800,
427 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
428};
429static const u16 VPLL2_VSEL_table[] = {
430 700, 1000, 1200, 1300,
431 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
432 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
433 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
434};
435static const u16 VSIM_VSEL_table[] = {
436 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
437 2800, 3000, 3000, 3000,
438};
439static const u16 VDAC_VSEL_table[] = {
440 1200, 1300, 1800, 1800,
441};
07fc493f
JKS
442static const u16 VDD1_VSEL_table[] = {
443 800, 1450,
444};
445static const u16 VDD2_VSEL_table[] = {
446 800, 1450, 1500,
447};
448static const u16 VIO_VSEL_table[] = {
449 1800, 1850,
450};
451static const u16 VINTANA2_VSEL_table[] = {
452 2500, 2750,
453};
fa16a5c1 454
3e3d3be7 455static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
456{
457 struct twlreg_info *info = rdev_get_drvdata(rdev);
458 int mV = info->table[index];
459
411a2df5 460 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB
461}
462
fa16a5c1 463static int
dd16b1f8 464twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
465{
466 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 467
dd16b1f8
AL
468 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
469 selector);
fa16a5c1
DB
470}
471
3e3d3be7 472static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
473{
474 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
475 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
476 VREG_VOLTAGE);
fa16a5c1
DB
477
478 if (vsel < 0)
479 return vsel;
480
481 vsel &= info->table_len - 1;
482 return LDO_MV(info->table[vsel]) * 1000;
483}
484
3e3d3be7
RN
485static struct regulator_ops twl4030ldo_ops = {
486 .list_voltage = twl4030ldo_list_voltage,
66b659e6 487
dd16b1f8 488 .set_voltage_sel = twl4030ldo_set_voltage_sel,
3e3d3be7
RN
489 .get_voltage = twl4030ldo_get_voltage,
490
f8c2940b 491 .enable = twl4030reg_enable,
0ff3897d 492 .disable = twl4030reg_disable,
b2456779 493 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 494
1a39962f 495 .set_mode = twl4030reg_set_mode,
3e3d3be7 496
9a0244ad 497 .get_status = twl4030reg_get_status,
3e3d3be7
RN
498};
499
ba305e31
TK
500static int
501twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
502 unsigned *selector)
503{
504 struct twlreg_info *info = rdev_get_drvdata(rdev);
505 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
506
63bfff4e
TK
507 if (info->set_voltage) {
508 return info->set_voltage(info->data, min_uV);
509 } else {
510 twlreg_write(info, TWL_MODULE_PM_RECEIVER,
511 VREG_VOLTAGE_SMPS_4030, vsel);
512 }
513
ba305e31
TK
514 return 0;
515}
516
517static int twl4030smps_get_voltage(struct regulator_dev *rdev)
518{
519 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
520 int vsel;
521
522 if (info->get_voltage)
523 return info->get_voltage(info->data);
524
525 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
526 VREG_VOLTAGE_SMPS_4030);
527
528 return vsel * 12500 + 600000;
529}
530
531static struct regulator_ops twl4030smps_ops = {
532 .set_voltage = twl4030smps_set_voltage,
533 .get_voltage = twl4030smps_get_voltage,
534};
535
34a38440
TK
536static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int min_uV,
537 int max_uV, unsigned *selector)
538{
539 struct twlreg_info *info = rdev_get_drvdata(rdev);
540
541 if (info->set_voltage)
542 return info->set_voltage(info->data, min_uV);
543
544 return -ENODEV;
545}
546
547static int twl6030coresmps_get_voltage(struct regulator_dev *rdev)
548{
549 struct twlreg_info *info = rdev_get_drvdata(rdev);
550
551 if (info->get_voltage)
552 return info->get_voltage(info->data);
553
554 return -ENODEV;
555}
556
557static struct regulator_ops twl6030coresmps_ops = {
558 .set_voltage = twl6030coresmps_set_voltage,
559 .get_voltage = twl6030coresmps_get_voltage,
560};
561
3e3d3be7 562static int
3a93f2a9
MB
563twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
564 unsigned *selector)
3e3d3be7
RN
565{
566 struct twlreg_info *info = rdev_get_drvdata(rdev);
567 int vsel;
568
569 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
570 return -EDOM;
571
a3cb80f4 572 vsel = DIV_ROUND_UP(min_uV - rdev->desc->min_uV, rdev->desc->uV_step);
3a93f2a9 573 *selector = vsel;
3e3d3be7 574
a3cb80f4 575 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
3e3d3be7
RN
576}
577
578static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
579{
580 struct twlreg_info *info = rdev_get_drvdata(rdev);
a3cb80f4 581 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
3e3d3be7
RN
582
583 if (vsel < 0)
584 return vsel;
585
a3cb80f4 586 return rdev->desc->min_uV + vsel * rdev->desc->uV_step;
3e3d3be7
RN
587}
588
589static struct regulator_ops twl6030ldo_ops = {
ea7e3304 590 .list_voltage = regulator_list_voltage_linear,
3e3d3be7
RN
591
592 .set_voltage = twl6030ldo_set_voltage,
593 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 594
f8c2940b 595 .enable = twl6030reg_enable,
0ff3897d 596 .disable = twl6030reg_disable,
b2456779 597 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 598
1a39962f 599 .set_mode = twl6030reg_set_mode,
fa16a5c1 600
9a0244ad 601 .get_status = twl6030reg_get_status,
fa16a5c1
DB
602};
603
604/*----------------------------------------------------------------------*/
605
606/*
607 * Fixed voltage LDOs don't have a VSEL field to update.
608 */
c4aa6f31 609static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
610{
611 struct twlreg_info *info = rdev_get_drvdata(rdev);
612
613 return info->min_mV * 1000;
614}
615
c4aa6f31 616static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
617{
618 struct twlreg_info *info = rdev_get_drvdata(rdev);
619
620 return info->min_mV * 1000;
621}
622
b2456779
SH
623static struct regulator_ops twl4030fixed_ops = {
624 .list_voltage = twlfixed_list_voltage,
625
626 .get_voltage = twlfixed_get_voltage,
627
f8c2940b 628 .enable = twl4030reg_enable,
0ff3897d 629 .disable = twl4030reg_disable,
b2456779
SH
630 .is_enabled = twl4030reg_is_enabled,
631
1a39962f 632 .set_mode = twl4030reg_set_mode,
b2456779 633
9a0244ad 634 .get_status = twl4030reg_get_status,
b2456779
SH
635};
636
637static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 638 .list_voltage = twlfixed_list_voltage,
66b659e6 639
c4aa6f31 640 .get_voltage = twlfixed_get_voltage,
fa16a5c1 641
f8c2940b 642 .enable = twl6030reg_enable,
0ff3897d 643 .disable = twl6030reg_disable,
b2456779 644 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 645
1a39962f 646 .set_mode = twl6030reg_set_mode,
fa16a5c1 647
9a0244ad 648 .get_status = twl6030reg_get_status,
fa16a5c1
DB
649};
650
8e6de4a3 651static struct regulator_ops twl6030_fixed_resource = {
f8c2940b 652 .enable = twl6030reg_enable,
0ff3897d 653 .disable = twl6030reg_disable,
b2456779 654 .is_enabled = twl6030reg_is_enabled,
9a0244ad 655 .get_status = twl6030reg_get_status,
8e6de4a3
B
656};
657
4d94aee5
GG
658/*
659 * SMPS status and control
660 */
661
662static int twl6030smps_list_voltage(struct regulator_dev *rdev, unsigned index)
663{
664 struct twlreg_info *info = rdev_get_drvdata(rdev);
665
666 int voltage = 0;
667
668 switch (info->flags) {
669 case SMPS_OFFSET_EN:
670 voltage = 100000;
671 /* fall through */
672 case 0:
673 switch (index) {
674 case 0:
675 voltage = 0;
676 break;
677 case 58:
678 voltage = 1350 * 1000;
679 break;
680 case 59:
681 voltage = 1500 * 1000;
682 break;
683 case 60:
684 voltage = 1800 * 1000;
685 break;
686 case 61:
687 voltage = 1900 * 1000;
688 break;
689 case 62:
690 voltage = 2100 * 1000;
691 break;
692 default:
693 voltage += (600000 + (12500 * (index - 1)));
694 }
695 break;
696 case SMPS_EXTENDED_EN:
697 switch (index) {
698 case 0:
699 voltage = 0;
700 break;
701 case 58:
702 voltage = 2084 * 1000;
703 break;
704 case 59:
705 voltage = 2315 * 1000;
706 break;
707 case 60:
708 voltage = 2778 * 1000;
709 break;
710 case 61:
711 voltage = 2932 * 1000;
712 break;
713 case 62:
714 voltage = 3241 * 1000;
715 break;
716 default:
717 voltage = (1852000 + (38600 * (index - 1)));
718 }
719 break;
720 case SMPS_OFFSET_EN | SMPS_EXTENDED_EN:
721 switch (index) {
722 case 0:
723 voltage = 0;
724 break;
725 case 58:
726 voltage = 4167 * 1000;
727 break;
728 case 59:
729 voltage = 2315 * 1000;
730 break;
731 case 60:
732 voltage = 2778 * 1000;
733 break;
734 case 61:
735 voltage = 2932 * 1000;
736 break;
737 case 62:
738 voltage = 3241 * 1000;
739 break;
740 default:
741 voltage = (2161000 + (38600 * (index - 1)));
742 }
743 break;
744 }
745
746 return voltage;
747}
748
749static int
750twl6030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
751 unsigned int *selector)
752{
753 struct twlreg_info *info = rdev_get_drvdata(rdev);
754 int vsel = 0;
755
756 switch (info->flags) {
757 case 0:
758 if (min_uV == 0)
759 vsel = 0;
a33b6e5a
LD
760 else if ((min_uV >= 600000) && (min_uV <= 1300000)) {
761 int calc_uV;
268a1641 762 vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
0cb2f123 763 vsel++;
a33b6e5a
LD
764 calc_uV = twl6030smps_list_voltage(rdev, vsel);
765 if (calc_uV > max_uV)
766 return -EINVAL;
4d94aee5
GG
767 }
768 /* Values 1..57 for vsel are linear and can be calculated
769 * values 58..62 are non linear.
770 */
771 else if ((min_uV > 1900000) && (max_uV >= 2100000))
772 vsel = 62;
773 else if ((min_uV > 1800000) && (max_uV >= 1900000))
774 vsel = 61;
775 else if ((min_uV > 1500000) && (max_uV >= 1800000))
776 vsel = 60;
777 else if ((min_uV > 1350000) && (max_uV >= 1500000))
778 vsel = 59;
779 else if ((min_uV > 1300000) && (max_uV >= 1350000))
780 vsel = 58;
781 else
782 return -EINVAL;
783 break;
784 case SMPS_OFFSET_EN:
785 if (min_uV == 0)
786 vsel = 0;
a33b6e5a
LD
787 else if ((min_uV >= 700000) && (min_uV <= 1420000)) {
788 int calc_uV;
268a1641 789 vsel = DIV_ROUND_UP(min_uV - 700000, 12500);
0cb2f123 790 vsel++;
a33b6e5a
LD
791 calc_uV = twl6030smps_list_voltage(rdev, vsel);
792 if (calc_uV > max_uV)
793 return -EINVAL;
4d94aee5
GG
794 }
795 /* Values 1..57 for vsel are linear and can be calculated
796 * values 58..62 are non linear.
797 */
798 else if ((min_uV > 1900000) && (max_uV >= 2100000))
799 vsel = 62;
800 else if ((min_uV > 1800000) && (max_uV >= 1900000))
801 vsel = 61;
802 else if ((min_uV > 1350000) && (max_uV >= 1800000))
803 vsel = 60;
804 else if ((min_uV > 1350000) && (max_uV >= 1500000))
805 vsel = 59;
806 else if ((min_uV > 1300000) && (max_uV >= 1350000))
807 vsel = 58;
808 else
809 return -EINVAL;
810 break;
811 case SMPS_EXTENDED_EN:
0cb2f123 812 if (min_uV == 0) {
4d94aee5 813 vsel = 0;
0cb2f123 814 } else if ((min_uV >= 1852000) && (max_uV <= 4013600)) {
268a1641 815 vsel = DIV_ROUND_UP(min_uV - 1852000, 38600);
0cb2f123
AL
816 vsel++;
817 }
4d94aee5
GG
818 break;
819 case SMPS_OFFSET_EN|SMPS_EXTENDED_EN:
0cb2f123 820 if (min_uV == 0) {
4d94aee5 821 vsel = 0;
0cb2f123 822 } else if ((min_uV >= 2161000) && (max_uV <= 4321000)) {
268a1641 823 vsel = DIV_ROUND_UP(min_uV - 2161000, 38600);
0cb2f123
AL
824 vsel++;
825 }
4d94aee5
GG
826 break;
827 }
828
829 *selector = vsel;
830
831 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS,
832 vsel);
833}
834
835static int twl6030smps_get_voltage_sel(struct regulator_dev *rdev)
836{
837 struct twlreg_info *info = rdev_get_drvdata(rdev);
838
839 return twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS);
840}
841
842static struct regulator_ops twlsmps_ops = {
843 .list_voltage = twl6030smps_list_voltage,
844
845 .set_voltage = twl6030smps_set_voltage,
846 .get_voltage_sel = twl6030smps_get_voltage_sel,
847
848 .enable = twl6030reg_enable,
849 .disable = twl6030reg_disable,
850 .is_enabled = twl6030reg_is_enabled,
851
852 .set_mode = twl6030reg_set_mode,
853
854 .get_status = twl6030reg_get_status,
855};
856
fa16a5c1
DB
857/*----------------------------------------------------------------------*/
858
045f972f
JKS
859#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
860 remap_conf) \
861 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 862 remap_conf, TWL4030, twl4030fixed_ops)
af8b244f
A
863#define TWL6030_FIXED_LDO(label, offset, mVolts, turnon_delay) \
864 TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
b2456779 865 0x0, TWL6030, twl6030fixed_ops)
045f972f 866
2098e95c
RN
867#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
868static struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
869 .base = offset, \
870 .id = num, \
871 .table_len = ARRAY_SIZE(label##_VSEL_table), \
872 .table = label##_VSEL_table, \
045f972f 873 .remap = remap_conf, \
fa16a5c1
DB
874 .desc = { \
875 .name = #label, \
3e3d3be7 876 .id = TWL4030_REG_##label, \
66b659e6 877 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
878 .ops = &twl4030ldo_ops, \
879 .type = REGULATOR_VOLTAGE, \
880 .owner = THIS_MODULE, \
fca53d86 881 .enable_time = turnon_delay, \
3e3d3be7
RN
882 }, \
883 }
884
ba305e31 885#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
2098e95c 886static struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
887 .base = offset, \
888 .id = num, \
ba305e31
TK
889 .remap = remap_conf, \
890 .desc = { \
891 .name = #label, \
892 .id = TWL4030_REG_##label, \
893 .ops = &twl4030smps_ops, \
894 .type = REGULATOR_VOLTAGE, \
895 .owner = THIS_MODULE, \
fca53d86 896 .enable_time = turnon_delay, \
ba305e31
TK
897 }, \
898 }
899
2098e95c
RN
900#define TWL6030_ADJUSTABLE_SMPS(label) \
901static struct twlreg_info TWL6030_INFO_##label = { \
34a38440
TK
902 .desc = { \
903 .name = #label, \
904 .id = TWL6030_REG_##label, \
905 .ops = &twl6030coresmps_ops, \
906 .type = REGULATOR_VOLTAGE, \
907 .owner = THIS_MODULE, \
908 }, \
909 }
910
2098e95c
RN
911#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
912static struct twlreg_info TWL6030_INFO_##label = { \
3e3d3be7 913 .base = offset, \
3e3d3be7
RN
914 .min_mV = min_mVolts, \
915 .max_mV = max_mVolts, \
3e3d3be7
RN
916 .desc = { \
917 .name = #label, \
918 .id = TWL6030_REG_##label, \
7736f11d 919 .n_voltages = (max_mVolts - min_mVolts)/100 + 1, \
3e3d3be7 920 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
921 .type = REGULATOR_VOLTAGE, \
922 .owner = THIS_MODULE, \
ea7e3304
AL
923 .min_uV = min_mVolts * 1000, \
924 .uV_step = 100 * 1000, \
fa16a5c1
DB
925 }, \
926 }
927
2098e95c
RN
928#define TWL6025_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) \
929static struct twlreg_info TWL6025_INFO_##label = { \
4d94aee5 930 .base = offset, \
4d94aee5
GG
931 .min_mV = min_mVolts, \
932 .max_mV = max_mVolts, \
933 .desc = { \
934 .name = #label, \
935 .id = TWL6025_REG_##label, \
936 .n_voltages = ((max_mVolts - min_mVolts)/100) + 1, \
937 .ops = &twl6030ldo_ops, \
938 .type = REGULATOR_VOLTAGE, \
939 .owner = THIS_MODULE, \
ea7e3304
AL
940 .min_uV = min_mVolts * 1000, \
941 .uV_step = 100 * 1000, \
4d94aee5
GG
942 }, \
943 }
3e3d3be7 944
045f972f 945#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
2098e95c
RN
946 family, operations) \
947static struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
948 .base = offset, \
949 .id = num, \
950 .min_mV = mVolts, \
045f972f 951 .remap = remap_conf, \
fa16a5c1
DB
952 .desc = { \
953 .name = #label, \
c4aa6f31 954 .id = family##_REG_##label, \
66b659e6 955 .n_voltages = 1, \
b2456779 956 .ops = &operations, \
fa16a5c1
DB
957 .type = REGULATOR_VOLTAGE, \
958 .owner = THIS_MODULE, \
fca53d86 959 .enable_time = turnon_delay, \
fa16a5c1
DB
960 }, \
961 }
962
2098e95c
RN
963#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
964static struct twlreg_info TWLRES_INFO_##label = { \
8e6de4a3 965 .base = offset, \
8e6de4a3
B
966 .desc = { \
967 .name = #label, \
968 .id = TWL6030_REG_##label, \
969 .ops = &twl6030_fixed_resource, \
970 .type = REGULATOR_VOLTAGE, \
971 .owner = THIS_MODULE, \
fca53d86 972 .enable_time = turnon_delay, \
8e6de4a3
B
973 }, \
974 }
975
2098e95c
RN
976#define TWL6025_ADJUSTABLE_SMPS(label, offset) \
977static struct twlreg_info TWLSMPS_INFO_##label = { \
4d94aee5 978 .base = offset, \
4d94aee5
GG
979 .min_mV = 600, \
980 .max_mV = 2100, \
981 .desc = { \
982 .name = #label, \
983 .id = TWL6025_REG_##label, \
984 .n_voltages = 63, \
985 .ops = &twlsmps_ops, \
986 .type = REGULATOR_VOLTAGE, \
987 .owner = THIS_MODULE, \
988 }, \
989 }
990
fa16a5c1
DB
991/*
992 * We list regulators here if systems need some level of
993 * software control over them after boot.
994 */
2098e95c
RN
995TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
996TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
997TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
998TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
999TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
1000TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
1001TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
1002TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
1003TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
1004TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
1005TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
1006TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
1007TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
1008TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
1009TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
1010/* VUSBCP is managed *only* by the USB subchip */
1011/* 6030 REG with base as PMC Slave Misc : 0x0030 */
1012/* Turnon-delay and remap configuration values for 6030 are not
1013 verified since the specification is not public */
1014TWL6030_ADJUSTABLE_SMPS(VDD1);
1015TWL6030_ADJUSTABLE_SMPS(VDD2);
1016TWL6030_ADJUSTABLE_SMPS(VDD3);
1017TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300);
1018TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300);
1019TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300);
1020TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300);
1021TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300);
1022TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300);
1023/* 6025 are renamed compared to 6030 versions */
1024TWL6025_ADJUSTABLE_LDO(LDO2, 0x54, 1000, 3300);
1025TWL6025_ADJUSTABLE_LDO(LDO4, 0x58, 1000, 3300);
1026TWL6025_ADJUSTABLE_LDO(LDO3, 0x5c, 1000, 3300);
1027TWL6025_ADJUSTABLE_LDO(LDO5, 0x68, 1000, 3300);
1028TWL6025_ADJUSTABLE_LDO(LDO1, 0x6c, 1000, 3300);
1029TWL6025_ADJUSTABLE_LDO(LDO7, 0x74, 1000, 3300);
1030TWL6025_ADJUSTABLE_LDO(LDO6, 0x60, 1000, 3300);
1031TWL6025_ADJUSTABLE_LDO(LDOLN, 0x64, 1000, 3300);
1032TWL6025_ADJUSTABLE_LDO(LDOUSB, 0x70, 1000, 3300);
1033TWL4030_FIXED_LDO(VINTANA2, 0x3f, 1500, 11, 100, 0x08);
1034TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
1035TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
1036TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
1037TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
1038TWL6030_FIXED_LDO(VANA, 0x50, 2100, 0);
1039TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 0);
1040TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
1041TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
e9d47fa4
PU
1042TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
1043TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
2098e95c
RN
1044TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0);
1045TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34);
1046TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10);
1047TWL6025_ADJUSTABLE_SMPS(VIO, 0x16);
fa16a5c1 1048
4d94aee5
GG
1049static u8 twl_get_smps_offset(void)
1050{
1051 u8 value;
1052
1053 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1054 TWL6030_SMPS_OFFSET);
1055 return value;
1056}
1057
1058static u8 twl_get_smps_mult(void)
1059{
1060 u8 value;
1061
1062 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &value,
1063 TWL6030_SMPS_MULT);
1064 return value;
1065}
1066
2098e95c
RN
1067#define TWL_OF_MATCH(comp, family, label) \
1068 { \
1069 .compatible = comp, \
1070 .data = &family##_INFO_##label, \
1071 }
1072
1073#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
1074#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
1075#define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label)
1076#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN
1077#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
1078
1079static const struct of_device_id twl_of_match[] __devinitconst = {
1080 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
1081 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
1082 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
1083 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
1084 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
1085 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
1086 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
1087 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
1088 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
1089 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
1090 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
1091 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1092 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
1093 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
1094 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
1095 TWL6030_OF_MATCH("ti,twl6030-vdd1", VDD1),
1096 TWL6030_OF_MATCH("ti,twl6030-vdd2", VDD2),
1097 TWL6030_OF_MATCH("ti,twl6030-vdd3", VDD3),
1098 TWL6030_OF_MATCH("ti,twl6030-vaux1", VAUX1_6030),
1099 TWL6030_OF_MATCH("ti,twl6030-vaux2", VAUX2_6030),
1100 TWL6030_OF_MATCH("ti,twl6030-vaux3", VAUX3_6030),
1101 TWL6030_OF_MATCH("ti,twl6030-vmmc", VMMC),
1102 TWL6030_OF_MATCH("ti,twl6030-vpp", VPP),
1103 TWL6030_OF_MATCH("ti,twl6030-vusim", VUSIM),
1104 TWL6025_OF_MATCH("ti,twl6025-ldo2", LDO2),
1105 TWL6025_OF_MATCH("ti,twl6025-ldo4", LDO4),
1106 TWL6025_OF_MATCH("ti,twl6025-ldo3", LDO3),
1107 TWL6025_OF_MATCH("ti,twl6025-ldo5", LDO5),
1108 TWL6025_OF_MATCH("ti,twl6025-ldo1", LDO1),
1109 TWL6025_OF_MATCH("ti,twl6025-ldo7", LDO7),
1110 TWL6025_OF_MATCH("ti,twl6025-ldo6", LDO6),
1111 TWL6025_OF_MATCH("ti,twl6025-ldoln", LDOLN),
1112 TWL6025_OF_MATCH("ti,twl6025-ldousb", LDOUSB),
1113 TWLFIXED_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
1114 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
1115 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
1116 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
1117 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
1118 TWLFIXED_OF_MATCH("ti,twl6030-vana", VANA),
1119 TWLFIXED_OF_MATCH("ti,twl6030-vcxio", VCXIO),
1120 TWLFIXED_OF_MATCH("ti,twl6030-vdac", VDAC),
1121 TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
e9d47fa4
PU
1122 TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
1123 TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
2098e95c
RN
1124 TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3),
1125 TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4),
1126 TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO),
1127 {},
1128};
1129MODULE_DEVICE_TABLE(of, twl_of_match);
1130
24c29020 1131static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1 1132{
2098e95c 1133 int i, id;
fa16a5c1
DB
1134 struct twlreg_info *info;
1135 struct regulator_init_data *initdata;
1136 struct regulation_constraints *c;
1137 struct regulator_dev *rdev;
63bfff4e 1138 struct twl_regulator_driver_data *drvdata;
2098e95c 1139 const struct of_device_id *match;
c172708d 1140 struct regulator_config config = { };
2098e95c
RN
1141
1142 match = of_match_device(twl_of_match, &pdev->dev);
1143 if (match) {
1144 info = match->data;
1145 id = info->desc.id;
1146 initdata = of_get_regulator_init_data(&pdev->dev,
1147 pdev->dev.of_node);
1148 drvdata = NULL;
1149 } else {
1150 id = pdev->id;
1151 initdata = pdev->dev.platform_data;
1152 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_of_match); i++) {
1153 info = twl_of_match[i].data;
5ade3935
AL
1154 if (info && info->desc.id == id)
1155 break;
2098e95c 1156 }
5ade3935
AL
1157 if (i == ARRAY_SIZE(twl_of_match))
1158 return -ENODEV;
1159
2098e95c
RN
1160 drvdata = initdata->driver_data;
1161 if (!drvdata)
1162 return -EINVAL;
fa16a5c1 1163 }
2098e95c 1164
fa16a5c1
DB
1165 if (!info)
1166 return -ENODEV;
1167
fa16a5c1
DB
1168 if (!initdata)
1169 return -EINVAL;
1170
2098e95c
RN
1171 if (drvdata) {
1172 /* copy the driver data into regulator data */
1173 info->features = drvdata->features;
1174 info->data = drvdata->data;
1175 info->set_voltage = drvdata->set_voltage;
1176 info->get_voltage = drvdata->get_voltage;
1177 }
4d94aee5 1178
fa16a5c1
DB
1179 /* Constrain board-specific capabilities according to what
1180 * this driver and the chip itself can actually do.
1181 */
1182 c = &initdata->constraints;
fa16a5c1
DB
1183 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1184 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
1185 | REGULATOR_CHANGE_MODE
1186 | REGULATOR_CHANGE_STATUS;
2098e95c 1187 switch (id) {
205e5cd3
JKS
1188 case TWL4030_REG_VIO:
1189 case TWL4030_REG_VDD1:
1190 case TWL4030_REG_VDD2:
1191 case TWL4030_REG_VPLL1:
1192 case TWL4030_REG_VINTANA1:
1193 case TWL4030_REG_VINTANA2:
1194 case TWL4030_REG_VINTDIG:
1195 c->always_on = true;
1196 break;
1197 default:
1198 break;
1199 }
fa16a5c1 1200
2098e95c 1201 switch (id) {
4d94aee5
GG
1202 case TWL6025_REG_SMPS3:
1203 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
1204 info->flags |= SMPS_EXTENDED_EN;
1205 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
1206 info->flags |= SMPS_OFFSET_EN;
1207 break;
1208 case TWL6025_REG_SMPS4:
1209 if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
1210 info->flags |= SMPS_EXTENDED_EN;
1211 if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
1212 info->flags |= SMPS_OFFSET_EN;
1213 break;
1214 case TWL6025_REG_VIO:
1215 if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
1216 info->flags |= SMPS_EXTENDED_EN;
1217 if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
1218 info->flags |= SMPS_OFFSET_EN;
1219 break;
1220 }
1221
c172708d
MB
1222 config.dev = &pdev->dev;
1223 config.init_data = initdata;
1224 config.driver_data = info;
1225 config.of_node = pdev->dev.of_node;
1226
1227 rdev = regulator_register(&info->desc, &config);
fa16a5c1
DB
1228 if (IS_ERR(rdev)) {
1229 dev_err(&pdev->dev, "can't register %s, %ld\n",
1230 info->desc.name, PTR_ERR(rdev));
1231 return PTR_ERR(rdev);
1232 }
1233 platform_set_drvdata(pdev, rdev);
1234
776dc923
SH
1235 if (twl_class_is_4030())
1236 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
1237 info->remap);
1238
fa16a5c1
DB
1239 /* NOTE: many regulators support short-circuit IRQs (presentable
1240 * as REGULATOR_OVER_CURRENT notifications?) configured via:
1241 * - SC_CONFIG
1242 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
1243 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
1244 * - IT_CONFIG
1245 */
1246
1247 return 0;
1248}
1249
c4aa6f31 1250static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
1251{
1252 regulator_unregister(platform_get_drvdata(pdev));
1253 return 0;
1254}
1255
c4aa6f31 1256MODULE_ALIAS("platform:twl_reg");
fa16a5c1 1257
c4aa6f31
RN
1258static struct platform_driver twlreg_driver = {
1259 .probe = twlreg_probe,
1260 .remove = __devexit_p(twlreg_remove),
fa16a5c1 1261 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 1262 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 1263 */
2098e95c
RN
1264 .driver = {
1265 .name = "twl_reg",
1266 .owner = THIS_MODULE,
1267 .of_match_table = of_match_ptr(twl_of_match),
1268 },
fa16a5c1
DB
1269};
1270
c4aa6f31 1271static int __init twlreg_init(void)
fa16a5c1 1272{
c4aa6f31 1273 return platform_driver_register(&twlreg_driver);
fa16a5c1 1274}
c4aa6f31 1275subsys_initcall(twlreg_init);
fa16a5c1 1276
c4aa6f31 1277static void __exit twlreg_exit(void)
fa16a5c1 1278{
c4aa6f31 1279 platform_driver_unregister(&twlreg_driver);
fa16a5c1 1280}
c4aa6f31 1281module_exit(twlreg_exit)
fa16a5c1 1282
c4aa6f31 1283MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 1284MODULE_LICENSE("GPL");