regulator: twl: add twl6030 get_status
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / regulator / twl-regulator.c
CommitLineData
fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
53b8a9d9 15#include <linux/delay.h>
fa16a5c1
DB
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
b07682b6 19#include <linux/i2c/twl.h>
fa16a5c1
DB
20
21
22/*
c4aa6f31 23 * The TWL4030/TW5030/TPS659x0/TWL6030 family chips include power management, a
fa16a5c1
DB
24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
25 * include an audio codec, battery charger, and more voltage regulators.
26 * These chips are often used in OMAP-based systems.
27 *
28 * This driver implements software-based resource control for various
29 * voltage regulators. This is usually augmented with state machine
30 * based control.
31 */
32
33struct twlreg_info {
34 /* start of regulator's PM_RECEIVER control register bank */
35 u8 base;
36
c4aa6f31 37 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
38 u8 id;
39
40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
41 u8 table_len;
42 const u16 *table;
43
045f972f
JKS
44 /* regulator specific turn-on delay */
45 u16 delay;
46
47 /* State REMAP default configuration */
48 u8 remap;
49
fa16a5c1
DB
50 /* chip constraints on regulator behavior */
51 u16 min_mV;
3e3d3be7 52 u16 max_mV;
fa16a5c1
DB
53
54 /* used by regulator core */
55 struct regulator_desc desc;
56};
57
58
59/* LDO control registers ... offset is from the base of its register bank.
60 * The first three registers of all power resource banks help hardware to
61 * manage the various resource groups.
62 */
441a4505 63/* Common offset in TWL4030/6030 */
fa16a5c1 64#define VREG_GRP 0
441a4505 65/* TWL4030 register offsets */
fa16a5c1
DB
66#define VREG_TYPE 1
67#define VREG_REMAP 2
68#define VREG_DEDICATED 3 /* LDO control */
441a4505
RN
69/* TWL6030 register offsets */
70#define VREG_TRANS 1
71#define VREG_STATE 2
72#define VREG_VOLTAGE 3
73/* TWL6030 Misc register offsets */
74#define VREG_BC_ALL 1
75#define VREG_BC_REF 2
76#define VREG_BC_PROC 3
77#define VREG_BC_CLK_RST 4
fa16a5c1 78
21657ebf
SH
79/* TWL6030 LDO register values for CFG_STATE */
80#define TWL6030_CFG_STATE_OFF 0x00
81#define TWL6030_CFG_STATE_ON 0x01
9a0244ad
SH
82#define TWL6030_CFG_STATE_OFF2 0x02
83#define TWL6030_CFG_STATE_SLEEP 0x03
21657ebf 84#define TWL6030_CFG_STATE_GRP_SHIFT 5
b2456779
SH
85#define TWL6030_CFG_STATE_APP_SHIFT 2
86#define TWL6030_CFG_STATE_APP_MASK (0x03 << TWL6030_CFG_STATE_APP_SHIFT)
87#define TWL6030_CFG_STATE_APP(v) (((v) & TWL6030_CFG_STATE_APP_MASK) >>\
88 TWL6030_CFG_STATE_APP_SHIFT)
21657ebf 89
fa16a5c1 90static inline int
441a4505 91twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
92{
93 u8 value;
94 int status;
95
441a4505 96 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
97 &value, info->base + offset);
98 return (status < 0) ? status : value;
99}
100
101static inline int
441a4505
RN
102twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
103 u8 value)
fa16a5c1 104{
441a4505 105 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
106 value, info->base + offset);
107}
108
109/*----------------------------------------------------------------------*/
110
111/* generic power resource operations, which work on all regulators */
112
c4aa6f31 113static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 114{
441a4505
RN
115 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
116 VREG_GRP);
fa16a5c1
DB
117}
118
119/*
120 * Enable/disable regulators by joining/leaving the P1 (processor) group.
121 * We assume nobody else is updating the DEV_GRP registers.
122 */
441a4505
RN
123/* definition for 4030 family */
124#define P3_GRP_4030 BIT(7) /* "peripherals" */
125#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
126#define P1_GRP_4030 BIT(5) /* CPU/Linux */
127/* definition for 6030 family */
128#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
129#define P2_GRP_6030 BIT(1) /* "peripherals" */
130#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 131
b2456779 132static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 133{
c4aa6f31 134 int state = twlreg_grp(rdev);
fa16a5c1
DB
135
136 if (state < 0)
137 return state;
138
b2456779
SH
139 return state & P1_GRP_4030;
140}
141
142static int twl6030reg_is_enabled(struct regulator_dev *rdev)
143{
144 struct twlreg_info *info = rdev_get_drvdata(rdev);
145 int grp, val;
146
147 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
148 if (grp < 0)
149 return grp;
150
151 grp &= P1_GRP_6030;
152
153 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
154 val = TWL6030_CFG_STATE_APP(val);
155
156 return grp && (val == TWL6030_CFG_STATE_ON);
fa16a5c1
DB
157}
158
c4aa6f31 159static int twlreg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
160{
161 struct twlreg_info *info = rdev_get_drvdata(rdev);
162 int grp;
53b8a9d9 163 int ret;
fa16a5c1 164
441a4505 165 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
166 if (grp < 0)
167 return grp;
168
441a4505
RN
169 if (twl_class_is_4030())
170 grp |= P1_GRP_4030;
171 else
172 grp |= P1_GRP_6030;
173
53b8a9d9
JKS
174 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
175
21657ebf
SH
176 if (!ret && twl_class_is_6030())
177 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
178 grp << TWL6030_CFG_STATE_GRP_SHIFT |
179 TWL6030_CFG_STATE_ON);
180
53b8a9d9
JKS
181 udelay(info->delay);
182
183 return ret;
fa16a5c1
DB
184}
185
c4aa6f31 186static int twlreg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
187{
188 struct twlreg_info *info = rdev_get_drvdata(rdev);
189 int grp;
21657ebf 190 int ret;
fa16a5c1 191
441a4505 192 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
fa16a5c1
DB
193 if (grp < 0)
194 return grp;
195
21657ebf
SH
196 /* For 6030, set the off state for all grps enabled */
197 if (twl_class_is_6030()) {
198 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
199 (grp & (P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030)) <<
200 TWL6030_CFG_STATE_GRP_SHIFT |
201 TWL6030_CFG_STATE_OFF);
202 if (ret)
203 return ret;
204 }
205
441a4505 206 if (twl_class_is_4030())
cf9836f4 207 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 208 else
cf9836f4 209 grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030);
441a4505 210
21657ebf
SH
211 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
212
213 /* Next, associate cleared grp in state register */
214 if (!ret && twl_class_is_6030())
215 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_STATE,
216 grp << TWL6030_CFG_STATE_GRP_SHIFT |
217 TWL6030_CFG_STATE_OFF);
218
219 return ret;
fa16a5c1
DB
220}
221
9a0244ad 222static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 223{
c4aa6f31 224 int state = twlreg_grp(rdev);
fa16a5c1
DB
225
226 if (state < 0)
227 return state;
228 state &= 0x0f;
229
230 /* assume state != WARM_RESET; we'd not be running... */
231 if (!state)
232 return REGULATOR_STATUS_OFF;
233 return (state & BIT(3))
234 ? REGULATOR_STATUS_NORMAL
235 : REGULATOR_STATUS_STANDBY;
236}
237
9a0244ad
SH
238static int twl6030reg_get_status(struct regulator_dev *rdev)
239{
240 struct twlreg_info *info = rdev_get_drvdata(rdev);
241 int val;
242
243 val = twlreg_grp(rdev);
244 if (val < 0)
245 return val;
246
247 val = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_STATE);
248
249 switch (TWL6030_CFG_STATE_APP(val)) {
250 case TWL6030_CFG_STATE_ON:
251 return REGULATOR_STATUS_NORMAL;
252
253 case TWL6030_CFG_STATE_SLEEP:
254 return REGULATOR_STATUS_STANDBY;
255
256 case TWL6030_CFG_STATE_OFF:
257 case TWL6030_CFG_STATE_OFF2:
258 default:
259 break;
260 }
261
262 return REGULATOR_STATUS_OFF;
263}
264
c4aa6f31 265static int twlreg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
266{
267 struct twlreg_info *info = rdev_get_drvdata(rdev);
268 unsigned message;
269 int status;
270
441a4505
RN
271 if (twl_class_is_6030())
272 return 0; /* FIXME return for 6030 regulator */
273
fa16a5c1
DB
274 /* We can only set the mode through state machine commands... */
275 switch (mode) {
276 case REGULATOR_MODE_NORMAL:
277 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
278 break;
279 case REGULATOR_MODE_STANDBY:
280 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
281 break;
282 default:
283 return -EINVAL;
284 }
285
286 /* Ensure the resource is associated with some group */
c4aa6f31 287 status = twlreg_grp(rdev);
fa16a5c1
DB
288 if (status < 0)
289 return status;
441a4505 290 if (!(status & (P3_GRP_4030 | P2_GRP_4030 | P1_GRP_4030)))
fa16a5c1
DB
291 return -EACCES;
292
c4aa6f31 293 status = twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8
AL
294 message >> 8, TWL4030_PM_MASTER_PB_WORD_MSB);
295 if (status < 0)
fa16a5c1
DB
296 return status;
297
c4aa6f31 298 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
b9e26bc8 299 message & 0xff, TWL4030_PM_MASTER_PB_WORD_LSB);
fa16a5c1
DB
300}
301
302/*----------------------------------------------------------------------*/
303
304/*
305 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
306 * select field in its control register. We use tables indexed by VSEL
307 * to record voltages in milliVolts. (Accuracy is about three percent.)
308 *
309 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
310 * currently handled by listing two slightly different VAUX2 regulators,
311 * only one of which will be configured.
312 *
313 * VSEL values documented as "TI cannot support these values" are flagged
314 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
315 *
316 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
317 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1
DB
318 */
319#ifdef CONFIG_TWL4030_ALLOW_UNSUPPORTED
320#define UNSUP_MASK 0x0000
321#else
322#define UNSUP_MASK 0x8000
323#endif
324
325#define UNSUP(x) (UNSUP_MASK | (x))
326#define IS_UNSUP(x) (UNSUP_MASK & (x))
327#define LDO_MV(x) (~UNSUP_MASK & (x))
328
329
330static const u16 VAUX1_VSEL_table[] = {
331 UNSUP(1500), UNSUP(1800), 2500, 2800,
332 3000, 3000, 3000, 3000,
333};
334static const u16 VAUX2_4030_VSEL_table[] = {
335 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
336 1500, 1800, UNSUP(1850), 2500,
337 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
338 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
339};
340static const u16 VAUX2_VSEL_table[] = {
341 1700, 1700, 1900, 1300,
342 1500, 1800, 2000, 2500,
343 2100, 2800, 2200, 2300,
344 2400, 2400, 2400, 2400,
345};
346static const u16 VAUX3_VSEL_table[] = {
347 1500, 1800, 2500, 2800,
d6bb69cf 348 3000, 3000, 3000, 3000,
fa16a5c1
DB
349};
350static const u16 VAUX4_VSEL_table[] = {
351 700, 1000, 1200, UNSUP(1300),
352 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
353 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
354 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
355};
356static const u16 VMMC1_VSEL_table[] = {
357 1850, 2850, 3000, 3150,
358};
359static const u16 VMMC2_VSEL_table[] = {
360 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
361 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
362 2600, 2800, 2850, 3000,
363 3150, 3150, 3150, 3150,
364};
365static const u16 VPLL1_VSEL_table[] = {
366 1000, 1200, 1300, 1800,
367 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
368};
369static const u16 VPLL2_VSEL_table[] = {
370 700, 1000, 1200, 1300,
371 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
372 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
373 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
374};
375static const u16 VSIM_VSEL_table[] = {
376 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
377 2800, 3000, 3000, 3000,
378};
379static const u16 VDAC_VSEL_table[] = {
380 1200, 1300, 1800, 1800,
381};
07fc493f
JKS
382static const u16 VDD1_VSEL_table[] = {
383 800, 1450,
384};
385static const u16 VDD2_VSEL_table[] = {
386 800, 1450, 1500,
387};
388static const u16 VIO_VSEL_table[] = {
389 1800, 1850,
390};
391static const u16 VINTANA2_VSEL_table[] = {
392 2500, 2750,
393};
fa16a5c1 394
3e3d3be7 395static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
396{
397 struct twlreg_info *info = rdev_get_drvdata(rdev);
398 int mV = info->table[index];
399
400 return IS_UNSUP(mV) ? 0 : (LDO_MV(mV) * 1000);
401}
402
fa16a5c1 403static int
3a93f2a9
MB
404twl4030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
405 unsigned *selector)
fa16a5c1
DB
406{
407 struct twlreg_info *info = rdev_get_drvdata(rdev);
408 int vsel;
409
410 for (vsel = 0; vsel < info->table_len; vsel++) {
411 int mV = info->table[vsel];
412 int uV;
413
414 if (IS_UNSUP(mV))
415 continue;
416 uV = LDO_MV(mV) * 1000;
417
66b659e6
DB
418 /* REVISIT for VAUX2, first match may not be best/lowest */
419
fa16a5c1 420 /* use the first in-range value */
3a93f2a9
MB
421 if (min_uV <= uV && uV <= max_uV) {
422 *selector = vsel;
441a4505
RN
423 return twlreg_write(info, TWL_MODULE_PM_RECEIVER,
424 VREG_VOLTAGE, vsel);
3a93f2a9 425 }
fa16a5c1
DB
426 }
427
428 return -EDOM;
429}
430
3e3d3be7 431static int twl4030ldo_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
432{
433 struct twlreg_info *info = rdev_get_drvdata(rdev);
441a4505
RN
434 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
435 VREG_VOLTAGE);
fa16a5c1
DB
436
437 if (vsel < 0)
438 return vsel;
439
440 vsel &= info->table_len - 1;
441 return LDO_MV(info->table[vsel]) * 1000;
442}
443
3e3d3be7
RN
444static struct regulator_ops twl4030ldo_ops = {
445 .list_voltage = twl4030ldo_list_voltage,
66b659e6 446
3e3d3be7
RN
447 .set_voltage = twl4030ldo_set_voltage,
448 .get_voltage = twl4030ldo_get_voltage,
449
450 .enable = twlreg_enable,
451 .disable = twlreg_disable,
b2456779 452 .is_enabled = twl4030reg_is_enabled,
3e3d3be7
RN
453
454 .set_mode = twlreg_set_mode,
455
9a0244ad 456 .get_status = twl4030reg_get_status,
3e3d3be7
RN
457};
458
459static int twl6030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
460{
461 struct twlreg_info *info = rdev_get_drvdata(rdev);
462
463 return ((info->min_mV + (index * 100)) * 1000);
464}
465
466static int
3a93f2a9
MB
467twl6030ldo_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
468 unsigned *selector)
3e3d3be7
RN
469{
470 struct twlreg_info *info = rdev_get_drvdata(rdev);
471 int vsel;
472
473 if ((min_uV/1000 < info->min_mV) || (max_uV/1000 > info->max_mV))
474 return -EDOM;
475
476 /*
477 * Use the below formula to calculate vsel
478 * mV = 1000mv + 100mv * (vsel - 1)
479 */
480 vsel = (min_uV/1000 - 1000)/100 + 1;
3a93f2a9 481 *selector = vsel;
3e3d3be7
RN
482 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, vsel);
483
484}
485
486static int twl6030ldo_get_voltage(struct regulator_dev *rdev)
487{
488 struct twlreg_info *info = rdev_get_drvdata(rdev);
489 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
490 VREG_VOLTAGE);
491
492 if (vsel < 0)
493 return vsel;
494
495 /*
496 * Use the below formula to calculate vsel
497 * mV = 1000mv + 100mv * (vsel - 1)
498 */
499 return (1000 + (100 * (vsel - 1))) * 1000;
500}
501
502static struct regulator_ops twl6030ldo_ops = {
503 .list_voltage = twl6030ldo_list_voltage,
504
505 .set_voltage = twl6030ldo_set_voltage,
506 .get_voltage = twl6030ldo_get_voltage,
fa16a5c1 507
c4aa6f31
RN
508 .enable = twlreg_enable,
509 .disable = twlreg_disable,
b2456779 510 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 511
c4aa6f31 512 .set_mode = twlreg_set_mode,
fa16a5c1 513
9a0244ad 514 .get_status = twl6030reg_get_status,
fa16a5c1
DB
515};
516
517/*----------------------------------------------------------------------*/
518
519/*
520 * Fixed voltage LDOs don't have a VSEL field to update.
521 */
c4aa6f31 522static int twlfixed_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
523{
524 struct twlreg_info *info = rdev_get_drvdata(rdev);
525
526 return info->min_mV * 1000;
527}
528
c4aa6f31 529static int twlfixed_get_voltage(struct regulator_dev *rdev)
fa16a5c1
DB
530{
531 struct twlreg_info *info = rdev_get_drvdata(rdev);
532
533 return info->min_mV * 1000;
534}
535
b2456779
SH
536static struct regulator_ops twl4030fixed_ops = {
537 .list_voltage = twlfixed_list_voltage,
538
539 .get_voltage = twlfixed_get_voltage,
540
541 .enable = twlreg_enable,
542 .disable = twlreg_disable,
543 .is_enabled = twl4030reg_is_enabled,
544
545 .set_mode = twlreg_set_mode,
546
9a0244ad 547 .get_status = twl4030reg_get_status,
b2456779
SH
548};
549
550static struct regulator_ops twl6030fixed_ops = {
c4aa6f31 551 .list_voltage = twlfixed_list_voltage,
66b659e6 552
c4aa6f31 553 .get_voltage = twlfixed_get_voltage,
fa16a5c1 554
c4aa6f31
RN
555 .enable = twlreg_enable,
556 .disable = twlreg_disable,
b2456779 557 .is_enabled = twl6030reg_is_enabled,
fa16a5c1 558
c4aa6f31 559 .set_mode = twlreg_set_mode,
fa16a5c1 560
9a0244ad 561 .get_status = twl6030reg_get_status,
fa16a5c1
DB
562};
563
8e6de4a3
B
564static struct regulator_ops twl6030_fixed_resource = {
565 .enable = twlreg_enable,
566 .disable = twlreg_disable,
b2456779 567 .is_enabled = twl6030reg_is_enabled,
9a0244ad 568 .get_status = twl6030reg_get_status,
8e6de4a3
B
569};
570
fa16a5c1
DB
571/*----------------------------------------------------------------------*/
572
045f972f
JKS
573#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
574 remap_conf) \
575 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 576 remap_conf, TWL4030, twl4030fixed_ops)
776dc923 577#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay) \
045f972f 578 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
b2456779 579 0x0, TWL6030, twl6030fixed_ops)
045f972f 580
3e3d3be7 581#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) { \
fa16a5c1
DB
582 .base = offset, \
583 .id = num, \
584 .table_len = ARRAY_SIZE(label##_VSEL_table), \
585 .table = label##_VSEL_table, \
045f972f
JKS
586 .delay = turnon_delay, \
587 .remap = remap_conf, \
fa16a5c1
DB
588 .desc = { \
589 .name = #label, \
3e3d3be7 590 .id = TWL4030_REG_##label, \
66b659e6 591 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
592 .ops = &twl4030ldo_ops, \
593 .type = REGULATOR_VOLTAGE, \
594 .owner = THIS_MODULE, \
595 }, \
596 }
597
776dc923 598#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts, num) { \
3e3d3be7
RN
599 .base = offset, \
600 .id = num, \
601 .min_mV = min_mVolts, \
602 .max_mV = max_mVolts, \
3e3d3be7
RN
603 .desc = { \
604 .name = #label, \
605 .id = TWL6030_REG_##label, \
606 .n_voltages = (max_mVolts - min_mVolts)/100, \
607 .ops = &twl6030ldo_ops, \
fa16a5c1
DB
608 .type = REGULATOR_VOLTAGE, \
609 .owner = THIS_MODULE, \
610 }, \
611 }
612
3e3d3be7 613
045f972f 614#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
b2456779 615 family, operations) { \
fa16a5c1
DB
616 .base = offset, \
617 .id = num, \
618 .min_mV = mVolts, \
045f972f
JKS
619 .delay = turnon_delay, \
620 .remap = remap_conf, \
fa16a5c1
DB
621 .desc = { \
622 .name = #label, \
c4aa6f31 623 .id = family##_REG_##label, \
66b659e6 624 .n_voltages = 1, \
b2456779 625 .ops = &operations, \
fa16a5c1
DB
626 .type = REGULATOR_VOLTAGE, \
627 .owner = THIS_MODULE, \
628 }, \
629 }
630
776dc923 631#define TWL6030_FIXED_RESOURCE(label, offset, num, turnon_delay) { \
8e6de4a3
B
632 .base = offset, \
633 .id = num, \
634 .delay = turnon_delay, \
8e6de4a3
B
635 .desc = { \
636 .name = #label, \
637 .id = TWL6030_REG_##label, \
638 .ops = &twl6030_fixed_resource, \
639 .type = REGULATOR_VOLTAGE, \
640 .owner = THIS_MODULE, \
641 }, \
642 }
643
fa16a5c1
DB
644/*
645 * We list regulators here if systems need some level of
646 * software control over them after boot.
647 */
c4aa6f31 648static struct twlreg_info twl_regs[] = {
045f972f
JKS
649 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
650 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
651 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
652 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
653 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
654 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
655 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
656 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
657 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
658 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
659 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
660 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
661 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
662 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
663 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
664 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
665 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
666 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
667 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
668 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
fa16a5c1 669 /* VUSBCP is managed *only* by the USB subchip */
441a4505
RN
670
671 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
045f972f
JKS
672 /* Turnon-delay and remap configuration values for 6030 are not
673 verified since the specification is not public */
776dc923
SH
674 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1000, 3300, 1),
675 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 1000, 3300, 2),
676 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 1000, 3300, 3),
677 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 1000, 3300, 4),
678 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 1000, 3300, 5),
679 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 1000, 3300, 7),
680 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0),
681 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0),
682 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0),
683 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0),
684 TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 48, 0),
fa16a5c1
DB
685};
686
24c29020 687static int __devinit twlreg_probe(struct platform_device *pdev)
fa16a5c1
DB
688{
689 int i;
690 struct twlreg_info *info;
691 struct regulator_init_data *initdata;
692 struct regulation_constraints *c;
693 struct regulator_dev *rdev;
fa16a5c1 694
c4aa6f31
RN
695 for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
696 if (twl_regs[i].desc.id != pdev->id)
fa16a5c1 697 continue;
c4aa6f31 698 info = twl_regs + i;
fa16a5c1
DB
699 break;
700 }
701 if (!info)
702 return -ENODEV;
703
704 initdata = pdev->dev.platform_data;
705 if (!initdata)
706 return -EINVAL;
707
708 /* Constrain board-specific capabilities according to what
709 * this driver and the chip itself can actually do.
710 */
711 c = &initdata->constraints;
fa16a5c1
DB
712 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
713 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
714 | REGULATOR_CHANGE_MODE
715 | REGULATOR_CHANGE_STATUS;
205e5cd3
JKS
716 switch (pdev->id) {
717 case TWL4030_REG_VIO:
718 case TWL4030_REG_VDD1:
719 case TWL4030_REG_VDD2:
720 case TWL4030_REG_VPLL1:
721 case TWL4030_REG_VINTANA1:
722 case TWL4030_REG_VINTANA2:
723 case TWL4030_REG_VINTDIG:
724 c->always_on = true;
725 break;
726 default:
727 break;
728 }
fa16a5c1
DB
729
730 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
731 if (IS_ERR(rdev)) {
732 dev_err(&pdev->dev, "can't register %s, %ld\n",
733 info->desc.name, PTR_ERR(rdev));
734 return PTR_ERR(rdev);
735 }
736 platform_set_drvdata(pdev, rdev);
737
776dc923
SH
738 if (twl_class_is_4030())
739 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
30010fa5
JKS
740 info->remap);
741
fa16a5c1
DB
742 /* NOTE: many regulators support short-circuit IRQs (presentable
743 * as REGULATOR_OVER_CURRENT notifications?) configured via:
744 * - SC_CONFIG
745 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
746 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
747 * - IT_CONFIG
748 */
749
750 return 0;
751}
752
c4aa6f31 753static int __devexit twlreg_remove(struct platform_device *pdev)
fa16a5c1
DB
754{
755 regulator_unregister(platform_get_drvdata(pdev));
756 return 0;
757}
758
c4aa6f31 759MODULE_ALIAS("platform:twl_reg");
fa16a5c1 760
c4aa6f31
RN
761static struct platform_driver twlreg_driver = {
762 .probe = twlreg_probe,
763 .remove = __devexit_p(twlreg_remove),
fa16a5c1 764 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 765 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 766 */
c4aa6f31 767 .driver.name = "twl_reg",
fa16a5c1
DB
768 .driver.owner = THIS_MODULE,
769};
770
c4aa6f31 771static int __init twlreg_init(void)
fa16a5c1 772{
c4aa6f31 773 return platform_driver_register(&twlreg_driver);
fa16a5c1 774}
c4aa6f31 775subsys_initcall(twlreg_init);
fa16a5c1 776
c4aa6f31 777static void __exit twlreg_exit(void)
fa16a5c1 778{
c4aa6f31 779 platform_driver_unregister(&twlreg_driver);
fa16a5c1 780}
c4aa6f31 781module_exit(twlreg_exit)
fa16a5c1 782
c4aa6f31 783MODULE_DESCRIPTION("TWL regulator driver");
fa16a5c1 784MODULE_LICENSE("GPL");