projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
regulator: s5m8767: Remove max_vol parameter from s5m8767_convert_voltage_to_sel
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / regulator / s5m8767.c
CommitLineData
9767ec7f
SK		 1/*
2 * s5m8767.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/bug.h>
9767ec7f
SK		 15#include <linux/err.h>
16#include <linux/gpio.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
54227bcf
SK		 22#include <linux/mfd/samsung/core.h>
23#include <linux/mfd/samsung/s5m8767.h>
9767ec7f
SK		 24
25struct s5m8767_info {
26 struct device *dev;
63063bfb 27 struct sec_pmic_dev *iodev;
9767ec7f
SK		 28 int num_regulators;
29 struct regulator_dev **rdev;
63063bfb 30 struct sec_opmode_data *opmode;
9767ec7f
SK		 31
32 int ramp_delay;
33 bool buck2_ramp;
34 bool buck3_ramp;
35 bool buck4_ramp;
36
37 bool buck2_gpiodvs;
38 bool buck3_gpiodvs;
39 bool buck4_gpiodvs;
40 u8 buck2_vol[8];
41 u8 buck3_vol[8];
42 u8 buck4_vol[8];
43 int buck_gpios[3];
c848bc85 44 int buck_ds[3];
9767ec7f
SK		 45 int buck_gpioindex;
46};
47
63063bfb 48struct sec_voltage_desc {
9767ec7f
SK		 49 int max;
50 int min;
51 int step;
52};
53
63063bfb 54static const struct sec_voltage_desc buck_voltage_val1 = {
9767ec7f
SK		 55 .max = 2225000,
56 .min = 650000,
57 .step = 6250,
58};
59
63063bfb 60static const struct sec_voltage_desc buck_voltage_val2 = {
9767ec7f
SK		 61 .max = 1600000,
62 .min = 600000,
63 .step = 6250,
64};
65
63063bfb 66static const struct sec_voltage_desc buck_voltage_val3 = {
9767ec7f
SK		 67 .max = 3000000,
68 .min = 750000,
69 .step = 12500,
70};
71
63063bfb 72static const struct sec_voltage_desc ldo_voltage_val1 = {
9767ec7f
SK		 73 .max = 3950000,
74 .min = 800000,
75 .step = 50000,
76};
77
63063bfb 78static const struct sec_voltage_desc ldo_voltage_val2 = {
9767ec7f
SK		 79 .max = 2375000,
80 .min = 800000,
81 .step = 25000,
82};
83
63063bfb 84static const struct sec_voltage_desc *reg_voltage_map[] = {
9767ec7f
SK		 85 [S5M8767_LDO1] = &ldo_voltage_val2,
86 [S5M8767_LDO2] = &ldo_voltage_val2,
87 [S5M8767_LDO3] = &ldo_voltage_val1,
88 [S5M8767_LDO4] = &ldo_voltage_val1,
89 [S5M8767_LDO5] = &ldo_voltage_val1,
90 [S5M8767_LDO6] = &ldo_voltage_val2,
91 [S5M8767_LDO7] = &ldo_voltage_val2,
92 [S5M8767_LDO8] = &ldo_voltage_val2,
93 [S5M8767_LDO9] = &ldo_voltage_val1,
94 [S5M8767_LDO10] = &ldo_voltage_val1,
95 [S5M8767_LDO11] = &ldo_voltage_val1,
96 [S5M8767_LDO12] = &ldo_voltage_val1,
97 [S5M8767_LDO13] = &ldo_voltage_val1,
98 [S5M8767_LDO14] = &ldo_voltage_val1,
99 [S5M8767_LDO15] = &ldo_voltage_val2,
100 [S5M8767_LDO16] = &ldo_voltage_val1,
101 [S5M8767_LDO17] = &ldo_voltage_val1,
102 [S5M8767_LDO18] = &ldo_voltage_val1,
103 [S5M8767_LDO19] = &ldo_voltage_val1,
104 [S5M8767_LDO20] = &ldo_voltage_val1,
105 [S5M8767_LDO21] = &ldo_voltage_val1,
106 [S5M8767_LDO22] = &ldo_voltage_val1,
107 [S5M8767_LDO23] = &ldo_voltage_val1,
108 [S5M8767_LDO24] = &ldo_voltage_val1,
109 [S5M8767_LDO25] = &ldo_voltage_val1,
110 [S5M8767_LDO26] = &ldo_voltage_val1,
111 [S5M8767_LDO27] = &ldo_voltage_val1,
112 [S5M8767_LDO28] = &ldo_voltage_val1,
113 [S5M8767_BUCK1] = &buck_voltage_val1,
114 [S5M8767_BUCK2] = &buck_voltage_val2,
115 [S5M8767_BUCK3] = &buck_voltage_val2,
116 [S5M8767_BUCK4] = &buck_voltage_val2,
117 [S5M8767_BUCK5] = &buck_voltage_val1,
118 [S5M8767_BUCK6] = &buck_voltage_val1,
119 [S5M8767_BUCK7] = NULL,
120 [S5M8767_BUCK8] = NULL,
121 [S5M8767_BUCK9] = &buck_voltage_val3,
122};
123
5ceba7ba 124static unsigned int s5m8767_opmode_reg[][4] = {
7e44bb83
SK		 125 /* {OFF, ON, LOWPOWER, SUSPEND} */
126 /* LDO1 ... LDO28 */
127 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
128 {0x0, 0x3, 0x2, 0x1},
129 {0x0, 0x3, 0x2, 0x1},
130 {0x0, 0x0, 0x0, 0x0},
131 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
132 {0x0, 0x3, 0x2, 0x1},
133 {0x0, 0x3, 0x2, 0x1},
134 {0x0, 0x3, 0x2, 0x1},
135 {0x0, 0x3, 0x2, 0x1},
136 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
137 {0x0, 0x3, 0x2, 0x1},
138 {0x0, 0x3, 0x2, 0x1},
139 {0x0, 0x3, 0x2, 0x1},
140 {0x0, 0x3, 0x2, 0x1},
141 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
142 {0x0, 0x3, 0x2, 0x1},
143 {0x0, 0x3, 0x2, 0x1},
144 {0x0, 0x0, 0x0, 0x0},
145 {0x0, 0x3, 0x2, 0x1},
146 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
147 {0x0, 0x3, 0x2, 0x1},
148 {0x0, 0x3, 0x2, 0x1},
149 {0x0, 0x0, 0x0, 0x0},
150 {0x0, 0x3, 0x2, 0x1},
151 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
152 {0x0, 0x3, 0x2, 0x1},
153 {0x0, 0x3, 0x2, 0x1},
154 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
155
156 /* BUCK1 ... BUCK9 */
157 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
158 {0x0, 0x3, 0x1, 0x1},
159 {0x0, 0x3, 0x1, 0x1},
160 {0x0, 0x3, 0x1, 0x1},
161 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
162 {0x0, 0x3, 0x1, 0x1},
163 {0x0, 0x3, 0x1, 0x1},
164 {0x0, 0x3, 0x1, 0x1},
165 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
166};
167
168static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
169 int *enable_ctrl)
9767ec7f 170{
9bb096ff 171 int i, reg_id = rdev_get_id(rdev);
7e44bb83
SK		 172 unsigned int mode;
173 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
9767ec7f
SK		 174
175 switch (reg_id) {
176 case S5M8767_LDO1 ... S5M8767_LDO2:
177 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
178 break;
179 case S5M8767_LDO3 ... S5M8767_LDO28:
180 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
181 break;
182 case S5M8767_BUCK1:
183 *reg = S5M8767_REG_BUCK1CTRL1;
184 break;
185 case S5M8767_BUCK2 ... S5M8767_BUCK4:
186 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
187 break;
188 case S5M8767_BUCK5:
189 *reg = S5M8767_REG_BUCK5CTRL1;
190 break;
191 case S5M8767_BUCK6 ... S5M8767_BUCK9:
192 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
193 break;
194 default:
195 return -EINVAL;
196 }
197
9bb096ff
ADK		 198 for (i = 0; i < s5m8767->num_regulators; i++) {
199 if (s5m8767->opmode[i].id == reg_id) {
200 mode = s5m8767->opmode[i].mode;
201 break;
202 }
203 }
204
205 if (i < s5m8767->num_regulators)
206 *enable_ctrl =
207 s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
208
9767ec7f
SK		 209 return 0;
210}
211
212static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
213{
214 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
215 int ret, reg;
7e44bb83 216 int mask = 0xc0, enable_ctrl;
3ef30398 217 unsigned int val;
9767ec7f 218
7e44bb83 219 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
9767ec7f
SK		 220 if (ret == -EINVAL)
221 return 1;
222 else if (ret)
223 return ret;
224
63063bfb 225 ret = sec_reg_read(s5m8767->iodev, reg, &val);
9767ec7f
SK		 226 if (ret)
227 return ret;
228
7e44bb83 229 return (val & mask) == enable_ctrl;
9767ec7f
SK		 230}
231
232static int s5m8767_reg_enable(struct regulator_dev *rdev)
233{
234 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
235 int ret, reg;
7e44bb83 236 int mask = 0xc0, enable_ctrl;
9767ec7f 237
7e44bb83 238 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
9767ec7f
SK		 239 if (ret)
240 return ret;
241
63063bfb 242 return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
9767ec7f
SK		 243}
244
245static int s5m8767_reg_disable(struct regulator_dev *rdev)
246{
247 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
248 int ret, reg;
7e44bb83 249 int mask = 0xc0, enable_ctrl;
9767ec7f 250
7e44bb83 251 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
9767ec7f
SK		 252 if (ret)
253 return ret;
254
63063bfb 255 return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
9767ec7f
SK		 256}
257
258static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)
259{
0a41685f 260 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
20a14b84 261 int reg_id = rdev_get_id(rdev);
9767ec7f
SK		 262 int reg;
263
264 switch (reg_id) {
265 case S5M8767_LDO1 ... S5M8767_LDO2:
266 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
267 break;
268 case S5M8767_LDO3 ... S5M8767_LDO28:
269 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
270 break;
271 case S5M8767_BUCK1:
272 reg = S5M8767_REG_BUCK1CTRL2;
273 break;
274 case S5M8767_BUCK2:
da130ab2 275 reg = S5M8767_REG_BUCK2DVS1;
0a41685f
AL		 276 if (s5m8767->buck2_gpiodvs)
277 reg += s5m8767->buck_gpioindex;
9767ec7f
SK		 278 break;
279 case S5M8767_BUCK3:
da130ab2 280 reg = S5M8767_REG_BUCK3DVS1;
0a41685f
AL		 281 if (s5m8767->buck3_gpiodvs)
282 reg += s5m8767->buck_gpioindex;
9767ec7f
SK		 283 break;
284 case S5M8767_BUCK4:
da130ab2 285 reg = S5M8767_REG_BUCK4DVS1;
0a41685f
AL		 286 if (s5m8767->buck4_gpiodvs)
287 reg += s5m8767->buck_gpioindex;
9767ec7f
SK		 288 break;
289 case S5M8767_BUCK5:
290 reg = S5M8767_REG_BUCK5CTRL2;
291 break;
292 case S5M8767_BUCK6 ... S5M8767_BUCK9:
293 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
294 break;
295 default:
296 return -EINVAL;
297 }
298
299 *_reg = reg;
300
301 return 0;
302}
303
304static int s5m8767_get_voltage_sel(struct regulator_dev *rdev)
305{
306 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
0a41685f 307 int reg, mask, ret;
20a14b84 308 int reg_id = rdev_get_id(rdev);
3ef30398 309 unsigned int val;
9767ec7f
SK		 310
311 ret = s5m8767_get_voltage_register(rdev, &reg);
312 if (ret)
313 return ret;
314
0a41685f 315 mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff;
9767ec7f 316
63063bfb 317 ret = sec_reg_read(s5m8767->iodev, reg, &val);
9767ec7f
SK		 318 if (ret)
319 return ret;
320
321 val &= mask;
322
323 return val;
324}
325
854f73ec
AL		 326static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
327 int min_vol)
9767ec7f 328{
5b5e977c 329 int selector = 0;
9767ec7f
SK		 330
331 if (desc == NULL)
332 return -EINVAL;
333
854f73ec 334 if (min_vol > desc->max)
9767ec7f
SK		 335 return -EINVAL;
336
94e85a3c
AL		 337 if (min_vol < desc->min)
338 min_vol = desc->min;
339
340 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
9767ec7f 341
854f73ec 342 if (desc->min + desc->step * selector > desc->max)
9767ec7f
SK		 343 return -EINVAL;
344
5b5e977c 345 return selector;
9767ec7f
SK		 346}
347
df2643cf 348static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
321d2aba
AL		 349{
350 int temp_index = s5m8767->buck_gpioindex;
351
352 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
353 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
354 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
df2643cf
SK		 355
356 return 0;
321d2aba
AL		 357}
358
df2643cf 359static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
321d2aba
AL		 360{
361 int temp_index = s5m8767->buck_gpioindex;
362
363 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
364 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
365 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
df2643cf
SK		 366
367 return 0;
321d2aba
AL		 368}
369
df2643cf
SK		 370static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
371 unsigned selector)
9767ec7f
SK		 372{
373 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
20a14b84 374 int reg_id = rdev_get_id(rdev);
df2643cf 375 int reg, mask, ret = 0, old_index, index = 0;
321d2aba 376 u8 *buck234_vol = NULL;
9767ec7f
SK		 377
378 switch (reg_id) {
379 case S5M8767_LDO1 ... S5M8767_LDO28:
380 mask = 0x3f;
381 break;
382 case S5M8767_BUCK1 ... S5M8767_BUCK6:
383 mask = 0xff;
321d2aba
AL		 384 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
385 buck234_vol = &s5m8767->buck2_vol[0];
386 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
387 buck234_vol = &s5m8767->buck3_vol[0];
388 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
389 buck234_vol = &s5m8767->buck4_vol[0];
9767ec7f
SK		 390 break;
391 case S5M8767_BUCK7 ... S5M8767_BUCK8:
392 return -EINVAL;
393 case S5M8767_BUCK9:
394 mask = 0xff;
395 break;
396 default:
397 return -EINVAL;
398 }
399
321d2aba
AL		 400 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
401 if (buck234_vol) {
df2643cf 402 while (*buck234_vol != selector) {
321d2aba
AL		 403 buck234_vol++;
404 index++;
405 }
406 old_index = s5m8767->buck_gpioindex;
407 s5m8767->buck_gpioindex = index;
408
409 if (index > old_index)
df2643cf 410 return s5m8767_set_high(s5m8767);
321d2aba 411 else
df2643cf 412 return s5m8767_set_low(s5m8767);
321d2aba
AL		 413 } else {
414 ret = s5m8767_get_voltage_register(rdev, &reg);
415 if (ret)
416 return ret;
417
3e701cdf 418 return sec_reg_update(s5m8767->iodev, reg, selector, mask);
321d2aba 419 }
9767ec7f
SK		 420}
421
9767ec7f
SK		 422static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
423 unsigned int old_sel,
424 unsigned int new_sel)
425{
426 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
63063bfb 427 const struct sec_voltage_desc *desc;
20a14b84 428 int reg_id = rdev_get_id(rdev);
9767ec7f 429
9767ec7f
SK		 430 desc = reg_voltage_map[reg_id];
431
9d88fc0b 432 if ((old_sel < new_sel) && s5m8767->ramp_delay)
89e0f0e4 433 return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
0f8b9c77 434 s5m8767->ramp_delay * 1000);
89e0f0e4 435 return 0;
9767ec7f
SK		 436}
437
d35aad0c 438static struct regulator_ops s5m8767_ops = {
e2eb169b 439 .list_voltage = regulator_list_voltage_linear,
9767ec7f
SK		 440 .is_enabled = s5m8767_reg_is_enabled,
441 .enable = s5m8767_reg_enable,
442 .disable = s5m8767_reg_disable,
443 .get_voltage_sel = s5m8767_get_voltage_sel,
df2643cf 444 .set_voltage_sel = s5m8767_set_voltage_sel,
9767ec7f
SK		 445 .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
446};
447
e2eb169b
AL		 448static struct regulator_ops s5m8767_buck78_ops = {
449 .is_enabled = s5m8767_reg_is_enabled,
450 .enable = s5m8767_reg_enable,
451 .disable = s5m8767_reg_disable,
452};
453
65896e73
AL		 454#define s5m8767_regulator_desc(_name) { \
455 .name = #_name, \
456 .id = S5M8767_##_name, \
457 .ops = &s5m8767_ops, \
9767ec7f
SK		 458 .type = REGULATOR_VOLTAGE, \
459 .owner = THIS_MODULE, \
460}
461
e2eb169b
AL		 462#define s5m8767_regulator_buck78_desc(_name) { \
463 .name = #_name, \
464 .id = S5M8767_##_name, \
465 .ops = &s5m8767_buck78_ops, \
466 .type = REGULATOR_VOLTAGE, \
467 .owner = THIS_MODULE, \
468}
469
9767ec7f 470static struct regulator_desc regulators[] = {
65896e73
AL		 471 s5m8767_regulator_desc(LDO1),
472 s5m8767_regulator_desc(LDO2),
473 s5m8767_regulator_desc(LDO3),
474 s5m8767_regulator_desc(LDO4),
475 s5m8767_regulator_desc(LDO5),
476 s5m8767_regulator_desc(LDO6),
477 s5m8767_regulator_desc(LDO7),
478 s5m8767_regulator_desc(LDO8),
479 s5m8767_regulator_desc(LDO9),
480 s5m8767_regulator_desc(LDO10),
481 s5m8767_regulator_desc(LDO11),
482 s5m8767_regulator_desc(LDO12),
483 s5m8767_regulator_desc(LDO13),
484 s5m8767_regulator_desc(LDO14),
485 s5m8767_regulator_desc(LDO15),
486 s5m8767_regulator_desc(LDO16),
487 s5m8767_regulator_desc(LDO17),
488 s5m8767_regulator_desc(LDO18),
489 s5m8767_regulator_desc(LDO19),
490 s5m8767_regulator_desc(LDO20),
491 s5m8767_regulator_desc(LDO21),
492 s5m8767_regulator_desc(LDO22),
493 s5m8767_regulator_desc(LDO23),
494 s5m8767_regulator_desc(LDO24),
495 s5m8767_regulator_desc(LDO25),
496 s5m8767_regulator_desc(LDO26),
497 s5m8767_regulator_desc(LDO27),
498 s5m8767_regulator_desc(LDO28),
499 s5m8767_regulator_desc(BUCK1),
500 s5m8767_regulator_desc(BUCK2),
501 s5m8767_regulator_desc(BUCK3),
502 s5m8767_regulator_desc(BUCK4),
503 s5m8767_regulator_desc(BUCK5),
504 s5m8767_regulator_desc(BUCK6),
e2eb169b
AL		 505 s5m8767_regulator_buck78_desc(BUCK7),
506 s5m8767_regulator_buck78_desc(BUCK8),
65896e73 507 s5m8767_regulator_desc(BUCK9),
9767ec7f
SK		 508};
509
a5023574 510static int s5m8767_pmic_probe(struct platform_device *pdev)
9767ec7f 511{
63063bfb
SK		 512 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
513 struct sec_platform_data *pdata = dev_get_platdata(iodev->dev);
c172708d 514 struct regulator_config config = { };
9767ec7f
SK		 515 struct regulator_dev **rdev;
516 struct s5m8767_info *s5m8767;
c848bc85 517 int i, ret, size, buck_init;
9767ec7f
SK		 518
519 if (!pdata) {
520 dev_err(pdev->dev.parent, "Platform data not supplied\n");
521 return -ENODEV;
522 }
523
6c4efe24
AL		 524 if (pdata->buck2_gpiodvs) {
525 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
526 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
527 return -EINVAL;
528 }
529 }
530
531 if (pdata->buck3_gpiodvs) {
532 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
533 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
534 return -EINVAL;
535 }
536 }
537
538 if (pdata->buck4_gpiodvs) {
539 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
540 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
541 return -EINVAL;
542 }
543 }
544
9767ec7f
SK		 545 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
546 GFP_KERNEL);
547 if (!s5m8767)
548 return -ENOMEM;
549
550 size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
551 s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
552 if (!s5m8767->rdev)
553 return -ENOMEM;
554
555 rdev = s5m8767->rdev;
556 s5m8767->dev = &pdev->dev;
557 s5m8767->iodev = iodev;
9bb096ff 558 s5m8767->num_regulators = pdata->num_regulators;
9767ec7f 559 platform_set_drvdata(pdev, s5m8767);
9767ec7f
SK		 560
561 s5m8767->buck_gpioindex = pdata->buck_default_idx;
562 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
563 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
564 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
565 s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
566 s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
567 s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
c848bc85
SK		 568 s5m8767->buck_ds[0] = pdata->buck_ds[0];
569 s5m8767->buck_ds[1] = pdata->buck_ds[1];
570 s5m8767->buck_ds[2] = pdata->buck_ds[2];
571
9767ec7f
SK		 572 s5m8767->ramp_delay = pdata->buck_ramp_delay;
573 s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
574 s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
575 s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
7e44bb83 576 s5m8767->opmode = pdata->opmode;
9767ec7f 577
c848bc85 578 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
854f73ec 579 pdata->buck2_init);
c848bc85 580
938e05bf 581 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
c848bc85
SK		 582
583 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
854f73ec 584 pdata->buck3_init);
c848bc85 585
938e05bf 586 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
c848bc85
SK		 587
588 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
854f73ec 589 pdata->buck4_init);
c848bc85 590
938e05bf 591 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
c848bc85 592
9767ec7f
SK		 593 for (i = 0; i < 8; i++) {
594 if (s5m8767->buck2_gpiodvs) {
595 s5m8767->buck2_vol[i] =
5b5e977c 596 s5m8767_convert_voltage_to_sel(
9767ec7f 597 &buck_voltage_val2,
854f73ec 598 pdata->buck2_voltage[i]);
9767ec7f
SK		 599 }
600
601 if (s5m8767->buck3_gpiodvs) {
602 s5m8767->buck3_vol[i] =
5b5e977c 603 s5m8767_convert_voltage_to_sel(
9767ec7f 604 &buck_voltage_val2,
854f73ec 605 pdata->buck3_voltage[i]);
9767ec7f
SK		 606 }
607
608 if (s5m8767->buck4_gpiodvs) {
609 s5m8767->buck4_vol[i] =
5b5e977c 610 s5m8767_convert_voltage_to_sel(
9767ec7f 611 &buck_voltage_val2,
854f73ec 612 pdata->buck4_voltage[i]);
9767ec7f
SK		 613 }
614 }
615
76c854d1
ADK		 616 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
617 pdata->buck4_gpiodvs) {
618
619 if (!gpio_is_valid(pdata->buck_gpios[0]) ||
620 !gpio_is_valid(pdata->buck_gpios[1]) ||
621 !gpio_is_valid(pdata->buck_gpios[2])) {
622 dev_err(&pdev->dev, "GPIO NOT VALID\n");
623 return -EINVAL;
624 }
625
5febb3c9
AL		 626 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
627 "S5M8767 SET1");
628 if (ret)
629 return ret;
630
631 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
632 "S5M8767 SET2");
633 if (ret)
634 return ret;
635
636 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
637 "S5M8767 SET3");
638 if (ret)
639 return ret;
640
c848bc85
SK		 641 /* SET1 GPIO */
642 gpio_direction_output(pdata->buck_gpios[0],
643 (s5m8767->buck_gpioindex >> 2) & 0x1);
644 /* SET2 GPIO */
645 gpio_direction_output(pdata->buck_gpios[1],
646 (s5m8767->buck_gpioindex >> 1) & 0x1);
647 /* SET3 GPIO */
648 gpio_direction_output(pdata->buck_gpios[2],
649 (s5m8767->buck_gpioindex >> 0) & 0x1);
9767ec7f
SK		 650 }
651
5febb3c9
AL		 652 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
653 if (ret)
654 return ret;
c848bc85 655
5febb3c9
AL		 656 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
657 if (ret)
658 return ret;
c848bc85 659
5febb3c9
AL		 660 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
661 if (ret)
662 return ret;
c848bc85
SK		 663
664 /* DS2 GPIO */
665 gpio_direction_output(pdata->buck_ds[0], 0x0);
666 /* DS3 GPIO */
667 gpio_direction_output(pdata->buck_ds[1], 0x0);
668 /* DS4 GPIO */
669 gpio_direction_output(pdata->buck_ds[2], 0x0);
670
671 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
672 pdata->buck4_gpiodvs) {
3e701cdf 673 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
c848bc85
SK		 674 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
675 1 << 1);
3e701cdf 676 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
c848bc85
SK		 677 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
678 1 << 1);
3e701cdf 679 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
c848bc85
SK		 680 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
681 1 << 1);
682 }
9767ec7f
SK		 683
684 /* Initialize GPIO DVS registers */
685 for (i = 0; i < 8; i++) {
686 if (s5m8767->buck2_gpiodvs) {
63063bfb 687 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
9767ec7f
SK		 688 s5m8767->buck2_vol[i]);
689 }
690
691 if (s5m8767->buck3_gpiodvs) {
63063bfb 692 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
9767ec7f
SK		 693 s5m8767->buck3_vol[i]);
694 }
695
696 if (s5m8767->buck4_gpiodvs) {
63063bfb 697 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
9767ec7f
SK		 698 s5m8767->buck4_vol[i]);
699 }
700 }
9767ec7f
SK		 701
702 if (s5m8767->buck2_ramp)
63063bfb 703 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
9767ec7f
SK		 704
705 if (s5m8767->buck3_ramp)
63063bfb 706 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
9767ec7f
SK		 707
708 if (s5m8767->buck4_ramp)
63063bfb 709 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
9767ec7f
SK		 710
711 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
712 || s5m8767->buck4_ramp) {
713 switch (s5m8767->ramp_delay) {
1af142c6 714 case 5:
63063bfb 715 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
1af142c6
SK		 716 0x40, 0xf0);
717 break;
718 case 10:
3e701cdf 719 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
1af142c6 720 0x90, 0xf0);
047ec220 721 break;
9767ec7f 722 case 25:
63063bfb 723 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f 724 0xd0, 0xf0);
047ec220 725 break;
9767ec7f 726 case 50:
63063bfb 727 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f 728 0xe0, 0xf0);
047ec220 729 break;
9767ec7f 730 case 100:
63063bfb 731 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f 732 0xf0, 0xf0);
047ec220 733 break;
9767ec7f 734 default:
63063bfb 735 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f
SK		 736 0x90, 0xf0);
737 }
738 }
739
740 for (i = 0; i < pdata->num_regulators; i++) {
63063bfb 741 const struct sec_voltage_desc *desc;
9767ec7f
SK		 742 int id = pdata->regulators[i].id;
743
744 desc = reg_voltage_map[id];
e2eb169b 745 if (desc) {
9767ec7f
SK		 746 regulators[id].n_voltages =
747 (desc->max - desc->min) / desc->step + 1;
e2eb169b
AL		 748 regulators[id].min_uV = desc->min;
749 regulators[id].uV_step = desc->step;
750 }
9767ec7f 751
c172708d
MB		 752 config.dev = s5m8767->dev;
753 config.init_data = pdata->regulators[i].initdata;
754 config.driver_data = s5m8767;
755
756 rdev[i] = regulator_register(&regulators[id], &config);
9767ec7f
SK		 757 if (IS_ERR(rdev[i])) {
758 ret = PTR_ERR(rdev[i]);
759 dev_err(s5m8767->dev, "regulator init failed for %d\n",
760 id);
761 rdev[i] = NULL;
762 goto err;
763 }
764 }
765
766 return 0;
767err:
768 for (i = 0; i < s5m8767->num_regulators; i++)
769 if (rdev[i])
770 regulator_unregister(rdev[i]);
771
772 return ret;
773}
774
8dc995f5 775static int s5m8767_pmic_remove(struct platform_device *pdev)
9767ec7f
SK		 776{
777 struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
778 struct regulator_dev **rdev = s5m8767->rdev;
779 int i;
780
781 for (i = 0; i < s5m8767->num_regulators; i++)
782 if (rdev[i])
783 regulator_unregister(rdev[i]);
784
785 return 0;
786}
787
788static const struct platform_device_id s5m8767_pmic_id[] = {
789 { "s5m8767-pmic", 0},
790 { },
791};
792MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
793
794static struct platform_driver s5m8767_pmic_driver = {
795 .driver = {
796 .name = "s5m8767-pmic",
797 .owner = THIS_MODULE,
798 },
799 .probe = s5m8767_pmic_probe,
5eb9f2b9 800 .remove = s5m8767_pmic_remove,
9767ec7f
SK		 801 .id_table = s5m8767_pmic_id,
802};
803
804static int __init s5m8767_pmic_init(void)
805{
806 return platform_driver_register(&s5m8767_pmic_driver);
807}
808subsys_initcall(s5m8767_pmic_init);
809
810static void __exit s5m8767_pmic_exit(void)
811{
812 platform_driver_unregister(&s5m8767_pmic_driver);
813}
814module_exit(s5m8767_pmic_exit);
815
816/* Module information */
817MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
818MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
819MODULE_LICENSE("GPL");